sim/testsuite/frv/stq.cgs

   1 # frv testcase for stq $GRk,@($GRi,$GRj)
   2 # mach: frv
   3 # as(frv): -mcpu=frv
   4
   5         .include "testutils.inc"
   6
   7         start
   8
   9         .global stq
  10 stq:
  11         set_mem_limmed  0xbeef,0xdead,sp
  12         inc_gr_immed    -4,sp
  13         set_mem_limmed  0xdead,0xbeef,sp
  14         inc_gr_immed    -4,sp
  15         set_mem_limmed  0xdead,0xdead,sp
  16         inc_gr_immed    -4,sp
  17         set_mem_limmed  0xbeef,0xbeef,sp
  18         set_gr_immed    0,gr7
  19         set_gr_limmed   0xbeef,0xdead,gr8
  20         set_gr_limmed   0xdead,0xbeef,gr9
  21         set_gr_limmed   0xdead,0xdead,gr10
  22         set_gr_limmed   0xbeef,0xbeef,gr11
  23         stq             gr8,@(sp,gr7)
  24         test_mem_limmed 0xbeef,0xdead,sp
  25         inc_gr_immed    4,sp
  26         test_mem_limmed 0xdead,0xbeef,sp
  27         inc_gr_immed    4,sp
  28         test_mem_limmed 0xdead,0xdead,sp
  29         inc_gr_immed    4,sp
  30         test_mem_limmed 0xbeef,0xbeef,sp
  31
  32         set_mem_limmed  0xbeef,0xdead,sp
  33         inc_gr_immed    -4,sp
  34         set_mem_limmed  0xdead,0xbeef,sp
  35         inc_gr_immed    -4,sp
  36         set_mem_limmed  0xdead,0xdead,sp
  37         inc_gr_immed    -4,sp
  38         set_mem_limmed  0xbeef,0xbeef,sp
  39         set_gr_gr       sp,gr4          ; sp is gr1
  40         set_gr_limmed   0xbeef,0xdead,gr0
  41         set_gr_limmed   0xdead,0xbeef,gr1
  42         set_gr_limmed   0xdead,0xdead,gr2
  43         set_gr_limmed   0xbeef,0xbeef,gr3
  44         stq             gr0,@(gr4,gr7)
  45         test_mem_immed  0,gr4
  46         inc_gr_immed    4,gr4
  47         test_mem_immed  0,gr4
  48         inc_gr_immed    4,gr4
  49         test_mem_immed  0,gr4
  50         inc_gr_immed    4,gr4
  51         test_mem_immed  0,gr4
  52
  53         pass