RISC-V: Cleanup the imply code and test cases for vendor xsf extensions.
[binutils-gdb.git] / sim / testsuite / mips / fpu64-ps-sb1.s
bloba39d0799c0d9203f5beff49c281137a895db0b16
1 # mips test sanity, expected to pass.
2 # mach: sb1
3 # as: -mabi=eabi
4 # ld: -N -Ttext=0x80010000
5 # output: *\\npass\\n
7 .include "testutils.inc"
9 .macro check_ps psval, upperval, lowerval
10 .set push
11 .set noreorder
12 cvt.s.pu $f0, \psval # upper
13 cvt.s.pl $f2, \psval # lower
14 li.s $f4, \upperval
15 li.s $f6, \lowerval
16 c.eq.s $fcc0, $f0, $f4
17 bc1f $fcc0, _fail
18 c.eq.s $fcc0, $f2, $f6
19 bc1f $fcc0, _fail
20 nop
21 .set pop
22 .endm
24 setup
26 .set noreorder
28 .ent DIAG
29 DIAG:
31 # make sure that Status.FR, .CU1, and .SBX are set.
32 mfc0 $2, $12
33 or $2, $2, (1 << 26) | (1 << 29) | (1 << 16)
34 mtc0 $2, $12
37 li.s $f10, 4.0
38 li.s $f12, 16.0
39 cvt.ps.s $f20, $f10, $f12 # $f20: u=4.0, l=16.0
41 li.s $f10, -1.0
42 li.s $f12, 2.0
43 cvt.ps.s $f22, $f10, $f12 # $f22: u=-1.0, l=2.0
46 writemsg "div.ps"
48 div.ps $f8, $f20, $f22
49 check_ps $f8, -4.0, 8.0
52 writemsg "recip.ps"
54 recip.ps $f8, $f20
55 check_ps $f8, 0.25, 0.0625
58 writemsg "rsqrt.ps"
60 rsqrt.ps $f8, $f20
61 check_ps $f8, 0.5, 0.25
64 writemsg "sqrt.ps"
66 sqrt.ps $f8, $f20
67 check_ps $f8, 2.0, 4.0
70 pass
72 .end DIAG