1 /* i960 exception, interrupt, and trap (EIT) support
2 Copyright (C) 1998, 1999 Free Software Foundation, Inc.
3 Contributed by Cygnus Solutions.
5 This file is part of GDB, the GNU debugger.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License along
18 with this program; if not, write to the Free Software Foundation, Inc.,
19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22 #include "targ-vals.h"
24 /* The semantic code invokes this for illegal (unrecognized) instructions. */
27 sim_engine_invalid_insn (SIM_CPU
*current_cpu
, IADDR cia
, SEM_PC vpc
)
29 SIM_DESC sd
= CPU_STATE (current_cpu
);
32 if (STATE_ENVIRONMENT (sd
) == OPERATING_ENVIRONMENT
)
34 h_bsm_set (current_cpu
, h_sm_get (current_cpu
));
35 h_bie_set (current_cpu
, h_ie_get (current_cpu
));
36 h_bcond_set (current_cpu
, h_cond_get (current_cpu
));
38 h_ie_set (current_cpu
, 0);
39 h_cond_set (current_cpu
, 0);
41 h_bpc_set (current_cpu
, cia
);
43 sim_engine_restart (CPU_STATE (current_cpu
), current_cpu
, NULL
,
48 sim_engine_halt (sd
, current_cpu
, NULL
, cia
, sim_stopped
, SIM_SIGILL
);
52 /* Process an address exception. */
55 i960_core_signal (SIM_DESC sd
, SIM_CPU
*current_cpu
, sim_cia cia
,
56 unsigned int map
, int nr_bytes
, address_word addr
,
57 transfer_type transfer
, sim_core_signals sig
)
60 if (STATE_ENVIRONMENT (sd
) == OPERATING_ENVIRONMENT
)
62 h_bsm_set (current_cpu
, h_sm_get (current_cpu
));
63 h_bie_set (current_cpu
, h_ie_get (current_cpu
));
64 h_bcond_set (current_cpu
, h_cond_get (current_cpu
));
66 h_ie_set (current_cpu
, 0);
67 h_cond_set (current_cpu
, 0);
69 h_bpc_set (current_cpu
, cia
);
71 sim_engine_restart (CPU_STATE (current_cpu
), current_cpu
, NULL
,
76 sim_core_signal (sd
, current_cpu
, cia
, map
, nr_bytes
, addr
,
80 /* Read/write functions for system call interface. */
83 syscall_read_mem (host_callback
*cb
, struct cb_syscall
*sc
,
84 unsigned long taddr
, char *buf
, int bytes
)
86 SIM_DESC sd
= (SIM_DESC
) sc
->p1
;
87 SIM_CPU
*cpu
= (SIM_CPU
*) sc
->p2
;
89 return sim_core_read_buffer (sd
, cpu
, read_map
, buf
, taddr
, bytes
);
93 syscall_write_mem (host_callback
*cb
, struct cb_syscall
*sc
,
94 unsigned long taddr
, const char *buf
, int bytes
)
96 SIM_DESC sd
= (SIM_DESC
) sc
->p1
;
97 SIM_CPU
*cpu
= (SIM_CPU
*) sc
->p2
;
99 return sim_core_write_buffer (sd
, cpu
, write_map
, buf
, taddr
, bytes
);
103 The result is the pc address to continue at.
104 Preprocessing like saving the various registers has already been done. */
107 i960_trap (SIM_CPU
*current_cpu
, PCADDR pc
, int num
)
109 SIM_DESC sd
= CPU_STATE (current_cpu
);
110 host_callback
*cb
= STATE_CALLBACK (sd
);
112 #ifdef SIM_HAVE_BREAKPOINTS
113 /* Check for breakpoints "owned" by the simulator first, regardless
115 if (num
== TRAP_BREAKPOINT
)
117 /* First try sim-break.c. If it's a breakpoint the simulator "owns"
118 it doesn't return. Otherwise it returns and let's us try. */
119 sim_handle_breakpoint (sd
, current_cpu
, pc
);
125 /* ??? wilson, don't know what this does. */
126 if (STATE_ENVIRONMENT (sd
) == OPERATING_ENVIRONMENT
)
128 /* The new pc is the trap vector entry.
129 We assume there's a branch there to some handler. */
130 USI new_pc
= EIT_TRAP_BASE_ADDR
+ num
* 4;
142 CB_SYSCALL_INIT (&s
);
144 s
.arg1
= a_i960_h_gr_get (current_cpu
, 16);
145 s
.arg2
= a_i960_h_gr_get (current_cpu
, 17);
146 s
.arg3
= a_i960_h_gr_get (current_cpu
, 18);
148 if (s
.func
== TARGET_SYS_exit
)
150 sim_engine_halt (sd
, current_cpu
, NULL
, pc
, sim_exited
, s
.arg1
);
154 s
.p2
= (PTR
) current_cpu
;
155 s
.read_mem
= syscall_read_mem
;
156 s
.write_mem
= syscall_write_mem
;
158 /* ??? This stuff is probably wrong, but libgloss doesn't look at
159 these values, so it shouldn't matter. */
160 a_i960_h_gr_set (current_cpu
, 18, s
.errcode
);
161 a_i960_h_gr_set (current_cpu
, 16, s
.result
);
162 a_i960_h_gr_set (current_cpu
, 17, s
.result2
);
166 case TRAP_BREAKPOINT
:
167 sim_engine_halt (sd
, current_cpu
, NULL
, NULL_CIA
,
168 sim_stopped
, SIM_SIGTRAP
);
172 /* ??? wilson, don't know what this does. */
175 USI new_pc
= EIT_TRAP_BASE_ADDR
+ num
* 4;
181 /* Fake an "rte" insn. */
182 /* FIXME: Should duplicate all of rte processing. */
183 return (pc
& -4) + 4;
186 /* Breakpoint support.
187 The result is the pc address to continue at. */
188 /* ??? This is an editted copy of the above. */
191 i960_breakpoint (SIM_CPU
*current_cpu
, PCADDR pc
)
193 SIM_DESC sd
= CPU_STATE (current_cpu
);
194 host_callback
*cb
= STATE_CALLBACK (sd
);
196 #ifdef SIM_HAVE_BREAKPOINTS
197 /* Check for breakpoints "owned" by the simulator first, regardless
199 if (num
== TRAP_BREAKPOINT
)
201 /* First try sim-break.c. If it's a breakpoint the simulator "owns"
202 it doesn't return. Otherwise it returns and let's us try. */
203 sim_handle_breakpoint (sd
, current_cpu
, pc
);
208 sim_engine_halt (sd
, current_cpu
, NULL
, NULL_CIA
,
209 sim_stopped
, SIM_SIGTRAP
);
211 /* Fake an "rte" insn. */
212 /* FIXME: Should duplicate all of rte processing. */
213 return (pc
& -4) + 4;