| blob | bcc36161f7cb374c98ee1f010acb2b16b8768a1b |
1 ; Renesas M32C CPU description. -*- Scheme -*-
2 ;
3 ; Copyright 2005, 2006, 2007, 2009 Free Software Foundation, Inc.
4 ;
5 ; Contributed by Red Hat Inc; developed under contract from Renesas.
6 ;
7 ; This file is part of the GNU Binutils.
8 ;
9 ; This program is free software; you can redistribute it and/or modify
10 ; it under the terms of the GNU General Public License as published by
11 ; the Free Software Foundation; either version 3 of the License, or
12 ; (at your option) any later version.
13 ;
14 ; This program is distributed in the hope that it will be useful,
15 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
16 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 ; GNU General Public License for more details.
18 ;
19 ; You should have received a copy of the GNU General Public License
20 ; along with this program; if not, write to the Free Software
21 ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22 ; MA 02110-1301, USA.
24 (include "simplify.inc")
26 (define-arch
27 (name m32c)
28 (comment "Renesas M32C")
29 (default-alignment forced)
30 (insn-lsb0? #f)
31 (machs m16c m32c)
32 (isas m16c m32c)
33 )
35 (define-isa
36 (name m16c)
38 (default-insn-bitsize 32)
40 ; Number of bytes of insn we can initially fetch.
41 (base-insn-bitsize 32)
43 ; Used in computing bit numbers.
44 (default-insn-word-bitsize 32)
46 (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by.
48 ; fetches 1 insn at a time.
49 (liw-insns 1)
51 ; executes 1 insn at a time.
52 (parallel-insns 1)
53 )
55 (define-isa
56 (name m32c)
58 (default-insn-bitsize 32)
60 ; Number of bytes of insn we can initially fetch.
61 (base-insn-bitsize 32)
63 ; Used in computing bit numbers.
64 (default-insn-word-bitsize 32)
66 (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by.
68 ; fetches 1 insn at a time.
69 (liw-insns 1)
71 ; executes 1 insn at a time.
72 (parallel-insns 1)
73 )
75 (define-cpu
76 ; cpu names must be distinct from the architecture name and machine names.
77 ; The "b" suffix stands for "base" and is the convention.
78 ; The "f" suffix stands for "family" and is the convention.
79 (name m16cbf)
80 (comment "Renesas M16C base family")
81 (insn-endian big)
82 (data-endian little)
83 (word-bitsize 16)
84 )
86 (define-cpu
87 ; cpu names must be distinct from the architecture name and machine names.
88 ; The "b" suffix stands for "base" and is the convention.
89 ; The "f" suffix stands for "family" and is the convention.
90 (name m32cbf)
91 (comment "Renesas M32C base family")
92 (insn-endian big)
93 (data-endian little)
94 (word-bitsize 16)
95 )
97 (define-mach
98 (name m16c)
99 (comment "Generic M16C cpu")
100 (cpu m32cbf)
101 )
103 (define-mach
104 (name m32c)
105 (comment "Generic M32C cpu")
106 (cpu m32cbf)
107 )
109 ; Model descriptions.
111 (define-model
112 (name m16c)
113 (comment "m16c") (attrs)
114 (mach m16c)
116 ; `state' is a list of variables for recording model state
117 ; (state)
118 (unit u-exec "Execution Unit" ()
119 1 1 ; issue done
120 () ; state
121 () ; inputs
122 () ; outputs
123 () ; profile action (default)
124 )
125 )
127 (define-model
128 (name m32c)
129 (comment "m32c") (attrs)
130 (mach m32c)
132 ; `state' is a list of variables for recording model state
133 ; (state)
134 (unit u-exec "Execution Unit" ()
135 1 1 ; issue done
136 () ; state
137 () ; inputs
138 () ; outputs
139 () ; profile action (default)
140 )
141 )
143 (define-attr
144 (type enum)
145 (name RL_TYPE)
146 (values NONE JUMP 1ADDR 2ADDR)
147 (default NONE)
148 )
150 ; Macros to simplify MACH attribute specification.
152 (define-pmacro all-isas () (ISA m16c,m32c))
153 (define-pmacro m16c-isa () (ISA m16c))
154 (define-pmacro m32c-isa () (ISA m32c))
156 (define-pmacro MACH16 (MACH m16c))
157 (define-pmacro MACH32 (MACH m32c))
159 (define-pmacro (machine size)
160 (MACH (.sym m size c)) (ISA (.sym m size c)))
162 (define-pmacro RL_JUMP (RL_TYPE JUMP))
163 (define-pmacro RL_1ADDR (RL_TYPE 1ADDR))
164 (define-pmacro RL_2ADDR (RL_TYPE 2ADDR))
166 \f
167 ;=============================================================
168 ; Fields
169 ;-------------------------------------------------------------
170 ; Main opcodes
171 ;
172 (dnf f-0-1 "opcode" (all-isas) 0 1)
173 (dnf f-0-2 "opcode" (all-isas) 0 2)
174 (dnf f-0-3 "opcode" (all-isas) 0 3)
175 (dnf f-0-4 "opcode" (all-isas) 0 4)
176 (dnf f-1-3 "opcode" (all-isas) 1 3)
177 (dnf f-2-2 "opcode" (all-isas) 2 2)
178 (dnf f-3-4 "opcode" (all-isas) 3 4)
179 (dnf f-3-1 "opcode" (all-isas) 3 1)
180 (dnf f-4-1 "opcode" (all-isas) 4 1)
181 (dnf f-4-3 "opcode" (all-isas) 4 3)
182 (dnf f-4-4 "opcode" (all-isas) 4 4)
183 (dnf f-4-6 "opcode" (all-isas) 4 6)
184 (dnf f-5-1 "opcode" (all-isas) 5 1)
185 (dnf f-5-3 "opcode" (all-isas) 5 3)
186 (dnf f-6-2 "opcode" (all-isas) 6 2)
187 (dnf f-7-1 "opcode" (all-isas) 7 1)
188 (dnf f-8-1 "opcode" (all-isas) 8 1)
189 (dnf f-8-2 "opcode" (all-isas) 8 2)
190 (dnf f-8-3 "opcode" (all-isas) 8 3)
191 (dnf f-8-4 "opcode" (all-isas) 8 4)
192 (dnf f-8-8 "opcode" (all-isas) 8 8)
193 (dnf f-9-3 "opcode" (all-isas) 9 3)
194 (dnf f-9-1 "opcode" (all-isas) 9 1)
195 (dnf f-10-1 "opcode" (all-isas) 10 1)
196 (dnf f-10-2 "opcode" (all-isas) 10 2)
197 (dnf f-10-3 "opcode" (all-isas) 10 3)
198 (dnf f-11-1 "opcode" (all-isas) 11 1)
199 (dnf f-12-1 "opcode" (all-isas) 12 1)
200 (dnf f-12-2 "opcode" (all-isas) 12 2)
201 (dnf f-12-3 "opcode" (all-isas) 12 3)
202 (dnf f-12-4 "opcode" (all-isas) 12 4)
203 (dnf f-12-6 "opcode" (all-isas) 12 6)
204 (dnf f-13-3 "opcode" (all-isas) 13 3)
205 (dnf f-14-1 "opcode" (all-isas) 14 1)
206 (dnf f-14-2 "opcode" (all-isas) 14 2)
207 (dnf f-15-1 "opcode" (all-isas) 15 1)
208 (dnf f-16-1 "opcode" (all-isas) 16 1)
209 (dnf f-16-2 "opcode" (all-isas) 16 2)
210 (dnf f-16-4 "opcode" (all-isas) 16 4)
211 (dnf f-16-8 "opcode" (all-isas) 16 8)
212 (dnf f-18-1 "opcode" (all-isas) 18 1)
213 (dnf f-18-2 "opcode" (all-isas) 18 2)
214 (dnf f-18-3 "opcode" (all-isas) 18 3)
215 (dnf f-20-1 "opcode" (all-isas) 20 1)
216 (dnf f-20-3 "opcode" (all-isas) 20 3)
217 (dnf f-20-2 "opcode" (all-isas) 20 2)
218 (dnf f-20-4 "opcode" (all-isas) 20 4)
219 (dnf f-21-3 "opcode" (all-isas) 21 3)
220 (dnf f-24-2 "opcode" (all-isas) 24 2)
221 (dnf f-24-8 "opcode" (all-isas) 24 8)
222 (dnf f-32-16 "opcode" (all-isas) 32 16)
224 ;-------------------------------------------------------------
225 ; Registers
226 ;-------------------------------------------------------------
228 (dnf f-src16-rn "source Rn for m16c" (MACH16 m16c-isa) 10 2)
229 (dnf f-src16-an "source An for m16c" (MACH16 m16c-isa) 11 1)
231 (dnf f-src32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 11 1)
232 (dnf f-src32-an-prefixed "destination An for m32c" (MACH32 m32c-isa) 19 1)
234 ; QI mode gr encoding for m32c is different than for m16c. The hardware
235 ; is indexed using the m16c encoding, so perform the transformation here.
236 ; register m16c m32c
237 ; ----------------------
238 ; r0l 00'b 10'b
239 ; r0h 01'b 00'b
240 ; r1l 10'b 11'b
241 ; r1h 11'b 01'b
242 (df f-src32-rn-unprefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 10 2 UINT
243 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
244 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
245 )
246 ; QI mode gr encoding for m32c is different than for m16c. The hardware
247 ; is indexed using the m16c encoding, so perform the transformation here.
248 ; register m16c m32c
249 ; ----------------------
250 ; r0l 00'b 10'b
251 ; r0h 01'b 00'b
252 ; r1l 10'b 11'b
253 ; r1h 11'b 01'b
254 (df f-src32-rn-prefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 18 2 UINT
255 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
256 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
257 )
258 ; HI mode gr encoding for m32c is different than for m16c. The hardware
259 ; is indexed using the m16c encoding, so perform the transformation here.
260 ; register m16c m32c
261 ; ----------------------
262 ; r0 00'b 10'b
263 ; r1 01'b 11'b
264 ; r2 10'b 00'b
265 ; r3 11'b 01'b
266 (df f-src32-rn-unprefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 10 2 UINT
267 ((value pc) (mod USI (add value 2) 4)) ; insert
268 ((value pc) (mod USI (add value 2) 4)) ; extract
269 )
271 ; HI mode gr encoding for m32c is different than for m16c. The hardware
272 ; is indexed using the m16c encoding, so perform the transformation here.
273 ; register m16c m32c
274 ; ----------------------
275 ; r0 00'b 10'b
276 ; r1 01'b 11'b
277 ; r2 10'b 00'b
278 ; r3 11'b 01'b
279 (df f-src32-rn-prefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 18 2 UINT
280 ((value pc) (mod USI (add value 2) 4)) ; insert
281 ((value pc) (mod USI (add value 2) 4)) ; extract
282 )
284 ; SI mode gr encoding for m32c is as follows:
285 ; register encoding index
286 ; -------------------------
287 ; r2r0 10'b 0
288 ; r3r1 11'b 1
289 (df f-src32-rn-unprefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 10 2 UINT
290 ((value pc) (add USI value 2)) ; insert
291 ((value pc) (sub USI value 2)) ; extract
292 )
293 (df f-src32-rn-prefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 18 2 UINT
294 ((value pc) (add USI value 2)) ; insert
295 ((value pc) (sub USI value 2)) ; extract
296 )
298 (dnf f-dst32-rn-ext-unprefixed "destination Rn for m32c" (MACH32 m32c-isa) 9 1)
300 (dnf f-dst16-rn "destination Rn for m16c" (MACH16 m16c-isa) 14 2)
301 (dnf f-dst16-rn-ext "destination Rn for m16c" (MACH16 m16c-isa) 14 1)
302 (dnf f-dst16-rn-QI-s "destination Rn for m16c" (MACH16 m16c-isa) 5 1)
304 (dnf f-dst16-an "destination An for m16c" (MACH16 m16c-isa) 15 1)
305 (dnf f-dst16-an-s "destination An for m16c" (MACH16 m16c-isa) 4 1)
307 (dnf f-dst32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 9 1)
308 (dnf f-dst32-an-prefixed "destination An for m32c" (MACH32 m32c-isa) 17 1)
310 ; QI mode gr encoding for m32c is different than for m16c. The hardware
311 ; is indexed using the m16c encoding, so perform the transformation here.
312 ; register m16c m32c
313 ; ----------------------
314 ; r0l 00'b 10'b
315 ; r0h 01'b 00'b
316 ; r1l 10'b 11'b
317 ; r1h 11'b 01'b
318 (df f-dst32-rn-unprefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 8 2 UINT
319 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
320 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
321 )
322 (df f-dst32-rn-prefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 16 2 UINT
323 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
324 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
325 )
326 ; HI mode gr encoding for m32c is different than for m16c. The hardware
327 ; is indexed using the m16c encoding, so perform the transformation here.
328 ; register m16c m32c
329 ; ----------------------
330 ; r0 00'b 10'b
331 ; r1 01'b 11'b
332 ; r2 10'b 00'b
333 ; r3 11'b 01'b
334 (df f-dst32-rn-unprefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 8 2 UINT
335 ((value pc) (mod USI (add value 2) 4)) ; insert
336 ((value pc) (mod USI (add value 2) 4)) ; extract
337 )
338 (df f-dst32-rn-prefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 16 2 UINT
339 ((value pc) (mod USI (add value 2) 4)) ; insert
340 ((value pc) (mod USI (add value 2) 4)) ; extract
341 )
342 ; SI mode gr encoding for m32c is as follows:
343 ; register encoding index
344 ; -------------------------
345 ; r2r0 10'b 0
346 ; r3r1 11'b 1
347 (df f-dst32-rn-unprefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 8 2 UINT
348 ((value pc) (add USI value 2)) ; insert
349 ((value pc) (sub USI value 2)) ; extract
350 )
351 (df f-dst32-rn-prefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 16 2 UINT
352 ((value pc) (add USI value 2)) ; insert
353 ((value pc) (sub USI value 2)) ; extract
354 )
356 (dnf f-dst16-1-S "destination R0[hl] for m16c" (MACH16 m16c-isa) 5 1)
358 ;-------------------------------------------------------------
359 ; Immediates embedded in the base insn
360 ;-------------------------------------------------------------
362 (df f-imm-8-s4 "4 bit signed" (all-isas) 8 4 INT #f #f)
363 (df f-imm-12-s4 "4 bit signed" (all-isas) 12 4 INT #f #f)
364 (df f-imm-13-u3 "3 bit unsigned" (all-isas) 13 3 UINT #f #f)
365 (df f-imm-20-s4 "4 bit signed" (all-isas) 20 4 INT #f #f)
367 (df f-imm1-S "1 bit immediate for short format binary insns" (MACH32 m32c-isa) 2 1 UINT
368 ((value pc) (sub USI value 1)) ; insert
369 ((value pc) (add USI value 1)) ; extract
370 )
372 (dnmf f-imm3-S "3 bit unsigned for short format insns" (all-isas) UINT
373 (f-2-2 f-7-1)
374 (sequence () ; insert
375 (set (ifield f-7-1) (and (sub (ifield f-imm3-S) 1) 1))
376 (set (ifield f-2-2) (and (srl (sub (ifield f-imm3-S) 1) 1) #x3))
377 )
378 (sequence () ; extract
379 (set (ifield f-imm3-S) (add (or (sll (ifield f-2-2) 1)
380 (ifield f-7-1))
381 1))
382 )
383 )
385 ;-------------------------------------------------------------
386 ; Immediates and displacements beyond the base insn
387 ;-------------------------------------------------------------
389 (df f-dsp-8-u6 "6 bit unsigned" (all-isas) 8 6 UINT #f #f)
390 (df f-dsp-8-u8 "8 bit unsigned" (all-isas) 8 8 UINT #f #f)
391 (df f-dsp-8-s8 "8 bit signed" (all-isas) 8 8 INT #f #f)
392 (df f-dsp-10-u6 "6 bit unsigned" (all-isas) 10 6 UINT #f #f)
393 (df f-dsp-16-u8 "8 bit unsigned" (all-isas) 16 8 UINT #f #f)
394 (df f-dsp-16-s8 "8 bit signed" (all-isas) 16 8 INT #f #f)
395 (df f-dsp-24-u8 "8 bit unsigned" (all-isas) 24 8 UINT #f #f)
396 (df f-dsp-24-s8 "8 bit signed" (all-isas) 24 8 INT #f #f)
397 (df f-dsp-32-u8 "8 bit unsigned" (all-isas) 32 8 UINT #f #f)
398 (df f-dsp-32-s8 "8 bit signed" (all-isas) 32 8 INT #f #f)
399 (df f-dsp-40-u8 "8 bit unsigned" (all-isas) 40 8 UINT #f #f)
400 (df f-dsp-40-s8 "8 bit signed" (all-isas) 40 8 INT #f #f)
401 (df f-dsp-48-u8 "8 bit unsigned" (all-isas) 48 8 UINT #f #f)
402 (df f-dsp-48-s8 "8 bit signed" (all-isas) 48 8 INT #f #f)
403 (df f-dsp-56-u8 "8 bit unsigned" (all-isas) 56 8 UINT #f #f)
404 (df f-dsp-56-s8 "8 bit signed" (all-isas) 56 8 INT #f #f)
405 (df f-dsp-64-u8 "8 bit unsigned" (all-isas) 64 8 UINT #f #f)
406 (df f-dsp-64-s8 "8 bit signed" (all-isas) 64 8 INT #f #f)
408 ; Insn opcode endianness is big, but the immediate fields are stored
409 ; in little endian. Handle this here at the field level for all immediate
410 ; fields longer that 1 byte.
411 ;
412 ; CGEN can't handle a field which spans a 32 bit word boundary, so
413 ; handle those as multi ifields.
414 ;
415 ; Take care in expressions using 'srl' or 'sll' as part of some larger
416 ; expression meant to yield sign-extended values. CGEN translates
417 ; uses of those operators into C expressions whose type is 'unsigned
418 ; int', which tends to make the whole expression 'unsigned int'.
419 ; Expressions like (set (ifield foo) X), however, just take X and
420 ; store it in some member of 'struct cgen_fields', all of whose
421 ; members are 'long'. On machines where 'long' is larger than
422 ; 'unsigned int', assigning a "sign-extended" unsigned int to a long
423 ; just produces a very large positive value. insert_normal will
424 ; range-check the field's value and produce odd error messages like
425 ; this:
426 ;
427 ; Error: operand out of range (4160684031 not between -2147483648 and 2147483647) `add.l #-265,-270[fb]'
428 ;
429 ; Annoyingly, the code will work fine on machines where 'long' and
430 ; 'unsigned int' are the same size: the assignment will produce a
431 ; negative number.
432 ;
433 ; Just tell yourself over and over: overflow detection is expensive,
434 ; and you're glad C doesn't do it, because it never happens in real
435 ; life.
437 (df f-dsp-8-u16 "16 bit unsigned" (all-isas) 8 16 UINT
438 ((value pc) (or UHI
439 (and (srl value 8) #x00ff)
440 (and (sll value 8) #xff00))) ; insert
441 ((value pc) (or UHI
442 (and UHI (srl UHI value 8) #x00ff)
443 (and UHI (sll UHI value 8) #xff00))) ; extract
444 )
446 (df f-dsp-8-s16 "8 bit signed" (all-isas) 8 16 INT
447 ((value pc) (ext INT
448 (trunc HI
449 (or (and (srl value 8) #x00ff)
450 (and (sll value 8) #xff00))))) ; insert
451 ((value pc) (ext INT
452 (trunc HI
453 (or (and (srl value 8) #x00ff)
454 (and (sll value 8) #xff00))))) ; extract
455 )
457 (df f-dsp-16-u16 "16 bit unsigned" (all-isas) 16 16 UINT
458 ((value pc) (or UHI
459 (and (srl value 8) #x00ff)
460 (and (sll value 8) #xff00))) ; insert
461 ((value pc) (or UHI
462 (and UHI (srl UHI value 8) #x00ff)
463 (and UHI (sll UHI value 8) #xff00))) ; extract
464 )
466 (df f-dsp-16-s16 "16 bit signed" (all-isas) 16 16 INT
467 ((value pc) (ext INT
468 (trunc HI
469 (or (and (srl value 8) #x00ff)
470 (and (sll value 8) #xff00))))) ; insert
471 ((value pc) (ext INT
472 (trunc HI
473 (or (and (srl value 8) #x00ff)
474 (and (sll value 8) #xff00))))) ; extract
475 )
477 (dnmf f-dsp-24-u16 "16 bit unsigned" (all-isas) UINT
478 (f-dsp-24-u8 f-dsp-32-u8)
479 (sequence () ; insert
480 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u16) #xff))
481 (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-24-u16) 8) #xff))
482 )
483 (sequence () ; extract
484 (set (ifield f-dsp-24-u16) (or (sll (ifield f-dsp-32-u8) 8)
485 (ifield f-dsp-24-u8)))
486 )
487 )
489 (dnmf f-dsp-24-s16 "16 bit signed" (all-isas) INT
490 (f-dsp-24-u8 f-dsp-32-u8)
491 (sequence () ; insert
492 (set (ifield f-dsp-24-u8)
493 (and (ifield f-dsp-24-s16) #xff))
494 (set (ifield f-dsp-32-u8)
495 (and (srl (ifield f-dsp-24-s16) 8) #xff))
496 )
497 (sequence () ; extract
498 (set (ifield f-dsp-24-s16)
499 (ext INT
500 (trunc HI (or (sll (ifield f-dsp-32-u8) 8)
501 (ifield f-dsp-24-u8)))))
502 )
503 )
505 (df f-dsp-32-u16 "16 bit unsigned" (all-isas) 32 16 UINT
506 ((value pc) (or UHI
507 (and (srl value 8) #x00ff)
508 (and (sll value 8) #xff00))) ; insert
509 ((value pc) (or UHI
510 (and UHI (srl UHI value 8) #x00ff)
511 (and UHI (sll UHI value 8) #xff00))) ; extract
512 )
514 (df f-dsp-32-s16 "16 bit signed" (all-isas) 32 16 INT
515 ((value pc) (ext INT
516 (trunc HI
517 (or (and (srl value 8) #x00ff)
518 (and (sll value 8) #xff00))))) ; insert
519 ((value pc) (ext INT
520 (trunc HI
521 (or (and (srl value 8) #x00ff)
522 (and (sll value 8) #xff00))))) ; extract
523 )
525 (df f-dsp-40-u16 "16 bit unsigned" (all-isas) 40 16 UINT
526 ((value pc) (or UHI
527 (and (srl value 8) #x00ff)
528 (and (sll value 8) #xff00))) ; insert
529 ((value pc) (or UHI
530 (and UHI (srl UHI value 8) #x00ff)
531 (and UHI (sll UHI value 8) #xff00))) ; extract
532 )
534 (df f-dsp-40-s16 "16 bit signed" (all-isas) 40 16 INT
535 ((value pc) (ext INT
536 (trunc HI
537 (or (and (srl value 8) #x00ff)
538 (and (sll value 8) #xff00))))) ; insert
539 ((value pc) (ext INT
540 (trunc HI
541 (or (and (srl value 8) #x00ff)
542 (and (sll value 8) #xff00))))) ; extract
543 )
545 (df f-dsp-48-u16 "16 bit unsigned" (all-isas) 48 16 UINT
546 ((value pc) (or UHI
547 (and (srl value 8) #x00ff)
548 (and (sll value 8) #xff00))) ; insert
549 ((value pc) (or UHI
550 (and UHI (srl UHI value 8) #x00ff)
551 (and UHI (sll UHI value 8) #xff00))) ; extract
552 )
554 (df f-dsp-48-s16 "16 bit signed" (all-isas) 48 16 INT
555 ((value pc) (ext INT
556 (trunc HI
557 (or (and (srl value 8) #x00ff)
558 (and (sll value 8) #xff00))))) ; insert
559 ((value pc) (ext INT
560 (trunc HI
561 (or (and (srl value 8) #x00ff)
562 (and (sll value 8) #xff00))))) ; extract
563 )
565 (df f-dsp-64-u16 "16 bit unsigned" (all-isas) 64 16 UINT
566 ((value pc) (or UHI
567 (and (srl value 8) #x00ff)
568 (and (sll value 8) #xff00))) ; insert
569 ((value pc) (or UHI
570 (and UHI (srl UHI value 8) #x00ff)
571 (and UHI (sll UHI value 8) #xff00))) ; extract
572 )
573 (df f-dsp-8-s24 "24 bit signed" (all-isas) 8 24 INT
574 ((value pc) (or SI
575 (or (and (srl value 16) #xff) (and value #xff00))
576 (sll (ext INT (trunc QI (and value #xff))) 16)))
577 ((value pc) (or SI
578 (or (and (srl value 16) #xff) (and value #xff00))
579 (sll (ext INT (trunc QI (and value #xff))) 16)))
580 )
582 (df f-dsp-8-u24 "24 bit unsigned" (all-isas) 8 24 UINT
583 ((value pc) (or SI
584 (or (srl value 16) (and value #xff00))
585 (sll (and value #xff) 16)))
586 ((value pc) (or SI
587 (or (srl value 16) (and value #xff00))
588 (sll (and value #xff) 16)))
589 )
591 (dnmf f-dsp-16-u24 "24 bit unsigned" (all-isas) UINT
592 (f-dsp-16-u16 f-dsp-32-u8)
593 (sequence () ; insert
594 (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-u24) #xffff))
595 (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-16-u24) 16) #xff))
596 )
597 (sequence () ; extract
598 (set (ifield f-dsp-16-u24) (or (sll (ifield f-dsp-32-u8) 16)
599 (ifield f-dsp-16-u16)))
600 )
601 )
603 (dnmf f-dsp-24-u24 "24 bit unsigned" (all-isas) UINT
604 (f-dsp-24-u8 f-dsp-32-u16)
605 (sequence () ; insert
606 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u24) #xff))
607 (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-24-u24) 8) #xffff))
608 )
609 (sequence () ; extract
610 (set (ifield f-dsp-24-u24) (or (sll (ifield f-dsp-32-u16) 8)
611 (ifield f-dsp-24-u8)))
612 )
613 )
615 (df f-dsp-32-u24 "24 bit unsigned" (all-isas) 32 24 UINT
616 ((value pc) (or USI
617 (or USI
618 (and (srl value 16) #x0000ff)
619 (and value #x00ff00))
620 (and (sll value 16) #xff0000))) ; insert
621 ((value pc) (or USI
622 (or USI
623 (and USI (srl value 16) #x0000ff)
624 (and USI value #x00ff00))
625 (and USI (sll value 16) #xff0000))) ; extract
626 )
628 (df f-dsp-40-u20 "20 bit unsigned" (all-isas) 40 20 UINT
629 ((value pc) (or USI
630 (or USI
631 (and (srl value 16) #x0000ff)
632 (and value #x00ff00))
633 (and (sll value 16) #x0f0000))) ; insert
634 ((value pc) (or USI
635 (or USI
636 (and USI (srl value 16) #x0000ff)
637 (and USI value #x00ff00))
638 (and USI (sll value 16) #x0f0000))) ; extract
639 )
641 (df f-dsp-40-u24 "24 bit unsigned" (all-isas) 40 24 UINT
642 ((value pc) (or USI
643 (or USI
644 (and (srl value 16) #x0000ff)
645 (and value #x00ff00))
646 (and (sll value 16) #xff0000))) ; insert
647 ((value pc) (or USI
648 (or USI
649 (and USI (srl value 16) #x0000ff)
650 (and USI value #x00ff00))
651 (and USI (sll value 16) #xff0000))) ; extract
652 )
654 (dnmf f-dsp-40-s32 "32 bit signed" (all-isas) INT
655 (f-dsp-40-u24 f-dsp-64-u8)
656 (sequence () ; insert
657 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-40-s32) 24) #xff))
658 (set (ifield f-dsp-40-u24) (and (ifield f-dsp-40-s32) #xffffff))
659 )
660 (sequence () ; extract
661 (set (ifield f-dsp-40-s32) (or (and (ifield f-dsp-40-u24) #xffffff)
662 (and (sll (ifield f-dsp-64-u8) 24) #xff000000)))
663 )
664 )
666 (dnmf f-dsp-48-u20 "20 bit unsigned" (all-isas) UINT
667 (f-dsp-48-u16 f-dsp-64-u8)
668 (sequence () ; insert
669 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-48-u20) 16) #x0f))
670 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u20) #xffff))
671 )
672 (sequence () ; extract
673 (set (ifield f-dsp-48-u20) (or (and (ifield f-dsp-48-u16) #xffff)
674 (and (sll (ifield f-dsp-64-u8) 16) #x0f0000)))
675 )
676 )
677 (dnmf f-dsp-48-u24 "24 bit unsigned" (all-isas) UINT
678 (f-dsp-48-u16 f-dsp-64-u8)
679 (sequence () ; insert
680 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-48-u24) 16) #xff))
681 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u24) #xffff))
682 )
683 (sequence () ; extract
684 (set (ifield f-dsp-48-u24) (or (and (ifield f-dsp-48-u16) #xffff)
685 (and (sll (ifield f-dsp-64-u8) 16) #xff0000)))
686 )
687 )
689 (dnmf f-dsp-16-s32 "32 bit signed" (all-isas) INT
690 (f-dsp-16-u16 f-dsp-32-u16)
691 (sequence () ; insert
692 (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-16-s32) 16) #xffff))
693 (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-s32) #xffff))
694 )
695 (sequence () ; extract
696 (set (ifield f-dsp-16-s32) (or (and (ifield f-dsp-16-u16) #xffff)
697 (and (sll (ifield f-dsp-32-u16) 16) #xffff0000)))
698 )
699 )
701 (dnmf f-dsp-24-s32 "32 bit signed" (all-isas) INT
702 (f-dsp-24-u8 f-dsp-32-u24)
703 (sequence () ; insert
704 (set (ifield f-dsp-32-u24) (and (srl (ifield f-dsp-24-s32) 8) #xffffff))
705 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-s32) #xff))
706 )
707 (sequence () ; extract
708 (set (ifield f-dsp-24-s32) (or (and (ifield f-dsp-24-u8) #xff)
709 (and (sll (ifield f-dsp-32-u24) 8) #xffffff00)))
710 )
711 )
713 (df f-dsp-32-s32 "32 bit signed" (all-isas) 32 32 INT
714 ((value pc)
716 ;; insert
717 (ext INT
718 (or SI
719 (or SI
720 (and (srl value 24) #x000000ff)
721 (and (srl value 8) #x0000ff00))
722 (or SI
723 (and (sll value 8) #x00ff0000)
724 (and (sll value 24) #xff000000)))))
726 ;; extract
727 ((value pc)
728 (ext INT
729 (or SI
730 (or SI
731 (and (srl value 24) #x000000ff)
732 (and (srl value 8) #x0000ff00))
733 (or SI
734 (and (sll value 8) #x00ff0000)
735 (and (sll value 24) #xff000000)))))
736 )
738 (dnmf f-dsp-48-u32 "32 bit unsigned" (all-isas) UINT
739 (f-dsp-48-u16 f-dsp-64-u16)
740 (sequence () ; insert
741 (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-u32) 16) #xffff))
742 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u32) #xffff))
743 )
744 (sequence () ; extract
745 (set (ifield f-dsp-48-u32) (or (and (ifield f-dsp-48-u16) #xffff)
746 (and (sll (ifield f-dsp-64-u16) 16) #xffff0000)))
747 )
748 )
750 (dnmf f-dsp-48-s32 "32 bit signed" (all-isas) INT
751 (f-dsp-48-u16 f-dsp-64-u16)
752 (sequence () ; insert
753 (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-s32) 16) #xffff))
754 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-s32) #xffff))
755 )
756 (sequence () ; extract
757 (set (ifield f-dsp-48-s32) (or (and (ifield f-dsp-48-u16) #xffff)
758 (and (sll (ifield f-dsp-64-u16) 16) #xffff0000)))
759 )
760 )
762 (dnmf f-dsp-56-s16 "16 bit signed" (all-isas) INT
763 (f-dsp-56-u8 f-dsp-64-u8)
764 (sequence () ; insert
765 (set (ifield f-dsp-56-u8)
766 (and (ifield f-dsp-56-s16) #xff))
767 (set (ifield f-dsp-64-u8)
768 (and (srl (ifield f-dsp-56-s16) 8) #xff))
769 )
770 (sequence () ; extract
771 (set (ifield f-dsp-56-s16)
772 (ext INT
773 (trunc HI (or (sll (ifield f-dsp-64-u8) 8)
774 (ifield f-dsp-56-u8)))))
775 )
776 )
778 (df f-dsp-64-s16 " 16 bit signed" (all-isas) 64 16 INT
779 ((value pc) (ext INT
780 (trunc HI
781 (or (and (srl value 8) #x00ff)
782 (and (sll value 8) #xff00))))) ; insert
783 ((value pc) (ext INT
784 (trunc HI
785 (or (and (srl value 8) #x00ff)
786 (and (sll value 8) #xff00))))) ; extract
787 )
789 ;-------------------------------------------------------------
790 ; Bit indices
791 ;-------------------------------------------------------------
793 (dnf f-bitno16-S "bit index for m16c" (all-isas) 5 3)
794 (dnf f-bitno32-prefixed "bit index for m32c" (all-isas) 21 3)
795 (dnf f-bitno32-unprefixed "bit index for m32c" (all-isas) 13 3)
797 (dnmf f-bitbase16-u11-S "unsigned bit,base:11" (all-isas) UINT
798 (f-bitno16-S f-dsp-8-u8)
799 (sequence () ; insert
800 (set (ifield f-bitno16-S) (and f-bitbase16-u11-S #x7))
801 (set (ifield f-dsp-8-u8) (and (srl (ifield f-bitbase16-u11-S) 3) #xff))
802 )
803 (sequence () ; extract
804 (set (ifield f-bitbase16-u11-S) (or (sll (ifield f-dsp-8-u8) 3)
805 (ifield f-bitno16-S)))
806 )
807 )
809 (dnmf f-bitbase32-16-u11-unprefixed "unsigned bit,base:11" (all-isas) UINT
810 (f-bitno32-unprefixed f-dsp-16-u8)
811 (sequence () ; insert
812 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u11-unprefixed #x7))
813 (set (ifield f-dsp-16-u8) (and (srl (ifield f-bitbase32-16-u11-unprefixed) 3) #xff))
814 )
815 (sequence () ; extract
816 (set (ifield f-bitbase32-16-u11-unprefixed) (or (sll (ifield f-dsp-16-u8) 3)
817 (ifield f-bitno32-unprefixed)))
818 )
819 )
820 (dnmf f-bitbase32-16-s11-unprefixed "signed bit,base:11" (all-isas) INT
821 (f-bitno32-unprefixed f-dsp-16-s8)
822 (sequence () ; insert
823 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s11-unprefixed #x7))
824 (set (ifield f-dsp-16-s8) (sra INT (ifield f-bitbase32-16-s11-unprefixed) 3))
825 )
826 (sequence () ; extract
827 (set (ifield f-bitbase32-16-s11-unprefixed) (or (sll (ifield f-dsp-16-s8) 3)
828 (ifield f-bitno32-unprefixed)))
829 )
830 )
831 (dnmf f-bitbase32-16-u19-unprefixed "unsigned bit,base:19" (all-isas) UINT
832 (f-bitno32-unprefixed f-dsp-16-u16)
833 (sequence () ; insert
834 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u19-unprefixed #x7))
835 (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u19-unprefixed) 3) #xffff))
836 )
837 (sequence () ; extract
838 (set (ifield f-bitbase32-16-u19-unprefixed) (or (sll (ifield f-dsp-16-u16) 3)
839 (ifield f-bitno32-unprefixed)))
840 )
841 )
842 (dnmf f-bitbase32-16-s19-unprefixed "signed bit,base:11" (all-isas) INT
843 (f-bitno32-unprefixed f-dsp-16-s16)
844 (sequence () ; insert
845 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s19-unprefixed #x7))
846 (set (ifield f-dsp-16-s16) (sra INT (ifield f-bitbase32-16-s19-unprefixed) 3))
847 )
848 (sequence () ; extract
849 (set (ifield f-bitbase32-16-s19-unprefixed) (or (sll (ifield f-dsp-16-s16) 3)
850 (ifield f-bitno32-unprefixed)))
851 )
852 )
853 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
854 (dnmf f-bitbase32-16-u27-unprefixed "unsigned bit,base:27" (all-isas) UINT
855 (f-bitno32-unprefixed f-dsp-16-u16 f-dsp-32-u8)
856 (sequence () ; insert
857 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u27-unprefixed #x7))
858 (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 3) #xffff))
859 (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 19) #xff))
860 )
861 (sequence () ; extract
862 (set (ifield f-bitbase32-16-u27-unprefixed) (or (sll (ifield f-dsp-16-u16) 3)
863 (or (sll (ifield f-dsp-32-u8) 19)
864 (ifield f-bitno32-unprefixed))))
865 )
866 )
867 (dnmf f-bitbase32-24-u11-prefixed "unsigned bit,base:11" (all-isas) UINT
868 (f-bitno32-prefixed f-dsp-24-u8)
869 (sequence () ; insert
870 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u11-prefixed #x7))
871 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u11-prefixed) 3) #xff))
872 )
873 (sequence () ; extract
874 (set (ifield f-bitbase32-24-u11-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
875 (ifield f-bitno32-prefixed)))
876 )
877 )
878 (dnmf f-bitbase32-24-s11-prefixed "signed bit,base:11" (all-isas) INT
879 (f-bitno32-prefixed f-dsp-24-s8)
880 (sequence () ; insert
881 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s11-prefixed #x7))
882 (set (ifield f-dsp-24-s8) (sra INT (ifield f-bitbase32-24-s11-prefixed) 3))
883 )
884 (sequence () ; extract
885 (set (ifield f-bitbase32-24-s11-prefixed) (or (sll (ifield f-dsp-24-s8) 3)
886 (ifield f-bitno32-prefixed)))
887 )
888 )
889 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
890 (dnmf f-bitbase32-24-u19-prefixed "unsigned bit,base:19" (all-isas) UINT
891 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u8)
892 (sequence () ; insert
893 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u19-prefixed #x7))
894 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 3) #xff))
895 (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 11) #xff))
896 )
897 (sequence () ; extract
898 (set (ifield f-bitbase32-24-u19-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
899 (or (sll (ifield f-dsp-32-u8) 11)
900 (ifield f-bitno32-prefixed))))
901 )
902 )
903 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
904 (dnmf f-bitbase32-24-s19-prefixed "signed bit,base:11" (all-isas) INT
905 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-s8)
906 (sequence () ; insert
907 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s19-prefixed #x7))
908 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-s19-prefixed) 3) #xff))
909 (set (ifield f-dsp-32-s8) (sra INT (ifield f-bitbase32-24-s19-prefixed) 11))
910 )
911 (sequence () ; extract
912 (set (ifield f-bitbase32-24-s19-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
913 (or (sll (ifield f-dsp-32-s8) 11)
914 (ifield f-bitno32-prefixed))))
915 )
916 )
917 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
918 (dnmf f-bitbase32-24-u27-prefixed "unsigned bit,base:27" (all-isas) UINT
919 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u16)
920 (sequence () ; insert
921 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u27-prefixed #x7))
922 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u27-prefixed) 3) #xff))
923 (set (ifield f-dsp-32-u16) (and (srl (ifield f-bitbase32-24-u27-prefixed) 11) #xffff))
924 )
925 (sequence () ; extract
926 (set (ifield f-bitbase32-24-u27-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
927 (or (sll (ifield f-dsp-32-u16) 11)
928 (ifield f-bitno32-prefixed))))
929 )
930 )
932 ;-------------------------------------------------------------
933 ; Labels
934 ;-------------------------------------------------------------
936 (df f-lab-5-3 "3 bit pc relative unsigned offset" (PCREL-ADDR all-isas) 5 3 UINT
937 ((value pc) (sub SI value (add SI pc 2))) ; insert
938 ((value pc) (add SI value (add SI pc 2))) ; extract
939 )
940 (dnmf f-lab32-jmp-s "unsigned 3 bit pc relative offset" (PCREL-ADDR all-isas) UINT
941 (f-2-2 f-7-1)
942 (sequence ((SI val)) ; insert
943 (set val (sub (sub (ifield f-lab32-jmp-s) pc) 2))
944 (set (ifield f-7-1) (and val #x1))
945 (set (ifield f-2-2) (srl val 1))
946 )
947 (sequence () ; extract
948 (set (ifield f-lab32-jmp-s) (add pc (add (or (sll (ifield f-2-2) 1)
949 (ifield f-7-1))
950 2)))
951 )
952 )
953 (df f-lab-8-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 8 8 INT
954 ((value pc) (sub SI value (add SI pc 1))) ; insert
955 ((value pc) (add SI value (add SI pc 1))) ; extract
956 )
957 (df f-lab-8-16 "16 bit pc relative signed offset" (PCREL-ADDR SIGN-OPT all-isas) 8 16 UINT
958 ((value pc) (or SI (sll (and (sub value (add pc 1)) #xff) 8)
959 (srl (and (sub value (add pc 1)) #xffff) 8)))
960 ((value pc) (add SI (or (srl (and value #xffff) 8)
961 (sra (sll (and value #xff) 24) 16)) (add pc 1)))
962 )
963 (df f-lab-8-24 "24 bit absolute" (all-isas ABS-ADDR) 8 24 UINT
964 ((value pc) (or SI
965 (or (srl value 16) (and value #xff00))
966 (sll (and value #xff) 16)))
967 ((value pc) (or SI
968 (or (srl value 16) (and value #xff00))
969 (sll (and value #xff) 16)))
970 )
971 (df f-lab-16-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 16 8 INT
972 ((value pc) (sub SI value (add SI pc 2))) ; insert
973 ((value pc) (add SI value (add SI pc 2))) ; extract
974 )
975 (df f-lab-24-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 24 8 INT
976 ((value pc) (sub SI value (add SI pc 2))) ; insert
977 ((value pc) (add SI value (add SI pc 2))) ; extract
978 )
979 (df f-lab-32-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 32 8 INT
980 ((value pc) (sub SI value (add SI pc 2))) ; insert
981 ((value pc) (add SI value (add SI pc 2))) ; extract
982 )
983 (df f-lab-40-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 40 8 INT
984 ((value pc) (sub SI value (add SI pc 2))) ; insert
985 ((value pc) (add SI value (add SI pc 2))) ; extract
986 )
988 ;-------------------------------------------------------------
989 ; Condition codes
990 ;-------------------------------------------------------------
992 (dnf f-cond16 "condition code" (all-isas) 12 4)
993 (dnf f-cond16j-5 "condition code" (all-isas) 5 3)
995 (dnmf f-cond32 "condition code" (all-isas) UINT
996 (f-9-1 f-13-3)
997 (sequence () ; insert
998 (set (ifield f-9-1) (and (srl (ifield f-cond32) 3) 1))
999 (set (ifield f-13-3) (and (ifield f-cond32) #x7))
1000 )
1001 (sequence () ; extract
1002 (set (ifield f-cond32) (or (sll (ifield f-9-1) 3)
1003 (ifield f-13-3)))
1004 )
1005 )
1007 (dnmf f-cond32j "condition code" (all-isas) UINT
1008 (f-1-3 f-7-1)
1009 (sequence () ; insert
1010 (set (ifield f-1-3) (and (srl (ifield f-cond32j) 1) #x7))
1011 (set (ifield f-7-1) (and (ifield f-cond32j) #x1))
1012 )
1013 (sequence () ; extract
1014 (set (ifield f-cond32j) (or (sll (ifield f-1-3) 1)
1015 (ifield f-7-1)))
1016 )
1017 )
1018 \f
1019 ;=============================================================
1020 ; Hardware
1021 ;
1022 (dnh h-pc "program counter" (PC all-isas) (pc USI) () () ())
1024 ;-------------------------------------------------------------
1025 ; General registers
1026 ; The actual registers are 16 bits
1027 ;-------------------------------------------------------------
1029 (define-hardware
1030 (name h-gr)
1031 (comment "general 16 bit registers")
1032 (attrs all-isas CACHE-ADDR)
1033 (type register HI (4))
1034 (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3))))
1036 ; Define different views of the grs as VIRTUAL with getter/setter specs
1037 ;
1038 (define-hardware
1039 (name h-gr-QI)
1040 (comment "general 8 bit registers")
1041 (attrs all-isas VIRTUAL)
1042 (type register QI (4))
1043 (indices keyword "" (("r0l" 0) ("r0h" 1) ("r1l" 2) ("r1h" 3)))
1044 (get (index) (and (if SI (mod index 2)
1045 (srl (reg h-gr (div index 2)) 8)
1046 (reg h-gr (div index 2)))
1047 #xff))
1048 (set (index newval) (set (reg h-gr (div index 2))
1049 (if SI (mod index 2)
1050 (or (and (reg h-gr (div index 2)) #xff)
1051 (sll (and newval #xff) 8))
1052 (or (and (reg h-gr (div index 2)) #xff00)
1053 (and newval #xff))))))
1055 (define-hardware
1056 (name h-gr-HI)
1057 (comment "general 16 bit registers")
1058 (attrs all-isas VIRTUAL)
1059 (type register HI (4))
1060 (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3)))
1061 (get (index) (reg h-gr index))
1062 (set (index newval) (set (reg h-gr index) newval)))
1064 (define-hardware
1065 (name h-gr-SI)
1066 (comment "general 32 bit registers")
1067 (attrs all-isas VIRTUAL)
1068 (type register SI (2))
1069 (indices keyword "" (("r2r0" 0) ("r3r1" 1)))
1070 (get (index) (or SI
1071 (and (reg h-gr index) #xffff)
1072 (and (sll (reg h-gr (add index 2)) 16) #xffff0000)))
1073 (set (index newval) (sequence ()
1074 (set (reg h-gr index) (and newval #xffff))
1075 (set (reg h-gr (add index 2)) (srl newval 16)))))
1077 (define-hardware
1078 (name h-gr-ext-QI)
1079 (comment "general 16 bit registers")
1080 (attrs all-isas VIRTUAL)
1081 (type register HI (2))
1082 (indices keyword "" (("r0l" 0) ("r1l" 1)))
1083 (get (index) (reg h-gr-QI (mul index 2)))
1084 (set (index newval) (set (reg h-gr (mul index 2)) newval)))
1086 (define-hardware
1087 (name h-gr-ext-HI)
1088 (comment "general 16 bit registers")
1089 (attrs all-isas VIRTUAL)
1090 (type register SI (2))
1091 (indices keyword "" (("r0" 0) ("r1" 1)))
1092 (get (index) (reg h-gr (mul index 2)))
1093 (set (index newval) (set (reg h-gr-SI index) newval)))
1095 (define-hardware
1096 (name h-r0l)
1097 (comment "r0l register")
1098 (attrs all-isas VIRTUAL)
1099 (type register QI)
1100 (indices keyword "" (("r0l" 0)))
1101 (get () (reg h-gr-QI 0))
1102 (set (newval) (set (reg h-gr-QI 0) newval)))
1104 (define-hardware
1105 (name h-r0h)
1106 (comment "r0h register")
1107 (attrs all-isas VIRTUAL)
1108 (type register QI)
1109 (indices keyword "" (("r0h" 0)))
1110 (get () (reg h-gr-QI 1))
1111 (set (newval) (set (reg h-gr-QI 1) newval)))
1113 (define-hardware
1114 (name h-r1l)
1115 (comment "r1l register")
1116 (attrs all-isas VIRTUAL)
1117 (type register QI)
1118 (indices keyword "" (("r1l" 0)))
1119 (get () (reg h-gr-QI 2))
1120 (set (newval) (set (reg h-gr-QI 2) newval)))
1122 (define-hardware
1123 (name h-r1h)
1124 (comment "r1h register")
1125 (attrs all-isas VIRTUAL)
1126 (type register QI)
1127 (indices keyword "" (("r1h" 0)))
1128 (get () (reg h-gr-QI 3))
1129 (set (newval) (set (reg h-gr-QI 3) newval)))
1131 (define-hardware
1132 (name h-r0)
1133 (comment "r0 register")
1134 (attrs all-isas VIRTUAL)
1135 (type register HI)
1136 (indices keyword "" (("r0" 0)))
1137 (get () (reg h-gr 0))
1138 (set (newval) (set (reg h-gr 0) newval)))
1140 (define-hardware
1141 (name h-r1)
1142 (comment "r1 register")
1143 (attrs all-isas VIRTUAL)
1144 (type register HI)
1145 (indices keyword "" (("r1" 0)))
1146 (get () (reg h-gr 1))
1147 (set (newval) (set (reg h-gr 1) newval)))
1149 (define-hardware
1150 (name h-r2)
1151 (comment "r2 register")
1152 (attrs all-isas VIRTUAL)
1153 (type register HI)
1154 (indices keyword "" (("r2" 0)))
1155 (get () (reg h-gr 2))
1156 (set (newval) (set (reg h-gr 2) newval)))
1158 (define-hardware
1159 (name h-r3)
1160 (comment "r3 register")
1161 (attrs all-isas VIRTUAL)
1162 (type register HI)
1163 (indices keyword "" (("r3" 0)))
1164 (get () (reg h-gr 3))
1165 (set (newval) (set (reg h-gr 3) newval)))
1167 (define-hardware
1168 (name h-r0l-r0h)
1169 (comment "r0l or r0h")
1170 (attrs all-isas VIRTUAL)
1171 (type register QI (2))
1172 (indices keyword "" (("r0l" 0) ("r0h" 1)))
1173 (get (index) (reg h-gr-QI index))
1174 (set (index newval) (set (reg h-gr-QI index) newval)))
1176 (define-hardware
1177 (name h-r2r0)
1178 (comment "r2r0 register")
1179 (attrs all-isas VIRTUAL)
1180 (type register SI)
1181 (indices keyword "" (("r2r0" 0)))
1182 (get () (or (sll (reg h-gr 2) 16) (reg h-gr 0)))
1183 (set (newval)
1184 (sequence ()
1185 (set (reg h-gr 0) newval)
1186 (set (reg h-gr 2) (sra newval 16)))))
1188 (define-hardware
1189 (name h-r3r1)
1190 (comment "r3r1 register")
1191 (attrs all-isas VIRTUAL)
1192 (type register SI)
1193 (indices keyword "" (("r3r1" 0)))
1194 (get () (or (sll (reg h-gr 3) 16) (reg h-gr 1)))
1195 (set (newval)
1196 (sequence ()
1197 (set (reg h-gr 1) newval)
1198 (set (reg h-gr 3) (sra newval 16)))))
1200 (define-hardware
1201 (name h-r1r2r0)
1202 (comment "r1r2r0 register")
1203 (attrs all-isas VIRTUAL)
1204 (type register DI)
1205 (indices keyword "" (("r1r2r0" 0)))
1206 (get () (or DI (sll DI (reg h-gr 1) 32) (or (sll (reg h-gr 2) 16) (reg h-gr 0))))
1207 (set (newval)
1208 (sequence ()
1209 (set (reg h-gr 0) newval)
1210 (set (reg h-gr 2) (sra newval 16))
1211 (set (reg h-gr 1) (sra newval 32)))))
1213 ;-------------------------------------------------------------
1214 ; Address registers
1215 ;-------------------------------------------------------------
1217 (define-hardware
1218 (name h-ar)
1219 (comment "address registers")
1220 (attrs all-isas)
1221 (type register USI (2))
1222 (indices keyword "" (("a0" 0) ("a1" 1)))
1223 (get (index) (c-call USI "h_ar_get_handler" index))
1224 (set (index newval) (c-call VOID "h_ar_set_handler" index newval)))
1226 ; Define different views of the ars as VIRTUAL with getter/setter specs
1227 (define-hardware
1228 (name h-ar-QI)
1229 (comment "8 bit view of address register")
1230 (attrs all-isas VIRTUAL)
1231 (type register QI (2))
1232 (indices keyword "" (("a0" 0) ("a1" 1)))
1233 (get (index) (reg h-ar index))
1234 (set (index newval) (set (reg h-ar index) newval)))
1236 (define-hardware
1237 (name h-ar-HI)
1238 (comment "16 bit view of address register")
1239 (attrs all-isas VIRTUAL)
1240 (type register HI (2))
1241 (indices keyword "" (("a0" 0) ("a1" 1)))
1242 (get (index) (reg h-ar index))
1243 (set (index newval) (set (reg h-ar index) newval)))
1245 (define-hardware
1246 (name h-ar-SI)
1247 (comment "32 bit view of address register")
1248 (attrs all-isas VIRTUAL)
1249 (type register SI)
1250 (indices keyword "" (("a1a0" 0)))
1251 (get () (or SI (sll SI (ext SI (reg h-ar 1)) 16) (ext SI (reg h-ar 0))))
1252 (set (newval) (sequence ()
1253 (set (reg h-ar 0) (and newval #xffff))
1254 (set (reg h-ar 1) (and (srl newval 16) #xffff)))))
1256 (define-hardware
1257 (name h-a0)
1258 (comment "16 bit view of address register")
1259 (attrs all-isas VIRTUAL)
1260 (type register HI)
1261 (indices keyword "" (("a0" 0)))
1262 (get () (reg h-ar 0))
1263 (set (newval) (set (reg h-ar 0) newval)))
1265 (define-hardware
1266 (name h-a1)
1267 (comment "16 bit view of address register")
1268 (attrs all-isas VIRTUAL)
1269 (type register HI)
1270 (indices keyword "" (("a1" 1)))
1271 (get () (reg h-ar 1))
1272 (set (newval) (set (reg h-ar 1) newval)))
1274 ; SB Register
1275 (define-hardware
1276 (name h-sb)
1277 (comment "SB register")
1278 (attrs all-isas)
1279 (type register USI)
1280 (get () (c-call USI "h_sb_get_handler"))
1281 (set (newval) (c-call VOID "h_sb_set_handler" newval))
1282 )
1284 ; FB Register
1285 (define-hardware
1286 (name h-fb)
1287 (comment "FB register")
1288 (attrs all-isas)
1289 (type register USI)
1290 (get () (c-call USI "h_fb_get_handler"))
1291 (set (newval) (c-call VOID "h_fb_set_handler" newval))
1292 )
1294 ; SP Register
1295 (define-hardware
1296 (name h-sp)
1297 (comment "SP register")
1298 (attrs all-isas)
1299 (type register USI)
1300 (get () (c-call USI "h_sp_get_handler"))
1301 (set (newval) (c-call VOID "h_sp_set_handler" newval))
1302 )
1304 ;-------------------------------------------------------------
1305 ; condition-code bits
1306 ;-------------------------------------------------------------
1308 (define-hardware
1309 (name h-sbit)
1310 (comment "sign bit")
1311 (attrs all-isas)
1312 (type register BI)
1313 )
1315 (define-hardware
1316 (name h-zbit)
1317 (comment "zero bit")
1318 (attrs all-isas)
1319 (type register BI)
1320 )
1322 (define-hardware
1323 (name h-obit)
1324 (comment "overflow bit")
1325 (attrs all-isas)
1326 (type register BI)
1327 )
1329 (define-hardware
1330 (name h-cbit)
1331 (comment "carry bit")
1332 (attrs all-isas)
1333 (type register BI)
1334 )
1336 (define-hardware
1337 (name h-ubit)
1338 (comment "stack pointer select bit")
1339 (attrs all-isas)
1340 (type register BI)
1341 )
1343 (define-hardware
1344 (name h-ibit)
1345 (comment "interrupt enable bit")
1346 (attrs all-isas)
1347 (type register BI)
1348 )
1350 (define-hardware
1351 (name h-bbit)
1352 (comment "register bank select bit")
1353 (attrs all-isas)
1354 (type register BI)
1355 )
1357 (define-hardware
1358 (name h-dbit)
1359 (comment "debug bit")
1360 (attrs all-isas)
1361 (type register BI)
1362 )
1364 (define-hardware
1365 (name h-dct0)
1366 (comment "dma transfer count 000")
1367 (attrs all-isas)
1368 (type register UHI)
1369 )
1370 (define-hardware
1371 (name h-dct1)
1372 (comment "dma transfer count 001")
1373 (attrs all-isas)
1374 (type register UHI)
1375 )
1376 (define-hardware
1377 (name h-svf)
1378 (comment "save flag 011")
1379 (attrs all-isas)
1380 (type register UHI)
1381 )
1382 (define-hardware
1383 (name h-drc0)
1384 (comment "dma transfer count reload 100")
1385 (attrs all-isas)
1386 (type register UHI)
1387 )
1388 (define-hardware
1389 (name h-drc1)
1390 (comment "dma transfer count reload 101")
1391 (attrs all-isas)
1392 (type register UHI)
1393 )
1394 (define-hardware
1395 (name h-dmd0)
1396 (comment "dma mode 110")
1397 (attrs all-isas)
1398 (type register UQI)
1399 )
1400 (define-hardware
1401 (name h-dmd1)
1402 (comment "dma mode 111")
1403 (attrs all-isas)
1404 (type register UQI)
1405 )
1406 (define-hardware
1407 (name h-intb)
1408 (comment "interrupt table 000")
1409 (attrs all-isas)
1410 (type register USI)
1411 )
1412 (define-hardware
1413 (name h-svp)
1414 (comment "save pc 100")
1415 (attrs all-isas)
1416 (type register UHI)
1417 )
1418 (define-hardware
1419 (name h-vct)
1420 (comment "vector 101")
1421 (attrs all-isas)
1422 (type register USI)
1423 )
1424 (define-hardware
1425 (name h-isp)
1426 (comment "interrupt stack ptr 111")
1427 (attrs all-isas)
1428 (type register USI)
1429 )
1430 (define-hardware
1431 (name h-dma0)
1432 (comment "dma mem addr 010")
1433 (attrs all-isas)
1434 (type register USI)
1435 )
1436 (define-hardware
1437 (name h-dma1)
1438 (comment "dma mem addr 011")
1439 (attrs all-isas)
1440 (type register USI)
1441 )
1442 (define-hardware
1443 (name h-dra0)
1444 (comment "dma mem addr reload 100")
1445 (attrs all-isas)
1446 (type register USI)
1447 )
1448 (define-hardware
1449 (name h-dra1)
1450 (comment "dma mem addr reload 101")
1451 (attrs all-isas)
1452 (type register USI)
1453 )
1454 (define-hardware
1455 (name h-dsa0)
1456 (comment "dma sfr addr 110")
1457 (attrs all-isas)
1458 (type register USI)
1459 )
1460 (define-hardware
1461 (name h-dsa1)
1462 (comment "dma sfr addr 111")
1463 (attrs all-isas)
1464 (type register USI)
1465 )
1467 ;-------------------------------------------------------------
1468 ; Condition code operand hardware
1469 ;-------------------------------------------------------------
1471 (define-hardware
1472 (name h-cond16)
1473 (comment "condition code hardware for m16c")
1474 (attrs m16c-isa MACH16)
1475 (type immediate UQI)
1476 (values keyword ""
1477 (("geu" #x00) ("c" #x00)
1478 ("gtu" #x01)
1479 ("eq" #x02) ("z" #x02)
1480 ("n" #x03)
1481 ("le" #x04)
1482 ("o" #x05)
1483 ("ge" #x06)
1484 ("ltu" #xf8) ("nc" #xf8)
1485 ("leu" #xf9)
1486 ("ne" #xfa) ("nz" #xfa)
1487 ("pz" #xfb)
1488 ("gt" #xfc)
1489 ("no" #xfd)
1490 ("lt" #xfe)
1491 )
1492 )
1493 )
1494 (define-hardware
1495 (name h-cond16c)
1496 (comment "condition code hardware for m16c")
1497 (attrs m16c-isa MACH16)
1498 (type immediate UQI)
1499 (values keyword ""
1500 (("geu" #x00) ("c" #x00)
1501 ("gtu" #x01)
1502 ("eq" #x02) ("z" #x02)
1503 ("n" #x03)
1504 ("ltu" #x04) ("nc" #x04)
1505 ("leu" #x05)
1506 ("ne" #x06) ("nz" #x06)
1507 ("pz" #x07)
1508 ("le" #x08)
1509 ("o" #x09)
1510 ("ge" #x0a)
1511 ("gt" #x0c)
1512 ("no" #x0d)
1513 ("lt" #x0e)
1514 )
1515 )
1516 )
1517 (define-hardware
1518 (name h-cond16j)
1519 (comment "condition code hardware for m16c")
1520 (attrs m16c-isa MACH16)
1521 (type immediate UQI)
1522 (values keyword ""
1523 (("le" #x08)
1524 ("o" #x09)
1525 ("ge" #x0a)
1526 ("gt" #x0c)
1527 ("no" #x0d)
1528 ("lt" #x0e)
1529 )
1530 )
1531 )
1532 (define-hardware
1533 (name h-cond16j-5)
1534 (comment "condition code hardware for m16c")
1535 (attrs m16c-isa MACH16)
1536 (type immediate UQI)
1537 (values keyword ""
1538 (("geu" #x00) ("c" #x00)
1539 ("gtu" #x01)
1540 ("eq" #x02) ("z" #x02)
1541 ("n" #x03)
1542 ("ltu" #x04) ("nc" #x04)
1543 ("leu" #x05)
1544 ("ne" #x06) ("nz" #x06)
1545 ("pz" #x07)
1546 )
1547 )
1548 )
1550 (define-hardware
1551 (name h-cond32)
1552 (comment "condition code hardware for m32c")
1553 (attrs m32c-isa MACH32)
1554 (type immediate UQI)
1555 (values keyword ""
1556 (("ltu" #x00) ("nc" #x00)
1557 ("leu" #x01)
1558 ("ne" #x02) ("nz" #x02)
1559 ("pz" #x03)
1560 ("no" #x04)
1561 ("gt" #x05)
1562 ("ge" #x06)
1563 ("geu" #x08) ("c" #x08)
1564 ("gtu" #x09)
1565 ("eq" #x0a) ("z" #x0a)
1566 ("n" #x0b)
1567 ("o" #x0c)
1568 ("le" #x0d)
1569 ("lt" #x0e)
1570 )
1571 )
1572 )
1574 (define-hardware
1575 (name h-cr1-32)
1576 (comment "control registers")
1577 (attrs m32c-isa MACH32)
1578 (type immediate UQI)
1579 (values keyword "" (("dct0" 0) ("dct1" 1) ("flg" 2) ("svf" 3) ("drc0" 4)
1580 ("drc1" 5) ("dmd0" 6) ("dmd1" 7))))
1581 (define-hardware
1582 (name h-cr2-32)
1583 (comment "control registers")
1584 (attrs m32c-isa MACH32)
1585 (type immediate UQI)
1586 (values keyword "" (("intb" 0) ("sp" 1) ("sb" 2) ("fb" 3) ("svp" 4)
1587 ("vct" 5) ("isp" 7))))
1589 (define-hardware
1590 (name h-cr3-32)
1591 (comment "control registers")
1592 (attrs m32c-isa MACH32)
1593 (type immediate UQI)
1594 (values keyword "" (("dma0" 2) ("dma1" 3) ("dra0" 4)
1595 ("dra1" 5) ("dsa0" 6) ("dsa1" 7))))
1596 (define-hardware
1597 (name h-cr-16)
1598 (comment "control registers")
1599 (attrs m16c-isa MACH16)
1600 (type immediate UQI)
1601 (values keyword "" (("intbl" 1) ("intbh" 2) ("flg" 3) ("isp" 4)
1602 ("sp" 5) ("sb" 6) ("fb" 7))))
1604 (define-hardware
1605 (name h-flags)
1606 (comment "flag hardware for m32c")
1607 (attrs all-isas)
1608 (type immediate UQI)
1609 (values keyword ""
1610 (("c" #x0)
1611 ("d" #x1)
1612 ("z" #x2)
1613 ("s" #x3)
1614 ("b" #x4)
1615 ("o" #x5)
1616 ("i" #x6)
1617 ("u" #x7)
1618 )
1619 )
1620 )
1622 ;-------------------------------------------------------------
1623 ; Misc helper hardware
1624 ;-------------------------------------------------------------
1626 (define-hardware
1627 (name h-shimm)
1628 (comment "shift immediate")
1629 (attrs all-isas)
1630 (type immediate (INT 4))
1631 (values keyword "" (("1" 0) ("2" 1) ("3" 2) ("4" 3) ("5" 4) ("6" 5) ("7" 6)
1632 ("8" 7) ("-1" -8) ("-2" -7) ("-3" -6) ("-4" -5) ("-5" -4)
1633 ("-6" -3) ("-7" -2) ("-8" -1)
1634 )))
1635 (define-hardware
1636 (name h-bit-index)
1637 (comment "bit index for the next insn")
1638 (attrs m32c-isa MACH32)
1639 (type register UHI)
1640 )
1641 (define-hardware
1642 (name h-src-index)
1643 (comment "source index for the next insn")
1644 (attrs m32c-isa MACH32)
1645 (type register UHI)
1646 )
1647 (define-hardware
1648 (name h-dst-index)
1649 (comment "destination index for the next insn")
1650 (attrs m32c-isa MACH32)
1651 (type register UHI)
1652 )
1653 (define-hardware
1654 (name h-src-indirect)
1655 (comment "indirect src for the next insn")
1656 (attrs all-isas)
1657 (type register UHI)
1658 )
1659 (define-hardware
1660 (name h-dst-indirect)
1661 (comment "indirect dst for the next insn")
1662 (attrs all-isas)
1663 (type register UHI)
1664 )
1665 (define-hardware
1666 (name h-none)
1667 (comment "for storing unused values")
1668 (attrs m32c-isa MACH32)
1669 (type register SI)
1670 )
1671 \f
1672 ;=============================================================
1673 ; Operands
1674 ;-------------------------------------------------------------
1675 ; Source Registers
1676 ;-------------------------------------------------------------
1678 (dnop Src16RnQI "general register QI view" (MACH16 m16c-isa) h-gr-QI f-src16-rn)
1679 (dnop Src16RnHI "general register QH view" (MACH16 m16c-isa) h-gr-HI f-src16-rn)
1681 (dnop Src32RnUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-unprefixed-QI)
1682 (dnop Src32RnUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-unprefixed-HI)
1683 (dnop Src32RnUnprefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-unprefixed-SI)
1685 (dnop Src32RnPrefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-prefixed-QI)
1686 (dnop Src32RnPrefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-prefixed-HI)
1687 (dnop Src32RnPrefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-prefixed-SI)
1689 (dnop Src16An "address register" (MACH16 m16c-isa) h-ar f-src16-an)
1690 (dnop Src16AnQI "address register QI view" (MACH16 m16c-isa) h-ar-QI f-src16-an)
1691 (dnop Src16AnHI "address register HI view" (MACH16 m16c-isa) h-ar-HI f-src16-an)
1693 (dnop Src32AnUnprefixed "address register" (MACH32 m32c-isa) h-ar f-src32-an-unprefixed)
1694 (dnop Src32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-unprefixed)
1695 (dnop Src32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-unprefixed)
1696 (dnop Src32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-src32-an-unprefixed)
1698 (dnop Src32AnPrefixed "address register" (MACH32 m32c-isa) h-ar f-src32-an-prefixed)
1699 (dnop Src32AnPrefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-prefixed)
1700 (dnop Src32AnPrefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-prefixed)
1701 (dnop Src32AnPrefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-src32-an-prefixed)
1703 ; Destination Registers
1704 ;
1705 (dnop Dst16RnQI "general register QI view" (MACH16 m16c-isa) h-gr-QI f-dst16-rn)
1706 (dnop Dst16RnHI "general register HI view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn)
1707 (dnop Dst16RnSI "general register SI view" (MACH16 m16c-isa) h-gr-SI f-dst16-rn)
1708 (dnop Dst16RnExtQI "general register QI/HI view for 'ext' insns" (MACH16 m16c-isa) h-gr-ext-QI f-dst16-rn-ext)
1710 (dnop Dst32R0QI-S "general register QI view" (MACH32 m32c-isa) h-r0l f-nil)
1711 (dnop Dst32R0HI-S "general register HI view" (MACH32 m32c-isa) h-r0 f-nil)
1713 (dnop Dst32RnUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI)
1714 (dnop Dst32RnUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-unprefixed-HI)
1715 (dnop Dst32RnUnprefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-unprefixed-SI)
1716 (dnop Dst32RnExtUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-ext-QI f-dst32-rn-ext-unprefixed)
1717 (dnop Dst32RnExtUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-ext-HI f-dst32-rn-ext-unprefixed)
1719 (dnop Dst32RnPrefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI)
1720 (dnop Dst32RnPrefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-prefixed-HI)
1721 (dnop Dst32RnPrefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-prefixed-SI)
1723 (dnop Dst16RnQI-S "general register QI view" (MACH16 m16c-isa) h-r0l-r0h f-dst16-rn-QI-s)
1725 (dnop Dst16AnQI-S "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-rn-QI-s)
1727 (dnop Bit16Rn "general register bit view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn)
1729 (dnop Bit32RnPrefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI)
1730 (dnop Bit32RnUnprefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI)
1732 (dnop R0 "r0" (all-isas) h-r0 f-nil)
1733 (dnop R1 "r1" (all-isas) h-r1 f-nil)
1734 (dnop R2 "r2" (all-isas) h-r2 f-nil)
1735 (dnop R3 "r3" (all-isas) h-r3 f-nil)
1736 (dnop R0l "r0l" (all-isas) h-r0l f-nil)
1737 (dnop R0h "r0h" (all-isas) h-r0h f-nil)
1738 (dnop R2R0 "r2r0" (all-isas) h-r2r0 f-nil)
1739 (dnop R3R1 "r3r1" (all-isas) h-r3r1 f-nil)
1740 (dnop R1R2R0 "r1r2r0" (all-isas) h-r1r2r0 f-nil)
1742 (dnop Dst16An "address register" (MACH16 m16c-isa) h-ar f-dst16-an)
1743 (dnop Dst16AnQI "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-an)
1744 (dnop Dst16AnHI "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an)
1745 (dnop Dst16AnSI "address register SI view" (MACH16 m16c-isa) h-ar-SI f-dst16-an)
1746 (dnop Dst16An-S "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an-s)
1748 (dnop Dst32AnUnprefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1749 (dnop Dst32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-unprefixed)
1750 (dnop Dst32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-unprefixed)
1751 (dnop Dst32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1753 (dnop Dst32AnExtUnprefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1755 (dnop Dst32AnPrefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
1756 (dnop Dst32AnPrefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-prefixed)
1757 (dnop Dst32AnPrefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-prefixed)
1758 (dnop Dst32AnPrefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
1760 (dnop Bit16An "address register bit view" (MACH16 m16c-isa) h-ar f-dst16-an)
1762 (dnop Bit32AnPrefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
1763 (dnop Bit32AnUnprefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1765 (dnop A0 "a0" (all-isas) h-a0 f-nil)
1766 (dnop A1 "a1" (all-isas) h-a1 f-nil)
1768 (dnop sb "SB register" (all-isas SEM-ONLY) h-sb f-nil)
1769 (dnop fb "FB register" (all-isas SEM-ONLY) h-fb f-nil)
1770 (dnop sp "SP register" (all-isas SEM-ONLY) h-sp f-nil)
1772 (define-full-operand SrcDst16-r0l-r0h-S-normal "r0l/r0h pair" (MACH16 m16c-isa)
1773 h-sint DFLT f-5-1
1774 ((parse "r0l_r0h") (print "r0l_r0h")) () ()
1775 )
1777 (define-full-operand Regsetpop "popm regset" (all-isas) h-uint
1778 DFLT f-8-8 ((parse "pop_regset") (print "pop_regset")) () ())
1779 (define-full-operand Regsetpush "pushm regset" (all-isas) h-uint
1780 DFLT f-8-8 ((parse "push_regset") (print "push_regset")) () ())
1782 (dnop Rn16-push-S "r0[lh]" (MACH16 m16c-isa) h-gr-QI f-4-1)
1783 (dnop An16-push-S "a[01]" (MACH16 m16c-isa) h-ar-HI f-4-1)
1785 ;-------------------------------------------------------------
1786 ; Offsets and absolutes
1787 ;-------------------------------------------------------------
1789 (define-full-operand Dsp-8-u6 "unsigned 6 bit displacement at offset 8 bits" (all-isas)
1790 h-uint DFLT f-dsp-8-u6
1791 ((parse "unsigned6")) () ()
1792 )
1793 (define-full-operand Dsp-8-u8 "unsigned 8 bit displacement at offset 8 bits" (all-isas)
1794 h-uint DFLT f-dsp-8-u8
1795 ((parse "unsigned8")) () ()
1796 )
1797 (define-full-operand Dsp-8-u16 "unsigned 16 bit displacement at offset 8 bits" (all-isas)
1798 h-uint DFLT f-dsp-8-u16
1799 ((parse "unsigned16")) () ()
1800 )
1801 (define-full-operand Dsp-8-s8 "signed 8 bit displacement at offset 8 bits" (all-isas)
1802 h-sint DFLT f-dsp-8-s8
1803 ((parse "signed8")) () ()
1804 )
1805 (define-full-operand Dsp-8-s24 "signed 24 bit displacement at offset 8 bits" (all-isas)
1806 h-sint DFLT f-dsp-8-s24
1807 ((parse "signed24")) () ()
1808 )
1809 (define-full-operand Dsp-8-u24 "unsigned 24 bit displacement at offset 8 bits" (all-isas)
1810 h-uint DFLT f-dsp-8-u24
1811 ((parse "unsigned24")) () ()
1812 )
1813 (define-full-operand Dsp-10-u6 "unsigned 6 bit displacement at offset 10 bits" (all-isas)
1814 h-uint DFLT f-dsp-10-u6
1815 ((parse "unsigned6")) () ()
1816 )
1817 (define-full-operand Dsp-16-u8 "unsigned 8 bit displacement at offset 16 bits" (all-isas)
1818 h-uint DFLT f-dsp-16-u8
1819 ((parse "unsigned8")) () ()
1820 )
1821 (define-full-operand Dsp-16-u16 "unsigned 16 bit displacement at offset 16 bits" (all-isas)
1822 h-uint DFLT f-dsp-16-u16
1823 ((parse "unsigned16")) () ()
1824 )
1825 (define-full-operand Dsp-16-u20 "unsigned 20 bit displacement at offset 16 bits" (all-isas)
1826 h-uint DFLT f-dsp-16-u24
1827 ((parse "unsigned20")) () ()
1828 )
1829 (define-full-operand Dsp-16-u24 "unsigned 24 bit displacement at offset 16 bits" (all-isas)
1830 h-uint DFLT f-dsp-16-u24
1831 ((parse "unsigned24")) () ()
1832 )
1833 (define-full-operand Dsp-16-s8 "signed 8 bit displacement at offset 16 bits" (all-isas)
1834 h-sint DFLT f-dsp-16-s8
1835 ((parse "signed8")) () ()
1836 )
1837 (define-full-operand Dsp-16-s16 "signed 16 bit displacement at offset 16 bits" (all-isas)
1838 h-sint DFLT f-dsp-16-s16
1839 ((parse "signed16")) () ()
1840 )
1841 (define-full-operand Dsp-24-u8 "unsigned 8 bit displacement at offset 24 bits" (all-isas)
1842 h-uint DFLT f-dsp-24-u8
1843 ((parse "unsigned8")) () ()
1844 )
1845 (define-full-operand Dsp-24-u16 "unsigned 16 bit displacement at offset 24 bits" (all-isas)
1846 h-uint DFLT f-dsp-24-u16
1847 ((parse "unsigned16")) () ()
1848 )
1849 (define-full-operand Dsp-24-u20 "unsigned 20 bit displacement at offset 24 bits" (all-isas)
1850 h-uint DFLT f-dsp-24-u24
1851 ((parse "unsigned20")) () ()
1852 )
1853 (define-full-operand Dsp-24-u24 "unsigned 24 bit displacement at offset 24 bits" (all-isas)
1854 h-uint DFLT f-dsp-24-u24
1855 ((parse "unsigned24")) () ()
1856 )
1857 (define-full-operand Dsp-24-s8 "signed 8 bit displacement at offset 24 bits" (all-isas)
1858 h-sint DFLT f-dsp-24-s8
1859 ((parse "signed8")) () ()
1860 )
1861 (define-full-operand Dsp-24-s16 "signed 16 bit displacement at offset 24 bits" (all-isas)
1862 h-sint DFLT f-dsp-24-s16
1863 ((parse "signed16")) () ()
1864 )
1865 (define-full-operand Dsp-32-u8 "unsigned 8 bit displacement at offset 32 bits" (all-isas)
1866 h-uint DFLT f-dsp-32-u8
1867 ((parse "unsigned8")) () ()
1868 )
1869 (define-full-operand Dsp-32-u16 "unsigned 16 bit displacement at offset 32 bits" (all-isas)
1870 h-uint DFLT f-dsp-32-u16
1871 ((parse "unsigned16")) () ()
1872 )
1873 (define-full-operand Dsp-32-u24 "unsigned 24 bit displacement at offset 32 bits" (all-isas)
1874 h-uint DFLT f-dsp-32-u24
1875 ((parse "unsigned24")) () ()
1876 )
1877 (define-full-operand Dsp-32-u20 "unsigned 20 bit displacement at offset 32 bits" (all-isas)
1878 h-uint DFLT f-dsp-32-u24
1879 ((parse "unsigned20")) () ()
1880 )
1881 (define-full-operand Dsp-32-s8 "signed 8 bit displacement at offset 32 bits" (all-isas)
1882 h-sint DFLT f-dsp-32-s8
1883 ((parse "signed8")) () ()
1884 )
1885 (define-full-operand Dsp-32-s16 "signed 16 bit displacement at offset 32 bits" (all-isas)
1886 h-sint DFLT f-dsp-32-s16
1887 ((parse "signed16")) () ()
1888 )
1889 (define-full-operand Dsp-40-u8 "unsigned 8 bit displacement at offset 40 bits" (all-isas)
1890 h-uint DFLT f-dsp-40-u8
1891 ((parse "unsigned8")) () ()
1892 )
1893 (define-full-operand Dsp-40-s8 "signed 8 bit displacement at offset 40 bits" (all-isas)
1894 h-sint DFLT f-dsp-40-s8
1895 ((parse "signed8")) () ()
1896 )
1897 (define-full-operand Dsp-40-u16 "unsigned 16 bit displacement at offset 40 bits" (all-isas)
1898 h-uint DFLT f-dsp-40-u16
1899 ((parse "unsigned16")) () ()
1900 )
1901 (define-full-operand Dsp-40-s16 "signed 16 bit displacement at offset 40 bits" (all-isas)
1902 h-sint DFLT f-dsp-40-s16
1903 ((parse "signed16")) () ()
1904 )
1905 (define-full-operand Dsp-40-u20 "unsigned 20 bit displacement at offset 40 bits" (all-isas)
1906 h-uint DFLT f-dsp-40-u20
1907 ((parse "unsigned20")) () ()
1908 )
1909 (define-full-operand Dsp-40-u24 "unsigned 24 bit displacement at offset 40 bits" (all-isas)
1910 h-uint DFLT f-dsp-40-u24
1911 ((parse "unsigned24")) () ()
1912 )
1913 (define-full-operand Dsp-48-u8 "unsigned 8 bit displacement at offset 48 bits" (all-isas)
1914 h-uint DFLT f-dsp-48-u8
1915 ((parse "unsigned8")) () ()
1916 )
1917 (define-full-operand Dsp-48-s8 "signed 8 bit displacement at offset 48 bits" (all-isas)
1918 h-sint DFLT f-dsp-48-s8
1919 ((parse "signed8")) () ()
1920 )
1921 (define-full-operand Dsp-48-u16 "unsigned 16 bit displacement at offset 48 bits" (all-isas)
1922 h-uint DFLT f-dsp-48-u16
1923 ((parse "unsigned16")) () ()
1924 )
1925 (define-full-operand Dsp-48-s16 "signed 16 bit displacement at offset 48 bits" (all-isas)
1926 h-sint DFLT f-dsp-48-s16
1927 ((parse "signed16")) () ()
1928 )
1929 (define-full-operand Dsp-48-u20 "unsigned 24 bit displacement at offset 40 bits" (all-isas)
1930 h-uint DFLT f-dsp-48-u20
1931 ((parse "unsigned24")) () ()
1932 )
1933 (define-full-operand Dsp-48-u24 "unsigned 24 bit displacement at offset 48 bits" (all-isas)
1934 h-uint DFLT f-dsp-48-u24
1935 ((parse "unsigned24")) () ()
1936 )
1938 (define-full-operand Imm-8-s4 "signed 4 bit immediate at offset 8 bits" (all-isas)
1939 h-sint DFLT f-imm-8-s4
1940 ((parse "signed4")) () ()
1941 )
1942 (define-full-operand Imm-8-s4n "negated 4 bit immediate at offset 8 bits" (all-isas)
1943 h-sint DFLT f-imm-8-s4
1944 ((parse "signed4n") (print "signed4n")) () ()
1945 )
1946 (define-full-operand Imm-sh-8-s4 "signed 4 bit shift immediate at offset 8 bits" (all-isas)
1947 h-shimm DFLT f-imm-8-s4
1948 () () ()
1949 )
1950 (define-full-operand Imm-8-QI "signed 8 bit immediate at offset 8 bits" (all-isas)
1951 h-sint DFLT f-dsp-8-s8
1952 ((parse "signed8")) () ()
1953 )
1954 (define-full-operand Imm-8-HI "signed 16 bit immediate at offset 8 bits" (all-isas)
1955 h-sint DFLT f-dsp-8-s16
1956 ((parse "signed16")) () ()
1957 )
1958 (define-full-operand Imm-12-s4 "signed 4 bit immediate at offset 12 bits" (all-isas)
1959 h-sint DFLT f-imm-12-s4
1960 ((parse "signed4")) () ()
1961 )
1962 (define-full-operand Imm-12-s4n "negated 4 bit immediate at offset 12 bits" (all-isas)
1963 h-sint DFLT f-imm-12-s4
1964 ((parse "signed4n") (print "signed4n")) () ()
1965 )
1966 (define-full-operand Imm-sh-12-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas)
1967 h-shimm DFLT f-imm-12-s4
1968 () () ()
1969 )
1970 (define-full-operand Imm-13-u3 "signed 3 bit immediate at offset 13 bits" (all-isas)
1971 h-sint DFLT f-imm-13-u3
1972 ((parse "signed4")) () ()
1973 )
1974 (define-full-operand Imm-20-s4 "signed 4 bit immediate at offset 20 bits" (all-isas)
1975 h-sint DFLT f-imm-20-s4
1976 ((parse "signed4")) () ()
1977 )
1978 (define-full-operand Imm-sh-20-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas)
1979 h-shimm DFLT f-imm-20-s4
1980 () () ()
1981 )
1982 (define-full-operand Imm-16-QI "signed 8 bit immediate at offset 16 bits" (all-isas)
1983 h-sint DFLT f-dsp-16-s8
1984 ((parse "signed8")) () ()
1985 )
1986 (define-full-operand Imm-16-HI "signed 16 bit immediate at offset 16 bits" (all-isas)
1987 h-sint DFLT f-dsp-16-s16
1988 ((parse "signed16")) () ()
1989 )
1990 (define-full-operand Imm-16-SI "signed 32 bit immediate at offset 16 bits" (all-isas)
1991 h-sint DFLT f-dsp-16-s32
1992 ((parse "signed32")) () ()
1993 )
1994 (define-full-operand Imm-24-QI "signed 8 bit immediate at offset 24 bits" (all-isas)
1995 h-sint DFLT f-dsp-24-s8
1996 ((parse "signed8")) () ()
1997 )
1998 (define-full-operand Imm-24-HI "signed 16 bit immediate at offset 24 bits" (all-isas)
1999 h-sint DFLT f-dsp-24-s16
2000 ((parse "signed16")) () ()
2001 )
2002 (define-full-operand Imm-24-SI "signed 32 bit immediate at offset 24 bits" (all-isas)
2003 h-sint DFLT f-dsp-24-s32
2004 ((parse "signed32")) () ()
2005 )
2006 (define-full-operand Imm-32-QI "signed 8 bit immediate at offset 32 bits" (all-isas)
2007 h-sint DFLT f-dsp-32-s8
2008 ((parse "signed8")) () ()
2009 )
2010 (define-full-operand Imm-32-SI "signed 32 bit immediate at offset 32 bits" (all-isas)
2011 h-sint DFLT f-dsp-32-s32
2012 ((parse "signed32")) () ()
2013 )
2014 (define-full-operand Imm-32-HI "signed 16 bit immediate at offset 32 bits" (all-isas)
2015 h-sint DFLT f-dsp-32-s16
2016 ((parse "signed16")) () ()
2017 )
2018 (define-full-operand Imm-40-QI "signed 8 bit immediate at offset 40 bits" (all-isas)
2019 h-sint DFLT f-dsp-40-s8
2020 ((parse "signed8")) () ()
2021 )
2022 (define-full-operand Imm-40-HI "signed 16 bit immediate at offset 40 bits" (all-isas)
2023 h-sint DFLT f-dsp-40-s16
2024 ((parse "signed16")) () ()
2025 )
2026 (define-full-operand Imm-40-SI "signed 32 bit immediate at offset 40 bits" (all-isas)
2027 h-sint DFLT f-dsp-40-s32
2028 ((parse "signed32")) () ()
2029 )
2030 (define-full-operand Imm-48-QI "signed 8 bit immediate at offset 48 bits" (all-isas)
2031 h-sint DFLT f-dsp-48-s8
2032 ((parse "signed8")) () ()
2033 )
2034 (define-full-operand Imm-48-HI "signed 16 bit immediate at offset 48 bits" (all-isas)
2035 h-sint DFLT f-dsp-48-s16
2036 ((parse "signed16")) () ()
2037 )
2038 (define-full-operand Imm-48-SI "signed 32 bit immediate at offset 48 bits" (all-isas)
2039 h-sint DFLT f-dsp-48-s32
2040 ((parse "signed32")) () ()
2041 )
2042 (define-full-operand Imm-56-QI "signed 8 bit immediate at offset 56 bits" (all-isas)
2043 h-sint DFLT f-dsp-56-s8
2044 ((parse "signed8")) () ()
2045 )
2046 (define-full-operand Imm-56-HI "signed 16 bit immediate at offset 56 bits" (all-isas)
2047 h-sint DFLT f-dsp-56-s16
2048 ((parse "signed16")) () ()
2049 )
2050 (define-full-operand Imm-64-HI "signed 16 bit immediate at offset 64 bits" (all-isas)
2051 h-sint DFLT f-dsp-64-s16
2052 ((parse "signed16")) () ()
2053 )
2054 (define-full-operand Imm1-S "signed 1 bit immediate for short format binary insns" (m32c-isa)
2055 h-sint DFLT f-imm1-S
2056 ((parse "imm1_S")) () ()
2057 )
2058 (define-full-operand Imm3-S "signed 3 bit immediate for short format binary insns" (m32c-isa)
2059 h-sint DFLT f-imm3-S
2060 ((parse "imm3_S")) () ()
2061 )
2062 (define-full-operand Bit3-S "3 bit bit number" (m32c-isa)
2063 h-sint DFLT f-imm3-S
2064 ((parse "bit3_S")) () ()
2065 )
2067 ;-------------------------------------------------------------
2068 ; Bit numbers
2069 ;-------------------------------------------------------------
2071 (define-full-operand Bitno16R "bit number for indexing registers" (m16c-isa)
2072 h-uint DFLT f-dsp-16-u8
2073 ((parse "Bitno16R")) () ()
2074 )
2075 (dnop Bitno32Prefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-prefixed)
2076 (dnop Bitno32Unprefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-unprefixed)
2078 (define-full-operand BitBase16-16-u8 "unsigned bit,base:8 at offset 16for m16c" (m16c-isa)
2079 h-uint DFLT f-dsp-16-u8
2080 ((parse "unsigned_bitbase8") (print "unsigned_bitbase")) () ()
2081 )
2082 (define-full-operand BitBase16-16-s8 "signed bit,base:8 at offset 16for m16c" (m16c-isa)
2083 h-sint DFLT f-dsp-16-s8
2084 ((parse "signed_bitbase8") (print "signed_bitbase")) () ()
2085 )
2086 (define-full-operand BitBase16-16-u16 "unsigned bit,base:16 at offset 16 for m16c" (m16c-isa)
2087 h-uint DFLT f-dsp-16-u16
2088 ((parse "unsigned_bitbase16") (print "unsigned_bitbase")) () ()
2089 )
2090 (define-full-operand BitBase16-8-u11-S "signed bit,base:11 at offset 16 for m16c" (m16c-isa)
2091 h-uint DFLT f-bitbase16-u11-S
2092 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2093 )
2095 (define-full-operand BitBase32-16-u11-Unprefixed "unsigned bit,base:11 at offset 16 for m32c" (m32c-isa)
2096 h-uint DFLT f-bitbase32-16-u11-unprefixed
2097 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2098 )
2099 (define-full-operand BitBase32-16-s11-Unprefixed "signed bit,base:11 at offset 16 for m32c" (m32c-isa)
2100 h-sint DFLT f-bitbase32-16-s11-unprefixed
2101 ((parse "signed_bitbase11") (print "signed_bitbase")) () ()
2102 )
2103 (define-full-operand BitBase32-16-u19-Unprefixed "unsigned bit,base:19 at offset 16 for m32c" (m32c-isa)
2104 h-uint DFLT f-bitbase32-16-u19-unprefixed
2105 ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () ()
2106 )
2107 (define-full-operand BitBase32-16-s19-Unprefixed "signed bit,base:19 at offset 16 for m32c" (m32c-isa)
2108 h-sint DFLT f-bitbase32-16-s19-unprefixed
2109 ((parse "signed_bitbase19") (print "signed_bitbase")) () ()
2110 )
2111 (define-full-operand BitBase32-16-u27-Unprefixed "unsigned bit,base:27 at offset 16 for m32c" (m32c-isa)
2112 h-uint DFLT f-bitbase32-16-u27-unprefixed
2113 ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () ()
2114 )
2115 (define-full-operand BitBase32-24-u11-Prefixed "unsigned bit,base:11 at offset 24 for m32c" (m32c-isa)
2116 h-uint DFLT f-bitbase32-24-u11-prefixed
2117 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2118 )
2119 (define-full-operand BitBase32-24-s11-Prefixed "signed bit,base:11 at offset 24 for m32c" (m32c-isa)
2120 h-sint DFLT f-bitbase32-24-s11-prefixed
2121 ((parse "signed_bitbase11") (print "signed_bitbase")) () ()
2122 )
2123 (define-full-operand BitBase32-24-u19-Prefixed "unsigned bit,base:19 at offset 24 for m32c" (m32c-isa)
2124 h-uint DFLT f-bitbase32-24-u19-prefixed
2125 ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () ()
2126 )
2127 (define-full-operand BitBase32-24-s19-Prefixed "signed bit,base:19 at offset 24 for m32c" (m32c-isa)
2128 h-sint DFLT f-bitbase32-24-s19-prefixed
2129 ((parse "signed_bitbase19") (print "signed_bitbase")) () ()
2130 )
2131 (define-full-operand BitBase32-24-u27-Prefixed "unsigned bit,base:27 at offset 24 for m32c" (m32c-isa)
2132 h-uint DFLT f-bitbase32-24-u27-prefixed
2133 ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () ()
2134 )
2135 ;-------------------------------------------------------------
2136 ; Labels
2137 ;-------------------------------------------------------------
2139 (define-full-operand Lab-5-3 "3 bit label" (all-isas RELAX)
2140 h-iaddr DFLT f-lab-5-3
2141 ((parse "lab_5_3")) () () )
2143 (define-full-operand Lab32-jmp-s "3 bit label" (all-isas RELAX)
2144 h-iaddr DFLT f-lab32-jmp-s
2145 ((parse "lab_5_3")) () () )
2147 (dnop Lab-8-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-8-8)
2148 (dnop Lab-8-16 "16 bit label" (all-isas RELAX) h-iaddr f-lab-8-16)
2149 (dnop Lab-8-24 "24 bit label" (all-isas RELAX) h-iaddr f-lab-8-24)
2150 (dnop Lab-16-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-16-8)
2151 (dnop Lab-24-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-24-8)
2152 (dnop Lab-32-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-32-8)
2153 (dnop Lab-40-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-40-8)
2155 ;-------------------------------------------------------------
2156 ; Condition code bits
2157 ;-------------------------------------------------------------
2159 (dnop sbit "negative bit" (SEM-ONLY all-isas) h-sbit f-nil)
2160 (dnop obit "overflow bit" (SEM-ONLY all-isas) h-obit f-nil)
2161 (dnop zbit "zero bit" (SEM-ONLY all-isas) h-zbit f-nil)
2162 (dnop cbit "carry bit" (SEM-ONLY all-isas) h-cbit f-nil)
2163 (dnop ubit "stack ptr select bit" (SEM-ONLY all-isas) h-ubit f-nil)
2164 (dnop ibit "interrupt enable bit" (SEM-ONLY all-isas) h-ibit f-nil)
2165 (dnop bbit "reg bank select bit" (SEM-ONLY all-isas) h-bbit f-nil)
2166 (dnop dbit "debug bit" (SEM-ONLY all-isas) h-dbit f-nil)
2168 ;-------------------------------------------------------------
2169 ; Condition operands
2170 ;-------------------------------------------------------------
2172 (define-pmacro (cond-operand mach offset)
2173 (dnop (.sym cond mach - offset) "condition" ((.sym m mach c-isa)) (.sym h-cond mach) (.sym f-dsp- offset -u8))
2174 )
2176 (cond-operand 16 16)
2177 (cond-operand 16 24)
2178 (cond-operand 16 32)
2179 (cond-operand 32 16)
2180 (cond-operand 32 24)
2181 (cond-operand 32 32)
2182 (cond-operand 32 40)
2184 (dnop cond16c "condition" (m16c-isa) h-cond16c f-cond16)
2185 (dnop cond16j "condition" (m16c-isa) h-cond16j f-cond16)
2186 (dnop cond16j5 "condition" (m16c-isa) h-cond16j-5 f-cond16j-5)
2187 (dnop cond32 "condition" (m32c-isa) h-cond32 f-cond32)
2188 (dnop cond32j "condition" (m32c-isa) h-cond32 f-cond32j)
2189 (dnop sccond32 "scCND condition" (m32c-isa) h-cond32 f-cond16)
2190 (dnop flags16 "flags" (m16c-isa) h-flags f-9-3)
2191 (dnop flags32 "flags" (m32c-isa) h-flags f-13-3)
2192 (dnop cr16 "control" (m16c-isa) h-cr-16 f-9-3)
2193 (dnop cr1-Unprefixed-32 "control" (m32c-isa) h-cr1-32 f-13-3)
2194 (dnop cr1-Prefixed-32 "control" (m32c-isa) h-cr1-32 f-21-3)
2195 (dnop cr2-32 "control" (m32c-isa) h-cr2-32 f-13-3)
2196 (dnop cr3-Unprefixed-32 "control" (m32c-isa) h-cr3-32 f-13-3)
2197 (dnop cr3-Prefixed-32 "control" (m32c-isa) h-cr3-32 f-21-3)
2199 ;-------------------------------------------------------------
2200 ; Suffixes
2201 ;-------------------------------------------------------------
2203 (define-full-operand Z "Suffix for zero format insns" (all-isas)
2204 h-sint DFLT f-nil
2205 ((parse "Z") (print "Z")) () ()
2206 )
2207 (define-full-operand S "Suffix for short format insns" (all-isas)
2208 h-sint DFLT f-nil
2209 ((parse "S") (print "S")) () ()
2210 )
2211 (define-full-operand Q "Suffix for quick format insns" (all-isas)
2212 h-sint DFLT f-nil
2213 ((parse "Q") (print "Q")) () ()
2214 )
2215 (define-full-operand G "Suffix for general format insns" (all-isas)
2216 h-sint DFLT f-nil
2217 ((parse "G") (print "G")) () ()
2218 )
2219 (define-full-operand X "Empty suffix" (all-isas)
2220 h-sint DFLT f-nil
2221 ((parse "X") (print "X")) () ()
2222 )
2223 (define-full-operand size "any size specifier" (all-isas)
2224 h-sint DFLT f-nil
2225 ((parse "size") (print "size")) () ()
2226 )
2227 ;-------------------------------------------------------------
2228 ; Misc
2229 ;-------------------------------------------------------------
2231 (dnop BitIndex "Bit Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-bit-index f-nil)
2232 (dnop SrcIndex "Source Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-src-index f-nil)
2233 (dnop DstIndex "Destination Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-dst-index f-nil)
2234 (dnop NoRemainder "Place holder for when the remainder is not kept" (SEM-ONLY MACH32 m32c-isa) h-none f-nil)
2235 \f
2236 ;=============================================================
2237 ; Derived Operands
2239 ; Memory reference macros that clip addresses appropriately. Refer to
2240 ; memory at ADDRESS in MODE, clipped appropriately for either the m16c
2241 ; or m32c.
2242 (define-pmacro (mem16 mode address)
2243 (mem mode (and #xffff address)))
2245 (define-pmacro (mem20 mode address)
2246 (mem mode (and #xfffff address)))
2248 (define-pmacro (mem32 mode address)
2249 (mem mode (and #xffffff address)))
2251 ; Like mem16 and mem32, but takes MACH as a parameter. MACH must be
2252 ; either 16 or 32.
2253 (define-pmacro (mem-mach mach mode address)
2254 ((.sym mem mach) mode address))
2256 ;-------------------------------------------------------------
2257 ; Source
2258 ;-------------------------------------------------------------
2259 ; Rn direct
2260 ;-------------------------------------------------------------
2262 (define-pmacro (src16-Rn-direct-operand xmode)
2263 (begin
2264 (define-derived-operand
2265 (name (.sym src16-Rn-direct- xmode))
2266 (comment (.str "m16c Rn direct source " xmode))
2267 (attrs (machine 16))
2268 (mode xmode)
2269 (args ((.sym Src16Rn xmode)))
2270 (syntax (.str "$Src16Rn" xmode))
2271 (base-ifield f-8-4)
2272 (encoding (+ (f-8-2 0) (.sym Src16Rn xmode)))
2273 (ifield-assertion (eq f-8-2 0))
2274 (getter (trunc xmode (.sym Src16Rn xmode)))
2275 (setter (set (.sym Src16Rn xmode) newval))
2276 )
2277 )
2278 )
2279 (src16-Rn-direct-operand QI)
2280 (src16-Rn-direct-operand HI)
2282 (define-pmacro (src32-Rn-direct-operand group base xmode)
2283 (begin
2284 (define-derived-operand
2285 (name (.sym src32-Rn-direct- group - xmode))
2286 (comment (.str "m32c Rn direct source " xmode))
2287 (attrs (machine 32))
2288 (mode xmode)
2289 (args ((.sym Src32Rn group xmode)))
2290 (syntax (.str "$Src32Rn" group xmode))
2291 (base-ifield (.sym f- base -11))
2292 (encoding (+ ((.sym f- base -3) 4) (.sym Src32Rn group xmode)))
2293 (ifield-assertion (eq (.sym f- base -3) 4))
2294 (getter (trunc xmode (.sym Src32Rn group xmode)))
2295 (setter (set (.sym Src32Rn group xmode) newval))
2296 )
2297 )
2298 )
2300 (src32-Rn-direct-operand Unprefixed 1 QI)
2301 (src32-Rn-direct-operand Prefixed 9 QI)
2302 (src32-Rn-direct-operand Unprefixed 1 HI)
2303 (src32-Rn-direct-operand Prefixed 9 HI)
2304 (src32-Rn-direct-operand Unprefixed 1 SI)
2305 (src32-Rn-direct-operand Prefixed 9 SI)
2307 ;-------------------------------------------------------------
2308 ; An direct
2309 ;-------------------------------------------------------------
2311 (define-pmacro (src16-An-direct-operand xmode)
2312 (begin
2313 (define-derived-operand
2314 (name (.sym src16-An-direct- xmode))
2315 (comment (.str "m16c An direct destination " xmode))
2316 (attrs (machine 16))
2317 (mode xmode)
2318 (args ((.sym Src16An xmode)))
2319 (syntax (.str "$Src16An" xmode))
2320 (base-ifield f-8-4)
2321 (encoding (+ (f-8-2 1) (f-10-1 0) (.sym Src16An xmode)))
2322 (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 0)))
2323 (getter (trunc xmode (.sym Src16An xmode)))
2324 (setter (set (.sym Src16An xmode) newval))
2325 )
2326 )
2327 )
2328 (src16-An-direct-operand QI)
2329 (src16-An-direct-operand HI)
2331 (define-pmacro (src32-An-direct-operand group base1 base2 xmode)
2332 (begin
2333 (define-derived-operand
2334 (name (.sym src32-An-direct- group - xmode))
2335 (comment (.str "m32c An direct destination " xmode))
2336 (attrs (machine 32))
2337 (mode xmode)
2338 (args ((.sym Src32An group xmode)))
2339 (syntax (.str "$Src32An" group xmode))
2340 (base-ifield (.sym f- base1 -11))
2341 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Src32An group xmode)))
2342 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
2343 (getter (trunc xmode (.sym Src32An group xmode)))
2344 (setter (set (.sym Src32An group xmode) newval))
2345 )
2346 )
2347 )
2349 (src32-An-direct-operand Unprefixed 1 10 QI)
2350 (src32-An-direct-operand Unprefixed 1 10 HI)
2351 (src32-An-direct-operand Unprefixed 1 10 SI)
2352 (src32-An-direct-operand Prefixed 9 18 QI)
2353 (src32-An-direct-operand Prefixed 9 18 HI)
2354 (src32-An-direct-operand Prefixed 9 18 SI)
2356 ;-------------------------------------------------------------
2357 ; An indirect
2358 ;-------------------------------------------------------------
2360 (define-pmacro (src16-An-indirect-operand xmode)
2361 (begin
2362 (define-derived-operand
2363 (name (.sym src16-An-indirect- xmode))
2364 (comment (.str "m16c An indirect destination " xmode))
2365 (attrs (machine 16))
2366 (mode xmode)
2367 (args (Src16An))
2368 (syntax "[$Src16An]")
2369 (base-ifield f-8-4)
2370 (encoding (+ (f-8-2 1) (f-10-1 1) Src16An))
2371 (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 1)))
2372 (getter (mem16 xmode Src16An))
2373 (setter (set (mem16 xmode Src16An) newval))
2374 )
2375 )
2376 )
2377 (src16-An-indirect-operand QI)
2378 (src16-An-indirect-operand HI)
2380 (define-pmacro (src32-An-indirect-operand group base1 base2 xmode)
2381 (begin
2382 (define-derived-operand
2383 (name (.sym src32-An-indirect- group - xmode))
2384 (comment (.str "m32c An indirect destination " xmode))
2385 (attrs (machine 32))
2386 (mode xmode)
2387 (args ((.sym Src32An group)))
2388 (syntax (.str "[$Src32An" group "]"))
2389 (base-ifield (.sym f- base1 -11))
2390 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Src32An group)))
2391 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
2392 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group)
2393 (const 0)))
2394 (setter (c-call DFLT (.str "operand_setter_" xmode) newval
2395 (.sym Src32An group) (const 0)))
2396 ; (getter (mem32 xmode (.sym Src32An group)))
2397 ; (setter (set (mem32 xmode (.sym Src32An group)) newval))
2398 )
2399 )
2400 )
2402 (src32-An-indirect-operand Unprefixed 1 10 QI)
2403 (src32-An-indirect-operand Unprefixed 1 10 HI)
2404 (src32-An-indirect-operand Unprefixed 1 10 SI)
2405 (src32-An-indirect-operand Prefixed 9 18 QI)
2406 (src32-An-indirect-operand Prefixed 9 18 HI)
2407 (src32-An-indirect-operand Prefixed 9 18 SI)
2409 ;-------------------------------------------------------------
2410 ; dsp:d[r] relative
2411 ;-------------------------------------------------------------
2413 (define-pmacro (src16-relative-operand xmode)
2414 (begin
2415 (define-derived-operand
2416 (name (.sym src16-16-8-SB-relative- xmode))
2417 (comment (.str "m16c dsp:8[sb] relative destination " xmode))
2418 (attrs (machine 16))
2419 (mode xmode)
2420 (args (Dsp-16-u8))
2421 (syntax "${Dsp-16-u8}[sb]")
2422 (base-ifield f-8-4)
2423 (encoding (+ (f-8-4 #xA) Dsp-16-u8))
2424 (ifield-assertion (eq f-8-4 #xA))
2425 (getter (mem16 xmode (add Dsp-16-u8 (reg h-sb))))
2426 (setter (set (mem16 xmode (add Dsp-16-u8 (reg h-sb))) newval))
2427 )
2428 (define-derived-operand
2429 (name (.sym src16-16-16-SB-relative- xmode))
2430 (comment (.str "m16c dsp:16[sb] relative destination " xmode))
2431 (attrs (machine 16))
2432 (mode xmode)
2433 (args (Dsp-16-u16))
2434 (syntax "${Dsp-16-u16}[sb]")
2435 (base-ifield f-8-4)
2436 (encoding (+ (f-8-4 #xE) Dsp-16-u16))
2437 (ifield-assertion (eq f-8-4 #xE))
2438 (getter (mem16 xmode (add Dsp-16-u16 (reg h-sb))))
2439 (setter (set (mem16 xmode (add Dsp-16-u16 (reg h-sb))) newval))
2440 )
2441 (define-derived-operand
2442 (name (.sym src16-16-8-FB-relative- xmode))
2443 (comment (.str "m16c dsp:8[fb] relative destination " xmode))
2444 (attrs (machine 16))
2445 (mode xmode)
2446 (args (Dsp-16-s8))
2447 (syntax "${Dsp-16-s8}[fb]")
2448 (base-ifield f-8-4)
2449 (encoding (+ (f-8-4 #xB) Dsp-16-s8))
2450 (ifield-assertion (eq f-8-4 #xB))
2451 (getter (mem16 xmode (add Dsp-16-s8 (reg h-fb))))
2452 (setter (set (mem16 xmode (add Dsp-16-s8 (reg h-fb))) newval))
2453 )
2454 (define-derived-operand
2455 (name (.sym src16-16-8-An-relative- xmode))
2456 (comment (.str "m16c dsp:8[An] relative destination " xmode))
2457 (attrs (machine 16))
2458 (mode xmode)
2459 (args (Src16An Dsp-16-u8))
2460 (syntax "${Dsp-16-u8}[$Src16An]")
2461 (base-ifield f-8-4)
2462 (encoding (+ (f-8-2 2) (f-10-1 0) Dsp-16-u8 Src16An))
2463 (ifield-assertion (andif (eq f-8-2 2) (eq f-10-1 0)))
2464 (getter (mem16 xmode (add Dsp-16-u8 Src16An)))
2465 (setter (set (mem16 xmode (add Dsp-16-u8 Src16An)) newval))
2466 )
2467 (define-derived-operand
2468 (name (.sym src16-16-16-An-relative- xmode))
2469 (comment (.str "m16c dsp:16[An] relative destination " xmode))
2470 (attrs (machine 16))
2471 (mode xmode)
2472 (args (Src16An Dsp-16-u16))
2473 (syntax "${Dsp-16-u16}[$Src16An]")
2474 (base-ifield f-8-4)
2475 (encoding (+ (f-8-2 3) (f-10-1 0) Dsp-16-u16 Src16An))
2476 (ifield-assertion (andif (eq f-8-2 3) (eq f-10-1 0)))
2477 (getter (mem16 xmode (add Dsp-16-u16 Src16An)))
2478 (setter (set (mem16 xmode (add Dsp-16-u16 Src16An)) newval))
2479 )
2480 (define-derived-operand
2481 (name (.sym src16-16-20-An-relative- xmode))
2482 (comment (.str "m16c dsp:20[An] relative destination " xmode))
2483 (attrs (machine 16))
2484 (mode xmode)
2485 (args (Src16An Dsp-16-u20))
2486 (syntax "${Dsp-16-u20}[$Src16An]")
2487 (base-ifield f-8-4)
2488 (encoding (+ (f-8-2 3) (f-10-1 0) Dsp-16-u20 Src16An))
2489 (ifield-assertion (andif (eq f-8-2 3) (eq f-10-1 0)))
2490 (getter (mem20 xmode (add Dsp-16-u20 Src16An)))
2491 (setter (set (mem20 xmode (add Dsp-16-u20 Src16An)) newval))
2492 )
2493 )
2494 )
2496 (src16-relative-operand QI)
2497 (src16-relative-operand HI)
2499 (define-pmacro (src32-relative-operand offset group base1 base2 xmode)
2500 (begin
2501 (define-derived-operand
2502 (name (.sym src32- offset -8-SB-relative- group - xmode))
2503 (comment (.str "m32c dsp:8[sb] relative destination " xmode))
2504 (attrs (machine 32))
2505 (mode xmode)
2506 (args ((.sym Dsp- offset -u8)))
2507 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
2508 (base-ifield (.sym f- base1 -11))
2509 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8)))
2510 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
2511 (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u8)))
2512 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u8)))
2513 ; (getter (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb))))
2514 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
2515 )
2516 (define-derived-operand
2517 (name (.sym src32- offset -16-SB-relative- group - xmode))
2518 (comment (.str "m32c dsp:16[sb] relative destination " xmode))
2519 (attrs (machine 32))
2520 (mode xmode)
2521 (args ((.sym Dsp- offset -u16)))
2522 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
2523 (base-ifield (.sym f- base1 -11))
2524 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16)))
2525 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
2526 (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u16)))
2527 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u16)))
2528 ; (getter (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb))))
2529 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
2530 )
2531 (define-derived-operand
2532 (name (.sym src32- offset -8-FB-relative- group - xmode))
2533 (comment (.str "m32c dsp:8[fb] relative destination " xmode))
2534 (attrs (machine 32))
2535 (mode xmode)
2536 (args ((.sym Dsp- offset -s8)))
2537 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
2538 (base-ifield (.sym f- base1 -11))
2539 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8)))
2540 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
2541 (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s8)))
2542 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s8)))
2543 ; (getter (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb))))
2544 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
2545 )
2546 (define-derived-operand
2547 (name (.sym src32- offset -16-FB-relative- group - xmode))
2548 (comment (.str "m32c dsp:16[fb] relative destination " xmode))
2549 (attrs (machine 32))
2550 (mode xmode)
2551 (args ((.sym Dsp- offset -s16)))
2552 (syntax (.str "${Dsp-" offset "-s16}[fb]"))
2553 (base-ifield (.sym f- base1 -11))
2554 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16)))
2555 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
2556 (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s16)))
2557 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s16)))
2558 ; (getter (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb))))
2559 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval))
2560 )
2561 (define-derived-operand
2562 (name (.sym src32- offset -8-An-relative- group - xmode))
2563 (comment (.str "m32c dsp:8[An] relative destination " xmode))
2564 (attrs (machine 32))
2565 (mode xmode)
2566 (args ((.sym Src32An group) (.sym Dsp- offset -u8)))
2567 (syntax (.str "${Dsp-" offset "-u8}[$Src32An" group "]"))
2568 (base-ifield (.sym f- base1 -11))
2569 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Src32An group)))
2570 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
2571 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u8)))
2572 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u8)))
2573 ; (getter (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group))))
2574 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group))) newval))
2575 )
2576 (define-derived-operand
2577 (name (.sym src32- offset -16-An-relative- group - xmode))
2578 (comment (.str "m32c dsp:16[An] relative destination " xmode))
2579 (attrs (machine 32))
2580 (mode xmode)
2581 (args ((.sym Src32An group) (.sym Dsp- offset -u16)))
2582 (syntax (.str "${Dsp-" offset "-u16}[$Src32An" group "]"))
2583 (base-ifield (.sym f- base1 -11))
2584 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Src32An group)))
2585 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
2586 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u16)))
2587 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u16)))
2588 ; (getter (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group))))
2589 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group))) newval))
2590 )
2591 (define-derived-operand
2592 (name (.sym src32- offset -24-An-relative- group - xmode))
2593 (comment (.str "m32c dsp:16[An] relative destination " xmode))
2594 (attrs (machine 32))
2595 (mode xmode)
2596 (args ((.sym Src32An group) (.sym Dsp- offset -u24)))
2597 (syntax (.str "${Dsp-" offset "-u24}[$Src32An" group "]"))
2598 (base-ifield (.sym f- base1 -11))
2599 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Src32An group)))
2600 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
2601 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u24) ))
2602 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u24)))
2603 ; (getter (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group))))
2604 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group))) newval))
2605 )
2606 )
2607 )
2609 (src32-relative-operand 16 Unprefixed 1 10 QI)
2610 (src32-relative-operand 16 Unprefixed 1 10 HI)
2611 (src32-relative-operand 16 Unprefixed 1 10 SI)
2612 (src32-relative-operand 24 Prefixed 9 18 QI)
2613 (src32-relative-operand 24 Prefixed 9 18 HI)
2614 (src32-relative-operand 24 Prefixed 9 18 SI)
2616 ;-------------------------------------------------------------
2617 ; Absolute address
2618 ;-------------------------------------------------------------
2620 (define-pmacro (src16-absolute xmode)
2621 (begin
2622 (define-derived-operand
2623 (name (.sym src16-16-16-absolute- xmode))
2624 (comment (.str "m16c absolute address " xmode))
2625 (attrs (machine 16))
2626 (mode xmode)
2627 (args (Dsp-16-u16))
2628 (syntax (.str "${Dsp-16-u16}"))
2629 (base-ifield f-8-4)
2630 (encoding (+ (f-8-4 #xF) Dsp-16-u16))
2631 (ifield-assertion (eq f-8-4 #xF))
2632 (getter (mem16 xmode Dsp-16-u16))
2633 (setter (set (mem16 xmode Dsp-16-u16) newval))
2634 )
2635 )
2636 )
2638 (src16-absolute QI)
2639 (src16-absolute HI)
2641 (define-pmacro (src32-absolute offset group base1 base2 xmode)
2642 (begin
2643 (define-derived-operand
2644 (name (.sym src32- offset -16-absolute- group - xmode))
2645 (comment (.str "m32c absolute address " xmode))
2646 (attrs (machine 32))
2647 (mode xmode)
2648 (args ((.sym Dsp- offset -u16)))
2649 (syntax (.str "${Dsp-" offset "-u16}"))
2650 (base-ifield (.sym f- base1 -11))
2651 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
2652 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
2653 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u16)))
2654 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u16)))
2655 ; (getter (mem32 xmode (.sym Dsp- offset -u16)))
2656 ; (setter (set (mem32 xmode (.sym Dsp- offset -u16)) newval))
2657 )
2658 (define-derived-operand
2659 (name (.sym src32- offset -24-absolute- group - xmode))
2660 (comment (.str "m32c absolute address " xmode))
2661 (attrs (machine 32))
2662 (mode xmode)
2663 (args ((.sym Dsp- offset -u24)))
2664 (syntax (.str "${Dsp-" offset "-u24}"))
2665 (base-ifield (.sym f- base1 -11))
2666 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
2667 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
2668 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u24)))
2669 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u24)))
2670 ; (getter (mem32 xmode (.sym Dsp- offset -u24)))
2671 ; (setter (set (mem32 xmode (.sym Dsp- offset -u24)) newval))
2672 )
2673 )
2674 )
2676 (src32-absolute 16 Unprefixed 1 10 QI)
2677 (src32-absolute 16 Unprefixed 1 10 HI)
2678 (src32-absolute 16 Unprefixed 1 10 SI)
2679 (src32-absolute 24 Prefixed 9 18 QI)
2680 (src32-absolute 24 Prefixed 9 18 HI)
2681 (src32-absolute 24 Prefixed 9 18 SI)
2683 ;-------------------------------------------------------------
2684 ; An indirect indirect
2685 ;
2686 ; Double indirect addressing uses the lower 3 bytes of the value stored
2687 ; at the address referenced by 'op' as the effective address.
2688 ;-------------------------------------------------------------
2690 (define-pmacro (indirect-addr op) (and USI (mem32 USI op) #x00ffffff))
2692 ; (define-pmacro (src-An-indirect-indirect-operand xmode)
2693 ; (define-derived-operand
2694 ; (name (.sym src32-An-indirect-indirect- xmode))
2695 ; (comment (.str "m32c An indirect indirect destination " xmode))
2696 ; (attrs (machine 32))
2697 ; (mode xmode)
2698 ; (args (Src32AnPrefixed))
2699 ; (syntax (.str "[[$Src32AnPrefixed]]"))
2700 ; (base-ifield f-9-11)
2701 ; (encoding (+ (f-9-3 0) (f-18-1 0) Src32AnPrefixed))
2702 ; (ifield-assertion (andif (eq f-9-3 0) (eq f-18-1 0)))
2703 ; (getter (mem32 xmode (indirect-addr Src32AnPrefixed)))
2704 ; (setter (set (mem32 xmode (indirect-addr Src32AnPrefixed)) newval))
2705 ; )
2706 ; )
2708 ; (src-An-indirect-indirect-operand QI)
2709 ; (src-An-indirect-indirect-operand HI)
2710 ; (src-An-indirect-indirect-operand SI)
2712 ;-------------------------------------------------------------
2713 ; Relative indirect
2714 ;-------------------------------------------------------------
2716 (define-pmacro (src-relative-indirect-operand xmode)
2717 (begin
2718 ; (define-derived-operand
2719 ; (name (.sym src32-24-8-SB-relative-indirect- xmode))
2720 ; (comment (.str "m32c dsp:8[sb] relative source " xmode))
2721 ; (attrs (machine 32))
2722 ; (mode xmode)
2723 ; (args (Dsp-24-u8))
2724 ; (syntax "[${Dsp-24-u8}[sb]]")
2725 ; (base-ifield f-9-11)
2726 ; (encoding (+ (f-9-3 1) (f-18-2 2) Dsp-24-u8))
2727 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 2)))
2728 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb)))))
2729 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb)))) newval))
2730 ; )
2731 ; (define-derived-operand
2732 ; (name (.sym src32-24-16-SB-relative-indirect- xmode))
2733 ; (comment (.str "m32c dsp:16[sb] relative source " xmode))
2734 ; (attrs (machine 32))
2735 ; (mode xmode)
2736 ; (args (Dsp-24-u16))
2737 ; (syntax "[${Dsp-24-u16}[sb]]")
2738 ; (base-ifield f-9-11)
2739 ; (encoding (+ (f-9-3 2) (f-18-2 2) Dsp-24-u16))
2740 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 2)))
2741 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb)))))
2742 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb)))) newval))
2743 ; )
2744 ; (define-derived-operand
2745 ; (name (.sym src32-24-8-FB-relative-indirect- xmode))
2746 ; (comment (.str "m32c dsp:8[fb] relative source " xmode))
2747 ; (attrs (machine 32))
2748 ; (mode xmode)
2749 ; (args (Dsp-24-s8))
2750 ; (syntax "[${Dsp-24-s8}[fb]]")
2751 ; (base-ifield f-9-11)
2752 ; (encoding (+ (f-9-3 1) (f-18-2 3) Dsp-24-s8))
2753 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 3)))
2754 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb)))))
2755 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb)))) newval))
2756 ; )
2757 ; (define-derived-operand
2758 ; (name (.sym src32-24-16-FB-relative-indirect- xmode))
2759 ; (comment (.str "m32c dsp:16[fb] relative source " xmode))
2760 ; (attrs (machine 32))
2761 ; (mode xmode)
2762 ; (args (Dsp-24-s16))
2763 ; (syntax "[${Dsp-24-s16}[fb]]")
2764 ; (base-ifield f-9-11)
2765 ; (encoding (+ (f-9-3 2) (f-18-2 3) Dsp-24-s16))
2766 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 3)))
2767 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb)))))
2768 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb)))) newval))
2769 ; )
2770 ; (define-derived-operand
2771 ; (name (.sym src32-24-8-An-relative-indirect- xmode))
2772 ; (comment (.str "m32c dsp:8[An] relative indirect source " xmode))
2773 ; (attrs (machine 32))
2774 ; (mode xmode)
2775 ; (args (Src32AnPrefixed Dsp-24-u8))
2776 ; (syntax "[${Dsp-24-u8}[$Src32AnPrefixed]]")
2777 ; (base-ifield f-9-11)
2778 ; (encoding (+ (f-9-3 1) (f-18-1 0) Dsp-24-u8 Src32AnPrefixed))
2779 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-1 0)))
2780 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed))))
2781 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed))) newval))
2782 ; )
2783 ; (define-derived-operand
2784 ; (name (.sym src32-24-16-An-relative-indirect- xmode))
2785 ; (comment (.str "m32c dsp:16[An] relative source " xmode))
2786 ; (attrs (machine 32))
2787 ; (mode xmode)
2788 ; (args (Src32AnPrefixed Dsp-24-u16))
2789 ; (syntax "[${Dsp-24-u16}[$Src32AnPrefixed]]")
2790 ; (base-ifield f-9-11)
2791 ; (encoding (+ (f-9-3 2) (f-18-1 0) Dsp-24-u16 Src32AnPrefixed))
2792 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-1 0)))
2793 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed))))
2794 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed))) newval))
2795 ; )
2796 ; (define-derived-operand
2797 ; (name (.sym src32-24-24-An-relative-indirect- xmode))
2798 ; (comment (.str "m32c dsp:24[An] relative source " xmode))
2799 ; (attrs (machine 32))
2800 ; (mode xmode)
2801 ; (args (Src32AnPrefixed Dsp-24-u24))
2802 ; (syntax "[${Dsp-24-u24}[$Src32AnPrefixed]]")
2803 ; (base-ifield f-9-11)
2804 ; (encoding (+ (f-9-3 3) (f-18-1 0) Dsp-24-u24 Src32AnPrefixed))
2805 ; (ifield-assertion (andif (eq f-9-3 3) (eq f-18-1 0)))
2806 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed))))
2807 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed))) newval))
2808 ; )
2809 )
2810 )
2812 ; (src-relative-indirect-operand QI)
2813 ; (src-relative-indirect-operand HI)
2814 ; (src-relative-indirect-operand SI)
2816 ;-------------------------------------------------------------
2817 ; Absolute Indirect address
2818 ;-------------------------------------------------------------
2820 (define-pmacro (src32-absolute-indirect offset base1 base2 xmode)
2821 (begin
2822 ; (define-derived-operand
2823 ; (name (.sym src32- offset -16-absolute-indirect-derived- xmode))
2824 ; (comment (.str "m32c absolute indirect address " xmode))
2825 ; (attrs (machine 32))
2826 ; (mode xmode)
2827 ; (args ((.sym Dsp- offset -u16)))
2828 ; (syntax (.str "[${Dsp-" offset "-u16}]"))
2829 ; (base-ifield (.sym f- base1 -11))
2830 ; (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
2831 ; (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
2832 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))))
2833 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval))
2834 ; )
2835 ; (define-derived-operand
2836 ; (name (.sym src32- offset -24-absolute-indirect-derived- xmode))
2837 ; (comment (.str "m32c absolute indirect address " xmode))
2838 ; (attrs (machine 32))
2839 ; (mode xmode)
2840 ; (args ((.sym Dsp- offset -u24)))
2841 ; (syntax (.str "[${Dsp-" offset "-u24}]"))
2842 ; (base-ifield (.sym f- base1 -11))
2843 ; (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
2844 ; (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
2845 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))))
2846 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval))
2847 ; )
2848 )
2849 )
2851 (src32-absolute-indirect 24 9 18 QI)
2852 (src32-absolute-indirect 24 9 18 HI)
2853 (src32-absolute-indirect 24 9 18 SI)
2855 ;-------------------------------------------------------------
2856 ; Register relative source operands for short format insns
2857 ;-------------------------------------------------------------
2859 (define-pmacro (src-2-S-operands mach xmode base opc1 opc2 opc3)
2860 (begin
2861 (define-derived-operand
2862 (name (.sym src mach -2-S-8-SB-relative- xmode))
2863 (comment (.str "m" mach "c SB relative address"))
2864 (attrs (machine mach))
2865 (mode xmode)
2866 (args (Dsp-8-u8))
2867 (syntax "${Dsp-8-u8}[sb]")
2868 (base-ifield (.sym f- base -2))
2869 (encoding (+ ((.sym f- base -2) opc1) Dsp-8-u8))
2870 (ifield-assertion (eq (.sym f- base -2) opc1))
2871 (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8))
2872 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8))
2873 ; (getter (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8))))
2874 ; (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8))) newval))
2875 )
2876 (define-derived-operand
2877 (name (.sym src mach -2-S-8-FB-relative- xmode))
2878 (comment (.str "m" mach "c FB relative address"))
2879 (attrs (machine mach))
2880 (mode xmode)
2881 (args (Dsp-8-s8))
2882 (syntax "${Dsp-8-s8}[fb]")
2883 (base-ifield (.sym f- base -2))
2884 (encoding (+ ((.sym f- base -2) opc2) Dsp-8-s8))
2885 (ifield-assertion (eq (.sym f- base -2) opc2))
2886 (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8))
2887 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8))
2888 ; (getter (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8))))
2889 ; (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8))) newval))
2890 )
2891 (define-derived-operand
2892 (name (.sym src mach -2-S-16-absolute- xmode))
2893 (comment (.str "m" mach "c absolute address"))
2894 (attrs (machine mach))
2895 (mode xmode)
2896 (args (Dsp-8-u16))
2897 (syntax "${Dsp-8-u16}")
2898 (base-ifield (.sym f- base -2))
2899 (encoding (+ ((.sym f- base -2) opc3) Dsp-8-u16))
2900 (ifield-assertion (eq (.sym f- base -2) opc3))
2901 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16))
2902 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16))
2903 ; (getter (mem-mach mach xmode Dsp-8-u16))
2904 ; (setter (set (mem-mach mach xmode Dsp-8-u16) newval))
2905 )
2906 )
2907 )
2909 (src-2-S-operands 16 QI 6 1 2 3)
2910 (src-2-S-operands 32 QI 2 2 3 1)
2911 (src-2-S-operands 32 HI 2 2 3 1)
2913 ;=============================================================
2914 ; Derived Operands
2915 ;-------------------------------------------------------------
2916 ; Destination
2917 ;-------------------------------------------------------------
2918 ; Rn direct
2919 ;-------------------------------------------------------------
2921 (define-pmacro (dst16-Rn-direct-operand xmode)
2922 (begin
2923 (define-derived-operand
2924 (name (.sym dst16-Rn-direct- xmode))
2925 (comment (.str "m16c Rn direct destination " xmode))
2926 (attrs (machine 16))
2927 (mode xmode)
2928 (args ((.sym Dst16Rn xmode)))
2929 (syntax (.str "$Dst16Rn" xmode))
2930 (base-ifield f-12-4)
2931 (encoding (+ (f-12-2 0) (.sym Dst16Rn xmode)))
2932 (ifield-assertion (eq f-12-2 0))
2933 (getter (trunc xmode (.sym Dst16Rn xmode)))
2934 (setter (set (.sym Dst16Rn xmode) newval))
2935 )
2936 )
2937 )
2939 (dst16-Rn-direct-operand QI)
2940 (dst16-Rn-direct-operand HI)
2941 (dst16-Rn-direct-operand SI)
2943 (define-derived-operand
2944 (name dst16-Rn-direct-Ext-QI)
2945 (comment "m16c Rn direct destination QI")
2946 (attrs (machine 16))
2947 (mode HI)
2948 (args (Dst16RnExtQI))
2949 (syntax "$Dst16RnExtQI")
2950 (base-ifield f-12-4)
2951 (encoding (+ (f-12-2 0) Dst16RnExtQI (f-15-1 0)))
2952 (ifield-assertion (andif (eq f-12-2 0) (eq f-15-1 0)))
2953 (getter (trunc QI (.sym Dst16RnExtQI)))
2954 (setter (set Dst16RnExtQI newval))
2955 )
2957 (define-pmacro (dst32-Rn-direct-operand group base xmode)
2958 (begin
2959 (define-derived-operand
2960 (name (.sym dst32-Rn-direct- group - xmode))
2961 (comment (.str "m32c Rn direct destination " xmode))
2962 (attrs (machine 32))
2963 (mode xmode)
2964 (args ((.sym Dst32Rn group xmode)))
2965 (syntax (.str "$Dst32Rn" group xmode))
2966 (base-ifield (.sym f- base -6))
2967 (encoding (+ ((.sym f- base -3) 4) (.sym Dst32Rn group xmode)))
2968 (ifield-assertion (eq (.sym f- base -3) 4))
2969 (getter (trunc xmode (.sym Dst32Rn group xmode)))
2970 (setter (set (.sym Dst32Rn group xmode) newval))
2971 )
2972 )
2973 )
2975 (dst32-Rn-direct-operand Unprefixed 4 QI)
2976 (dst32-Rn-direct-operand Prefixed 12 QI)
2977 (dst32-Rn-direct-operand Unprefixed 4 HI)
2978 (dst32-Rn-direct-operand Prefixed 12 HI)
2979 (dst32-Rn-direct-operand Unprefixed 4 SI)
2980 (dst32-Rn-direct-operand Prefixed 12 SI)
2982 (define-pmacro (dst32-Rn-direct-Ext-operand group base1 base2 smode dmode)
2983 (begin
2984 (define-derived-operand
2985 (name (.sym dst32-Rn-direct- group - smode))
2986 (comment (.str "m32c Rn direct destination " smode))
2987 (attrs (machine 32))
2988 (mode dmode)
2989 (args ((.sym Dst32Rn group smode)))
2990 (syntax (.str "$Dst32Rn" group smode))
2991 (base-ifield (.sym f- base1 -6))
2992 (encoding (+ ((.sym f- base1 -3) 4) ((.sym f- base2 -1) 1) (.sym Dst32Rn group smode)))
2993 (ifield-assertion (andif (eq (.sym f- base1 -3) 4) (eq (.sym f- base2 -1) 1)))
2994 (getter (trunc smode (.sym Dst32Rn group smode)))
2995 (setter (set (.sym Dst32Rn group smode) newval))
2996 )
2997 )
2998 )
3000 (dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 QI HI)
3001 (dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 HI SI)
3003 (define-derived-operand
3004 (name dst32-R3-direct-Unprefixed-HI)
3005 (comment "m32c R3 direct HI")
3006 (attrs (machine 32))
3007 (mode HI)
3008 (args (R3))
3009 (syntax "$R3")
3010 (base-ifield f-4-6)
3011 (encoding (+ (f-4-3 4) (f-8-2 #x1)))
3012 (ifield-assertion (andif (eq f-4-3 4) (eq f-8-2 #x1)))
3013 (getter (trunc HI R3))
3014 (setter (set R3 newval))
3015 )
3016 ;-------------------------------------------------------------
3017 ; An direct
3018 ;-------------------------------------------------------------
3020 (define-pmacro (dst16-An-direct-operand xmode)
3021 (begin
3022 (define-derived-operand
3023 (name (.sym dst16-An-direct- xmode))
3024 (comment (.str "m16c An direct destination " xmode))
3025 (attrs (machine 16))
3026 (mode xmode)
3027 (args ((.sym Dst16An xmode)))
3028 (syntax (.str "$Dst16An" xmode))
3029 (base-ifield f-12-4)
3030 (encoding (+ (f-12-2 1) (f-14-1 0) (.sym Dst16An xmode)))
3031 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0)))
3032 (getter (trunc xmode (.sym Dst16An xmode)))
3033 (setter (set (.sym Dst16An xmode) newval))
3034 )
3035 )
3036 )
3038 (dst16-An-direct-operand QI)
3039 (dst16-An-direct-operand HI)
3040 (dst16-An-direct-operand SI)
3042 (define-pmacro (dst32-An-direct-operand group base1 base2 xmode)
3043 (begin
3044 (define-derived-operand
3045 (name (.sym dst32-An-direct- group - xmode))
3046 (comment (.str "m32c An direct destination " xmode))
3047 (attrs (machine 32))
3048 (mode xmode)
3049 (args ((.sym Dst32An group xmode)))
3050 (syntax (.str "$Dst32An" group xmode))
3051 (base-ifield (.sym f- base1 -6))
3052 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Dst32An group xmode)))
3053 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
3054 (getter (trunc xmode (.sym Dst32An group xmode)))
3055 (setter (set (.sym Dst32An group xmode) newval))
3056 )
3057 )
3058 )
3060 (dst32-An-direct-operand Unprefixed 4 8 QI)
3061 (dst32-An-direct-operand Prefixed 12 16 QI)
3062 (dst32-An-direct-operand Unprefixed 4 8 HI)
3063 (dst32-An-direct-operand Prefixed 12 16 HI)
3064 (dst32-An-direct-operand Unprefixed 4 8 SI)
3065 (dst32-An-direct-operand Prefixed 12 16 SI)
3067 ;-------------------------------------------------------------
3068 ; An indirect
3069 ;-------------------------------------------------------------
3071 (define-pmacro (dst16-An-indirect-operand xmode)
3072 (begin
3073 (define-derived-operand
3074 (name (.sym dst16-An-indirect- xmode))
3075 (comment (.str "m16c An indirect destination " xmode))
3076 (attrs (machine 16))
3077 (mode xmode)
3078 (args (Dst16An))
3079 (syntax "[$Dst16An]")
3080 (base-ifield f-12-4)
3081 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
3082 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
3083 (getter (mem16 xmode Dst16An))
3084 (setter (set (mem16 xmode Dst16An) newval))
3085 )
3086 )
3087 )
3089 (dst16-An-indirect-operand QI)
3090 (dst16-An-indirect-operand HI)
3091 (dst16-An-indirect-operand SI)
3093 (define-derived-operand
3094 (name dst16-An-indirect-Ext-QI)
3095 (comment "m16c An indirect destination QI")
3096 (attrs (machine 16))
3097 (mode HI)
3098 (args (Dst16An))
3099 (syntax "[$Dst16An]")
3100 (base-ifield f-12-4)
3101 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
3102 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
3103 (getter (mem16 QI Dst16An))
3104 (setter (set (mem16 HI Dst16An) newval))
3105 )
3107 (define-pmacro (dst32-An-indirect-operand group base1 base2 smode dmode)
3108 (begin
3109 (define-derived-operand
3110 (name (.sym dst32-An-indirect- group - smode))
3111 (comment (.str "m32c An indirect destination " smode))
3112 (attrs (machine 32))
3113 (mode dmode)
3114 (args ((.sym Dst32An group)))
3115 (syntax (.str "[$Dst32An" group "]"))
3116 (base-ifield (.sym f- base1 -6))
3117 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Dst32An group)))
3118 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
3119 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group)
3120 (const 0)))
3121 (setter (c-call DFLT (.str "operand_setter_" dmode) newval
3122 (.sym Dst32An group) (const 0)))
3123 ; (getter (mem32 smode (.sym Dst32An group)))
3124 ; (setter (set (mem32 dmode (.sym Dst32An group)) newval))
3125 )
3126 )
3127 )
3129 (dst32-An-indirect-operand Unprefixed 4 8 QI QI)
3130 (dst32-An-indirect-operand Prefixed 12 16 QI QI)
3131 (dst32-An-indirect-operand Unprefixed 4 8 HI HI)
3132 (dst32-An-indirect-operand Prefixed 12 16 HI HI)
3133 (dst32-An-indirect-operand Unprefixed 4 8 SI SI)
3134 (dst32-An-indirect-operand Prefixed 12 16 SI SI)
3135 (dst32-An-indirect-operand ExtUnprefixed 4 8 QI HI)
3136 (dst32-An-indirect-operand ExtUnprefixed 4 8 HI SI)
3138 ;-------------------------------------------------------------
3139 ; dsp:d[r] relative
3140 ;-------------------------------------------------------------
3142 (define-pmacro (dst16-relative-operand offset xmode)
3143 (begin
3144 (define-derived-operand
3145 (name (.sym dst16- offset -8-SB-relative- xmode))
3146 (comment (.str "m16c dsp:8[sb] relative destination " xmode))
3147 (attrs (machine 16))
3148 (mode xmode)
3149 (args ((.sym Dsp- offset -u8)))
3150 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3151 (base-ifield f-12-4)
3152 (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8)))
3153 (ifield-assertion (eq f-12-4 #xA))
3154 (getter (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb))))
3155 (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3156 )
3157 (define-derived-operand
3158 (name (.sym dst16- offset -16-SB-relative- xmode))
3159 (comment (.str "m16c dsp:16[sb] relative destination " xmode))
3160 (attrs (machine 16))
3161 (mode xmode)
3162 (args ((.sym Dsp- offset -u16)))
3163 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3164 (base-ifield f-12-4)
3165 (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16)))
3166 (ifield-assertion (eq f-12-4 #xE))
3167 (getter (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb))))
3168 (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3169 )
3170 (define-derived-operand
3171 (name (.sym dst16- offset -8-FB-relative- xmode))
3172 (comment (.str "m16c dsp:8[fb] relative destination " xmode))
3173 (attrs (machine 16))
3174 (mode xmode)
3175 (args ((.sym Dsp- offset -s8)))
3176 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3177 (base-ifield f-12-4)
3178 (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8)))
3179 (ifield-assertion (eq f-12-4 #xB))
3180 (getter (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb))))
3181 (setter (set (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3182 )
3183 (define-derived-operand
3184 (name (.sym dst16- offset -8-An-relative- xmode))
3185 (comment (.str "m16c dsp:8[An] relative destination " xmode))
3186 (attrs (machine 16))
3187 (mode xmode)
3188 (args (Dst16An (.sym Dsp- offset -u8)))
3189 (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]"))
3190 (base-ifield f-12-4)
3191 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An))
3192 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3193 (getter (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An)))
3194 (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An)) newval))
3195 )
3196 (define-derived-operand
3197 (name (.sym dst16- offset -16-An-relative- xmode))
3198 (comment (.str "m16c dsp:16[An] relative destination " xmode))
3199 (attrs (machine 16))
3200 (mode xmode)
3201 (args (Dst16An (.sym Dsp- offset -u16)))
3202 (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]"))
3203 (base-ifield f-12-4)
3204 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An))
3205 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3206 (getter (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An)))
3207 (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An)) newval))
3208 )
3209 (define-derived-operand
3210 (name (.sym dst16- offset -20-An-relative- xmode))
3211 (comment (.str "m16c dsp:20[An] relative destination " xmode))
3212 (attrs (machine 16))
3213 (mode xmode)
3214 (args (Dst16An (.sym Dsp- offset -u20)))
3215 (syntax (.str "${Dsp-" offset "-u20}[$Dst16An]"))
3216 (base-ifield f-12-4)
3217 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u20) Dst16An))
3218 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3219 (getter (mem16 xmode (add (.sym Dsp- offset -u20) Dst16An)))
3220 (setter (set (mem16 xmode (add (.sym Dsp- offset -u20) Dst16An)) newval))
3221 )
3222 )
3223 )
3225 (dst16-relative-operand 16 QI)
3226 (dst16-relative-operand 24 QI)
3227 (dst16-relative-operand 32 QI)
3228 (dst16-relative-operand 40 QI)
3229 (dst16-relative-operand 48 QI)
3230 (dst16-relative-operand 16 HI)
3231 (dst16-relative-operand 24 HI)
3232 (dst16-relative-operand 32 HI)
3233 (dst16-relative-operand 40 HI)
3234 (dst16-relative-operand 48 HI)
3235 (dst16-relative-operand 16 SI)
3236 (dst16-relative-operand 24 SI)
3237 (dst16-relative-operand 32 SI)
3238 (dst16-relative-operand 40 SI)
3239 (dst16-relative-operand 48 SI)
3241 (define-pmacro (dst16-relative-Ext-operand offset smode dmode)
3242 (begin
3243 (define-derived-operand
3244 (name (.sym dst16- offset -8-SB-relative-Ext- smode))
3245 (comment (.str "m16c dsp:8[sb] relative destination " smode))
3246 (attrs (machine 16))
3247 (mode dmode)
3248 (args ((.sym Dsp- offset -u8)))
3249 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3250 (base-ifield f-12-4)
3251 (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8)))
3252 (ifield-assertion (eq f-12-4 #xA))
3253 (getter (mem16 smode (add (.sym Dsp- offset -u8) (reg h-sb))))
3254 (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3255 )
3256 (define-derived-operand
3257 (name (.sym dst16- offset -16-SB-relative-Ext- smode))
3258 (comment (.str "m16c dsp:16[sb] relative destination " smode))
3259 (attrs (machine 16))
3260 (mode dmode)
3261 (args ((.sym Dsp- offset -u16)))
3262 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3263 (base-ifield f-12-4)
3264 (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16)))
3265 (ifield-assertion (eq f-12-4 #xE))
3266 (getter (mem16 smode (add (.sym Dsp- offset -u16) (reg h-sb))))
3267 (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3268 )
3269 (define-derived-operand
3270 (name (.sym dst16- offset -8-FB-relative-Ext- smode))
3271 (comment (.str "m16c dsp:8[fb] relative destination " smode))
3272 (attrs (machine 16))
3273 (mode dmode)
3274 (args ((.sym Dsp- offset -s8)))
3275 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3276 (base-ifield f-12-4)
3277 (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8)))
3278 (ifield-assertion (eq f-12-4 #xB))
3279 (getter (mem16 smode (add (.sym Dsp- offset -s8) (reg h-fb))))
3280 (setter (set (mem16 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3281 )
3282 (define-derived-operand
3283 (name (.sym dst16- offset -8-An-relative-Ext- smode))
3284 (comment (.str "m16c dsp:8[An] relative destination " smode))
3285 (attrs (machine 16))
3286 (mode dmode)
3287 (args (Dst16An (.sym Dsp- offset -u8)))
3288 (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]"))
3289 (base-ifield f-12-4)
3290 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An))
3291 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3292 (getter (mem16 smode (add (.sym Dsp- offset -u8) Dst16An)))
3293 (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) Dst16An)) newval))
3294 )
3295 (define-derived-operand
3296 (name (.sym dst16- offset -16-An-relative-Ext- smode))
3297 (comment (.str "m16c dsp:16[An] relative destination " smode))
3298 (attrs (machine 16))
3299 (mode dmode)
3300 (args (Dst16An (.sym Dsp- offset -u16)))
3301 (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]"))
3302 (base-ifield f-12-4)
3303 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An))
3304 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3305 (getter (mem16 smode (add (.sym Dsp- offset -u16) Dst16An)))
3306 (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) Dst16An)) newval))
3307 )
3308 )
3309 )
3311 (dst16-relative-Ext-operand 16 QI HI)
3313 (define-pmacro (dst32-relative-operand offset group base1 base2 smode dmode)
3314 (begin
3315 (define-derived-operand
3316 (name (.sym dst32- offset -8-SB-relative- group - smode))
3317 (comment (.str "m32c dsp:8[sb] relative destination " smode))
3318 (attrs (machine 32))
3319 (mode dmode)
3320 (args ((.sym Dsp- offset -u8)))
3321 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3322 (base-ifield (.sym f- base1 -6))
3323 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8)))
3324 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
3325 (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u8)))
3326 (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u8)))
3327 ; (getter (mem32 smode (add (.sym Dsp- offset -u8) (reg h-sb))))
3328 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3329 )
3330 (define-derived-operand
3331 (name (.sym dst32- offset -16-SB-relative- group - smode))
3332 (comment (.str "m32c dsp:16[sb] relative destination " smode))
3333 (attrs (machine 32))
3334 (mode dmode)
3335 (args ((.sym Dsp- offset -u16)))
3336 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3337 (base-ifield (.sym f- base1 -6))
3338 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16)))
3339 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
3340 (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u16)))
3341 (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u16)))
3342 ; (getter (mem32 smode (add (.sym Dsp- offset -u16) (reg h-sb))))
3343 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3344 )
3345 (define-derived-operand
3346 (name (.sym dst32- offset -8-FB-relative- group - smode))
3347 (comment (.str "m32c dsp:8[fb] relative destination " smode))
3348 (attrs (machine 32))
3349 (mode dmode)
3350 (args ((.sym Dsp- offset -s8)))
3351 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3352 (base-ifield (.sym f- base1 -6))
3353 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8)))
3354 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
3355 (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s8)))
3356 (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s8)))
3357 ; (getter (mem32 smode (add (.sym Dsp- offset -s8) (reg h-fb))))
3358 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3359 )
3360 (define-derived-operand
3361 (name (.sym dst32- offset -16-FB-relative- group - smode))
3362 (comment (.str "m32c dsp:16[fb] relative destination " smode))
3363 (attrs (machine 32))
3364 (mode dmode)
3365 (args ((.sym Dsp- offset -s16)))
3366 (syntax (.str "${Dsp-" offset "-s16}[fb]"))
3367 (base-ifield (.sym f- base1 -6))
3368 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16)))
3369 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
3370 (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s16)))
3371 (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s16)))
3372 ; (getter (mem32 smode (add (.sym Dsp- offset -s16) (reg h-fb))))
3373 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval))
3374 )
3375 (define-derived-operand
3376 (name (.sym dst32- offset -8-An-relative- group - smode))
3377 (comment (.str "m32c dsp:8[An] relative destination " smode))
3378 (attrs (machine 32))
3379 (mode dmode)
3380 (args ((.sym Dst32An group) (.sym Dsp- offset -u8)))
3381 (syntax (.str "${Dsp-" offset "-u8}[$Dst32An" group "]"))
3382 (base-ifield (.sym f- base1 -6))
3383 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Dst32An group)))
3384 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
3385 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u8)))
3386 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u8)))
3387 ; (getter (mem32 smode (add (.sym Dsp- offset -u8) (.sym Dst32An group))))
3388 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (.sym Dst32An group))) newval))
3389 )
3390 (define-derived-operand
3391 (name (.sym dst32- offset -16-An-relative- group - smode))
3392 (comment (.str "m32c dsp:16[An] relative destination " smode))
3393 (attrs (machine 32))
3394 (mode dmode)
3395 (args ((.sym Dst32An group) (.sym Dsp- offset -u16)))
3396 (syntax (.str "${Dsp-" offset "-u16}[$Dst32An" group "]"))
3397 (base-ifield (.sym f- base1 -6))
3398 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Dst32An group)))
3399 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
3400 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u16)))
3401 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u16)))
3402 ; (getter (mem32 smode (add (.sym Dsp- offset -u16) (.sym Dst32An group))))
3403 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (.sym Dst32An group))) newval))
3404 )
3405 (define-derived-operand
3406 (name (.sym dst32- offset -24-An-relative- group - smode))
3407 (comment (.str "m32c dsp:16[An] relative destination " smode))
3408 (attrs (machine 32))
3409 (mode dmode)
3410 (args ((.sym Dst32An group) (.sym Dsp- offset -u24)))
3411 (syntax (.str "${Dsp-" offset "-u24}[$Dst32An" group "]"))
3412 (base-ifield (.sym f- base1 -6))
3413 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Dst32An group)))
3414 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
3415 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u24)))
3416 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u24)))
3417 ; (getter (mem32 smode (add (.sym Dsp- offset -u24) (.sym Dst32An group))))
3418 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u24) (.sym Dst32An group))) newval))
3419 )
3420 )
3421 )
3423 (dst32-relative-operand 16 Unprefixed 4 8 QI QI)
3424 (dst32-relative-operand 24 Unprefixed 4 8 QI QI)
3425 (dst32-relative-operand 32 Unprefixed 4 8 QI QI)
3426 (dst32-relative-operand 40 Unprefixed 4 8 QI QI)
3427 (dst32-relative-operand 16 Unprefixed 4 8 HI HI)
3428 (dst32-relative-operand 24 Unprefixed 4 8 HI HI)
3429 (dst32-relative-operand 32 Unprefixed 4 8 HI HI)
3430 (dst32-relative-operand 40 Unprefixed 4 8 HI HI)
3431 (dst32-relative-operand 16 Unprefixed 4 8 SI SI)
3432 (dst32-relative-operand 24 Unprefixed 4 8 SI SI)
3433 (dst32-relative-operand 32 Unprefixed 4 8 SI SI)
3434 (dst32-relative-operand 40 Unprefixed 4 8 SI SI)
3436 (dst32-relative-operand 24 Prefixed 12 16 QI QI)
3437 (dst32-relative-operand 32 Prefixed 12 16 QI QI)
3438 (dst32-relative-operand 40 Prefixed 12 16 QI QI)
3439 (dst32-relative-operand 48 Prefixed 12 16 QI QI)
3440 (dst32-relative-operand 24 Prefixed 12 16 HI HI)
3441 (dst32-relative-operand 32 Prefixed 12 16 HI HI)
3442 (dst32-relative-operand 40 Prefixed 12 16 HI HI)
3443 (dst32-relative-operand 48 Prefixed 12 16 HI HI)
3444 (dst32-relative-operand 24 Prefixed 12 16 SI SI)
3445 (dst32-relative-operand 32 Prefixed 12 16 SI SI)
3446 (dst32-relative-operand 40 Prefixed 12 16 SI SI)
3447 (dst32-relative-operand 48 Prefixed 12 16 SI SI)
3449 (dst32-relative-operand 16 ExtUnprefixed 4 8 QI HI)
3450 (dst32-relative-operand 16 ExtUnprefixed 4 8 HI SI)
3452 ;-------------------------------------------------------------
3453 ; Absolute address
3454 ;-------------------------------------------------------------
3456 (define-pmacro (dst16-absolute offset xmode)
3457 (begin
3458 (define-derived-operand
3459 (name (.sym dst16- offset -16-absolute- xmode))
3460 (comment (.str "m16c absolute address " xmode))
3461 (attrs (machine 16))
3462 (mode xmode)
3463 (args ((.sym Dsp- offset -u16)))
3464 (syntax (.str "${Dsp-" offset "-u16}"))
3465 (base-ifield f-12-4)
3466 (encoding (+ (f-12-4 #xF) (.sym Dsp- offset -u16)))
3467 (ifield-assertion (eq f-12-4 #xF))
3468 (getter (mem16 xmode (.sym Dsp- offset -u16)))
3469 (setter (set (mem16 xmode (.sym Dsp- offset -u16)) newval))
3470 )
3471 )
3472 )
3474 (dst16-absolute 16 QI)
3475 (dst16-absolute 24 QI)
3476 (dst16-absolute 32 QI)
3477 (dst16-absolute 40 QI)
3478 (dst16-absolute 48 QI)
3479 (dst16-absolute 16 HI)
3480 (dst16-absolute 24 HI)
3481 (dst16-absolute 32 HI)
3482 (dst16-absolute 40 HI)
3483 (dst16-absolute 48 HI)
3484 (dst16-absolute 16 SI)
3485 (dst16-absolute 24 SI)
3486 (dst16-absolute 32 SI)
3487 (dst16-absolute 40 SI)
3488 (dst16-absolute 48 SI)
3490 (define-derived-operand
3491 (name dst16-16-16-absolute-Ext-QI)
3492 (comment "m16c absolute address QI")
3493 (attrs (machine 16))
3494 (mode HI)
3495 (args (Dsp-16-u16))
3496 (syntax "${Dsp-16-u16}")
3497 (base-ifield f-12-4)
3498 (encoding (+ (f-12-4 #xF) Dsp-16-u16))
3499 (ifield-assertion (eq f-12-4 #xF))
3500 (getter (mem16 QI Dsp-16-u16))
3501 (setter (set (mem16 HI Dsp-16-u16) newval))
3502 )
3504 (define-pmacro (dst32-absolute offset group base1 base2 smode dmode)
3505 (begin
3506 (define-derived-operand
3507 (name (.sym dst32- offset -16-absolute- group - smode))
3508 (comment (.str "m32c absolute address " smode))
3509 (attrs (machine 32))
3510 (mode dmode)
3511 (args ((.sym Dsp- offset -u16)))
3512 (syntax (.str "${Dsp-" offset "-u16}"))
3513 (base-ifield (.sym f- base1 -6))
3514 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
3515 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
3516 (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u16)))
3517 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u16)))
3518 ; (getter (mem32 smode (.sym Dsp- offset -u16)))
3519 ; (setter (set (mem32 dmode (.sym Dsp- offset -u16)) newval))
3520 )
3521 (define-derived-operand
3522 (name (.sym dst32- offset -24-absolute- group - smode))
3523 (comment (.str "m32c absolute address " smode))
3524 (attrs (machine 32))
3525 (mode dmode)
3526 (args ((.sym Dsp- offset -u24)))
3527 (syntax (.str "${Dsp-" offset "-u24}"))
3528 (base-ifield (.sym f- base1 -6))
3529 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
3530 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
3531 (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u24)))
3532 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u24)))
3533 ; (getter (mem32 smode (.sym Dsp- offset -u24)))
3534 ; (setter (set (mem32 dmode (.sym Dsp- offset -u24)) newval))
3535 )
3536 )
3537 )
3539 (dst32-absolute 16 Unprefixed 4 8 QI QI)
3540 (dst32-absolute 24 Unprefixed 4 8 QI QI)
3541 (dst32-absolute 32 Unprefixed 4 8 QI QI)
3542 (dst32-absolute 40 Unprefixed 4 8 QI QI)
3543 (dst32-absolute 16 Unprefixed 4 8 HI HI)
3544 (dst32-absolute 24 Unprefixed 4 8 HI HI)
3545 (dst32-absolute 32 Unprefixed 4 8 HI HI)
3546 (dst32-absolute 40 Unprefixed 4 8 HI HI)
3547 (dst32-absolute 16 Unprefixed 4 8 SI SI)
3548 (dst32-absolute 24 Unprefixed 4 8 SI SI)
3549 (dst32-absolute 32 Unprefixed 4 8 SI SI)
3550 (dst32-absolute 40 Unprefixed 4 8 SI SI)
3552 (dst32-absolute 24 Prefixed 12 16 QI QI)
3553 (dst32-absolute 32 Prefixed 12 16 QI QI)
3554 (dst32-absolute 40 Prefixed 12 16 QI QI)
3555 (dst32-absolute 48 Prefixed 12 16 QI QI)
3556 (dst32-absolute 24 Prefixed 12 16 HI HI)
3557 (dst32-absolute 32 Prefixed 12 16 HI HI)
3558 (dst32-absolute 40 Prefixed 12 16 HI HI)
3559 (dst32-absolute 48 Prefixed 12 16 HI HI)
3560 (dst32-absolute 24 Prefixed 12 16 SI SI)
3561 (dst32-absolute 32 Prefixed 12 16 SI SI)
3562 (dst32-absolute 40 Prefixed 12 16 SI SI)
3563 (dst32-absolute 48 Prefixed 12 16 SI SI)
3565 (dst32-absolute 16 ExtUnprefixed 4 8 QI HI)
3566 (dst32-absolute 16 ExtUnprefixed 4 8 HI SI)
3568 ;-------------------------------------------------------------
3569 ; An indirect indirect
3570 ;-------------------------------------------------------------
3572 ;(define-pmacro (dst-An-indirect-indirect-operand xmode)
3573 ; (define-derived-operand
3574 ; (name (.sym dst32-An-indirect-indirect- xmode))
3575 ; (comment (.str "m32c An indirect indirect destination " xmode))
3576 ; (attrs (machine 32))
3577 ; (mode xmode)
3578 ; (args (Dst32AnPrefixed))
3579 ; (syntax (.str "[[$Dst32AnPrefixed]]"))
3580 ; (base-ifield f-12-6)
3581 ; (encoding (+ (f-12-3 0) (f-16-1 0) Dst32AnPrefixed))
3582 ; (ifield-assertion (andif (eq f-12-3 0) (eq f-16-1 0)))
3583 ; (getter (mem32 xmode (indirect-addr Dst32AnPrefixed)))
3584 ; (setter (set (mem32 xmode (indirect-addr Dst32AnPrefixed)) newval))
3585 ; )
3586 ;)
3588 ; (dst-An-indirect-indirect-operand QI)
3589 ; (dst-An-indirect-indirect-operand HI)
3590 ; (dst-An-indirect-indirect-operand SI)
3592 ;-------------------------------------------------------------
3593 ; Relative indirect
3594 ;-------------------------------------------------------------
3596 (define-pmacro (dst-relative-indirect-operand offset xmode)
3597 (begin
3598 ; (define-derived-operand
3599 ; (name (.sym dst32- offset -8-SB-relative-indirect- xmode))
3600 ; (comment (.str "m32c dsp:8[sb] relative destination " xmode))
3601 ; (attrs (machine 32))
3602 ; (mode xmode)
3603 ; (args ((.sym Dsp- offset -u8)))
3604 ; (syntax (.str "[${Dsp-" offset "-u8}[sb]]"))
3605 ; (base-ifield f-12-6)
3606 ; (encoding (+ (f-12-3 1) (f-16-2 2) (.sym Dsp- offset -u8)))
3607 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 2)))
3608 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb)))))
3609 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb)))) newval))
3610 ; )
3611 ; (define-derived-operand
3612 ; (name (.sym dst32- offset -16-SB-relative-indirect- xmode))
3613 ; (comment (.str "m32c dsp:16[sb] relative destination " xmode))
3614 ; (attrs (machine 32))
3615 ; (mode xmode)
3616 ; (args ((.sym Dsp- offset -u16)))
3617 ; (syntax (.str "[${Dsp-" offset "-u16}[sb]]"))
3618 ; (base-ifield f-12-6)
3619 ; (encoding (+ (f-12-3 2) (f-16-2 2) (.sym Dsp- offset -u16)))
3620 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 2)))
3621 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb)))))
3622 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb)))) newval))
3623 ; )
3624 ; (define-derived-operand
3625 ; (name (.sym dst32- offset -8-FB-relative-indirect- xmode))
3626 ; (comment (.str "m32c dsp:8[fb] relative destination " xmode))
3627 ; (attrs (machine 32))
3628 ; (mode xmode)
3629 ; (args ((.sym Dsp- offset -s8)))
3630 ; (syntax (.str "[${Dsp-" offset "-s8}[fb]]"))
3631 ; (base-ifield f-12-6)
3632 ; (encoding (+ (f-12-3 1) (f-16-2 3) (.sym Dsp- offset -s8)))
3633 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 3)))
3634 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb)))))
3635 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb)))) newval))
3636 ; )
3637 ; (define-derived-operand
3638 ; (name (.sym dst32- offset -16-FB-relative-indirect- xmode))
3639 ; (comment (.str "m32c dsp:16[fb] relative destination " xmode))
3640 ; (attrs (machine 32))
3641 ; (mode xmode)
3642 ; (args ((.sym Dsp- offset -s16)))
3643 ; (syntax (.str "[${Dsp-" offset "-s16}[fb]]"))
3644 ; (base-ifield f-12-6)
3645 ; (encoding (+ (f-12-3 2) (f-16-2 3) (.sym Dsp- offset -s16)))
3646 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 3)))
3647 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb)))))
3648 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb)))) newval))
3649 ; )
3650 ; (define-derived-operand
3651 ; (name (.sym dst32- offset -8-An-relative-indirect- xmode))
3652 ; (comment (.str "m32c dsp:8[An] relative indirect destination " xmode))
3653 ; (attrs (machine 32))
3654 ; (mode xmode)
3655 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u8)))
3656 ; (syntax (.str "[${Dsp-" offset "-u8}[$Dst32AnPrefixed]]"))
3657 ; (base-ifield f-12-6)
3658 ; (encoding (+ (f-12-3 1) (f-16-1 0) (.sym Dsp- offset -u8) Dst32AnPrefixed))
3659 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-1 0)))
3660 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed))))
3661 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed))) newval))
3662 ; )
3663 ; (define-derived-operand
3664 ; (name (.sym dst32- offset -16-An-relative-indirect- xmode))
3665 ; (comment (.str "m32c dsp:16[An] relative destination " xmode))
3666 ; (attrs (machine 32))
3667 ; (mode xmode)
3668 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u16)))
3669 ; (syntax (.str "[${Dsp-" offset "-u16}[$Dst32AnPrefixed]]"))
3670 ; (base-ifield f-12-6)
3671 ; (encoding (+ (f-12-3 2) (f-16-1 0) (.sym Dsp- offset -u16) Dst32AnPrefixed))
3672 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-1 0)))
3673 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed))))
3674 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed))) newval))
3675 ; )
3676 ; (define-derived-operand
3677 ; (name (.sym dst32- offset -24-An-relative-indirect- xmode))
3678 ; (comment (.str "m32c dsp:24[An] relative destination " xmode))
3679 ; (attrs (machine 32))
3680 ; (mode xmode)
3681 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u24)))
3682 ; (syntax (.str "[${Dsp-" offset "-u24}[$Dst32AnPrefixed]]"))
3683 ; (base-ifield f-12-6)
3684 ; (encoding (+ (f-12-3 3) (f-16-1 0) (.sym Dsp- offset -u24) Dst32AnPrefixed))
3685 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-1 0)))
3686 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed))))
3687 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed))) newval))
3688 ; )
3689 )
3690 )
3692 ; (dst-relative-indirect-operand 24 QI)
3693 ; (dst-relative-indirect-operand 32 QI)
3694 ; (dst-relative-indirect-operand 40 QI)
3695 ; (dst-relative-indirect-operand 48 QI)
3696 ; (dst-relative-indirect-operand 24 HI)
3697 ; (dst-relative-indirect-operand 32 HI)
3698 ; (dst-relative-indirect-operand 40 HI)
3699 ; (dst-relative-indirect-operand 48 HI)
3700 ; (dst-relative-indirect-operand 24 SI)
3701 ; (dst-relative-indirect-operand 32 SI)
3702 ; (dst-relative-indirect-operand 40 SI)
3703 ; (dst-relative-indirect-operand 48 SI)
3705 ;-------------------------------------------------------------
3706 ; Absolute indirect
3707 ;-------------------------------------------------------------
3709 (define-pmacro (dst-absolute-indirect offset xmode)
3710 (begin
3711 ; (define-derived-operand
3712 ; (name (.sym dst32- offset -16-absolute-indirect-derived- xmode))
3713 ; (comment (.str "m32c absolute indirect address " xmode))
3714 ; (attrs (machine 32))
3715 ; (mode xmode)
3716 ; (args ((.sym Dsp- offset -u16)))
3717 ; (syntax (.str "[${Dsp-" offset "-u16}]"))
3718 ; (base-ifield f-12-6)
3719 ; (encoding (+ (f-12-3 3) (f-16-2 3) (.sym Dsp- offset -u16)))
3720 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 3)))
3721 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))))
3722 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval))
3723 ; )
3724 ; (define-derived-operand
3725 ; (name (.sym dst32- offset -24-absolute-indirect-derived- xmode))
3726 ; (comment (.str "m32c absolute indirect address " xmode))
3727 ; (attrs (machine 32))
3728 ; (mode xmode)
3729 ; (args ((.sym Dsp- offset -u24)))
3730 ; (syntax (.str "[${Dsp-" offset "-u24}]"))
3731 ; (base-ifield f-12-6)
3732 ; (encoding (+ (f-12-3 3) (f-16-2 2) (.sym Dsp- offset -u24)))
3733 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 2)))
3734 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))))
3735 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval))
3736 ; )
3737 )
3738 )
3740 (dst-absolute-indirect 24 QI)
3741 (dst-absolute-indirect 32 QI)
3742 (dst-absolute-indirect 40 QI)
3743 (dst-absolute-indirect 48 QI)
3744 (dst-absolute-indirect 24 HI)
3745 (dst-absolute-indirect 32 HI)
3746 (dst-absolute-indirect 40 HI)
3747 (dst-absolute-indirect 48 HI)
3748 (dst-absolute-indirect 24 SI)
3749 (dst-absolute-indirect 32 SI)
3750 (dst-absolute-indirect 40 SI)
3751 (dst-absolute-indirect 48 SI)
3753 ;-------------------------------------------------------------
3754 ; Bit operands
3755 ;-------------------------------------------------------------
3756 (define-pmacro (get-register-bit reg bitno)
3757 (and (srl reg bitno) 1)
3758 )
3760 (define-pmacro (set-register-bit reg bitno value)
3761 (set reg (or (and reg (inv (sll 1 bitno)))
3762 (sll (and QI value 1) bitno)))
3763 )
3765 (define-pmacro (get-memory-bit mach base bitno)
3766 (and (srl (mem-mach mach QI (add base (div bitno 8)))
3767 (mod bitno 8))
3768 1)
3769 )
3771 (define-pmacro (set-memory-bit mach base bitno value)
3772 (sequence ((USI addr))
3773 (set addr (add base (div bitno 8)))
3774 (set (mem-mach mach QI addr)
3775 (or (and (mem-mach mach QI addr)
3776 (inv (sll 1 (mod bitno 8))))
3777 (sll (and QI value 1) (mod bitno 8)))))
3778 )
3780 ;-------------------------------------------------------------
3781 ; Rn direct
3782 ;-------------------------------------------------------------
3784 (define-derived-operand
3785 (name bit16-Rn-direct)
3786 (comment "m16c Rn direct bit")
3787 (attrs (machine 16))
3788 (mode BI)
3789 (args (Bitno16R Bit16Rn))
3790 (syntax "$Bitno16R,$Bit16Rn")
3791 (base-ifield f-12-4)
3792 (encoding (+ (f-12-2 0) Bit16Rn Bitno16R))
3793 (ifield-assertion (eq f-12-2 0))
3794 (getter (get-register-bit Bit16Rn Bitno16R))
3795 (setter (set-register-bit Bit16Rn Bitno16R newval))
3796 )
3798 (define-pmacro (bit32-Rn-direct-operand group base)
3799 (begin
3800 (define-derived-operand
3801 (name (.sym bit32-Rn-direct- group))
3802 (comment "m32c Rn direct bit")
3803 (attrs (machine 32))
3804 (mode BI)
3805 (args ((.sym Bitno32 group) (.sym Bit32Rn group)))
3806 (syntax (.str "$Bitno32" group ",$Bit32Rn" group))
3807 (base-ifield (.sym f- base -6))
3808 (encoding (+ ((.sym f- base -3) 4) (.sym Bit32Rn group) (.sym Bitno32 group)))
3809 (ifield-assertion (eq (.sym f- base -3) 4))
3810 (getter (get-register-bit (.sym Bit32Rn group) (.sym Bitno32 group)))
3811 (setter (set-register-bit (.sym Bit32Rn group) (.sym Bitno32 group) newval))
3812 )
3813 )
3814 )
3816 (bit32-Rn-direct-operand Unprefixed 4)
3817 (bit32-Rn-direct-operand Prefixed 12)
3819 ;-------------------------------------------------------------
3820 ; An direct
3821 ;-------------------------------------------------------------
3823 (define-derived-operand
3824 (name bit16-An-direct)
3825 (comment "m16c An direct bit")
3826 (attrs (machine 16))
3827 (mode BI)
3828 (args (Bitno16R Bit16An))
3829 (syntax "$Bitno16R,$Bit16An")
3830 (base-ifield f-12-4)
3831 (encoding (+ (f-12-2 1) (f-14-1 0) Bit16An Bitno16R))
3832 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0)))
3833 (getter (get-register-bit Bit16An Bitno16R))
3834 (setter (set-register-bit Bit16An Bitno16R newval))
3835 )
3837 (define-pmacro (bit32-An-direct-operand group base1 base2)
3838 (begin
3839 (define-derived-operand
3840 (name (.sym bit32-An-direct- group))
3841 (comment "m32c An direct bit")
3842 (attrs (machine 32))
3843 (mode BI)
3844 (args ((.sym Bitno32 group) (.sym Bit32An group)))
3845 (syntax (.str "$Bitno32" group ",$Bit32An" group))
3846 (base-ifield (.sym f- base1 -6))
3847 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Bit32An group) (.sym Bitno32 group)))
3848 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
3849 (getter (get-register-bit (.sym Bit32An group) (.sym Bitno32 group)))
3850 (setter (set-register-bit (.sym Bit32An group) (.sym Bitno32 group) newval))
3851 )
3852 )
3853 )
3855 (bit32-An-direct-operand Unprefixed 4 8)
3856 (bit32-An-direct-operand Prefixed 12 16)
3858 ;-------------------------------------------------------------
3859 ; An indirect
3860 ;-------------------------------------------------------------
3862 (define-derived-operand
3863 (name bit16-An-indirect)
3864 (comment "m16c An indirect bit")
3865 (attrs (machine 16))
3866 (mode BI)
3867 (args (Bit16An))
3868 (syntax "[$Bit16An]")
3869 (base-ifield f-12-4)
3870 (encoding (+ (f-12-2 1) (f-14-1 1) Bit16An))
3871 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
3872 (getter (get-memory-bit 16 0 Bit16An))
3873 (setter (set-memory-bit 16 0 Bit16An newval))
3874 )
3876 (define-pmacro (bit32-An-indirect-operand group base1 base2)
3877 (begin
3878 (define-derived-operand
3879 (name (.sym bit32-An-indirect- group))
3880 (comment "m32c An indirect destination ")
3881 (attrs (machine 32))
3882 (mode BI)
3883 (args ((.sym Bitno32 group) (.sym Bit32An group)))
3884 (syntax (.str "$Bitno32" group ",[$Bit32An" group "]"))
3885 (base-ifield (.sym f- base1 -6))
3886 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Bit32An group) (.sym Bitno32 group)))
3887 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
3888 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group)))
3889 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group) newval))
3890 )
3891 )
3892 )
3894 (bit32-An-indirect-operand Unprefixed 4 8)
3895 (bit32-An-indirect-operand Prefixed 12 16)
3897 ;-------------------------------------------------------------
3898 ; dsp:d[r] relative
3899 ;-------------------------------------------------------------
3901 (define-pmacro (bit16-relative-operand offset)
3902 (begin
3903 (define-derived-operand
3904 (name (.sym bit16- offset -8-SB-relative))
3905 (comment (.str "m16c dsp:8[sb] relative bit " xmode))
3906 (attrs (machine 16))
3907 (mode BI)
3908 (args ((.sym BitBase16- offset -u8)))
3909 (syntax (.str "${BitBase16-" offset "-u8}[sb]"))
3910 (base-ifield f-12-4)
3911 (encoding (+ (f-12-4 #xA) (.sym BitBase16- offset -u8)))
3912 (ifield-assertion (eq f-12-4 #xA))
3913 (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8)))
3914 (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8) newval))
3915 )
3916 (define-derived-operand
3917 (name (.sym bit16- offset -16-SB-relative))
3918 (comment (.str "m16c dsp:16[sb] relative bit " xmode))
3919 (attrs (machine 16))
3920 (mode BI)
3921 (args ((.sym BitBase16- offset -u16)))
3922 (syntax (.str "${BitBase16-" offset "-u16}[sb]"))
3923 (base-ifield f-12-4)
3924 (encoding (+ (f-12-4 #xE) (.sym BitBase16- offset -u16)))
3925 (ifield-assertion (eq f-12-4 #xE))
3926 (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16)))
3927 (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16) newval))
3928 )
3929 (define-derived-operand
3930 (name (.sym bit16- offset -8-FB-relative))
3931 (comment (.str "m16c dsp:8[fb] relative bit " xmode))
3932 (attrs (machine 16))
3933 (mode BI)
3934 (args ((.sym BitBase16- offset -s8)))
3935 (syntax (.str "${BitBase16-" offset "-s8}[fb]"))
3936 (base-ifield f-12-4)
3937 (encoding (+ (f-12-4 #xB) (.sym BitBase16- offset -s8)))
3938 (ifield-assertion (eq f-12-4 #xB))
3939 (getter (get-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8)))
3940 (setter (set-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8) newval))
3941 )
3942 (define-derived-operand
3943 (name (.sym bit16- offset -8-An-relative))
3944 (comment (.str "m16c dsp:8[An] relative bit " xmode))
3945 (attrs (machine 16))
3946 (mode BI)
3947 (args (Bit16An (.sym Dsp- offset -u8)))
3948 (syntax (.str "${Dsp-" offset "-u8}[$Bit16An]"))
3949 (base-ifield f-12-4)
3950 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Bit16An))
3951 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3952 (getter (get-memory-bit 16 (.sym Dsp- offset -u8) Bit16An))
3953 (setter (set-memory-bit 16 (.sym Dsp- offset -u8) Bit16An newval))
3954 )
3955 (define-derived-operand
3956 (name (.sym bit16- offset -16-An-relative))
3957 (comment (.str "m16c dsp:16[An] relative bit " xmode))
3958 (attrs (machine 16))
3959 (mode BI)
3960 (args (Bit16An (.sym Dsp- offset -u16)))
3961 (syntax (.str "${Dsp-" offset "-u16}[$Bit16An]"))
3962 (base-ifield f-12-4)
3963 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Bit16An))
3964 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3965 (getter (get-memory-bit 16 (.sym Dsp- offset -u16) Bit16An))
3966 (setter (set-memory-bit 16 (.sym Dsp- offset -u16) Bit16An newval))
3967 )
3968 )
3969 )
3971 (bit16-relative-operand 16)
3973 (define-pmacro (bit32-relative-operand offset group base1 base2)
3974 (begin
3975 (define-derived-operand
3976 (name (.sym bit32- offset -11-SB-relative- group))
3977 (comment "m32c bit,base:11[sb] relative bit")
3978 (attrs (machine 32))
3979 (mode BI)
3980 (args ((.sym BitBase32- offset -u11- group)))
3981 (syntax (.str "${BitBase32-" offset "-u11-" group "}[sb]"))
3982 (base-ifield (.sym f- base1 -12))
3983 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u11- group)))
3984 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
3985 (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group)))
3986 (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group) newval))
3987 )
3988 (define-derived-operand
3989 (name (.sym bit32- offset -19-SB-relative- group))
3990 (comment "m32c bit,base:19[sb] relative bit")
3991 (attrs (machine 32))
3992 (mode BI)
3993 (args ((.sym BitBase32- offset -u19- group)))
3994 (syntax (.str "${BitBase32-" offset "-u19-" group "}[sb]"))
3995 (base-ifield (.sym f- base1 -12))
3996 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u19- group)))
3997 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
3998 (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group)))
3999 (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group) newval))
4000 )
4001 (define-derived-operand
4002 (name (.sym bit32- offset -11-FB-relative- group))
4003 (comment "m32c bit,base:11[fb] relative bit")
4004 (attrs (machine 32))
4005 (mode BI)
4006 (args ((.sym BitBase32- offset -s11- group)))
4007 (syntax (.str "${BitBase32-" offset "-s11-" group "}[fb]"))
4008 (base-ifield (.sym f- base1 -12))
4009 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s11- group)))
4010 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
4011 (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group)))
4012 (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group) newval))
4013 )
4014 (define-derived-operand
4015 (name (.sym bit32- offset -19-FB-relative- group))
4016 (comment "m32c bit,base:19[fb] relative bit")
4017 (attrs (machine 32))
4018 (mode BI)
4019 (args ((.sym BitBase32- offset -s19- group)))
4020 (syntax (.str "${BitBase32-" offset "-s19-" group "}[fb]"))
4021 (base-ifield (.sym f- base1 -12))
4022 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s19- group)))
4023 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
4024 (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group)))
4025 (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group) newval))
4026 )
4027 (define-derived-operand
4028 (name (.sym bit32- offset -11-An-relative- group))
4029 (comment "m32c bit,base:11[An] relative bit")
4030 (attrs (machine 32))
4031 (mode BI)
4032 (args ((.sym BitBase32- offset -u11- group) (.sym Bit32An group)))
4033 (syntax (.str "${BitBase32-" offset "-u11-" group "}[$Bit32An" group "]"))
4034 (base-ifield (.sym f- base1 -12))
4035 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u11- group) (.sym Bit32An group)))
4036 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
4037 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group)))
4038 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group) newval))
4039 )
4040 (define-derived-operand
4041 (name (.sym bit32- offset -19-An-relative- group))
4042 (comment "m32c bit,base:19[An] relative bit")
4043 (attrs (machine 32))
4044 (mode BI)
4045 (args ((.sym BitBase32- offset -u19- group) (.sym Bit32An group)))
4046 (syntax (.str "${BitBase32-" offset "-u19-" group "}[$Bit32An" group "]"))
4047 (base-ifield (.sym f- base1 -12))
4048 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u19- group) (.sym Bit32An group)))
4049 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
4050 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group)))
4051 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group) newval))
4052 )
4053 (define-derived-operand
4054 (name (.sym bit32- offset -27-An-relative- group))
4055 (comment "m32c bit,base:27[An] relative bit")
4056 (attrs (machine 32))
4057 (mode BI)
4058 (args ((.sym BitBase32- offset -u27- group) (.sym Bit32An group)))
4059 (syntax (.str "${BitBase32-" offset "-u27-" group "}[$Bit32An" group "]"))
4060 (base-ifield (.sym f- base1 -12))
4061 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u27- group) (.sym Bit32An group)))
4062 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
4063 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group)))
4064 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group) newval))
4065 )
4066 )
4067 )
4069 (bit32-relative-operand 16 Unprefixed 4 8)
4070 (bit32-relative-operand 24 Prefixed 12 16)
4072 (define-derived-operand
4073 (name bit16-11-SB-relative-S)
4074 (comment "m16c bit,base:11[sb] relative bit")
4075 (attrs (machine 16))
4076 (mode BI)
4077 (args (BitBase16-8-u11-S))
4078 (syntax "${BitBase16-8-u11-S}[sb]")
4079 (base-ifield (.sym f-5-3))
4080 (encoding (+ BitBase16-8-u11-S))
4081 ; (ifield-assertion (#t))
4082 (getter (get-memory-bit 16 (reg h-sb) BitBase16-8-u11-S))
4083 (setter (set-memory-bit 16 (reg h-sb) BitBase16-8-u11-S newval))
4084 )
4086 (define-derived-operand
4087 (name Rn16-push-S-derived)
4088 (comment "m16c r0[lh] for push,pop short version")
4089 (attrs (machine 16))
4090 (mode QI)
4091 (args (Rn16-push-S))
4092 (syntax "${Rn16-push-S}")
4093 (base-ifield (.sym f-4-1))
4094 (encoding (+ Rn16-push-S))
4095 ; (ifield-assertion (#t))
4096 (getter (trunc QI Rn16-push-S))
4097 (setter (set Rn16-push-S newval))
4098 )
4100 (define-derived-operand
4101 (name An16-push-S-derived)
4102 (comment "m16c r0[lh] for push,pop short version")
4103 (attrs (machine 16))
4104 (mode HI)
4105 (args (An16-push-S))
4106 (syntax "${An16-push-S}")
4107 (base-ifield (.sym f-4-1))
4108 (encoding (+ An16-push-S))
4109 ; (ifield-assertion (#t))
4110 (getter (trunc QI An16-push-S))
4111 (setter (set An16-push-S newval))
4112 )
4114 ;-------------------------------------------------------------
4115 ; Absolute address
4116 ;-------------------------------------------------------------
4118 (define-pmacro (bit16-absolute offset)
4119 (begin
4120 (define-derived-operand
4121 (name (.sym bit16- offset -16-absolute))
4122 (comment "m16c absolute address")
4123 (attrs (machine 16))
4124 (mode BI)
4125 (args ((.sym BitBase16- offset -u16)))
4126 (syntax (.str "${BitBase16-" offset "-u16}"))
4127 (base-ifield f-12-4)
4128 (encoding (+ (f-12-4 #xF) (.sym BitBase16- offset -u16)))
4129 (ifield-assertion (eq f-12-4 #xF))
4130 (getter (get-memory-bit 16 0 (.sym BitBase16- offset -u16)))
4131 (setter (set-memory-bit 16 0 (.sym BitBase16- offset -u16) newval))
4132 )
4133 )
4134 )
4136 (bit16-absolute 16)
4138 (define-pmacro (bit32-absolute offset group base1 base2)
4139 (begin
4140 (define-derived-operand
4141 (name (.sym bit32- offset -19-absolute- group))
4142 (comment "m32c absolute address bit")
4143 (attrs (machine 32))
4144 (mode BI)
4145 (args ((.sym BitBase32- offset -u19- group)))
4146 (syntax (.str "${BitBase32-" offset "-u19-" group "}"))
4147 (base-ifield (.sym f- base1 -12))
4148 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -u19- group)))
4149 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
4150 (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u19- group)))
4151 (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u19- group) newval))
4152 )
4153 (define-derived-operand
4154 (name (.sym bit32- offset -27-absolute- group))
4155 (comment "m32c absolute address bit")
4156 (attrs (machine 32))
4157 (mode BI)
4158 (args ((.sym BitBase32- offset -u27- group)))
4159 (syntax (.str "${BitBase32-" offset "-u27-" group "}"))
4160 (base-ifield (.sym f- base1 -12))
4161 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u27- group)))
4162 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
4163 (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u27- group)))
4164 (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u27- group) newval))
4165 )
4166 )
4167 )
4169 (bit32-absolute 16 Unprefixed 4 8)
4170 (bit32-absolute 24 Prefixed 12 16)
4172 ;-------------------------------------------------------------
4173 ; Destination operands for short fomat insns
4174 ;-------------------------------------------------------------
4176 (define-derived-operand
4177 (name dst16-3-S-R0l-direct-QI)
4178 (comment "m16c R0l direct QI")
4179 (attrs (machine 16))
4180 (mode QI)
4181 (args (R0l))
4182 (syntax "r0l")
4183 (base-ifield f-5-3)
4184 (encoding (+ (f-5-3 4)))
4185 (ifield-assertion (eq f-5-3 4))
4186 (getter (trunc QI R0l))
4187 (setter (set R0l newval))
4188 )
4189 (define-derived-operand
4190 (name dst16-3-S-R0h-direct-QI)
4191 (comment "m16c R0h direct QI")
4192 (attrs (machine 16))
4193 (mode QI)
4194 (args (R0h))
4195 (syntax "r0h")
4196 (base-ifield f-5-3)
4197 (encoding (+ (f-5-3 3)))
4198 (ifield-assertion (eq f-5-3 3))
4199 (getter (trunc QI R0h))
4200 (setter (set R0h newval))
4201 )
4202 (define-derived-operand
4203 (name dst16-3-S-8-8-SB-relative-QI)
4204 (comment "m16c SB relative QI")
4205 (attrs (machine 16))
4206 (mode QI)
4207 (args (Dsp-8-u8))
4208 (syntax "${Dsp-8-u8}[sb]")
4209 (base-ifield f-5-3)
4210 (encoding (+ (f-5-3 5) Dsp-8-u8))
4211 (ifield-assertion (eq f-5-3 5))
4212 (getter (mem16 QI (add Dsp-8-u8 (reg h-sb))))
4213 (setter (set (mem16 QI (add Dsp-8-u8 (reg h-sb))) newval))
4214 )
4215 (define-derived-operand
4216 (name dst16-3-S-8-8-FB-relative-QI)
4217 (comment "m16c FB relative QI")
4218 (attrs (machine 16))
4219 (mode QI)
4220 (args (Dsp-8-s8))
4221 (syntax "${Dsp-8-s8}[fb]")
4222 (base-ifield f-5-3)
4223 (encoding (+ (f-5-3 6) Dsp-8-s8))
4224 (ifield-assertion (eq f-5-3 6))
4225 (getter (mem16 QI (add Dsp-8-s8 (reg h-fb))))
4226 (setter (set (mem16 QI (add Dsp-8-s8 (reg h-fb))) newval))
4227 )
4228 (define-derived-operand
4229 (name dst16-3-S-8-16-absolute-QI)
4230 (comment "m16c absolute address QI")
4231 (attrs (machine 16))
4232 (mode QI)
4233 (args (Dsp-8-u16))
4234 (syntax "${Dsp-8-u16}")
4235 (base-ifield f-5-3)
4236 (encoding (+ (f-5-3 7) Dsp-8-u16))
4237 (ifield-assertion (eq f-5-3 7))
4238 (getter (mem16 QI Dsp-8-u16))
4239 (setter (set (mem16 QI Dsp-8-u16) newval))
4240 )
4241 (define-derived-operand
4242 (name dst16-3-S-16-8-SB-relative-QI)
4243 (comment "m16c SB relative QI")
4244 (attrs (machine 16))
4245 (mode QI)
4246 (args (Dsp-16-u8))
4247 (syntax "${Dsp-16-u8}[sb]")
4248 (base-ifield f-5-3)
4249 (encoding (+ (f-5-3 5) Dsp-16-u8))
4250 (ifield-assertion (eq f-5-3 5))
4251 (getter (mem16 QI (add Dsp-16-u8 (reg h-sb))))
4252 (setter (set (mem16 QI (add Dsp-16-u8 (reg h-sb))) newval))
4253 )
4254 (define-derived-operand
4255 (name dst16-3-S-16-8-FB-relative-QI)
4256 (comment "m16c FB relative QI")
4257 (attrs (machine 16))
4258 (mode QI)
4259 (args (Dsp-16-s8))
4260 (syntax "${Dsp-16-s8}[fb]")
4261 (base-ifield f-5-3)
4262 (encoding (+ (f-5-3 6) Dsp-16-s8))
4263 (ifield-assertion (eq f-5-3 6))
4264 (getter (mem16 QI (add Dsp-16-s8 (reg h-fb))))
4265 (setter (set (mem16 QI (add Dsp-16-s8 (reg h-fb))) newval))
4266 )
4267 (define-derived-operand
4268 (name dst16-3-S-16-16-absolute-QI)
4269 (comment "m16c absolute address QI")
4270 (attrs (machine 16))
4271 (mode QI)
4272 (args (Dsp-16-u16))
4273 (syntax "${Dsp-16-u16}")
4274 (base-ifield f-5-3)
4275 (encoding (+ (f-5-3 7) Dsp-16-u16))
4276 (ifield-assertion (eq f-5-3 7))
4277 (getter (mem16 QI Dsp-16-u16))
4278 (setter (set (mem16 QI Dsp-16-u16) newval))
4279 )
4280 (define-derived-operand
4281 (name srcdst16-r0l-r0h-S-derived)
4282 (comment "m16c r0l/r0h operand for short format insns")
4283 (attrs (machine 16))
4284 (mode SI)
4285 (args (SrcDst16-r0l-r0h-S-normal))
4286 (syntax "${SrcDst16-r0l-r0h-S-normal}")
4287 (base-ifield f-6-3)
4288 (encoding (+ (f-6-2 0) SrcDst16-r0l-r0h-S-normal))
4289 (ifield-assertion (eq f-6-2 0))
4290 (getter (trunc SI SrcDst16-r0l-r0h-S-normal))
4291 (setter ()) ; no setter
4292 )
4293 (define-derived-operand
4294 (name dst32-2-S-R0l-direct-QI)
4295 (comment "m32c R0l direct QI")
4296 (attrs (machine 32))
4297 (mode QI)
4298 (args (R0l))
4299 (syntax "r0l")
4300 (base-ifield f-2-2)
4301 (encoding (+ (f-2-2 0)))
4302 (ifield-assertion (eq f-2-2 0))
4303 (getter (trunc QI R0l))
4304 (setter (set R0l newval))
4305 )
4306 (define-derived-operand
4307 (name dst32-2-S-R0-direct-HI)
4308 (comment "m32c R0 direct HI")
4309 (attrs (machine 32))
4310 (mode HI)
4311 (args (R0))
4312 (syntax "r0")
4313 (base-ifield f-2-2)
4314 (encoding (+ (f-2-2 0)))
4315 (ifield-assertion (eq f-2-2 0))
4316 (getter (trunc HI R0))
4317 (setter (set R0 newval))
4318 )
4319 (define-derived-operand
4320 (name dst32-1-S-A0-direct-HI)
4321 (comment "m32c A0 direct HI")
4322 (attrs (machine 32))
4323 (mode HI)
4324 (args (A0))
4325 (syntax "a0")
4326 (base-ifield f-7-1)
4327 (encoding (+ (f-7-1 0)))
4328 (ifield-assertion (eq f-7-1 0))
4329 (getter (trunc HI A0))
4330 (setter (set A0 newval))
4331 )
4332 (define-derived-operand
4333 (name dst32-1-S-A1-direct-HI)
4334 (comment "m32c A1 direct HI")
4335 (attrs (machine 32))
4336 (mode HI)
4337 (args (A1))
4338 (syntax "a1")
4339 (base-ifield f-7-1)
4340 (encoding (+ (f-7-1 1)))
4341 (ifield-assertion (eq f-7-1 1))
4342 (getter (trunc HI A1))
4343 (setter (set A1 newval))
4344 )
4345 (define-pmacro (dst32-2-S-operands xmode)
4346 (begin
4347 (define-derived-operand
4348 (name (.sym dst32-2-S-8-SB-relative- xmode))
4349 (comment "m32c SB relative for short binary insns")
4350 (attrs (machine 32))
4351 (mode xmode)
4352 (args (Dsp-8-u8))
4353 (syntax "${Dsp-8-u8}[sb]")
4354 (base-ifield f-2-2)
4355 (encoding (+ (f-2-2 2) Dsp-8-u8))
4356 (ifield-assertion (eq f-2-2 2))
4357 (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8))
4358 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8))
4359 ; (getter (mem32 xmode (add Dsp-8-u8 (reg h-sb))))
4360 ; (setter (set (mem32 xmode (add Dsp-8-u8 (reg h-sb))) newval))
4361 )
4362 (define-derived-operand
4363 (name (.sym dst32-2-S-8-FB-relative- xmode))
4364 (comment "m32c FB relative for short binary insns")
4365 (attrs (machine 32))
4366 (mode xmode)
4367 (args (Dsp-8-s8))
4368 (syntax "${Dsp-8-s8}[fb]")
4369 (base-ifield f-2-2)
4370 (encoding (+ (f-2-2 3) Dsp-8-s8))
4371 (ifield-assertion (eq f-2-2 3))
4372 (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8))
4373 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8))
4374 ; (getter (mem32 xmode (add Dsp-8-s8 (reg h-fb))))
4375 ; (setter (set (mem32 xmode (add Dsp-8-s8 (reg h-fb))) newval))
4376 )
4377 (define-derived-operand
4378 (name (.sym dst32-2-S-16-absolute- xmode))
4379 (comment "m32c absolute address for short binary insns")
4380 (attrs (machine 32))
4381 (mode xmode)
4382 (args (Dsp-8-u16))
4383 (syntax "${Dsp-8-u16}")
4384 (base-ifield f-2-2)
4385 (encoding (+ (f-2-2 1) Dsp-8-u16))
4386 (ifield-assertion (eq f-2-2 1))
4387 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16))
4388 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16))
4389 ; (getter (mem32 xmode Dsp-8-u16))
4390 ; (setter (set (mem32 xmode Dsp-8-u16) newval))
4391 )
4392 ; (define-derived-operand
4393 ; (name (.sym dst32-2-S-8-SB-relative-indirect- xmode))
4394 ; (comment "m32c SB relative for short binary insns")
4395 ; (attrs (machine 32))
4396 ; (mode xmode)
4397 ; (args (Dsp-16-u8))
4398 ; (syntax "[${Dsp-16-u8}[sb]]")
4399 ; (base-ifield f-10-2)
4400 ; (encoding (+ (f-10-2 2) Dsp-16-u8))
4401 ; (ifield-assertion (eq f-10-2 2))
4402 ; (getter (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb)))))
4403 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb)))) newval))
4404 ; )
4405 ; (define-derived-operand
4406 ; (name (.sym dst32-2-S-8-FB-relative-indirect- xmode))
4407 ; (comment "m32c FB relative for short binary insns")
4408 ; (attrs (machine 32))
4409 ; (mode xmode)
4410 ; (args (Dsp-16-s8))
4411 ; (syntax "[${Dsp-16-s8}[fb]]")
4412 ; (base-ifield f-10-2)
4413 ; (encoding (+ (f-10-2 3) Dsp-16-s8))
4414 ; (ifield-assertion (eq f-10-2 3))
4415 ; (getter (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb)))))
4416 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb)))) newval))
4417 ; )
4418 ; (define-derived-operand
4419 ; (name (.sym dst32-2-S-16-absolute-indirect- xmode))
4420 ; (comment "m32c absolute address for short binary insns")
4421 ; (attrs (machine 32))
4422 ; (mode xmode)
4423 ; (args (Dsp-16-u16))
4424 ; (syntax "[${Dsp-16-u16}]")
4425 ; (base-ifield f-10-2)
4426 ; (encoding (+ (f-10-2 1) Dsp-16-u16))
4427 ; (ifield-assertion (eq f-10-2 1))
4428 ; (getter (mem32 xmode (indirect-addr Dsp-16-u16)))
4429 ; (setter (set (mem32 xmode (indirect-addr Dsp-16-u16)) newval))
4430 ; )
4431 )
4432 )
4434 (dst32-2-S-operands QI)
4435 (dst32-2-S-operands HI)
4436 (dst32-2-S-operands SI)
4438 ;=============================================================
4439 ; Anyof operands
4440 ;-------------------------------------------------------------
4441 ; Source operands with no additional fields
4442 ;-------------------------------------------------------------
4444 (define-pmacro (src16-basic-operand xmode)
4445 (begin
4446 (define-anyof-operand
4447 (name (.sym src16-basic- xmode))
4448 (comment (.str "m16c source operand of size " xmode " with no additional fields"))
4449 (attrs (machine 16))
4450 (mode xmode)
4451 (choices
4452 (.sym src16-Rn-direct- xmode)
4453 (.sym src16-An-direct- xmode)
4454 (.sym src16-An-indirect- xmode)
4455 )
4456 )
4457 )
4458 )
4459 (src16-basic-operand QI)
4460 (src16-basic-operand HI)
4462 (define-pmacro (src32-basic-operand xmode)
4463 (begin
4464 (define-anyof-operand
4465 (name (.sym src32-basic-Unprefixed- xmode))
4466 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4467 (attrs (machine 32))
4468 (mode xmode)
4469 (choices
4470 (.sym src32-Rn-direct-Unprefixed- xmode)
4471 (.sym src32-An-direct-Unprefixed- xmode)
4472 (.sym src32-An-indirect-Unprefixed- xmode)
4473 )
4474 )
4475 (define-anyof-operand
4476 (name (.sym src32-basic-Prefixed- xmode))
4477 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4478 (attrs (machine 32))
4479 (mode xmode)
4480 (choices
4481 (.sym src32-Rn-direct-Prefixed- xmode)
4482 (.sym src32-An-direct-Prefixed- xmode)
4483 (.sym src32-An-indirect-Prefixed- xmode)
4484 )
4485 )
4486 ; (define-anyof-operand
4487 ; (name (.sym src32-basic-indirect- xmode))
4488 ; (comment (.str "m32c destination operand of size " xmode " indirect with no additional fields"))
4489 ; (attrs (machine 32))
4490 ; (mode xmode)
4491 ; (choices
4492 ; (.sym src32-An-indirect-indirect- xmode)
4493 ; )
4494 ; )
4495 )
4496 )
4498 (src32-basic-operand QI)
4499 (src32-basic-operand HI)
4500 (src32-basic-operand SI)
4502 (define-anyof-operand
4503 (name src32-basic-ExtPrefixed-QI)
4504 (comment "m32c source operand of size QI with no additional fields")
4505 (attrs (machine 32))
4506 (mode QI)
4507 (choices
4508 src32-Rn-direct-Prefixed-QI
4509 src32-An-indirect-Prefixed-QI
4510 )
4511 )
4513 ;-------------------------------------------------------------
4514 ; Source operands with additional fields at offset 16 bits
4515 ;-------------------------------------------------------------
4517 (define-pmacro (src16-16-operand xmode)
4518 (begin
4519 (define-anyof-operand
4520 (name (.sym src16-16-8- xmode))
4521 (comment (.str "m16c source operand of size " xmode " with additional 8 bit fields at offset 16"))
4522 (attrs (machine 16))
4523 (mode xmode)
4524 (choices
4525 (.sym src16-16-8-An-relative- xmode)
4526 (.sym src16-16-8-SB-relative- xmode)
4527 (.sym src16-16-8-FB-relative- xmode)
4528 )
4529 )
4530 (define-anyof-operand
4531 (name (.sym src16-16-16- xmode))
4532 (comment (.str "m16c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4533 (attrs (machine 16))
4534 (mode xmode)
4535 (choices
4536 (.sym src16-16-16-An-relative- xmode)
4537 (.sym src16-16-16-SB-relative- xmode)
4538 (.sym src16-16-16-absolute- xmode)
4539 )
4540 )
4541 )
4542 )
4543 (src16-16-operand QI)
4544 (src16-16-operand HI)
4546 (define-pmacro (src32-16-operand xmode)
4547 (begin
4548 (define-anyof-operand
4549 (name (.sym src32-16-8-Unprefixed- xmode))
4550 (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 16"))
4551 (attrs (machine 32))
4552 (mode xmode)
4553 (choices
4554 (.sym src32-16-8-An-relative-Unprefixed- xmode)
4555 (.sym src32-16-8-SB-relative-Unprefixed- xmode)
4556 (.sym src32-16-8-FB-relative-Unprefixed- xmode)
4557 )
4558 )
4559 (define-anyof-operand
4560 (name (.sym src32-16-16-Unprefixed- xmode))
4561 (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4562 (attrs (machine 32))
4563 (mode xmode)
4564 (choices
4565 (.sym src32-16-16-An-relative-Unprefixed- xmode)
4566 (.sym src32-16-16-SB-relative-Unprefixed- xmode)
4567 (.sym src32-16-16-FB-relative-Unprefixed- xmode)
4568 (.sym src32-16-16-absolute-Unprefixed- xmode)
4569 )
4570 )
4571 (define-anyof-operand
4572 (name (.sym src32-16-24-Unprefixed- xmode))
4573 (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16"))
4574 (attrs (machine 32))
4575 (mode xmode)
4576 (choices
4577 (.sym src32-16-24-An-relative-Unprefixed- xmode)
4578 (.sym src32-16-24-absolute-Unprefixed- xmode)
4579 )
4580 )
4581 )
4582 )
4584 (src32-16-operand QI)
4585 (src32-16-operand HI)
4586 (src32-16-operand SI)
4588 ;-------------------------------------------------------------
4589 ; Source operands with additional fields at offset 24 bits
4590 ;-------------------------------------------------------------
4592 (define-pmacro (src-24-operand group xmode)
4593 (begin
4594 (define-anyof-operand
4595 (name (.sym src32-24-8- group - xmode))
4596 (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 24"))
4597 (attrs (machine 32))
4598 (mode xmode)
4599 (choices
4600 (.sym src32-24-8-An-relative- group - xmode)
4601 (.sym src32-24-8-SB-relative- group - xmode)
4602 (.sym src32-24-8-FB-relative- group - xmode)
4603 )
4604 )
4605 (define-anyof-operand
4606 (name (.sym src32-24-16- group - xmode))
4607 (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4608 (attrs (machine 32))
4609 (mode xmode)
4610 (choices
4611 (.sym src32-24-16-An-relative- group - xmode)
4612 (.sym src32-24-16-SB-relative- group - xmode)
4613 (.sym src32-24-16-FB-relative- group - xmode)
4614 (.sym src32-24-16-absolute- group - xmode)
4615 )
4616 )
4617 (define-anyof-operand
4618 (name (.sym src32-24-24- group - xmode))
4619 (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16"))
4620 (attrs (machine 32))
4621 (mode xmode)
4622 (choices
4623 (.sym src32-24-24-An-relative- group - xmode)
4624 (.sym src32-24-24-absolute- group - xmode)
4625 )
4626 )
4627 )
4628 )
4630 (src-24-operand Prefixed QI)
4631 (src-24-operand Prefixed HI)
4632 (src-24-operand Prefixed SI)
4634 (define-pmacro (src-24-indirect-operand xmode)
4635 (begin
4636 ; (define-anyof-operand
4637 ; (name (.sym src32-24-8-indirect- xmode))
4638 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4639 ; (attrs (machine 32))
4640 ; (mode xmode)
4641 ; (choices
4642 ; (.sym src32-24-8-An-relative-indirect- xmode)
4643 ; (.sym src32-24-8-SB-relative-indirect- xmode)
4644 ; (.sym src32-24-8-FB-relative-indirect- xmode)
4645 ; )
4646 ; )
4647 ; (define-anyof-operand
4648 ; (name (.sym src32-24-16-indirect- xmode))
4649 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4650 ; (attrs (machine 32))
4651 ; (mode xmode)
4652 ; (choices
4653 ; (.sym src32-24-16-An-relative-indirect- xmode)
4654 ; (.sym src32-24-16-SB-relative-indirect- xmode)
4655 ; (.sym src32-24-16-FB-relative-indirect- xmode)
4656 ; )
4657 ; )
4658 ; (define-anyof-operand
4659 ; (name (.sym src32-24-24-indirect- xmode))
4660 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4661 ; (attrs (machine 32))
4662 ; (mode xmode)
4663 ; (choices
4664 ; (.sym src32-24-24-An-relative-indirect- xmode)
4665 ; )
4666 ; )
4667 ; (define-anyof-operand
4668 ; (name (.sym src32-24-16-absolute-indirect- xmode))
4669 ; (comment (.str "m32c source operand of size " xmode " 16 bit absolute indirect"))
4670 ; (attrs (machine 32))
4671 ; (mode xmode)
4672 ; (choices
4673 ; (.sym src32-24-16-absolute-indirect-derived- xmode)
4674 ; )
4675 ; )
4676 ; (define-anyof-operand
4677 ; (name (.sym src32-24-24-absolute-indirect- xmode))
4678 ; (comment (.str "m32c source operand of size " xmode " 24 bit absolute indirect"))
4679 ; (attrs (machine 32))
4680 ; (mode xmode)
4681 ; (choices
4682 ; (.sym src32-24-24-absolute-indirect-derived- xmode)
4683 ; )
4684 ; )
4685 )
4686 )
4688 ; (src-24-indirect-operand QI)
4689 ; (src-24-indirect-operand HI)
4690 ; (src-24-indirect-operand SI)
4692 ;-------------------------------------------------------------
4693 ; Destination operands with no additional fields
4694 ;-------------------------------------------------------------
4696 (define-pmacro (dst16-basic-operand xmode)
4697 (begin
4698 (define-anyof-operand
4699 (name (.sym dst16-basic- xmode))
4700 (comment (.str "m16c destination operand of size " xmode " with no additional fields"))
4701 (attrs (machine 16))
4702 (mode xmode)
4703 (choices
4704 (.sym dst16-Rn-direct- xmode)
4705 (.sym dst16-An-direct- xmode)
4706 (.sym dst16-An-indirect- xmode)
4707 )
4708 )
4709 )
4710 )
4712 (dst16-basic-operand QI)
4713 (dst16-basic-operand HI)
4714 (dst16-basic-operand SI)
4716 (define-pmacro (dst32-basic-operand xmode)
4717 (begin
4718 (define-anyof-operand
4719 (name (.sym dst32-basic-Unprefixed- xmode))
4720 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4721 (attrs (machine 32))
4722 (mode xmode)
4723 (choices
4724 (.sym dst32-Rn-direct-Unprefixed- xmode)
4725 (.sym dst32-An-direct-Unprefixed- xmode)
4726 (.sym dst32-An-indirect-Unprefixed- xmode)
4727 )
4728 )
4729 (define-anyof-operand
4730 (name (.sym dst32-basic-Prefixed- xmode))
4731 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4732 (attrs (machine 32))
4733 (mode xmode)
4734 (choices
4735 (.sym dst32-Rn-direct-Prefixed- xmode)
4736 (.sym dst32-An-direct-Prefixed- xmode)
4737 (.sym dst32-An-indirect-Prefixed- xmode)
4738 )
4739 )
4740 )
4741 )
4743 (dst32-basic-operand QI)
4744 (dst32-basic-operand HI)
4745 (dst32-basic-operand SI)
4747 ;-------------------------------------------------------------
4748 ; Destination operands with possible additional fields at offset 16 bits
4749 ;-------------------------------------------------------------
4751 (define-pmacro (dst16-16-operand xmode)
4752 (begin
4753 (define-anyof-operand
4754 (name (.sym dst16-16- xmode))
4755 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4756 (attrs (machine 16))
4757 (mode xmode)
4758 (choices
4759 (.sym dst16-Rn-direct- xmode)
4760 (.sym dst16-An-direct- xmode)
4761 (.sym dst16-An-indirect- xmode)
4762 (.sym dst16-16-8-An-relative- xmode)
4763 (.sym dst16-16-16-An-relative- xmode)
4764 (.sym dst16-16-8-SB-relative- xmode)
4765 (.sym dst16-16-16-SB-relative- xmode)
4766 (.sym dst16-16-8-FB-relative- xmode)
4767 (.sym dst16-16-16-absolute- xmode)
4768 )
4769 )
4770 (define-anyof-operand
4771 (name (.sym dst16-16-8- xmode))
4772 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4773 (attrs (machine 16))
4774 (mode xmode)
4775 (choices
4776 (.sym dst16-16-8-An-relative- xmode)
4777 (.sym dst16-16-8-SB-relative- xmode)
4778 (.sym dst16-16-8-FB-relative- xmode)
4779 )
4780 )
4781 (define-anyof-operand
4782 (name (.sym dst16-16-16- xmode))
4783 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4784 (attrs (machine 16))
4785 (mode xmode)
4786 (choices
4787 (.sym dst16-16-16-An-relative- xmode)
4788 (.sym dst16-16-16-SB-relative- xmode)
4789 (.sym dst16-16-16-absolute- xmode)
4790 )
4791 )
4792 (define-anyof-operand
4793 (name (.sym dst16-16-16sa- xmode))
4794 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4795 (attrs (machine 16))
4796 (mode xmode)
4797 (choices
4798 (.sym dst16-16-16-SB-relative- xmode)
4799 (.sym dst16-16-16-absolute- xmode)
4800 )
4801 )
4802 (define-anyof-operand
4803 (name (.sym dst16-16-20ar- xmode))
4804 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4805 (attrs (machine 16))
4806 (mode xmode)
4807 (choices
4808 (.sym dst16-16-20-An-relative- xmode)
4809 )
4810 )
4811 )
4812 )
4814 (dst16-16-operand QI)
4815 (dst16-16-operand HI)
4816 (dst16-16-operand SI)
4818 (define-anyof-operand
4819 (name dst16-16-Ext-QI)
4820 (comment "m16c destination operand of size QI for 'ext' insns with additional fields at offset 16")
4821 (attrs (machine 16))
4822 (mode QI)
4823 (choices
4824 dst16-Rn-direct-Ext-QI
4825 dst16-An-indirect-Ext-QI
4826 dst16-16-8-An-relative-Ext-QI
4827 dst16-16-16-An-relative-Ext-QI
4828 dst16-16-8-SB-relative-Ext-QI
4829 dst16-16-16-SB-relative-Ext-QI
4830 dst16-16-8-FB-relative-Ext-QI
4831 dst16-16-16-absolute-Ext-QI
4832 )
4833 )
4835 (define-derived-operand
4836 (name dst16-An-indirect-Mova-HI)
4837 (comment "m16c addressof An indirect destination HI")
4838 (attrs (ISA m16c))
4839 (mode HI)
4840 (args (Dst16An))
4841 (syntax "[$Dst16An]")
4842 (base-ifield f-12-4)
4843 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
4844 (ifield-assertion
4845 (andif (eq f-12-2 1) (eq f-14-1 1)))
4846 (getter Dst16An)
4847 (setter (nop))
4848 )
4850 (define-derived-operand
4851 (name dst16-16-8-An-relative-Mova-HI)
4852 (comment
4853 "m16c addressof dsp:8[An] relative destination HI")
4854 (attrs (ISA m16c))
4855 (mode HI)
4856 (args (Dst16An Dsp-16-u8))
4857 (syntax "${Dsp-16-u8}[$Dst16An]")
4858 (base-ifield f-12-4)
4859 (encoding
4860 (+ (f-12-2 2) (f-14-1 0) Dsp-16-u8 Dst16An))
4861 (ifield-assertion
4862 (andif (eq f-12-2 2) (eq f-14-1 0)))
4863 (getter (add Dsp-16-u8 Dst16An))
4864 (setter (nop))
4865 )
4866 (define-derived-operand
4867 (name dst16-16-16-An-relative-Mova-HI)
4868 (comment
4869 "m16c addressof dsp:16[An] relative destination HI")
4870 (attrs (ISA m16c))
4871 (mode HI)
4872 (args (Dst16An Dsp-16-u16))
4873 (syntax "${Dsp-16-u16}[$Dst16An]")
4874 (base-ifield f-12-4)
4875 (encoding
4876 (+ (f-12-2 3) (f-14-1 0) Dsp-16-u16 Dst16An))
4877 (ifield-assertion
4878 (andif (eq f-12-2 3) (eq f-14-1 0)))
4879 (getter (add Dsp-16-u16 Dst16An))
4880 (setter (nop))
4881 )
4882 (define-derived-operand
4883 (name dst16-16-8-SB-relative-Mova-HI)
4884 (comment
4885 "m16c addressof dsp:8[sb] relative destination HI")
4886 (attrs (ISA m16c))
4887 (mode HI)
4888 (args (Dsp-16-u8))
4889 (syntax "${Dsp-16-u8}[sb]")
4890 (base-ifield f-12-4)
4891 (encoding (+ (f-12-4 10) Dsp-16-u8))
4892 (ifield-assertion (eq f-12-4 10))
4893 (getter (add Dsp-16-u8 (reg h-sb)))
4894 (setter (nop))
4895 )
4896 (define-derived-operand
4897 (name dst16-16-16-SB-relative-Mova-HI)
4898 (comment
4899 "m16c addressof dsp:16[sb] relative destination HI")
4900 (attrs (ISA m16c))
4901 (mode HI)
4902 (args (Dsp-16-u16))
4903 (syntax "${Dsp-16-u16}[sb]")
4904 (base-ifield f-12-4)
4905 (encoding (+ (f-12-4 14) Dsp-16-u16))
4906 (ifield-assertion (eq f-12-4 14))
4907 (getter (add Dsp-16-u16 (reg h-sb)))
4908 (setter (nop))
4909 )
4910 (define-derived-operand
4911 (name dst16-16-8-FB-relative-Mova-HI)
4912 (comment
4913 "m16c addressof dsp:8[fb] relative destination HI")
4914 (attrs (ISA m16c))
4915 (mode HI)
4916 (args (Dsp-16-s8))
4917 (syntax "${Dsp-16-s8}[fb]")
4918 (base-ifield f-12-4)
4919 (encoding (+ (f-12-4 11) Dsp-16-s8))
4920 (ifield-assertion (eq f-12-4 11))
4921 (getter (add Dsp-16-s8 (reg h-fb)))
4922 (setter (nop))
4923 )
4924 (define-derived-operand
4925 (name dst16-16-16-absolute-Mova-HI)
4926 (comment "m16c addressof absolute address HI")
4927 (attrs (ISA m16c))
4928 (mode HI)
4929 (args (Dsp-16-u16))
4930 (syntax "${Dsp-16-u16}")
4931 (base-ifield f-12-4)
4932 (encoding (+ (f-12-4 15) Dsp-16-u16))
4933 (ifield-assertion (eq f-12-4 15))
4934 (getter Dsp-16-u16)
4935 (setter (nop))
4936 )
4938 (define-anyof-operand
4939 (name dst16-16-Mova-HI)
4940 (comment "m16c addressof destination operand of size HI with additional fields at offset 16")
4941 (attrs (machine 16))
4942 (mode HI)
4943 (choices
4944 dst16-An-indirect-Mova-HI
4945 dst16-16-8-An-relative-Mova-HI
4946 dst16-16-16-An-relative-Mova-HI
4947 dst16-16-8-SB-relative-Mova-HI
4948 dst16-16-16-SB-relative-Mova-HI
4949 dst16-16-8-FB-relative-Mova-HI
4950 dst16-16-16-absolute-Mova-HI
4951 )
4952 )
4954 (define-derived-operand
4955 (name dst32-An-indirect-Unprefixed-Mova-SI)
4956 (comment "m32c addressof An indirect destination SI")
4957 (attrs (ISA m32c))
4958 (mode SI)
4959 (args (Dst32AnUnprefixed))
4960 (syntax "[$Dst32AnUnprefixed]")
4961 (base-ifield f-4-6)
4962 (encoding
4963 (+ (f-4-3 0) (f-8-1 0) Dst32AnUnprefixed))
4964 (ifield-assertion
4965 (andif (eq f-4-3 0) (eq f-8-1 0)))
4966 (getter Dst32AnUnprefixed)
4967 (setter (nop))
4968 )
4970 (define-derived-operand
4971 (name dst32-16-8-An-relative-Unprefixed-Mova-SI)
4972 (comment "m32c addressof dsp:8[An] relative destination SI")
4973 (attrs (ISA m32c))
4974 (mode SI)
4975 (args (Dst32AnUnprefixed Dsp-16-u8))
4976 (syntax "${Dsp-16-u8}[$Dst32AnUnprefixed]")
4977 (base-ifield f-4-6)
4978 (encoding
4979 (+ (f-4-3 1)
4980 (f-8-1 0)
4981 Dsp-16-u8
4982 Dst32AnUnprefixed))
4983 (ifield-assertion
4984 (andif (eq f-4-3 1) (eq f-8-1 0)))
4985 (getter (add Dsp-16-u8 Dst32AnUnprefixed))
4986 (setter (nop))
4987 )
4989 (define-derived-operand
4990 (name dst32-16-16-An-relative-Unprefixed-Mova-SI)
4991 (comment
4992 "m32c addressof dsp:16[An] relative destination SI")
4993 (attrs (ISA m32c))
4994 (mode SI)
4995 (args (Dst32AnUnprefixed Dsp-16-u16))
4996 (syntax "${Dsp-16-u16}[$Dst32AnUnprefixed]")
4997 (base-ifield f-4-6)
4998 (encoding
4999 (+ (f-4-3 2)
5000 (f-8-1 0)
5001 Dsp-16-u16
5002 Dst32AnUnprefixed))
5003 (ifield-assertion
5004 (andif (eq f-4-3 2) (eq f-8-1 0)))
5005 (getter (add Dsp-16-u16 Dst32AnUnprefixed))
5006 (setter (nop))
5007 )
5009 (define-derived-operand
5010 (name dst32-16-24-An-relative-Unprefixed-Mova-SI)
5011 (comment "addressof m32c dsp:16[An] relative destination SI")
5012 (attrs (ISA m32c))
5013 (mode SI)
5014 (args (Dst32AnUnprefixed Dsp-16-u24))
5015 (syntax "${Dsp-16-u24}[$Dst32AnUnprefixed]")
5016 (base-ifield f-4-6)
5017 (encoding
5018 (+ (f-4-3 3)
5019 (f-8-1 0)
5020 Dsp-16-u24
5021 Dst32AnUnprefixed))
5022 (ifield-assertion
5023 (andif (eq f-4-3 3) (eq f-8-1 0)))
5024 (getter (add Dsp-16-u24 Dst32AnUnprefixed))
5025 (setter (nop))
5026 )
5028 (define-derived-operand
5029 (name dst32-16-8-SB-relative-Unprefixed-Mova-SI)
5030 (comment "m32c addressof dsp:8[sb] relative destination SI")
5031 (attrs (ISA m32c))
5032 (mode SI)
5033 (args (Dsp-16-u8))
5034 (syntax "${Dsp-16-u8}[sb]")
5035 (base-ifield f-4-6)
5036 (encoding (+ (f-4-3 1) (f-8-2 2) Dsp-16-u8))
5037 (ifield-assertion
5038 (andif (eq f-4-3 1) (eq f-8-2 2)))
5039 (getter (add Dsp-16-u8 (reg h-sb)))
5040 (setter (nop))
5041 )
5043 (define-derived-operand
5044 (name dst32-16-16-SB-relative-Unprefixed-Mova-SI)
5045 (comment "m32c addressof dsp:16[sb] relative destination SI")
5046 (attrs (ISA m32c))
5047 (mode SI)
5048 (args (Dsp-16-u16))
5049 (syntax "${Dsp-16-u16}[sb]")
5050 (base-ifield f-4-6)
5051 (encoding (+ (f-4-3 2) (f-8-2 2) Dsp-16-u16))
5052 (ifield-assertion
5053 (andif (eq f-4-3 2) (eq f-8-2 2)))
5054 (getter (add Dsp-16-u16 (reg h-sb)))
5055 (setter (nop))
5056 )
5058 (define-derived-operand
5059 (name dst32-16-8-FB-relative-Unprefixed-Mova-SI)
5060 (comment "m32c addressof dsp:8[fb] relative destination SI")
5061 (attrs (ISA m32c))
5062 (mode SI)
5063 (args (Dsp-16-s8))
5064 (syntax "${Dsp-16-s8}[fb]")
5065 (base-ifield f-4-6)
5066 (encoding (+ (f-4-3 1) (f-8-2 3) Dsp-16-s8))
5067 (ifield-assertion
5068 (andif (eq f-4-3 1) (eq f-8-2 3)))
5069 (getter (add Dsp-16-s8 (reg h-fb)))
5070 (setter (nop))
5071 )
5073 (define-derived-operand
5074 (name dst32-16-16-FB-relative-Unprefixed-Mova-SI)
5075 (comment "m32c addressof dsp:16[fb] relative destination SI")
5076 (attrs (ISA m32c))
5077 (mode SI)
5078 (args (Dsp-16-s16))
5079 (syntax "${Dsp-16-s16}[fb]")
5080 (base-ifield f-4-6)
5081 (encoding (+ (f-4-3 2) (f-8-2 3) Dsp-16-s16))
5082 (ifield-assertion
5083 (andif (eq f-4-3 2) (eq f-8-2 3)))
5084 (getter (add Dsp-16-s16 (reg h-fb)))
5085 (setter (nop))
5086 )
5088 (define-derived-operand
5089 (name dst32-16-16-absolute-Unprefixed-Mova-SI)
5090 (comment "m32c addressof absolute address SI") (attrs (ISA m32c))
5091 (mode SI)
5092 (args (Dsp-16-u16))
5093 (syntax "${Dsp-16-u16}")
5094 (base-ifield f-4-6)
5095 (encoding (+ (f-4-3 3) (f-8-2 3) Dsp-16-u16))
5096 (ifield-assertion
5097 (andif (eq f-4-3 3) (eq f-8-2 3)))
5098 (getter Dsp-16-u16)
5099 (setter (nop))
5100 )
5102 (define-derived-operand
5103 (name dst32-16-24-absolute-Unprefixed-Mova-SI)
5104 (comment "m32c addressof absolute address SI") (attrs (ISA m32c))
5105 (mode SI)
5106 (args (Dsp-16-u24))
5107 (syntax "${Dsp-16-u24}")
5108 (base-ifield f-4-6)
5109 (encoding (+ (f-4-3 3) (f-8-2 2) Dsp-16-u24))
5110 (ifield-assertion
5111 (andif (eq f-4-3 3) (eq f-8-2 2)))
5112 (getter Dsp-16-u24)
5113 (setter (nop))
5114 )
5116 (define-anyof-operand
5117 (name dst32-16-Unprefixed-Mova-SI)
5118 (comment
5119 "m32c addressof destination operand of size SI with additional fields at offset 16")
5120 (attrs (ISA m32c))
5121 (mode SI)
5122 (choices
5123 dst32-An-indirect-Unprefixed-Mova-SI
5124 dst32-16-8-An-relative-Unprefixed-Mova-SI
5125 dst32-16-16-An-relative-Unprefixed-Mova-SI
5126 dst32-16-24-An-relative-Unprefixed-Mova-SI
5127 dst32-16-8-SB-relative-Unprefixed-Mova-SI
5128 dst32-16-16-SB-relative-Unprefixed-Mova-SI
5129 dst32-16-8-FB-relative-Unprefixed-Mova-SI
5130 dst32-16-16-FB-relative-Unprefixed-Mova-SI
5131 dst32-16-16-absolute-Unprefixed-Mova-SI
5132 dst32-16-24-absolute-Unprefixed-Mova-SI))
5134 (define-pmacro (dst32-16-operand xmode)
5135 (begin
5136 (define-anyof-operand
5137 (name (.sym dst32-16-Unprefixed- xmode))
5138 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5139 (attrs (machine 32))
5140 (mode xmode)
5141 (choices
5142 (.sym dst32-Rn-direct-Unprefixed- xmode)
5143 (.sym dst32-An-direct-Unprefixed- xmode)
5144 (.sym dst32-An-indirect-Unprefixed- xmode)
5145 (.sym dst32-16-8-An-relative-Unprefixed- xmode)
5146 (.sym dst32-16-16-An-relative-Unprefixed- xmode)
5147 (.sym dst32-16-24-An-relative-Unprefixed- xmode)
5148 (.sym dst32-16-8-SB-relative-Unprefixed- xmode)
5149 (.sym dst32-16-16-SB-relative-Unprefixed- xmode)
5150 (.sym dst32-16-8-FB-relative-Unprefixed- xmode)
5151 (.sym dst32-16-16-FB-relative-Unprefixed- xmode)
5152 (.sym dst32-16-16-absolute-Unprefixed- xmode)
5153 (.sym dst32-16-24-absolute-Unprefixed- xmode)
5154 )
5155 )
5156 (define-anyof-operand
5157 (name (.sym dst32-16-8-Unprefixed- xmode))
5158 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5159 (attrs (machine 32))
5160 (mode xmode)
5161 (choices
5162 (.sym dst32-16-8-An-relative-Unprefixed- xmode)
5163 (.sym dst32-16-8-SB-relative-Unprefixed- xmode)
5164 (.sym dst32-16-8-FB-relative-Unprefixed- xmode)
5165 )
5166 )
5167 (define-anyof-operand
5168 (name (.sym dst32-16-16-Unprefixed- xmode))
5169 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5170 (attrs (machine 32))
5171 (mode xmode)
5172 (choices
5173 (.sym dst32-16-16-An-relative-Unprefixed- xmode)
5174 (.sym dst32-16-16-SB-relative-Unprefixed- xmode)
5175 (.sym dst32-16-16-FB-relative-Unprefixed- xmode)
5176 (.sym dst32-16-16-absolute-Unprefixed- xmode)
5177 )
5178 )
5179 (define-anyof-operand
5180 (name (.sym dst32-16-16sa-Unprefixed- xmode))
5181 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5182 (attrs (machine 32))
5183 (mode xmode)
5184 (choices
5185 (.sym dst32-16-16-SB-relative-Unprefixed- xmode)
5186 (.sym dst32-16-16-FB-relative-Unprefixed- xmode)
5187 (.sym dst32-16-16-absolute-Unprefixed- xmode)
5188 )
5189 )
5190 (define-anyof-operand
5191 (name (.sym dst32-16-24-Unprefixed- xmode))
5192 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5193 (attrs (machine 32))
5194 (mode xmode)
5195 (choices
5196 (.sym dst32-16-24-An-relative-Unprefixed- xmode)
5197 (.sym dst32-16-24-absolute-Unprefixed- xmode)
5198 )
5199 )
5200 )
5201 )
5203 (dst32-16-operand QI)
5204 (dst32-16-operand HI)
5205 (dst32-16-operand SI)
5207 (define-pmacro (dst32-16-Ext-operand smode dmode)
5208 (begin
5209 (define-anyof-operand
5210 (name (.sym dst32-16-ExtUnprefixed- smode))
5211 (comment (.str "m32c destination operand of size " smode " with additional fields at offset 16"))
5212 (attrs (machine 32))
5213 (mode dmode)
5214 (choices
5215 (.sym dst32-Rn-direct-ExtUnprefixed- smode)
5216 (.sym dst32-An-direct-Unprefixed- dmode) ; ExtUnprefixed mode not required for this operand -- use the normal dmode version
5217 (.sym dst32-An-indirect-ExtUnprefixed- smode)
5218 (.sym dst32-16-8-An-relative-ExtUnprefixed- smode)
5219 (.sym dst32-16-16-An-relative-ExtUnprefixed- smode)
5220 (.sym dst32-16-24-An-relative-ExtUnprefixed- smode)
5221 (.sym dst32-16-8-SB-relative-ExtUnprefixed- smode)
5222 (.sym dst32-16-16-SB-relative-ExtUnprefixed- smode)
5223 (.sym dst32-16-8-FB-relative-ExtUnprefixed- smode)
5224 (.sym dst32-16-16-FB-relative-ExtUnprefixed- smode)
5225 (.sym dst32-16-16-absolute-ExtUnprefixed- smode)
5226 (.sym dst32-16-24-absolute-ExtUnprefixed- smode)
5227 )
5228 )
5229 )
5230 )
5232 (dst32-16-Ext-operand QI HI)
5233 (dst32-16-Ext-operand HI SI)
5235 (define-anyof-operand
5236 (name dst32-16-Unprefixed-Mulex-HI)
5237 (comment "m32c destination operand of size HI with additional fields at offset 16")
5238 (attrs (machine 32))
5239 (mode HI)
5240 (choices
5241 dst32-R3-direct-Unprefixed-HI
5242 dst32-An-direct-Unprefixed-HI
5243 dst32-An-indirect-Unprefixed-HI
5244 dst32-16-8-An-relative-Unprefixed-HI
5245 dst32-16-16-An-relative-Unprefixed-HI
5246 dst32-16-24-An-relative-Unprefixed-HI
5247 dst32-16-8-SB-relative-Unprefixed-HI
5248 dst32-16-16-SB-relative-Unprefixed-HI
5249 dst32-16-8-FB-relative-Unprefixed-HI
5250 dst32-16-16-FB-relative-Unprefixed-HI
5251 dst32-16-16-absolute-Unprefixed-HI
5252 dst32-16-24-absolute-Unprefixed-HI
5253 )
5254 )
5255 ;-------------------------------------------------------------
5256 ; Destination operands with possible additional fields at offset 24 bits
5257 ;-------------------------------------------------------------
5259 (define-pmacro (dst16-24-operand xmode)
5260 (begin
5261 (define-anyof-operand
5262 (name (.sym dst16-24- xmode))
5263 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 24"))
5264 (attrs (machine 16))
5265 (mode xmode)
5266 (choices
5267 (.sym dst16-Rn-direct- xmode)
5268 (.sym dst16-An-direct- xmode)
5269 (.sym dst16-An-indirect- xmode)
5270 (.sym dst16-24-8-An-relative- xmode)
5271 (.sym dst16-24-16-An-relative- xmode)
5272 (.sym dst16-24-8-SB-relative- xmode)
5273 (.sym dst16-24-16-SB-relative- xmode)
5274 (.sym dst16-24-8-FB-relative- xmode)
5275 (.sym dst16-24-16-absolute- xmode)
5276 )
5277 )
5278 )
5279 )
5281 (dst16-24-operand QI)
5282 (dst16-24-operand HI)
5284 (define-pmacro (dst32-24-operand xmode)
5285 (begin
5286 (define-anyof-operand
5287 (name (.sym dst32-24-Unprefixed- xmode))
5288 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5289 (attrs (machine 32))
5290 (mode xmode)
5291 (choices
5292 (.sym dst32-Rn-direct-Unprefixed- xmode)
5293 (.sym dst32-An-direct-Unprefixed- xmode)
5294 (.sym dst32-An-indirect-Unprefixed- xmode)
5295 (.sym dst32-24-8-An-relative-Unprefixed- xmode)
5296 (.sym dst32-24-16-An-relative-Unprefixed- xmode)
5297 (.sym dst32-24-24-An-relative-Unprefixed- xmode)
5298 (.sym dst32-24-8-SB-relative-Unprefixed- xmode)
5299 (.sym dst32-24-16-SB-relative-Unprefixed- xmode)
5300 (.sym dst32-24-8-FB-relative-Unprefixed- xmode)
5301 (.sym dst32-24-16-FB-relative-Unprefixed- xmode)
5302 (.sym dst32-24-16-absolute-Unprefixed- xmode)
5303 (.sym dst32-24-24-absolute-Unprefixed- xmode)
5304 )
5305 )
5306 (define-anyof-operand
5307 (name (.sym dst32-24-Prefixed- xmode))
5308 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5309 (attrs (machine 32))
5310 (mode xmode)
5311 (choices
5312 (.sym dst32-Rn-direct-Prefixed- xmode)
5313 (.sym dst32-An-direct-Prefixed- xmode)
5314 (.sym dst32-An-indirect-Prefixed- xmode)
5315 (.sym dst32-24-8-An-relative-Prefixed- xmode)
5316 (.sym dst32-24-16-An-relative-Prefixed- xmode)
5317 (.sym dst32-24-24-An-relative-Prefixed- xmode)
5318 (.sym dst32-24-8-SB-relative-Prefixed- xmode)
5319 (.sym dst32-24-16-SB-relative-Prefixed- xmode)
5320 (.sym dst32-24-8-FB-relative-Prefixed- xmode)
5321 (.sym dst32-24-16-FB-relative-Prefixed- xmode)
5322 (.sym dst32-24-16-absolute-Prefixed- xmode)
5323 (.sym dst32-24-24-absolute-Prefixed- xmode)
5324 )
5325 )
5326 (define-anyof-operand
5327 (name (.sym dst32-24-8-Prefixed- xmode))
5328 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5329 (attrs (machine 32))
5330 (mode xmode)
5331 (choices
5332 (.sym dst32-24-8-An-relative-Prefixed- xmode)
5333 (.sym dst32-24-8-SB-relative-Prefixed- xmode)
5334 (.sym dst32-24-8-FB-relative-Prefixed- xmode)
5335 )
5336 )
5337 (define-anyof-operand
5338 (name (.sym dst32-24-16-Prefixed- xmode))
5339 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5340 (attrs (machine 32))
5341 (mode xmode)
5342 (choices
5343 (.sym dst32-24-16-An-relative-Prefixed- xmode)
5344 (.sym dst32-24-16-SB-relative-Prefixed- xmode)
5345 (.sym dst32-24-16-FB-relative-Prefixed- xmode)
5346 (.sym dst32-24-16-absolute-Prefixed- xmode)
5347 )
5348 )
5349 (define-anyof-operand
5350 (name (.sym dst32-24-24-Prefixed- xmode))
5351 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5352 (attrs (machine 32))
5353 (mode xmode)
5354 (choices
5355 (.sym dst32-24-24-An-relative-Prefixed- xmode)
5356 (.sym dst32-24-24-absolute-Prefixed- xmode)
5357 )
5358 )
5359 ; (define-anyof-operand
5360 ; (name (.sym dst32-24-indirect- xmode))
5361 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5362 ; (attrs (machine 32))
5363 ; (mode xmode)
5364 ; (choices
5365 ; (.sym dst32-An-indirect-indirect- xmode)
5366 ; (.sym dst32-24-8-An-relative-indirect- xmode)
5367 ; (.sym dst32-24-16-An-relative-indirect- xmode)
5368 ; (.sym dst32-24-24-An-relative-indirect- xmode)
5369 ; (.sym dst32-24-8-SB-relative-indirect- xmode)
5370 ; (.sym dst32-24-16-SB-relative-indirect- xmode)
5371 ; (.sym dst32-24-8-FB-relative-indirect- xmode)
5372 ; (.sym dst32-24-16-FB-relative-indirect- xmode)
5373 ; )
5374 ; )
5375 ; (define-anyof-operand
5376 ; (name (.sym dst32-basic-indirect- xmode))
5377 ; (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
5378 ; (attrs (machine 32))
5379 ; (mode xmode)
5380 ; (choices
5381 ; (.sym dst32-An-indirect-indirect- xmode)
5382 ; )
5383 ; )
5384 ; (define-anyof-operand
5385 ; (name (.sym dst32-24-8-indirect- xmode))
5386 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5387 ; (attrs (machine 32))
5388 ; (mode xmode)
5389 ; (choices
5390 ; (.sym dst32-24-8-An-relative-indirect- xmode)
5391 ; (.sym dst32-24-8-SB-relative-indirect- xmode)
5392 ; (.sym dst32-24-8-FB-relative-indirect- xmode)
5393 ; )
5394 ; )
5395 ; (define-anyof-operand
5396 ; (name (.sym dst32-24-16-indirect- xmode))
5397 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5398 ; (attrs (machine 32))
5399 ; (mode xmode)
5400 ; (choices
5401 ; (.sym dst32-24-16-An-relative-indirect- xmode)
5402 ; (.sym dst32-24-16-SB-relative-indirect- xmode)
5403 ; (.sym dst32-24-16-FB-relative-indirect- xmode)
5404 ; )
5405 ; )
5406 ; (define-anyof-operand
5407 ; (name (.sym dst32-24-24-indirect- xmode))
5408 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5409 ; (attrs (machine 32))
5410 ; (mode xmode)
5411 ; (choices
5412 ; (.sym dst32-24-24-An-relative-indirect- xmode)
5413 ; )
5414 ; )
5415 ; (define-anyof-operand
5416 ; (name (.sym dst32-24-absolute-indirect- xmode))
5417 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5418 ; (attrs (machine 32))
5419 ; (mode xmode)
5420 ; (choices
5421 ; (.sym dst32-24-16-absolute-indirect-derived- xmode)
5422 ; (.sym dst32-24-24-absolute-indirect-derived- xmode)
5423 ; )
5424 ; )
5425 ; (define-anyof-operand
5426 ; (name (.sym dst32-24-16-absolute-indirect- xmode))
5427 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5428 ; (attrs (machine 32))
5429 ; (mode xmode)
5430 ; (choices
5431 ; (.sym dst32-24-16-absolute-indirect-derived- xmode)
5432 ; )
5433 ; )
5434 ; (define-anyof-operand
5435 ; (name (.sym dst32-24-24-absolute-indirect- xmode))
5436 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5437 ; (attrs (machine 32))
5438 ; (mode xmode)
5439 ; (choices
5440 ; (.sym dst32-24-24-absolute-indirect-derived- xmode)
5441 ; )
5442 ; )
5443 )
5444 )
5446 (dst32-24-operand QI)
5447 (dst32-24-operand HI)
5448 (dst32-24-operand SI)
5450 ;-------------------------------------------------------------
5451 ; Destination operands with possible additional fields at offset 32 bits
5452 ;-------------------------------------------------------------
5454 (define-pmacro (dst16-32-operand xmode)
5455 (begin
5456 (define-anyof-operand
5457 (name (.sym dst16-32- xmode))
5458 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 32"))
5459 (attrs (machine 16))
5460 (mode xmode)
5461 (choices
5462 (.sym dst16-Rn-direct- xmode)
5463 (.sym dst16-An-direct- xmode)
5464 (.sym dst16-An-indirect- xmode)
5465 (.sym dst16-32-8-An-relative- xmode)
5466 (.sym dst16-32-16-An-relative- xmode)
5467 (.sym dst16-32-8-SB-relative- xmode)
5468 (.sym dst16-32-16-SB-relative- xmode)
5469 (.sym dst16-32-8-FB-relative- xmode)
5470 (.sym dst16-32-16-absolute- xmode)
5471 )
5472 )
5473 )
5474 )
5475 (dst16-32-operand QI)
5476 (dst16-32-operand HI)
5478 ; This macro actually handles operands at offset 32, 40 and 48 bits
5479 (define-pmacro (dst32-32plus-operand offset xmode)
5480 (begin
5481 (define-anyof-operand
5482 (name (.sym dst32- offset -Unprefixed- xmode))
5483 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5484 (attrs (machine 32))
5485 (mode xmode)
5486 (choices
5487 (.sym dst32-Rn-direct-Unprefixed- xmode)
5488 (.sym dst32-An-direct-Unprefixed- xmode)
5489 (.sym dst32-An-indirect-Unprefixed- xmode)
5490 (.sym dst32- offset -8-An-relative-Unprefixed- xmode)
5491 (.sym dst32- offset -16-An-relative-Unprefixed- xmode)
5492 (.sym dst32- offset -24-An-relative-Unprefixed- xmode)
5493 (.sym dst32- offset -8-SB-relative-Unprefixed- xmode)
5494 (.sym dst32- offset -16-SB-relative-Unprefixed- xmode)
5495 (.sym dst32- offset -8-FB-relative-Unprefixed- xmode)
5496 (.sym dst32- offset -16-FB-relative-Unprefixed- xmode)
5497 (.sym dst32- offset -16-absolute-Unprefixed- xmode)
5498 (.sym dst32- offset -24-absolute-Unprefixed- xmode)
5499 )
5500 )
5501 (define-anyof-operand
5502 (name (.sym dst32- offset -Prefixed- xmode))
5503 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5504 (attrs (machine 32))
5505 (mode xmode)
5506 (choices
5507 (.sym dst32-Rn-direct-Prefixed- xmode)
5508 (.sym dst32-An-direct-Prefixed- xmode)
5509 (.sym dst32-An-indirect-Prefixed- xmode)
5510 (.sym dst32- offset -8-An-relative-Prefixed- xmode)
5511 (.sym dst32- offset -16-An-relative-Prefixed- xmode)
5512 (.sym dst32- offset -24-An-relative-Prefixed- xmode)
5513 (.sym dst32- offset -8-SB-relative-Prefixed- xmode)
5514 (.sym dst32- offset -16-SB-relative-Prefixed- xmode)
5515 (.sym dst32- offset -8-FB-relative-Prefixed- xmode)
5516 (.sym dst32- offset -16-FB-relative-Prefixed- xmode)
5517 (.sym dst32- offset -16-absolute-Prefixed- xmode)
5518 (.sym dst32- offset -24-absolute-Prefixed- xmode)
5519 )
5520 )
5521 ; (define-anyof-operand
5522 ; (name (.sym dst32- offset -indirect- xmode))
5523 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5524 ; (attrs (machine 32))
5525 ; (mode xmode)
5526 ; (choices
5527 ; (.sym dst32-An-indirect-indirect- xmode)
5528 ; (.sym dst32- offset -8-An-relative-indirect- xmode)
5529 ; (.sym dst32- offset -16-An-relative-indirect- xmode)
5530 ; (.sym dst32- offset -24-An-relative-indirect- xmode)
5531 ; (.sym dst32- offset -8-SB-relative-indirect- xmode)
5532 ; (.sym dst32- offset -16-SB-relative-indirect- xmode)
5533 ; (.sym dst32- offset -8-FB-relative-indirect- xmode)
5534 ; (.sym dst32- offset -16-FB-relative-indirect- xmode)
5535 ; )
5536 ; )
5537 ; (define-anyof-operand
5538 ; (name (.sym dst32- offset -absolute-indirect- xmode))
5539 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5540 ; (attrs (machine 32))
5541 ; (mode xmode)
5542 ; (choices
5543 ; (.sym dst32- offset -16-absolute-indirect-derived- xmode)
5544 ; (.sym dst32- offset -24-absolute-indirect-derived- xmode)
5545 ; )
5546 ; )
5547 )
5548 )
5550 (dst32-32plus-operand 32 QI)
5551 (dst32-32plus-operand 32 HI)
5552 (dst32-32plus-operand 32 SI)
5553 (dst32-32plus-operand 40 QI)
5554 (dst32-32plus-operand 40 HI)
5555 (dst32-32plus-operand 40 SI)
5557 ;-------------------------------------------------------------
5558 ; Destination operands with possible additional fields at offset 48 bits
5559 ;-------------------------------------------------------------
5561 (define-pmacro (dst32-48-operand offset xmode)
5562 (begin
5563 (define-anyof-operand
5564 (name (.sym dst32- offset -Prefixed- xmode))
5565 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5566 (attrs (machine 32))
5567 (mode xmode)
5568 (choices
5569 (.sym dst32-Rn-direct-Prefixed- xmode)
5570 (.sym dst32-An-direct-Prefixed- xmode)
5571 (.sym dst32-An-indirect-Prefixed- xmode)
5572 (.sym dst32- offset -8-An-relative-Prefixed- xmode)
5573 (.sym dst32- offset -16-An-relative-Prefixed- xmode)
5574 (.sym dst32- offset -24-An-relative-Prefixed- xmode)
5575 (.sym dst32- offset -8-SB-relative-Prefixed- xmode)
5576 (.sym dst32- offset -16-SB-relative-Prefixed- xmode)
5577 (.sym dst32- offset -8-FB-relative-Prefixed- xmode)
5578 (.sym dst32- offset -16-FB-relative-Prefixed- xmode)
5579 (.sym dst32- offset -16-absolute-Prefixed- xmode)
5580 (.sym dst32- offset -24-absolute-Prefixed- xmode)
5581 )
5582 )
5583 ; (define-anyof-operand
5584 ; (name (.sym dst32- offset -indirect- xmode))
5585 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5586 ; (attrs (machine 32))
5587 ; (mode xmode)
5588 ; (choices
5589 ; (.sym dst32-An-indirect-indirect- xmode)
5590 ; (.sym dst32- offset -8-An-relative-indirect- xmode)
5591 ; (.sym dst32- offset -16-An-relative-indirect- xmode)
5592 ; (.sym dst32- offset -24-An-relative-indirect- xmode)
5593 ; (.sym dst32- offset -8-SB-relative-indirect- xmode)
5594 ; (.sym dst32- offset -16-SB-relative-indirect- xmode)
5595 ; (.sym dst32- offset -8-FB-relative-indirect- xmode)
5596 ; (.sym dst32- offset -16-FB-relative-indirect- xmode)
5597 ; )
5598 ; )
5599 ; (define-anyof-operand
5600 ; (name (.sym dst32- offset -absolute-indirect- xmode))
5601 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5602 ; (attrs (machine 32))
5603 ; (mode xmode)
5604 ; (choices
5605 ; (.sym dst32- offset -16-absolute-indirect-derived- xmode)
5606 ; (.sym dst32- offset -24-absolute-indirect-derived- xmode)
5607 ; )
5608 ; )
5609 )
5610 )
5612 (dst32-48-operand 48 QI)
5613 (dst32-48-operand 48 HI)
5614 (dst32-48-operand 48 SI)
5616 ;-------------------------------------------------------------
5617 ; Bit operands for m16c
5618 ;-------------------------------------------------------------
5620 (define-pmacro (bit16-operand offset)
5621 (begin
5622 (define-anyof-operand
5623 (name (.sym bit16- offset))
5624 (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5625 (attrs (machine 16))
5626 (mode BI)
5627 (choices
5628 bit16-Rn-direct
5629 bit16-An-direct
5630 bit16-An-indirect
5631 (.sym bit16- offset -8-An-relative)
5632 (.sym bit16- offset -16-An-relative)
5633 (.sym bit16- offset -8-SB-relative)
5634 (.sym bit16- offset -16-SB-relative)
5635 (.sym bit16- offset -8-FB-relative)
5636 (.sym bit16- offset -16-absolute)
5637 )
5638 )
5639 (define-anyof-operand
5640 (name (.sym bit16- offset -basic))
5641 (comment (.str "m16c bit operand with no additional fields"))
5642 (attrs (machine 16))
5643 (mode BI)
5644 (choices
5645 bit16-An-indirect
5646 )
5647 )
5648 (define-anyof-operand
5649 (name (.sym bit16- offset -8))
5650 (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5651 (attrs (machine 16))
5652 (mode BI)
5653 (choices
5654 bit16-Rn-direct
5655 bit16-An-direct
5656 (.sym bit16- offset -8-An-relative)
5657 (.sym bit16- offset -8-SB-relative)
5658 (.sym bit16- offset -8-FB-relative)
5659 )
5660 )
5661 (define-anyof-operand
5662 (name (.sym bit16- offset -16))
5663 (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5664 (attrs (machine 16))
5665 (mode BI)
5666 (choices
5667 (.sym bit16- offset -16-An-relative)
5668 (.sym bit16- offset -16-SB-relative)
5669 (.sym bit16- offset -16-absolute)
5670 )
5671 )
5672 )
5673 )
5675 (bit16-operand 16)
5677 ;-------------------------------------------------------------
5678 ; Bit operands for m32c
5679 ;-------------------------------------------------------------
5681 (define-pmacro (bit32-operand offset group)
5682 (begin
5683 (define-anyof-operand
5684 (name (.sym bit32- offset - group))
5685 (comment (.str "m32c bit operand with possible additional fields at offset 24"))
5686 (attrs (machine 32))
5687 (mode BI)
5688 (choices
5689 (.sym bit32-Rn-direct- group)
5690 (.sym bit32-An-direct- group)
5691 (.sym bit32-An-indirect- group)
5692 (.sym bit32- offset -11-An-relative- group)
5693 (.sym bit32- offset -19-An-relative- group)
5694 (.sym bit32- offset -27-An-relative- group)
5695 (.sym bit32- offset -11-SB-relative- group)
5696 (.sym bit32- offset -19-SB-relative- group)
5697 (.sym bit32- offset -11-FB-relative- group)
5698 (.sym bit32- offset -19-FB-relative- group)
5699 (.sym bit32- offset -19-absolute- group)
5700 (.sym bit32- offset -27-absolute- group)
5701 )
5702 )
5703 )
5704 )
5706 (bit32-operand 16 Unprefixed)
5707 (bit32-operand 24 Prefixed)
5709 (define-anyof-operand
5710 (name bit32-basic-Unprefixed)
5711 (comment "m32c bit operand with no additional fields")
5712 (attrs (machine 32))
5713 (mode BI)
5714 (choices
5715 bit32-Rn-direct-Unprefixed
5716 bit32-An-direct-Unprefixed
5717 bit32-An-indirect-Unprefixed
5718 )
5719 )
5721 (define-anyof-operand
5722 (name bit32-16-8-Unprefixed)
5723 (comment "m32c bit operand with 8 bit additional fields")
5724 (attrs (machine 32))
5725 (mode BI)
5726 (choices
5727 bit32-16-11-An-relative-Unprefixed
5728 bit32-16-11-SB-relative-Unprefixed
5729 bit32-16-11-FB-relative-Unprefixed
5730 )
5731 )
5733 (define-anyof-operand
5734 (name bit32-16-16-Unprefixed)
5735 (comment "m32c bit operand with 16 bit additional fields")
5736 (attrs (machine 32))
5737 (mode BI)
5738 (choices
5739 bit32-16-19-An-relative-Unprefixed
5740 bit32-16-19-SB-relative-Unprefixed
5741 bit32-16-19-FB-relative-Unprefixed
5742 bit32-16-19-absolute-Unprefixed
5743 )
5744 )
5746 (define-anyof-operand
5747 (name bit32-16-24-Unprefixed)
5748 (comment "m32c bit operand with 24 bit additional fields")
5749 (attrs (machine 32))
5750 (mode BI)
5751 (choices
5752 bit32-16-27-An-relative-Unprefixed
5753 bit32-16-27-absolute-Unprefixed
5754 )
5755 )
5757 ;-------------------------------------------------------------
5758 ; Operands for short format binary insns
5759 ;-------------------------------------------------------------
5761 (define-anyof-operand
5762 (name src16-2-S)
5763 (comment "m16c source operand of size QI for short format insns")
5764 (attrs (machine 16))
5765 (mode QI)
5766 (choices
5767 src16-2-S-8-SB-relative-QI
5768 src16-2-S-8-FB-relative-QI
5769 src16-2-S-16-absolute-QI
5770 )
5771 )
5773 (define-anyof-operand
5774 (name src32-2-S-QI)
5775 (comment "m32c source operand of size QI for short format insns")
5776 (attrs (machine 32))
5777 (mode QI)
5778 (choices
5779 src32-2-S-8-SB-relative-QI
5780 src32-2-S-8-FB-relative-QI
5781 src32-2-S-16-absolute-QI
5782 )
5783 )
5785 (define-anyof-operand
5786 (name src32-2-S-HI)
5787 (comment "m32c source operand of size QI for short format insns")
5788 (attrs (machine 32))
5789 (mode HI)
5790 (choices
5791 src32-2-S-8-SB-relative-HI
5792 src32-2-S-8-FB-relative-HI
5793 src32-2-S-16-absolute-HI
5794 )
5795 )
5797 (define-anyof-operand
5798 (name Dst16-3-S-8)
5799 (comment "m16c destination operand of size QI for short format insns")
5800 (attrs (machine 16))
5801 (mode QI)
5802 (choices
5803 dst16-3-S-R0l-direct-QI
5804 dst16-3-S-R0h-direct-QI
5805 dst16-3-S-8-8-SB-relative-QI
5806 dst16-3-S-8-8-FB-relative-QI
5807 dst16-3-S-8-16-absolute-QI
5808 )
5809 )
5811 (define-anyof-operand
5812 (name Dst16-3-S-16)
5813 (comment "m16c destination operand of size QI for short format insns")
5814 (attrs (machine 16))
5815 (mode QI)
5816 (choices
5817 dst16-3-S-R0l-direct-QI
5818 dst16-3-S-R0h-direct-QI
5819 dst16-3-S-16-8-SB-relative-QI
5820 dst16-3-S-16-8-FB-relative-QI
5821 dst16-3-S-16-16-absolute-QI
5822 )
5823 )
5825 (define-anyof-operand
5826 (name srcdst16-r0l-r0h-S)
5827 (comment "m16c r0l/r0h operand of size QI for short format insns")
5828 (attrs (machine 16))
5829 (mode SI)
5830 (choices
5831 srcdst16-r0l-r0h-S-derived
5832 )
5833 )
5835 (define-anyof-operand
5836 (name dst32-2-S-basic-QI)
5837 (comment "m32c r0l operand of size QI for short format binary insns")
5838 (attrs (machine 32))
5839 (mode QI)
5840 (choices
5841 dst32-2-S-R0l-direct-QI
5842 )
5843 )
5845 (define-anyof-operand
5846 (name dst32-2-S-basic-HI)
5847 (comment "m32c r0 operand of size HI for short format binary insns")
5848 (attrs (machine 32))
5849 (mode HI)
5850 (choices
5851 dst32-2-S-R0-direct-HI
5852 )
5853 )
5855 (define-pmacro (dst32-2-S-operands xmode)
5856 (begin
5857 (define-anyof-operand
5858 (name (.sym dst32-2-S-8- xmode))
5859 (comment "m32c operand of size " xmode " for short format binary insns")
5860 (attrs (machine 32))
5861 (mode xmode)
5862 (choices
5863 (.sym dst32-2-S-8-SB-relative- xmode)
5864 (.sym dst32-2-S-8-FB-relative- xmode)
5865 )
5866 )
5867 (define-anyof-operand
5868 (name (.sym dst32-2-S-16- xmode))
5869 (comment "m32c operand of size " xmode " for short format binary insns")
5870 (attrs (machine 32))
5871 (mode xmode)
5872 (choices
5873 (.sym dst32-2-S-16-absolute- xmode)
5874 )
5875 )
5876 ; (define-anyof-operand
5877 ; (name (.sym dst32-2-S-8-indirect- xmode))
5878 ; (comment "m32c operand of size " xmode " for short format binary insns")
5879 ; (attrs (machine 32))
5880 ; (mode xmode)
5881 ; (choices
5882 ; (.sym dst32-2-S-8-SB-relative-indirect- xmode)
5883 ; (.sym dst32-2-S-8-FB-relative-indirect- xmode)
5884 ; )
5885 ; )
5886 ; (define-anyof-operand
5887 ; (name (.sym dst32-2-S-absolute-indirect- xmode))
5888 ; (comment "m32c operand of size " xmode " for short format binary insns")
5889 ; (attrs (machine 32))
5890 ; (mode xmode)
5891 ; (choices
5892 ; (.sym dst32-2-S-16-absolute-indirect- xmode)
5893 ; )
5894 ; )
5895 )
5896 )
5898 (dst32-2-S-operands QI)
5899 (dst32-2-S-operands HI)
5900 (dst32-2-S-operands SI)
5902 (define-anyof-operand
5903 (name dst32-an-S)
5904 (comment "m32c An operand for short format binary insns")
5905 (attrs (machine 32))
5906 (mode HI)
5907 (choices
5908 dst32-1-S-A0-direct-HI
5909 dst32-1-S-A1-direct-HI
5910 )
5911 )
5913 (define-anyof-operand
5914 (name bit16-11-S)
5915 (comment "m16c bit operand for short format insns")
5916 (attrs (machine 16))
5917 (mode BI)
5918 (choices
5919 bit16-11-SB-relative-S
5920 )
5921 )
5923 (define-anyof-operand
5924 (name Rn16-push-S-anyof)
5925 (comment "m16c bit operand for short format insns")
5926 (attrs (machine 16))
5927 (mode QI)
5928 (choices
5929 Rn16-push-S-derived
5930 )
5931 )
5933 (define-anyof-operand
5934 (name An16-push-S-anyof)
5935 (comment "m16c bit operand for short format insns")
5936 (attrs (machine 16))
5937 (mode HI)
5938 (choices
5939 An16-push-S-derived
5940 )
5941 )
5943 ;=============================================================
5944 ; Common macros for instruction definitions
5945 ;
5946 (define-pmacro (set-z x)
5947 (sequence ()
5948 (set zbit (zflag x)))
5950 )
5952 (define-pmacro (set-s x)
5953 (sequence ()
5954 (set sbit (nflag x)))
5955 )
5957 (define-pmacro (set-z-and-s x)
5958 (sequence ()
5959 (set-z x)
5960 (set-s x))
5961 )
5962 \f
5963 ;=============================================================
5964 ; Unary insn macros
5965 ;-------------------------------------------------------------
5967 (define-pmacro (unary-insn-defn-g mach group mode wstr op encoding sem opg)
5968 (dni (.sym op mach wstr - group)
5969 (.str op wstr opg " dst" mach "-" group "-" mode)
5970 ((machine mach) RL_1ADDR)
5971 (.str op wstr opg " ${dst" mach "-" group "-" mode "}")
5972 encoding
5973 (sem mode (.sym dst mach - group - mode))
5974 ())
5975 )
5977 (define-pmacro (unary-insn-defn mach group mode wstr op encoding sem)
5978 (unary-insn-defn-g mach group mode wstr op encoding sem "")
5979 )
5982 (define-pmacro (unary16-defn-g mode wstr wbit op opc1 opc2 opc3 sem opg)
5983 (unary-insn-defn-g 16 16 mode wstr op
5984 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16- mode))
5985 sem opg)
5986 )
5987 (define-pmacro (unary16-defn mode wstr wbit op opc1 opc2 opc3 sem)
5988 (unary-16-defn-g mode wstr wbit op opc1 opc2 opc3 sem "")
5989 )
5991 (define-pmacro (unary32-defn-g mode wstr wbit op opc1 opc2 opc3 sem opg)
5992 (begin
5993 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
5994 ; define the absolute-indirect insns first in order to prevent them from being selected
5995 ; when the mode is register-indirect
5996 ; (unary-insn-defn 32 24-absolute-indirect mode wstr op
5997 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) (f-20-4 opc3))
5998 ; sem)
5999 (unary-insn-defn-g 32 16-Unprefixed mode wstr op
6000 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3))
6001 sem opg)
6002 ; (unary-insn-defn 32 24-indirect mode wstr op
6003 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-indirect- mode) (f-18-2 opc2) (f-20-4 opc3))
6004 ; sem)
6005 )
6006 )
6007 (define-pmacro (unary32-defn mode wstr wbit op opc1 opc2 opc3 sem)
6008 (unary32-defn-g mode wstr wbit op opc1 opc2 opc3 sem "")
6009 )
6011 (define-pmacro (unary-insn-mach-g mach op opc1 opc2 opc3 sem opg)
6012 (begin
6013 (.apply (.sym unary mach -defn-g) (QI .b 0 op opc1 opc2 opc3 sem opg))
6014 (.apply (.sym unary mach -defn-g) (HI .w 1 op opc1 opc2 opc3 sem opg))
6015 )
6016 )
6017 (define-pmacro (unary-insn-mach mach op opc1 opc2 opc3 sem)
6018 (unary-insn-mach-g mach op opc1 opc2 opc3 sem "")
6019 )
6021 (define-pmacro (unary-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6022 (begin
6023 (unary-insn-mach-g 16 op opc16-1 opc16-2 opc16-3 sem "")
6024 (unary-insn-mach-g 32 op opc32-1 opc32-2 opc32-3 sem "")
6025 )
6026 )
6028 (define-pmacro (unary-insn-g op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6029 (begin
6030 (unary-insn-mach-g 16 op opc16-1 opc16-2 opc16-3 sem "$G")
6031 (unary-insn-mach-g 32 op opc32-1 opc32-2 opc32-3 sem "$G")
6032 )
6033 )
6035 ;-------------------------------------------------------------
6036 ; Sign/zero extension macros
6037 ;-------------------------------------------------------------
6039 (define-pmacro (ext-insn-defn mach group smode dmode wstr op encoding sem)
6040 (dni (.sym op mach wstr - group)
6041 (.str op wstr " dst" mach "-" group "-" smode)
6042 ((machine mach))
6043 (.str op wstr " ${dst" mach "-" group "-" smode "}")
6044 encoding
6045 (sem smode dmode (.sym dst mach - group - smode) (.sym dst mach - group - smode))
6046 ())
6047 )
6049 (define-pmacro (ext16-defn smode dmode wstr wbit op opc1 opc2 opc3 sem)
6050 (ext-insn-defn 16 16-Ext smode dmode wstr op
6051 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-Ext- smode))
6052 sem)
6053 )
6055 (define-pmacro (ext32-defn smode dmode wstr wbit op opc1 opc2 opc3 sem)
6056 (ext-insn-defn 32 16-ExtUnprefixed smode dmode wstr op
6057 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst32-16-ExtUnprefixed- smode))
6058 sem)
6059 )
6061 (define-pmacro (ext32-binary-insn src-group dst-group op wstr encoding sem)
6062 (dni (.sym op 32 wstr - src-group - dst-group)
6063 (.str op 32 wstr " src32-" src-group "-QI,dst32-" dst-group "-HI")
6064 ((machine 32))
6065 (.str op wstr " ${src32-" src-group "-QI},${dst32-" dst-group "-HI}")
6066 encoding
6067 (sem QI HI (.sym src32- src-group -QI) (.sym dst32 - dst-group -HI))
6068 ())
6069 )
6071 (define-pmacro (ext32-binary-defn op wstr opc1 opc2 sem)
6072 (begin
6073 (ext32-binary-insn basic-ExtPrefixed 24-Prefixed op wstr
6074 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-basic-ExtPrefixed-QI dst32-24-Prefixed-HI (f-20-4 opc2))
6075 sem)
6076 (ext32-binary-insn 24-24-Prefixed 48-Prefixed op wstr
6077 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-24-Prefixed-QI dst32-48-Prefixed-HI (f-20-4 opc2))
6078 sem)
6079 (ext32-binary-insn 24-16-Prefixed 40-Prefixed op wstr
6080 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-16-Prefixed-QI dst32-40-Prefixed-HI (f-20-4 opc2))
6081 sem)
6082 (ext32-binary-insn 24-8-Prefixed 32-Prefixed op wstr
6083 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-8-Prefixed-QI dst32-32-Prefixed-HI (f-20-4 opc2))
6084 sem)
6085 )
6086 )
6088 ;=============================================================
6089 ; Binary Arithmetic macros
6090 ;
6091 ;-------------------------------------------------------------
6092 ;<arith>.size:S src2,r0[l] -- for m32c
6093 ;-------------------------------------------------------------
6095 (define-pmacro (binary-arith32-S-src2 op xmode wstr wbit opc1 opc2 sem)
6096 (dni (.sym op 32 wstr .S-src2-r0- xmode)
6097 (.str op 32 wstr ":S src2,r0[l]")
6098 ((machine 32))
6099 (.str op wstr"$S ${src32-2-S-" xmode "},${Dst32R0" xmode "-S}")
6100 (+ opc1 opc2 (.sym src32-2-S- xmode) (f-7-1 wbit))
6101 (sem xmode (.sym src32-2-S- xmode) (.sym Dst32R0 xmode -S))
6102 ())
6103 )
6105 ;-------------------------------------------------------------
6106 ;<arith>.b:S src2,r0l/r0h -- for m16c
6107 ;-------------------------------------------------------------
6109 (define-pmacro (binary-arith16-b-S-src2 op opc1 opc2 sem)
6110 (begin
6111 (dni (.sym op 16 .b.S-src2)
6112 (.str op ".b:S src2,r0[lh]")
6113 ((machine 16))
6114 (.str op ".b$S ${src16-2-S},${Dst16RnQI-S}")
6115 (+ opc1 opc2 Dst16RnQI-S src16-2-S)
6116 (sem QI src16-2-S Dst16RnQI-S)
6117 ())
6118 (dni (.sym op 16 .b.S-r0l-r0h)
6119 (.str op ".b:S r0l/r0h")
6120 ((machine 16))
6121 (.str op ".b$S ${srcdst16-r0l-r0h-S}")
6122 (+ opc1 opc2 srcdst16-r0l-r0h-S)
6123 (if (eq srcdst16-r0l-r0h-S 0)
6124 (sem QI R0h R0l)
6125 (sem QI R0l R0h))
6126 ())
6127 )
6128 )
6130 ;-------------------------------------------------------------
6131 ;<arith>.b:S #imm8,dst3 -- for m16c
6132 ;-------------------------------------------------------------
6134 (define-pmacro (binary-arith16-b-S-imm8-dst3 op sz opc1 opc2 sem)
6135 (dni (.sym op 16 .b.S-imm8-dst3)
6136 (.str op sz ":S imm8,dst3")
6137 ((machine 16))
6138 (.str op sz "$S #${Imm-8-QI},${Dst16-3-S-16}")
6139 (+ opc1 opc2 Dst16-3-S-16 Imm-8-QI)
6140 (sem QI Imm-8-QI Dst16-3-S-16)
6141 ())
6142 )
6144 ;-------------------------------------------------------------
6145 ;<arith>.size:Q #imm4,sp -- for m16c
6146 ;-------------------------------------------------------------
6148 (define-pmacro (binary-arith16-Q-sp op opc1 opc2 opc3 sem)
6149 (dni (.sym op 16 -wQ-sp)
6150 (.str op ".w:q #imm4,sp")
6151 ((machine 16))
6152 (.str op ".w$Q #${Imm-12-s4},sp")
6153 (+ opc1 opc2 opc3 Imm-12-s4)
6154 (sem QI Imm-12-s4 sp)
6155 ())
6156 )
6158 ;-------------------------------------------------------------
6159 ;<arith>.size:G #imm,sp -- for m16c
6160 ;-------------------------------------------------------------
6162 (define-pmacro (binary-arith16-G-sp-defn mode wstr wbit op opc1 opc2 opc3 opc4 sem)
6163 (dni (.sym op 16 wstr - G-sp)
6164 (.str op wstr " imm-sp " mode)
6165 ((machine 16))
6166 (.str op wstr "$G #${Imm-16-" mode "},sp")
6167 (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16- mode))
6168 (sem mode (.sym Imm-16- mode) sp)
6169 ())
6170 )
6172 (define-pmacro (binary-arith16-G-sp op opc1 opc2 opc3 opc4 sem)
6173 (begin
6174 (binary-arith16-G-sp-defn QI .b 0 op opc1 opc2 opc3 opc4 sem)
6175 (binary-arith16-G-sp-defn HI .w 1 op opc1 opc2 opc3 opc4 sem)
6176 )
6177 )
6179 ;-------------------------------------------------------------
6180 ;<arith>.size:G #imm,dst -- for m16c and m32c
6181 ;-------------------------------------------------------------
6183 (define-pmacro (binary-arith-imm-dst-defn mach src dstgroup dmode wstr op suffix encoding sem)
6184 (dni (.sym op mach wstr - imm-G - dstgroup)
6185 (.str op wstr " " mach "-imm-G-" dstgroup "-" dmode)
6186 ((machine mach) RL_1ADDR)
6187 (.str op wstr "$"suffix " #${" src "},${dst" mach "-" dstgroup "-" dmode "}")
6188 encoding
6189 (sem dmode src (.sym dst mach - dstgroup - dmode))
6190 ())
6191 )
6193 ; m16c variants
6194 (define-pmacro (binary-arith16-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6195 (begin
6196 (binary-arith-imm-dst-defn 16 (.sym Imm-32- smode) 16-16 dmode wstr op suffix
6197 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- dmode) (.sym Imm-32- smode))
6198 sem)
6199 (binary-arith-imm-dst-defn 16 (.sym Imm-24- smode) 16-8 dmode wstr op suffix
6200 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- dmode) (.sym Imm-24- smode))
6201 sem)
6202 (binary-arith-imm-dst-defn 16 (.sym Imm-16- smode) basic dmode wstr op suffix
6203 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- dmode) (.sym Imm-16- smode))
6204 sem)
6205 )
6206 )
6208 ; m32c Unprefixed variants
6209 (define-pmacro (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6210 (begin
6211 (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 16-24-Unprefixed dmode wstr op suffix
6212 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-24-Unprefixed- dmode) (.sym Imm-40- smode))
6213 sem)
6214 (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 16-16-Unprefixed dmode wstr op suffix
6215 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-16-Unprefixed- dmode) (.sym Imm-32- smode))
6216 sem)
6217 (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) 16-8-Unprefixed dmode wstr op suffix
6218 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-8-Unprefixed- dmode) (.sym Imm-24- smode))
6219 sem)
6220 (binary-arith-imm-dst-defn 32 (.sym Imm-16- smode) basic-Unprefixed dmode wstr op suffix
6221 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-basic-Unprefixed- dmode) (.sym Imm-16- smode))
6222 sem)
6223 )
6224 )
6226 ; m32c Prefixed variants
6227 (define-pmacro (binary-arith32-imm-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6228 (begin
6229 (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-Prefixed dmode wstr op suffix
6230 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-Prefixed- dmode) (.sym Imm-48- smode))
6231 sem)
6232 (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-Prefixed dmode wstr op suffix
6233 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-Prefixed- dmode) (.sym Imm-40- smode))
6234 sem)
6235 (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-Prefixed dmode wstr op suffix
6236 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-Prefixed- dmode) (.sym Imm-32- smode))
6237 sem)
6238 (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-Prefixed dmode wstr op suffix
6239 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-Prefixed- dmode) (.sym Imm-24- smode))
6240 sem)
6241 )
6242 )
6244 ; All m32c variants
6245 (define-pmacro (binary-arith32-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6246 (begin
6247 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6248 ; define the absolute-indirect insns first in order to prevent them from being selected
6249 ; when the mode is register-indirect
6250 ; (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-absolute-indirect dmode wstr op suffix
6251 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-absolute-indirect- dmode) (.sym Imm-48- smode))
6252 ; sem)
6253 ; (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-absolute-indirect dmode wstr op suffix
6254 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-absolute-indirect- dmode) (.sym Imm-40- smode))
6255 ; sem)
6256 ; Unprefixed modes next
6257 (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6259 ; Remaining indirect modes
6260 ; (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-indirect dmode wstr op suffix
6261 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-indirect- dmode) (.sym Imm-24- smode))
6262 ; sem)
6263 ; (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-indirect dmode wstr op suffix
6264 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-indirect- dmode) (.sym Imm-48- smode))
6265 ; sem)
6266 ; (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-indirect dmode wstr op suffix
6267 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-indirect- dmode) (.sym Imm-40- smode))
6268 ; sem)
6269 ; (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-indirect dmode wstr op suffix
6270 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-indirect- dmode) (.sym Imm-32- smode))
6271 ; sem)
6272 )
6273 )
6275 (define-pmacro (binary-arith-imm-dst-mach mach op suffix opc1 opc2 opc3 sem)
6276 (begin
6277 (.apply (.sym binary-arith mach -imm-dst-defn) (QI QI .b 0 op suffix opc1 opc2 opc3 sem))
6278 (.apply (.sym binary-arith mach -imm-dst-defn) (HI HI .w 1 op suffix opc1 opc2 opc3 sem))
6279 )
6280 )
6282 (define-pmacro (binary-arith-imm-dst op suffix opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6283 (begin
6284 (binary-arith-imm-dst-mach 16 op suffix opc16-1 opc16-2 opc16-3 sem)
6285 (binary-arith-imm-dst-mach 32 op suffix opc32-1 opc32-2 opc32-3 sem)
6286 )
6287 )
6289 ;-------------------------------------------------------------
6290 ;<arith>.size:Q #imm4,dst -- for m16c and m32c
6291 ;-------------------------------------------------------------
6293 (define-pmacro (binary-arith-imm4-dst-defn mach src dstgroup mode wstr op encoding sem)
6294 (dni (.sym op mach wstr - imm4-Q - dstgroup)
6295 (.str op wstr " " mach "-imm4-Q-" dstgroup "-" mode)
6296 ((machine mach) RL_1ADDR)
6297 (.str op wstr "$Q #${" src "},${dst" mach "-" dstgroup "-" mode "}")
6298 encoding
6299 (sem mode src (.sym dst mach - dstgroup - mode))
6300 ())
6301 )
6303 ; m16c variants
6304 (define-pmacro (binary-arith16-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6305 (binary-arith-imm4-dst-defn 16 Imm-8-s4 16 mode wstr op
6306 (+ opc1 opc2 (f-7-1 wbit2) Imm-8-s4 (.sym dst16-16- mode))
6307 sem)
6308 )
6310 (define-pmacro (binary-arith16-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6311 (binary-arith-imm4-dst-defn 16 Imm-sh-8-s4 16 mode wstr op
6312 (+ opc1 opc2 (f-7-1 wbit2) Imm-sh-8-s4 (.sym dst16-16- mode))
6313 sem)
6314 )
6316 ; m32c variants
6317 (define-pmacro (binary-arith32-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6318 (begin
6319 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6320 ; define the absolute-indirect insns first in order to prevent them from being selected
6321 ; when the mode is register-indirect
6322 ; (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-absolute-indirect mode wstr op
6323 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-20-s4)
6324 ; sem)
6325 (binary-arith-imm4-dst-defn 32 Imm-12-s4 16-Unprefixed mode wstr op
6326 (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4)
6327 sem)
6328 ; (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-indirect mode wstr op
6329 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-20-s4)
6330 ; sem)
6331 )
6332 )
6334 (define-pmacro (binary-arith32-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6335 (begin
6336 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6337 ; define the absolute-indirect insns first in order to prevent them from being selected
6338 ; when the mode is register-indirect
6339 ; (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-absolute-indirect mode wstr op
6340 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4)
6341 ; sem)
6342 (binary-arith-imm4-dst-defn 32 Imm-sh-12-s4 16-Unprefixed mode wstr op
6343 (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-sh-12-s4)
6344 sem)
6345 ; (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-indirect mode wstr op
6346 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4)
6347 ; sem)
6348 )
6349 )
6351 (define-pmacro (binary-arith-imm4-dst-mach mach op opc1 opc2 sem)
6352 (begin
6353 (.apply (.sym binary-arith mach -imm4-dst-defn) (QI .b 0 0 op opc1 opc2 sem))
6354 (.apply (.sym binary-arith mach -imm4-dst-defn) (HI .w 0 1 op opc1 opc2 sem))
6355 )
6356 )
6358 (define-pmacro (binary-arith-imm4-dst op opc16-1 opc16-2 opc32-1 opc32-2 sem)
6359 (begin
6360 (binary-arith-imm4-dst-mach 16 op opc16-1 opc16-2 sem)
6361 (binary-arith-imm4-dst-mach 32 op opc32-1 opc32-2 sem)
6362 )
6363 )
6365 ;-------------------------------------------------------------
6366 ;<arith>.size:G src,dst -- for m16c and m32c
6367 ;-------------------------------------------------------------
6369 (define-pmacro (binary-arith-src-dst-defn mach srcgroup dstgroup smode dmode wstr op suffix encoding sem)
6370 (dni (.sym op mach wstr - srcgroup - dstgroup)
6371 (.str op wstr " dst" mach "-" srcgroup "-" dstgroup "-" dmode)
6372 ((machine mach) RL_2ADDR)
6373 (.str op wstr "$" suffix " ${src" mach "-" srcgroup "-" smode "},${dst" mach "-" dstgroup "-" dmode "}")
6374 encoding
6375 (sem dmode (.sym src mach - srcgroup - smode) (.sym dst mach - dstgroup - dmode))
6376 ())
6377 )
6379 ; m16c variants
6380 (define-pmacro (binary-arith16-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem)
6381 (begin
6382 (binary-arith-src-dst-defn 16 basic 16 smode dmode wstr op suffix
6383 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-basic- smode) (.sym dst16-16- dmode))
6384 sem)
6385 (binary-arith-src-dst-defn 16 16-16 32 smode dmode wstr op suffix
6386 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-16- smode) (.sym dst16-32- dmode))
6387 sem)
6388 (binary-arith-src-dst-defn 16 16-8 24 smode dmode wstr op suffix
6389 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-8- smode) (.sym dst16-24- dmode))
6390 sem)
6391 )
6392 )
6394 ; m32c Prefixed variants
6395 (define-pmacro (binary-arith32-src-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 sem)
6396 (begin
6397 (binary-arith-src-dst-defn 32 basic-Prefixed 24-Prefixed smode dmode wstr op suffix
6398 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-basic-Prefixed- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2))
6399 sem)
6400 (binary-arith-src-dst-defn 32 24-24-Prefixed 48-Prefixed smode dmode wstr op suffix
6401 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6402 sem)
6403 (binary-arith-src-dst-defn 32 24-16-Prefixed 40-Prefixed smode dmode wstr op suffix
6404 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6405 sem)
6406 (binary-arith-src-dst-defn 32 24-8-Prefixed 32-Prefixed smode dmode wstr op suffix
6407 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2))
6408 sem)
6409 )
6410 )
6412 ; all m32c variants
6413 (define-pmacro (binary-arith32-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem)
6414 (begin
6415 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6416 ; define the absolute-indirect insns first in order to prevent them from being selected
6417 ; when the mode is register-indirect
6418 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-absolute-indirect smode dmode wstr op suffix
6419 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6420 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6421 ; sem)
6422 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-absolute-indirect smode dmode wstr op suffix
6423 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6424 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6425 ; sem)
6426 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-Prefixed smode dmode wstr op suffix
6427 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6428 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6429 ; sem)
6430 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-Prefixed smode dmode wstr op suffix
6431 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6432 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6433 ; sem)
6434 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-indirect smode dmode wstr op suffix
6435 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6436 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6437 ; sem)
6438 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-indirect smode dmode wstr op suffix
6439 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6440 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6441 ; sem)
6442 ; (binary-arith-src-dst-defn 32 basic-Prefixed 24-absolute-indirect smode dmode wstr op suffix
6443 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6444 ; (.sym src32-basic-Prefixed- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2))
6445 ; sem)
6446 ; (binary-arith-src-dst-defn 32 24-24-Prefixed 48-absolute-indirect smode dmode wstr op suffix
6447 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6448 ; (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6449 ; sem)
6450 ; (binary-arith-src-dst-defn 32 24-16-Prefixed 40-absolute-indirect smode dmode wstr op suffix
6451 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6452 ; (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6453 ; sem)
6454 ; (binary-arith-src-dst-defn 32 24-8-Prefixed 32-absolute-indirect smode dmode wstr op suffix
6455 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6456 ; (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2))
6457 ; sem)
6458 ; (binary-arith-src-dst-defn 32 basic-indirect 24-absolute-indirect smode dmode wstr op suffix
6459 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6460 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2))
6461 ; sem)
6462 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-absolute-indirect smode dmode wstr op suffix
6463 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6464 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6465 ; sem)
6466 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-absolute-indirect smode dmode wstr op suffix
6467 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6468 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6469 ; sem)
6470 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-absolute-indirect smode dmode wstr op suffix
6471 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6472 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2))
6473 ; sem)
6474 (binary-arith-src-dst-defn 32 basic-Unprefixed 16-Unprefixed smode dmode wstr op suffix
6475 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-basic-Unprefixed- smode) (.sym dst32-16-Unprefixed- dmode) (f-12-4 opc2))
6476 sem)
6477 (binary-arith-src-dst-defn 32 16-24-Unprefixed 40-Unprefixed smode dmode wstr op suffix
6478 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-24-Unprefixed- smode) (.sym dst32-40-Unprefixed- dmode) (f-12-4 opc2))
6479 sem)
6480 (binary-arith-src-dst-defn 32 16-16-Unprefixed 32-Unprefixed smode dmode wstr op suffix
6481 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-16-Unprefixed- smode) (.sym dst32-32-Unprefixed- dmode) (f-12-4 opc2))
6482 sem)
6483 (binary-arith-src-dst-defn 32 16-8-Unprefixed 24-Unprefixed smode dmode wstr op suffix
6484 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-8-Unprefixed- smode) (.sym dst32-24-Unprefixed- dmode) (f-12-4 opc2))
6485 sem)
6486 ; (binary-arith-src-dst-defn 32 basic-indirect 24-Prefixed smode dmode wstr op suffix
6487 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6488 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2))
6489 ; sem)
6490 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-Prefixed smode dmode wstr op suffix
6491 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6492 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6493 ; sem)
6494 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-Prefixed smode dmode wstr op suffix
6495 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6496 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6497 ; sem)
6498 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-Prefixed smode dmode wstr op suffix
6499 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6500 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2))
6501 ; sem)
6502 ; (binary-arith-src-dst-defn 32 basic-Prefixed 24-indirect smode dmode wstr op suffix
6503 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6504 ; (.sym src32-basic-Prefixed- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2))
6505 ; sem)
6506 ; (binary-arith-src-dst-defn 32 24-24-Prefixed 48-indirect smode dmode wstr op suffix
6507 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6508 ; (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6509 ; sem)
6510 ; (binary-arith-src-dst-defn 32 24-16-Prefixed 40-indirect smode dmode wstr op suffix
6511 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6512 ; (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6513 ; sem)
6514 ; (binary-arith-src-dst-defn 32 24-8-Prefixed 32-indirect smode dmode wstr op suffix
6515 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6516 ; (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2))
6517 ; sem)
6518 ; (binary-arith-src-dst-defn 32 basic-indirect 24-indirect smode dmode wstr op suffix
6519 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6520 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2))
6521 ; sem)
6522 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-indirect smode dmode wstr op suffix
6523 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6524 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6525 ; sem)
6526 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-indirect smode dmode wstr op suffix
6527 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6528 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6529 ; sem)
6530 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-indirect smode dmode wstr op suffix
6531 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6532 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2))
6533 ; sem)
6534 )
6535 )
6537 (define-pmacro (binary-arith-src-dst-mach mach op suffix opc1 opc2 sem)
6538 (begin
6539 (.apply (.sym binary-arith mach -src-dst-defn) (QI QI .b 0 op suffix opc1 opc2 sem))
6540 (.apply (.sym binary-arith mach -src-dst-defn) (HI HI .w 1 op suffix opc1 opc2 sem))
6541 )
6542 )
6544 (define-pmacro (binary-arith-src-dst op suffix opc16-1 opc16-2 opc32-1 opc32-2 sem)
6545 (begin
6546 (binary-arith-src-dst-mach 16 op suffix opc16-1 opc16-2 sem)
6547 (binary-arith-src-dst-mach 32 op suffix opc32-1 opc32-2 sem)
6548 )
6549 )
6551 ;-------------------------------------------------------------
6552 ;<arith>.size:S #imm,dst -- for m32c
6553 ;-------------------------------------------------------------
6555 (define-pmacro (binary-arith32-s-imm-dst-defn src dstgroup mode wstr op encoding sem)
6556 (dni (.sym op 32 wstr - imm-S - dstgroup)
6557 (.str op wstr " 32-imm-S-" dstgroup "-" mode)
6558 ((machine 32))
6559 (.str op wstr "$S #${" src "},${dst32-" dstgroup "-" mode "}")
6560 encoding
6561 (sem mode src (.sym dst32- dstgroup - mode))
6562 ())
6563 )
6565 (define-pmacro (binary-arith32-z-imm-dst-defn src dstgroup mode wstr op encoding sem)
6566 (dni (.sym op 32 wstr - imm-Z - dstgroup)
6567 (.str op wstr " 32-imm-Z-" dstgroup "-" mode)
6568 ((machine 32))
6569 (.str op wstr "$Z #0,${dst32-" dstgroup "-" mode "}")
6570 encoding
6571 (sem mode (const 0) (.sym dst32- dstgroup - mode))
6572 ())
6573 )
6575 (define-pmacro (binary-arith32-s-imm-dst mode wstr wbit op opc1 opc2 sem)
6576 (begin
6577 ; (binary-arith32-s-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op
6578 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode))
6579 ; sem)
6580 (binary-arith32-s-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op
6581 (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-8- mode))
6582 sem)
6583 (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op
6584 (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-24- mode))
6585 sem)
6586 (binary-arith32-s-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op
6587 (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-16- mode))
6588 sem)
6589 ; (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op
6590 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode))
6591 ; sem)
6592 )
6593 )
6595 (define-pmacro (binary-arith32-z-imm-dst mode wstr wbit op opc1 opc2 sem)
6596 (begin
6597 ; (binary-arith32-z-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op
6598 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode))
6599 ; sem)
6600 (binary-arith32-z-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op
6601 (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit))
6602 sem)
6603 (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op
6604 (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit))
6605 sem)
6606 (binary-arith32-z-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op
6607 (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit))
6608 sem)
6609 ; (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op
6610 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode))
6611 ; sem)
6612 )
6613 )
6615 ;-------------------------------------------------------------
6616 ;<arith>.L:S #imm1,An -- for m32c
6617 ;-------------------------------------------------------------
6619 (define-pmacro (binary-arith32-l-s-imm1-an op opc1 opc2 sem)
6620 (begin
6621 (dni (.sym op 32.l-s-imm1-S-an)
6622 (.str op ".l 32-imm1-S-an")
6623 ((machine 32))
6624 (.str op ".l$S #${Imm1-S},${dst32-an-S}")
6625 (+ opc1 Imm1-S opc2 dst32-an-S)
6626 (sem SI Imm1-S dst32-an-S)
6627 ())
6628 )
6629 )
6631 ;-------------------------------------------------------------
6632 ;<arith>.L:Q #imm3,sp -- for m32c
6633 ;-------------------------------------------------------------
6635 (define-pmacro (binary-arith32-l-q-imm3-sp op opc1 opc2 sem)
6636 (begin
6637 (dni (.sym op 32.l-imm3-Q)
6638 (.str op ".l 32-imm3-Q")
6639 ((machine 32))
6640 (.str op ".l$Q #${Imm3-S},sp")
6641 (+ opc1 Imm3-S opc2)
6642 (sem SI Imm3-S sp)
6643 ())
6644 )
6645 )
6647 ;-------------------------------------------------------------
6648 ;<arith>.L:S #imm8,sp -- for m32c
6649 ;-------------------------------------------------------------
6651 (define-pmacro (binary-arith32-l-s-imm8-sp op opc1 opc2 opc3 opc4 sem)
6652 (begin
6653 (dni (.sym op 32.l-imm8-S)
6654 (.str op ".l 32-imm8-S")
6655 ((machine 32))
6656 (.str op ".l$S #${Imm-16-QI},sp")
6657 (+ opc1 opc2 opc3 opc4 Imm-16-QI)
6658 (sem SI Imm-16-QI sp)
6659 ())
6660 )
6661 )
6663 ;-------------------------------------------------------------
6664 ;<arith>.L:G #imm16,sp -- for m32c
6665 ;-------------------------------------------------------------
6667 (define-pmacro (binary-arith32-l-g-imm16-sp op opc1 opc2 opc3 opc4 sem)
6668 (begin
6669 (dni (.sym op 32.l-imm16-G)
6670 (.str op ".l 32-imm16-G")
6671 ((machine 32))
6672 (.str op ".l$G #${Imm-16-HI},sp")
6673 (+ opc1 opc2 opc3 opc4 Imm-16-HI)
6674 (sem SI Imm-16-HI sp)
6675 ())
6676 )
6677 )
6679 ;-------------------------------------------------------------
6680 ;<arith>jnz.size #imm4,dst,label -- for m16c and m32c
6681 ;-------------------------------------------------------------
6683 (define-pmacro (arith-jnz-imm4-dst-defn mach src dstgroup label mode wstr op encoding sem)
6684 (dni (.sym op mach wstr - imm4 - dstgroup)
6685 (.str op wstr " " mach "-imm4-" dstgroup "-" label "-" mode)
6686 (RL_JUMP RELAXABLE (machine mach))
6687 (.str op wstr " #${" src "},${dst" mach "-" dstgroup "-" mode "},${" label "}")
6688 encoding
6689 (sem mode src (.sym dst mach - dstgroup - mode) label)
6690 ())
6691 )
6693 ; m16c variants
6694 (define-pmacro (arith-jnz16-imm4-dst-defn mode wstr wbit op i4n opc1 opc2 sem)
6695 (begin
6696 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) basic Lab-16-8 mode wstr op
6697 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-basic- mode) Lab-16-8)
6698 sem)
6699 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-16 Lab-32-8 mode wstr op
6700 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-16- mode) Lab-32-8)
6701 sem)
6702 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-8 Lab-24-8 mode wstr op
6703 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-8- mode) Lab-24-8)
6704 sem)
6705 )
6706 )
6708 ; m32c variants
6709 (define-pmacro (arith-jnz32-imm4-dst-defn mode wstr wbit op i4n opc1 opc2 sem)
6710 (begin
6711 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) basic-Unprefixed Lab-16-8 mode wstr op
6712 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-16-8)
6713 sem)
6714 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-24-Unprefixed Lab-40-8 mode wstr op
6715 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-40-8)
6716 sem)
6717 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-16-Unprefixed Lab-32-8 mode wstr op
6718 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-32-8)
6719 sem)
6720 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-8-Unprefixed Lab-24-8 mode wstr op
6721 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-24-8)
6722 sem)
6723 )
6724 )
6726 (define-pmacro (arith-jnz-imm4-dst-mach mach op i4n opc1 opc2 sem)
6727 (begin
6728 (.apply (.sym arith-jnz mach -imm4-dst-defn) (QI .b 0 op i4n opc1 opc2 sem))
6729 (.apply (.sym arith-jnz mach -imm4-dst-defn) (HI .w 1 op i4n opc1 opc2 sem))
6730 )
6731 )
6733 (define-pmacro (arith-jnz-imm4-dst op i4n opc16-1 opc16-2 opc32-1 opc32-2 sem)
6734 (begin
6735 (arith-jnz-imm4-dst-mach 16 op i4n opc16-1 opc16-2 sem)
6736 (arith-jnz-imm4-dst-mach 32 op i4n opc32-1 opc32-2 sem)
6737 )
6738 )
6740 ;-------------------------------------------------------------
6741 ;mov.size dsp8[sp],dst -- for m16c and m32c
6742 ;-------------------------------------------------------------
6743 (define-pmacro (mov-dspsp-dst-defn mach dstgroup dsp mode wstr op encoding sem)
6744 (dni (.sym op mach wstr -dspsp-dst- dstgroup)
6745 (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
6746 ((machine mach))
6747 (.str op wstr "$G ${" dsp "}[sp],${dst" mach "-" dstgroup "-" mode "}")
6748 encoding
6749 (sem mach mode dsp (.sym dst mach - dstgroup - mode))
6750 ())
6751 )
6752 (define-pmacro (mov-src-dspsp-defn mach dstgroup dsp mode wstr op encoding sem)
6753 (dni (.sym op mach wstr -dst-dspsp- dstgroup)
6754 (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
6755 ((machine mach))
6756 (.str op wstr "$G ${dst" mach "-" dstgroup "-" mode "},${" dsp "}[sp]")
6757 encoding
6758 (sem mach mode (.sym dst mach - dstgroup - mode) dsp)
6759 ())
6760 )
6762 ; m16c variants
6763 (define-pmacro (mov16-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem)
6764 (begin
6765 (mov-dspsp-dst-defn 16 basic Dsp-16-s8 mode wstr op
6766 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8)
6767 sem)
6768 (mov-dspsp-dst-defn 16 16-16 Dsp-32-s8 mode wstr op
6769 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8)
6770 sem)
6771 (mov-dspsp-dst-defn 16 16-8 Dsp-24-s8 mode wstr op
6772 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8)
6773 sem)
6774 )
6775 )
6777 (define-pmacro (mov16-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem)
6778 (begin
6779 (mov-src-dspsp-defn 16 basic Dsp-16-s8 mode wstr op
6780 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8)
6781 sem)
6782 (mov-src-dspsp-defn 16 16-16 Dsp-32-s8 mode wstr op
6783 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8)
6784 sem)
6785 (mov-src-dspsp-defn 16 16-8 Dsp-24-s8 mode wstr op
6786 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8)
6787 sem)
6788 )
6789 )
6791 ; m32c variants
6792 (define-pmacro (mov32-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem)
6793 (begin
6794 (mov-dspsp-dst-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op
6795 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8)
6796 sem)
6797 (mov-dspsp-dst-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op
6798 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8)
6799 sem)
6800 (mov-dspsp-dst-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op
6801 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8)
6802 sem)
6803 (mov-dspsp-dst-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op
6804 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8)
6805 sem)
6806 )
6807 )
6808 (define-pmacro (mov32-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem)
6809 (begin
6810 (mov-src-dspsp-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op
6811 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8)
6812 sem)
6813 (mov-src-dspsp-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op
6814 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8)
6815 sem)
6816 (mov-src-dspsp-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op
6817 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8)
6818 sem)
6819 (mov-src-dspsp-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op
6820 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8)
6821 sem)
6822 )
6823 )
6825 (define-pmacro (mov-src-dspsp-mach mach op opc1 opc2 opc3 sem)
6826 (begin
6827 (.apply (.sym mov mach -src-dspsp-defn) (QI .b 0 op opc1 opc2 opc3 sem))
6828 (.apply (.sym mov mach -src-dspsp-defn) (HI .w 1 op opc1 opc2 opc3 sem))
6829 )
6830 )
6832 (define-pmacro (mov-dspsp-dst-mach mach op opc1 opc2 opc3 sem)
6833 (begin
6834 (.apply (.sym mov mach -dspsp-dst-defn) (QI .b 0 op opc1 opc2 opc3 sem))
6835 (.apply (.sym mov mach -dspsp-dst-defn) (HI .w 1 op opc1 opc2 opc3 sem))
6836 )
6837 )
6839 (define-pmacro (mov-dspsp-dst op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6840 (begin
6841 (mov-dspsp-dst-mach 16 op opc16-1 opc16-2 opc16-3 sem)
6842 (mov-dspsp-dst-mach 32 op opc32-1 opc32-2 opc32-3 sem)
6843 )
6844 )
6845 (define-pmacro (mov-src-dspsp op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6846 (begin
6847 (mov-src-dspsp-mach 16 op opc16-1 opc16-2 opc16-3 sem)
6848 (mov-src-dspsp-mach 32 op opc32-1 opc32-2 opc32-3 sem)
6849 )
6850 )
6852 ;-------------------------------------------------------------
6853 ; lde dsp24,dst -- for m16c
6854 ;-------------------------------------------------------------
6856 (define-pmacro (lde-dst-dsp mode wstr wbit dstgroup srcdisp)
6857 (begin
6859 (dni (.sym lde wstr - dstgroup -u20)
6860 (.str "lde" wstr "-" dstgroup "-u20")
6861 ((machine 16))
6862 (.str "lde" wstr " ${" srcdisp "},${dst16-" dstgroup "-" mode "}")
6863 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x8)
6864 (.sym dst16- dstgroup - mode) srcdisp)
6865 (nop)
6866 ())
6868 (dni (.sym lde wstr - dstgroup -u20a0)
6869 (.str "lde" wstr "-" dstgroup "-u20a0")
6870 ((machine 16))
6871 (.str "lde" wstr " ${" srcdisp "}[a0],${dst16-" dstgroup "-" mode "}")
6872 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x9)
6873 (.sym dst16- dstgroup - mode) srcdisp)
6874 (nop)
6875 ())
6877 (dni (.sym lde wstr - dstgroup -a1a0)
6878 (.str "lde" wstr "-" dstgroup "-a1a0")
6879 ((machine 16))
6880 (.str "lde" wstr " [a1a0],${dst16-" dstgroup "-" mode "}")
6881 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #xa)
6882 (.sym dst16- dstgroup - mode))
6883 (nop)
6884 ())
6885 )
6886 )
6888 (define-pmacro (lde-dst mode wstr wbit)
6889 (begin
6890 ; like: QI .b 0
6891 (lde-dst-dsp mode wstr wbit basic Dsp-16-u20)
6892 (lde-dst-dsp mode wstr wbit 16-8 Dsp-24-u20)
6893 (lde-dst-dsp mode wstr wbit 16-16 Dsp-32-u20)
6894 )
6895 )
6897 ;-------------------------------------------------------------
6898 ; ste dst,dsp24 -- for m16c
6899 ;-------------------------------------------------------------
6901 (define-pmacro (ste-dst-dsp mode wstr wbit dstgroup srcdisp)
6902 (begin
6904 (dni (.sym ste wstr - dstgroup -u20)
6905 (.str "ste" wstr "-" dstgroup "-u20")
6906 ((machine 16))
6907 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}")
6908 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x0)
6909 (.sym dst16- dstgroup - mode) srcdisp)
6910 (nop)
6911 ())
6913 (dni (.sym ste wstr - dstgroup -u20a0)
6914 (.str "ste" wstr "-" dstgroup "-u20a0")
6915 ((machine 16))
6916 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}[a0]")
6917 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x1)
6918 (.sym dst16- dstgroup - mode) srcdisp)
6919 (nop)
6920 ())
6922 (dni (.sym ste wstr - dstgroup -a1a0)
6923 (.str "ste" wstr "-" dstgroup "-a1a0")
6924 ((machine 16))
6925 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},[a1a0]")
6926 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x2)
6927 (.sym dst16- dstgroup - mode))
6928 (nop)
6929 ())
6930 )
6931 )
6933 (define-pmacro (ste-dst mode wstr wbit)
6934 (begin
6935 ; like: QI .b 0
6936 (ste-dst-dsp mode wstr wbit basic Dsp-16-u20)
6937 (ste-dst-dsp mode wstr wbit 16-8 Dsp-24-u20)
6938 (ste-dst-dsp mode wstr wbit 16-16 Dsp-32-u20)
6939 )
6940 )
6942 ;=============================================================
6943 ; Division
6944 ;-------------------------------------------------------------
6946 (define-pmacro (div-sem divop modop opmode reg src quot rem max min)
6947 (sequence ()
6948 (if (eq src 0)
6949 (set obit (const BI 1))
6950 (sequence ((opmode quot-result) (opmode rem-result))
6951 (set quot-result (divop opmode (ext opmode reg) src))
6952 (set rem-result (modop opmode (ext opmode reg) src))
6953 (set obit (orif (gt opmode quot-result max)
6954 (lt opmode quot-result min)))
6955 (set quot quot-result)
6956 (set rem rem-result))))
6957 )
6959 ;<divop>.size #imm -- for m16c and m32c
6960 (define-pmacro (div-imm-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem)
6961 (dni (.sym op mach wstr - src)
6962 (.str op mach wstr "-" src)
6963 ((machine mach))
6964 (.str op wstr " #${" src "}")
6965 encoding
6966 (sem divop modop opmode reg src quot rem max min)
6967 ())
6968 )
6969 (define-pmacro (div16-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem)
6970 (div-imm-defn 16 wstr op (.sym Imm-16 - smode)
6971 (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16 - smode))
6972 divop modop opmode reg quot rem max min
6973 sem)
6974 )
6975 (define-pmacro (div32-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem)
6976 (div-imm-defn 32 wstr op (.sym Imm-16 - smode)
6977 (+ (f-0-4 opc1) (f-4-4 opc2) (f-8-3 opc3) (f-11-1 wbit) (f-12-4 opc4) (.sym Imm-16 - smode))
6978 divop modop opmode reg quot rem max min
6979 sem)
6980 )
6981 (define-pmacro (div-imm-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 opc4 sem)
6982 (begin
6983 (.apply (.sym div mach -imm-defn) (QI .b 0 op divop modop opmode R0 R0l R0h max-QI min-QI opc1 opc2 opc3 opc4 sem))
6984 (.apply (.sym div mach -imm-defn) (HI .w 1 op divop modop opmode R2R0 R0 R2 max-HI min-HI opc1 opc2 opc3 opc4 sem))
6985 )
6986 )
6987 (define-pmacro (div-imm op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 opc32-1 opc32-2 opc32-3 opc32-4 sem)
6988 (begin
6989 (div-imm-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 sem)
6990 (div-imm-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 opc32-4 sem)
6991 )
6992 )
6994 ;<divop>.size src -- for m16c and m32c
6995 (define-pmacro (div-src-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem)
6996 (dni (.sym op mach wstr - src)
6997 (.str op mach wstr "-" src)
6998 ((machine mach))
6999 (.str op wstr " ${" src "}")
7000 encoding
7001 (sem divop modop opmode reg src quot rem max min)
7002 ())
7003 )
7004 (define-pmacro (div16-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem)
7005 (div-src-defn 16 wstr op (.sym dst16-16 - smode)
7006 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16 - smode))
7007 divop modop opmode reg quot rem max min
7008 sem)
7009 )
7010 (define-pmacro (div32-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem)
7011 (begin
7012 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
7013 ; define the absolute-indirect insns first in order to prevent them from being selected
7014 ; when the mode is register-indirect
7015 ; (div-src-defn 32 wstr op (.sym dst32-24-absolute-indirect- smode)
7016 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-absolute-indirect - smode))
7017 ; divop modop opmode reg quot rem max min
7018 ; sem)
7019 (div-src-defn 32 wstr op (.sym dst32-16-Unprefixed- smode)
7020 (+ (f-0-4 opc1) (f-7-1 wbit) (f-10-2 opc2) (f-12-4 opc3) (.sym dst32-16-Unprefixed- smode))
7021 divop modop opmode reg quot rem max min
7022 sem)
7023 ; (div-src-defn 32 wstr op (.sym dst32-24-indirect- smode)
7024 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-indirect - smode))
7025 ; divop modop opmode reg quot rem max min
7026 ; sem)
7027 )
7028 )
7029 (define-pmacro (div-src-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 sem)
7030 (begin
7031 (.apply (.sym div mach -src-defn) (QI .b 0 op divop modop opmode R0 R0l R0h max-QI min-QI opc1 opc2 opc3 sem))
7032 (.apply (.sym div mach -src-defn) (HI .w 1 op divop modop opmode R2R0 R0 R2 max-HI min-HI opc1 opc2 opc3 sem))
7033 )
7034 )
7035 (define-pmacro (div-src op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
7036 (begin
7037 (div-src-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 sem)
7038 (div-src-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 sem)
7039 )
7040 )
7042 ;=============================================================
7043 ; Bit manipulation
7044 ;
7045 (define-pmacro (bit-insn-defn mach op suffix opnd encoding sem)
7046 (dni (.sym op mach - suffix - opnd)
7047 (.str op mach ":" suffix " " opnd)
7048 ((machine mach))
7049 (.str op "$" suffix " ${" opnd "}")
7050 encoding
7051 (sem opnd)
7052 ())
7053 )
7055 (define-pmacro (bitsrc16-defn op opc1 opc2 opc3 sem)
7056 (bit-insn-defn 16 op X bit16-16
7057 (+ opc1 opc2 opc3 bit16-16)
7058 sem)
7059 )
7061 (define-pmacro (bitsrc32-defn op opc1 opc2 opc3 sem)
7062 (begin
7063 (bit-insn-defn 32 op X bit32-24-Prefixed
7064 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) bit32-24-Prefixed (f-15-1 opc2) (f-18-3 opc3))
7065 sem)
7066 )
7067 )
7069 (define-pmacro (bitsrc-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
7070 (begin
7071 (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem)
7072 (bitsrc32-defn op opc32-1 opc32-2 opc32-3 sem)
7073 )
7074 )
7076 (define-pmacro (bitdst16-defn op opc1 opc2 opc3 opc4 opc5 opc6 sem)
7077 (begin
7078 (bit-insn-defn 16 op G bit16-16-basic (+ opc1 opc2 opc3 bit16-16-basic) sem)
7079 (bit-insn-defn 16 op G bit16-16-16 (+ opc1 opc2 opc3 bit16-16-16) sem)
7080 (bit-insn-defn 16 op S bit16-11-S (+ opc4 opc5 opc6 bit16-11-S) sem)
7081 (bit-insn-defn 16 op G bit16-16-8 (+ opc1 opc2 opc3 bit16-16-8) sem)
7082 )
7083 )
7085 (define-pmacro (bitdst32-defn op opc1 opc2 opc3 sem)
7086 (begin
7087 (bit-insn-defn 32 op X bit32-16-Unprefixed
7088 (+ (f-0-4 opc1) bit32-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3))
7089 sem)
7090 )
7091 )
7093 (define-pmacro (bitdstnos-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
7094 (begin
7095 (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem)
7096 (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem)
7097 )
7098 )
7100 (define-pmacro (bitdst-insn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 opc32-1 opc32-2 opc32-3 sem)
7101 (begin
7102 (bitdst16-defn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 sem)
7103 (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem)
7104 )
7105 )
7107 ;=============================================================
7108 ; Bit condition
7109 ;
7110 (define-pmacro (bitcond-insn-defn mach op bit-opnd cond-opnd encoding sem)
7111 (dni (.sym op mach - bit-opnd - cond-opnd)
7112 (.str op mach " " bit-opnd " " cond-opnd)
7113 ((machine mach))
7114 (.str op "${" cond-opnd "} ${" bit-opnd "}")
7115 encoding
7116 (sem mach bit-opnd cond-opnd)
7117 ())
7118 )
7120 (define-pmacro (bitcond16-defn op opc1 opc2 opc3 sem)
7121 (begin
7122 (bitcond-insn-defn 16 op bit16-16-basic cond16-16 (+ opc1 opc2 opc3 bit16-16-basic cond16-16) sem)
7123 (bitcond-insn-defn 16 op bit16-16-16 cond16-32 (+ opc1 opc2 opc3 bit16-16-16 cond16-32) sem)
7124 (bitcond-insn-defn 16 op bit16-16-8 cond16-24 (+ opc1 opc2 opc3 bit16-16-8 cond16-24) sem)
7125 )
7126 )
7128 (define-pmacro (bitcond32-defn op opc1 opc2 opc3 sem)
7129 (begin
7130 (bitcond-insn-defn 32 op bit32-16-24-Unprefixed cond32-40
7131 (+ (f-0-4 opc1) bit32-16-24-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-40)
7132 sem)
7133 (bitcond-insn-defn 32 op bit32-16-16-Unprefixed cond32-32
7134 (+ (f-0-4 opc1) bit32-16-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-32)
7135 sem)
7136 (bitcond-insn-defn 32 op bit32-16-8-Unprefixed cond32-24
7137 (+ (f-0-4 opc1) bit32-16-8-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-24)
7138 sem)
7139 (bitcond-insn-defn 32 op bit32-basic-Unprefixed cond32-16
7140 (+ (f-0-4 opc1) bit32-basic-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-16)
7141 sem)
7142 )
7143 )
7145 (define-pmacro (bitcond-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
7146 (begin
7147 (bitcond16-defn op opc16-1 opc16-2 opc16-3 sem)
7148 (bitcond32-defn op opc32-1 opc32-2 opc32-3 sem)
7149 )
7150 )
7152 ;=============================================================
7153 ;<insn>.size #imm1,#imm2,dst -- for m32c
7154 ;
7155 (define-pmacro (insn-imm1-imm2-dst-defn src1 src2 dstgroup xmode wstr op encoding sem)
7156 (dni (.sym op 32 wstr - src1 - src2 - dstgroup)
7157 (.str op 32 wstr "-" src1 "-" src2 "-" dstgroup "-" xmode)
7158 ((machine 32))
7159 (.str op wstr " #${" src1 "},#${" src2 "},${dst32-" dstgroup "-" xmode "}")
7160 encoding
7161 (sem xmode src1 src2 (.sym dst32- dstgroup - xmode))
7162 ())
7163 )
7165 ; m32c Prefixed variants
7166 (define-pmacro (insn32-imm1-imm2-dst-Prefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem)
7167 (begin
7168 (insn-imm1-imm2-dst-defn (.sym Imm-48- xmode) (.sym Imm- base4 - xmode) 24-24-Prefixed xmode wstr op
7169 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7170 (.sym dst32-24-24-Prefixed- xmode) (.sym Imm-48- xmode) (.sym Imm- base4 - xmode))
7171 sem)
7172 (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base3 - xmode) 24-16-Prefixed xmode wstr op
7173 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7174 (.sym dst32-24-16-Prefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base3 - xmode))
7175 sem)
7176 (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base2 - xmode) 24-8-Prefixed xmode wstr op
7177 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7178 (.sym dst32-24-8-Prefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base2 - xmode))
7179 sem)
7180 (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base1 - xmode) basic-Prefixed xmode wstr op
7181 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7182 (.sym dst32-basic-Prefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base1 - xmode))
7183 sem)
7184 )
7185 )
7187 ; m32c Unprefixed variants
7188 (define-pmacro (insn32-imm1-imm2-dst-Unprefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem)
7189 (begin
7190 (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base4 - xmode) 16-24-Unprefixed xmode wstr op
7191 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7192 (.sym dst32-16-24-Unprefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base4 - xmode))
7193 sem)
7194 (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base3 - xmode) 16-16-Unprefixed xmode wstr op
7195 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7196 (.sym dst32-16-16-Unprefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base3 - xmode))
7197 sem)
7198 (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base2 - xmode) 16-8-Unprefixed xmode wstr op
7199 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7200 (.sym dst32-16-8-Unprefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base2 - xmode))
7201 sem)
7202 (insn-imm1-imm2-dst-defn (.sym Imm-16- xmode) (.sym Imm- base1 - xmode) basic-Unprefixed xmode wstr op
7203 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7204 (.sym dst32-basic-Unprefixed- xmode) (.sym Imm-16- xmode) (.sym Imm- base1 - xmode))
7205 sem)
7206 )
7207 )
7209 (define-pmacro (insn-imm1-imm2-dst-Prefixed op opc32-1 opc32-2 opc32-3 sem)
7210 (begin
7211 (insn32-imm1-imm2-dst-Prefixed-defn QI .b 0 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem)
7212 (insn32-imm1-imm2-dst-Prefixed-defn HI .w 1 40 48 56 64 op opc32-1 opc32-2 opc32-3 sem)
7213 )
7214 )
7215 (define-pmacro (insn-imm1-imm2-dst-Unprefixed op opc32-1 opc32-2 opc32-3 sem)
7216 (begin
7217 (insn32-imm1-imm2-dst-Unprefixed-defn QI .b 0 24 32 40 48 op opc32-1 opc32-2 opc32-3 sem)
7218 (insn32-imm1-imm2-dst-Unprefixed-defn HI .w 1 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem)
7219 )
7220 )
7221 \f
7222 ;=============================================================
7223 ; Insn definitions
7224 ;-------------------------------------------------------------
7225 ; abs - absolute
7226 ;-------------------------------------------------------------
7228 (define-pmacro (abs-sem mode dst)
7229 (sequence ((mode result))
7230 (set result (abs mode dst))
7231 (set obit (eq result dst))
7232 (set-z-and-s result)
7233 (set dst result))
7234 )
7235 (unary-insn abs (f-0-4 7) (f-4-3 3) (f-8-4 #xF) #xA #x1 #xF abs-sem)
7237 ;-------------------------------------------------------------
7238 ; adcf - addition carry flag
7239 ;-------------------------------------------------------------
7241 (define-pmacro (adcf-sem mode dst)
7242 (sequence ((mode result))
7243 (set result (addc mode dst 0 cbit))
7244 (set obit (add-oflag mode dst 0 cbit))
7245 (set cbit (add-cflag mode dst 0 cbit))
7246 (set-z-and-s result)
7247 (set dst result))
7248 )
7249 (unary-insn adcf (f-0-4 7) (f-4-3 3) (f-8-4 #xE) #xB #x1 #xE adcf-sem)
7251 ;-------------------------------------------------------------
7252 ; add - binary addition
7253 ;-------------------------------------------------------------
7255 (define-pmacro (add-sem mode src1 dst)
7256 (sequence ((mode result))
7257 (set result (add mode src1 dst))
7258 (set obit (add-oflag mode src1 dst 0))
7259 (set cbit (add-cflag mode src1 dst 0))
7260 (set-z-and-s result)
7261 (set dst result))
7262 )
7264 ; add.L:G #imm32,dst (m32 #2)
7265 (binary-arith32-imm-dst-defn SI SI .l 0 add G #x8 #x3 #x1 add-sem)
7266 ; add.size:G #imm,dst (m16 #1 m32 #1)
7267 (binary-arith-imm-dst add G (f-0-4 7) (f-4-3 3) (f-8-4 4) #x8 #x2 #xE add-sem)
7268 ; add.size:Q #imm4,dst (m16 #2 m32 #3)
7269 (binary-arith-imm4-dst add (f-0-4 #xC) (f-4-3 4) #x7 #x3 add-sem)
7270 (binary-arith32-imm4-dst-defn SI .l 1 0 add #x7 #x3 add-sem)
7271 ; add.b:S #imm8,dst3 (m16 #3)
7272 (binary-arith16-b-S-imm8-dst3 add ".b" (f-0-4 8) (f-4-1 0) add-sem)
7273 ; add.BW:Q #imm4,sp (m16 #7)
7274 (binary-arith16-Q-sp add (f-0-4 7) (f-4-4 #xD) (f-8-4 #xB) add-sem)
7275 (dnmi add16-bQ-sp "add16-bQ-sp" ()
7276 "add.b:q #${Imm-12-s4},sp"
7277 (emit add16-wQ-sp Imm-12-s4))
7278 ; add.BW:G #imm,sp (m16 #6)
7279 (binary-arith16-G-sp add (f-0-4 7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #xB) add-sem)
7280 ; add.BW:G src,dst (m16 #4 m32 #6)
7281 (binary-arith-src-dst add G (f-0-4 #xA) (f-4-3 0) #x1 #x8 add-sem)
7282 ; add.B.S src2,r0l/r0h (m16 #5)
7283 (binary-arith16-b-S-src2 add (f-0-4 2) (f-4-1 0) add-sem)
7284 ; add.L:G src,dst (m32 #7)
7285 (binary-arith32-src-dst-defn SI SI .l 1 add G #x1 #x2 add-sem)
7286 ; add.L:S #imm{1,2},A0/A1 (m32 #5)
7287 (binary-arith32-l-s-imm1-an add (f-0-2 2) (f-3-4 6) add-sem)
7288 ; add.L:Q #imm3,sp (m32 #9)
7289 (binary-arith32-l-q-imm3-sp add (f-0-2 1) (f-4-3 1) add-sem)
7290 ; add.L:S #imm8,sp (m32 #10)
7291 (binary-arith32-l-s-imm8-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 0) (f-12-4 3) add-sem)
7292 ; add.L:G #imm16,sp (m32 #8)
7293 (binary-arith32-l-g-imm16-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 1) (f-12-4 3) add-sem)
7294 ; add.BW:S #imm,dst2 (m32 #4)
7295 (binary-arith32-s-imm-dst QI .b 0 add #x0 #x3 add-sem)
7296 (binary-arith32-s-imm-dst HI .w 1 add #x0 #x3 add-sem)
7298 ;-------------------------------------------------------------
7299 ; adc - binary add with carry
7300 ;-------------------------------------------------------------
7302 (define-pmacro (addc-sem mode src dst)
7303 (sequence ((mode result))
7304 (set result (addc mode src dst cbit))
7305 (set obit (add-oflag mode src dst cbit))
7306 (set cbit (add-cflag mode src dst cbit))
7307 (set-z-and-s result)
7308 (set dst result))
7309 )
7311 ; adc.size:G #imm,dst
7312 (binary-arith16-imm-dst-defn QI QI .b 0 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem)
7313 (binary-arith16-imm-dst-defn HI HI .w 1 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem)
7314 (binary-arith32-imm-dst-Prefixed QI QI .b 0 adc X #x8 #x2 #xE addc-sem)
7315 (binary-arith32-imm-dst-Prefixed HI HI .w 1 adc X #x8 #x2 #xE addc-sem)
7317 ; adc.BW:G src,dst
7318 (binary-arith16-src-dst-defn QI QI .b 0 adc X (f-0-4 #xB) (f-4-3 0) addc-sem)
7319 (binary-arith16-src-dst-defn HI HI .w 1 adc X (f-0-4 #xB) (f-4-3 0) addc-sem)
7320 (binary-arith32-src-dst-Prefixed QI QI .b 0 adc X #x1 #x4 addc-sem)
7321 (binary-arith32-src-dst-Prefixed HI HI .w 1 adc X #x1 #x4 addc-sem)
7323 ;-------------------------------------------------------------
7324 ; dadc - decimal add with carry
7325 ; dadd - decimal addition
7326 ;-------------------------------------------------------------
7328 (define-pmacro (dadc-sem mode src dst)
7329 (sequence ((mode result))
7330 (set result (subc mode dst src (not cbit)))
7331 (set cbit (sub-cflag mode dst src (not cbit)))
7332 (set-z-and-s result)
7333 (set dst result))
7334 )
7336 (define-pmacro (decimal-subtraction16-insn op opc1 opc2)
7337 (begin
7338 ; op.b #imm8,r0l
7339 (dni (.sym op 16.b-imm8)
7340 (.str op ".b #imm8")
7341 ((machine 16))
7342 (.str op ".b #${Imm-16-QI},r0l")
7343 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc1) Imm-16-QI)
7344 ((.sym op -sem) QI Imm-16-QI R0l)
7345 ())
7346 ; op.w #imm16,r0
7347 (dni (.sym op 16.w-imm16)
7348 (.str op ".b #imm16")
7349 ((machine 16))
7350 (.str op ".w #${Imm-16-HI},r0")
7351 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc1) Imm-16-HI)
7352 ((.sym op -sem) HI Imm-16-HI R0)
7353 ())
7354 ; op.b #r0h,r0l
7355 (dni (.sym op 16.b-r0h-r0l)
7356 (.str op ".b r0h,r0l")
7357 ((machine 16))
7358 (.str op ".b r0h,r0l")
7359 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc2))
7360 ((.sym op -sem) QI R0h R0l)
7361 ())
7362 ; op.w #r1,r0
7363 (dni (.sym op 16.w-r1-r0)
7364 (.str op ".b r1,r0")
7365 ((machine 16))
7366 (.str op ".w r1,r0")
7367 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc2))
7368 ((.sym op -sem) HI R1 R0)
7369 ())
7370 )
7371 )
7373 ; dadc for m16c
7374 (decimal-subtraction16-insn dadc #xE #x6 )
7376 ; dadc.size #imm,dst
7377 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dadc X #x8 #x0 #xE dadc-sem)
7378 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dadc X #x8 #x0 #xE dadc-sem)
7379 ; dadc.BW src,dst
7380 (binary-arith32-src-dst-Prefixed QI QI .b 0 dadc X #x1 #x8 dadc-sem)
7381 (binary-arith32-src-dst-Prefixed HI HI .w 1 dadc X #x1 #x8 dadc-sem)
7383 (define-pmacro (dadd-sem mode src dst)
7384 (sequence ((mode result))
7385 (set result (subc mode dst src 0))
7386 (set cbit (sub-cflag mode dst src 0))
7387 (set-z-and-s result)
7388 (set dst result))
7389 )
7391 ; dadd for m16c
7392 (decimal-subtraction16-insn dadd #xC #x4)
7394 ; dadd.size #imm,dst
7395 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dadd X #x8 #x1 #xE dadd-sem)
7396 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dadd X #x8 #x1 #xE dadd-sem)
7397 ; dadd.BW src,dst
7398 (binary-arith32-src-dst-Prefixed QI QI .b 0 dadd X #x1 #x0 dadd-sem)
7399 (binary-arith32-src-dst-Prefixed HI HI .w 1 dadd X #x1 #x0 dadd-sem)
7401 ;-------------------------------------------------------------;
7402 ; addx - Add extend sign with no carry
7403 ;-------------------------------------------------------------;
7405 (define-pmacro (addx-sem mode src dst)
7406 (sequence ((SI source) (SI result))
7407 (set source (zext SI (trunc QI src)))
7408 (set result (add SI source dst))
7409 (set obit (add-oflag SI source dst 0))
7410 (set cbit (add-cflag SI source dst 0))
7411 (set-z-and-s result)
7412 (set dst result))
7413 )
7415 ; addx #imm,dst
7416 (binary-arith32-imm-dst-defn QI SI "" 0 addx X #x8 #x1 #x1 addx-sem)
7417 ; addx src,dst
7418 (binary-arith32-src-dst-defn QI SI "" 0 addx X #x1 #x2 addx-sem)
7420 ;-------------------------------------------------------------
7421 ; adjnz - Add/Sub and branch if not zero
7422 ;-------------------------------------------------------------
7424 (define-pmacro (arith-jnz-sem mode src dst label)
7425 (sequence ((mode result))
7426 (set result (add mode src dst))
7427 (set dst result)
7428 (if (ne result 0)
7429 (set pc label)))
7430 )
7432 ; adjnz.size #imm4,dst,label
7433 (arith-jnz-imm4-dst adjnz s4 (f-0-4 #xF) (f-4-3 4) #xf #x1 arith-jnz-sem)
7435 ;-------------------------------------------------------------
7436 ; and - binary and
7437 ;-------------------------------------------------------------
7439 (define-pmacro (and-sem mode src1 dst)
7440 (sequence ((mode result))
7441 (set result (and mode src1 dst))
7442 (set-z-and-s result)
7443 (set dst result))
7444 )
7446 ; and.size:G #imm,dst (m16 #1 m32 #1)
7447 (binary-arith-imm-dst and G (f-0-4 7) (f-4-3 3) (f-8-4 2) #x8 #x3 #xF and-sem)
7448 ; and.b:S #imm8,dst3 (m16 #2)
7449 (binary-arith16-b-S-imm8-dst3 and ".b" (f-0-4 9) (f-4-1 0) and-sem)
7450 ; and.BW:G src,dst (m16 #3 m32 #3)
7451 (binary-arith-src-dst and G (f-0-4 #x9) (f-4-3 0) #x1 #xD and-sem)
7452 ; and.B.S src2,r0l/r0h (m16 #4)
7453 (binary-arith16-b-S-src2 and (f-0-4 1) (f-4-1 0) and-sem)
7454 ; and.BW:S #imm,dst2 (m32 #2)
7455 (binary-arith32-s-imm-dst QI .b 0 and #x1 #x6 and-sem)
7456 (binary-arith32-s-imm-dst HI .w 1 and #x1 #x6 and-sem)
7458 ;-------------------------------------------------------------
7459 ; band - bit and
7460 ;-------------------------------------------------------------
7462 (define-pmacro (band-sem src)
7463 (set cbit (and src cbit))
7464 )
7465 (bitsrc-insn band (f-0-4 7) (f-4-4 #xE) (f-8-4 4) #xD #x0 #x1 band-sem)
7467 ;-------------------------------------------------------------
7468 ; bclr - bit clear
7469 ;-------------------------------------------------------------
7471 (define-pmacro (bclr-sem dst)
7472 (set dst 0)
7473 )
7474 (bitdst-insn bclr (f-0-4 7) (f-4-4 #xE) (f-8-4 8) (f-0-2 1) (f-2-2 0) (f-4-1 0) #xD #x0 #x6 bclr-sem)
7476 ;-------------------------------------------------------------
7477 ; bitindex - bit index
7478 ;-------------------------------------------------------------
7480 (define-pmacro (bitindex-sem mode dst)
7481 (set BitIndex dst)
7482 )
7483 (unary-insn-defn 32 16-Unprefixed QI .b bitindex
7484 (+ (f-0-4 #xC) (f-7-1 0) dst32-16-Unprefixed-QI (f-10-2 #x2) (f-12-4 #xE))
7485 bitindex-sem)
7486 (unary-insn-defn 32 16-Unprefixed HI .w bitindex
7487 (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x2) (f-12-4 #xE))
7488 bitindex-sem)
7490 ;-------------------------------------------------------------
7491 ; bmCnd - bit move condition
7492 ;-------------------------------------------------------------
7494 (define-pmacro (test-condition16 cond)
7495 (case UQI cond
7496 ((#x00) (trunc BI cbit))
7497 ((#x01) (not (or cbit zbit)))
7498 ((#x02) (trunc BI zbit))
7499 ((#x03) (trunc BI sbit))
7500 ((#x04) (or zbit (xor sbit obit)))
7501 ((#x05) (trunc BI obit))
7502 ((#x06) (xor sbit obit))
7503 ((#xf8) (not cbit))
7504 ((#xf9) (or cbit zbit))
7505 ((#xfa) (not zbit))
7506 ((#xfb) (not sbit))
7507 ((#xfc) (not (or zbit (xor sbit obit))))
7508 ((#xfd) (not obit))
7509 ((#xfe) (not (xor sbit obit)))
7510 (else (const BI 0))
7511 )
7512 )
7514 (define-pmacro (test-condition32 cond)
7515 (case UQI cond
7516 ((#x00) (not cbit))
7517 ((#x01) (or cbit zbit))
7518 ((#x02) (not zbit))
7519 ((#x03) (not sbit))
7520 ((#x04) (not obit))
7521 ((#x05) (not (or zbit (xor sbit obit))))
7522 ((#x06) (not (xor sbit obit)))
7523 ((#x08) (trunc BI cbit))
7524 ((#x09) (not (or cbit zbit)))
7525 ((#x0a) (trunc BI zbit))
7526 ((#x0b) (trunc BI sbit))
7527 ((#x0c) (trunc BI obit))
7528 ((#x0d) (or zbit (xor sbit obit)))
7529 ((#x0e) (xor sbit obit))
7530 (else (const BI 0))
7531 )
7532 )
7534 (define-pmacro (bitcond-sem mach op cond)
7535 (if ((.sym test-condition mach) cond)
7536 (set op 1)
7537 (set op 0))
7538 )
7539 (bitcond-insn bm (f-0-4 7) (f-4-4 #xE) (f-8-4 2) #xD #x0 #x2 bitcond-sem)
7541 (dni bm16-c
7542 "bm16 C"
7543 ((machine 16))
7544 "bm$cond16c c"
7545 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xD) cond16c)
7546 (bitcond-sem 16 cbit cond16c)
7547 ())
7549 (dni bm32-c
7550 "bm32 C"
7551 ((machine 32))
7552 "bm$cond32 c"
7553 (+ (f-0-4 #xD) (f-4-4 #x9) (f-8-1 0) (f-10-3 5) cond32)
7554 (bitcond-sem 32 cbit cond32)
7555 ())
7557 ;-------------------------------------------------------------
7558 ; bnand
7559 ;-------------------------------------------------------------
7561 (define-pmacro (bnand-sem src)
7562 (set cbit (and (inv src) cbit))
7563 )
7564 (bitsrc-insn bnand (f-0-4 7) (f-4-4 #xE) (f-8-4 5) #xD #x0 #x3 bnand-sem)
7566 ;-------------------------------------------------------------
7567 ; bnor
7568 ;-------------------------------------------------------------
7570 (define-pmacro (bnor-sem src)
7571 (set cbit (or (inv src) cbit))
7572 )
7573 (bitsrc-insn bnor (f-0-4 7) (f-4-4 #xE) (f-8-4 7) #xD #x0 #x6 bnor-sem)
7575 ;-------------------------------------------------------------
7576 ; bnot
7577 ;-------------------------------------------------------------
7579 (define-pmacro (bnot-sem dst)
7580 (set dst (inv dst))
7581 )
7582 (bitdst-insn bnot (f-0-4 7) (f-4-4 #xE) (f-8-4 #xA) (f-0-2 1) (f-2-2 1) (f-4-1 0) #xD #x0 #x3 bnot-sem)
7584 ;-------------------------------------------------------------
7585 ; bntst
7586 ;-------------------------------------------------------------
7588 (define-pmacro (bntst-sem src)
7589 (set cbit (inv src))
7590 (set zbit (inv src))
7591 )
7592 (bitsrc-insn bntst (f-0-4 7) (f-4-4 #xE) (f-8-4 3) #xD #x0 #x0 bntst-sem)
7594 ;-------------------------------------------------------------
7595 ; bnxor
7596 ;-------------------------------------------------------------
7598 (define-pmacro (bnxor-sem src)
7599 (set cbit (xor (inv src) cbit))
7600 )
7601 (bitsrc-insn bnxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xD) #xD #x0 #x7 bnxor-sem)
7603 ;-------------------------------------------------------------
7604 ; bor
7605 ;-------------------------------------------------------------
7607 (define-pmacro (bor-sem src)
7608 (set cbit (or src cbit))
7609 )
7610 (bitsrc-insn bor (f-0-4 7) (f-4-4 #xE) (f-8-4 #x6) #xD #x0 #x4 bor-sem)
7612 ;-------------------------------------------------------------
7613 ; brk
7614 ;-------------------------------------------------------------
7616 (dni brk16
7617 "brk"
7618 ((machine 16))
7619 "brk"
7620 (+ (f-0-4 #x0) (f-4-4 #x0))
7621 (nop)
7622 ())
7624 (dni brk32
7625 "brk"
7626 ((machine 32))
7627 "brk"
7628 (+ (f-0-4 #x0) (f-4-4 #x0))
7629 (nop)
7630 ())
7632 ;-------------------------------------------------------------
7633 ; brk2
7634 ;-------------------------------------------------------------
7636 (dni brk232
7637 "brk2"
7638 ((machine 32))
7639 "brk2"
7640 (+ (f-0-4 #x0) (f-4-4 #x8))
7641 (nop)
7642 ())
7644 ;-------------------------------------------------------------
7645 ; bset
7646 ;-------------------------------------------------------------
7648 (define-pmacro (bset-sem dst)
7649 (set dst 1)
7650 )
7651 (bitdst-insn bset (f-0-4 7) (f-4-4 #xE) (f-8-4 9) (f-0-2 1) (f-2-2 0) (f-4-1 1) #xD #x0 #x7 bset-sem)
7653 ;-------------------------------------------------------------
7654 ; btst
7655 ;-------------------------------------------------------------
7657 (define-pmacro (btst-sem dst)
7658 (set zbit (inv dst))
7659 (set cbit dst)
7660 )
7661 (bitdst16-defn btst (f-0-4 7) (f-4-4 #xE) (f-8-4 #xB) (f-0-2 1) (f-2-2 1) (f-4-1 1) btst-sem)
7663 (bit-insn-defn 32 btst G bit32-16-Unprefixed
7664 (+ (f-0-4 #xD) bit32-16-Unprefixed (f-7-1 #x0) (f-10-3 #x0))
7665 btst-sem)
7667 (dni btst.s "btst:s" ((machine 32))
7668 "btst:s ${Bit3-S},${Dsp-8-u16}"
7669 (+ (f-0-2 #x0) (f-4-3 #x5) Bit3-S Dsp-8-u16)
7670 () ())
7672 ;-------------------------------------------------------------
7673 ; btstc
7674 ;-------------------------------------------------------------
7676 (define-pmacro (btstc-sem dst)
7677 (set zbit (inv dst))
7678 (set cbit dst)
7679 (set dst (const 0))
7680 )
7681 (bitdstnos-insn btstc (f-0-4 7) (f-4-4 #xE) (f-8-4 #x0) #xD #x0 #x4 btstc-sem)
7683 ;-------------------------------------------------------------
7684 ; btsts
7685 ;-------------------------------------------------------------
7687 (define-pmacro (btsts-sem dst)
7688 (set zbit (inv dst))
7689 (set cbit dst)
7690 (set dst (const 0))
7691 )
7692 (bitdstnos-insn btsts (f-0-4 7) (f-4-4 #xE) (f-8-4 #x1) #xD #x0 #x5 btsts-sem)
7694 ;-------------------------------------------------------------
7695 ; bxor
7696 ;-------------------------------------------------------------
7698 (define-pmacro (bxor-sem src)
7699 (set cbit (xor src cbit))
7700 )
7701 (bitsrc-insn bxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xC) #xD #x0 #x5 bxor-sem)
7703 ;-------------------------------------------------------------
7704 ; clip
7705 ;-------------------------------------------------------------
7707 (define-pmacro (clip-sem mode imm1 imm2 dest)
7708 (sequence ()
7709 (if (gt mode imm1 dest)
7710 (set dest imm1))
7711 (if (lt mode imm2 dest)
7712 (set dest imm2)))
7713 )
7715 (insn-imm1-imm2-dst-Prefixed clip #x8 #x3 #xE clip-sem)
7717 ;-------------------------------------------------------------
7718 ; cmp - binary compare
7719 ;-------------------------------------------------------------
7721 (define-pmacro (cmp-sem mode src1 dst)
7722 (sequence ((mode result))
7723 (set result (sub mode dst src1))
7724 (set obit (sub-oflag mode dst src1 0))
7725 (set cbit (not (sub-cflag mode dst src1 0)))
7726 (set-z-and-s result))
7727 )
7729 ; cmp.L:G #imm32,dst (m32 #2)
7730 (binary-arith32-imm-dst-defn SI SI .l 0 cmp G #xA #x3 #x1 cmp-sem)
7731 ; cmp.size:G #imm,dst (m16 #1 m32 #1)
7732 (binary-arith-imm-dst cmp G (f-0-4 7) (f-4-3 3) (f-8-4 8) #x9 #x2 #xE cmp-sem)
7733 ; cmp.size:Q #imm4,dst (m16 #2 m32 #3)
7734 (binary-arith-imm4-dst cmp (f-0-4 #xD) (f-4-3 0) #x7 #x1 cmp-sem)
7735 ; cmp.b:S #imm8,dst3 (m16 #3)
7736 (binary-arith16-b-S-imm8-dst3 cmp ".b" (f-0-4 #xE) (f-4-1 0) cmp-sem)
7737 ; cmp.BW:G src,dst (m16 #4 m32 #5)
7738 (binary-arith-src-dst cmp G (f-0-4 #xC) (f-4-3 0) #x1 #x6 cmp-sem)
7739 ; cmp.B.S src2,r0l/r0h (m16 #5)
7740 (binary-arith16-b-S-src2 cmp (f-0-4 3) (f-4-1 1) cmp-sem)
7741 ; cmp.L:G src,dst (m32 #6)
7742 (binary-arith32-src-dst-defn SI SI .l 1 cmp G #x1 #x1 cmp-sem)
7743 ; cmp.BW:S #imm,dst2 (m32 #4)
7744 (binary-arith32-s-imm-dst QI .b 0 cmp #x1 #x3 cmp-sem)
7745 (binary-arith32-s-imm-dst HI .w 1 cmp #x1 #x3 cmp-sem)
7746 ; cmp.BW:s src2,r0[l] (m32 #7)
7747 (binary-arith32-S-src2 cmp QI .b 0 (f-0-2 1) (f-4-3 0) cmp-sem)
7748 (binary-arith32-S-src2 cmp HI .w 1 (f-0-2 1) (f-4-3 0) cmp-sem)
7750 ;-------------------------------------------------------------
7751 ; cmpx - binary compare extend sign
7752 ;-------------------------------------------------------------
7754 (define-pmacro (cmpx-sem mode src1 dst)
7755 (sequence ((mode result))
7756 (set result (sub mode dst (ext mode src1)))
7757 (set obit (sub-oflag mode dst (ext mode src1) 0))
7758 (set cbit (sub-cflag mode dst (ext mode src1) 0))
7759 (set-z-and-s result))
7760 )
7762 (binary-arith32-imm-dst-defn QI SI "" 0 cmpx X #xA #x1 #x1 cmpx-sem)
7764 ;-------------------------------------------------------------
7765 ; dec - decrement
7766 ;-------------------------------------------------------------
7768 (define-pmacro (dec-sem mode dest)
7769 (sequence ((mode result))
7770 (set result (sub mode dest 1))
7771 (set-z-and-s result)
7772 (set dest result))
7773 )
7775 (dni dec16.b
7776 "dec.b Dst16-3-S-8"
7777 ((machine 16))
7778 "dec.b ${Dst16-3-S-8}"
7779 (+ (f-0-4 #xA) (f-4-1 #x1) Dst16-3-S-8)
7780 (dec-sem QI Dst16-3-S-8)
7781 ())
7783 (dni dec16.w
7784 "dec.w Dst16An-S"
7785 ((machine 16))
7786 "dec.w ${Dst16An-S}"
7787 (+ (f-0-4 #xF) (f-5-3 #x2) Dst16An-S)
7788 (dec-sem HI Dst16An-S)
7789 ())
7791 (unary32-defn QI .b 0 dec #xB #x0 #xE dec-sem)
7792 (unary32-defn HI .w 1 dec #xB #x0 #xE dec-sem)
7794 ;-------------------------------------------------------------
7795 ; div - divide
7796 ; divu - divide unsigned
7797 ; divx - divide extension
7798 ;-------------------------------------------------------------
7800 ; div.BW #imm
7801 (div-imm div div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x1) #xB #x0 #x2 #x3 div-sem)
7802 (div-imm divu udiv umod USI 255 0 65535 0 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x0) #xB #x0 #x0 #x3 div-sem)
7803 (div-imm divx div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x3) #xB #x2 #x2 #x3 div-sem)
7804 ; div.BW src
7805 (div-src div div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xD) #x8 #x1 #xE div-sem)
7806 (div-src divu udiv umod USI 255 0 65535 0 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xC) #x8 #x0 #xE div-sem)
7807 (div-src divx div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #x9) #x9 #x1 #xE div-sem)
7809 (div-src-defn 32 .l div dst32-24-Prefixed-SI
7810 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x1) (f-20-4 #xf) dst32-24-Prefixed-SI)
7811 div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000)
7812 div-sem)
7813 (div-src-defn 32 .l divu dst32-24-Prefixed-SI
7814 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x0) (f-20-4 #xf) dst32-24-Prefixed-SI)
7815 udiv umod USI R2R0 R2R0 NoRemainder #x80000000 0
7816 div-sem)
7817 (div-src-defn 32 .l divx dst32-24-Prefixed-SI
7818 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x2) (f-20-4 #xf) dst32-24-Prefixed-SI)
7819 div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000)
7820 div-sem)
7822 ;-------------------------------------------------------------
7823 ; dsbb - decimal subtraction with borrow
7824 ; dsub - decimal subtraction
7825 ;-------------------------------------------------------------
7827 (define-pmacro (dsbb-sem mode src dst)
7828 (sequence ((mode result))
7829 (set result (subc mode dst src (not cbit)))
7830 (set cbit (sub-cflag mode dst src (not cbit)))
7831 (set-z-and-s result)
7832 (set dst result))
7833 )
7835 ; dsbb for m16c
7836 (decimal-subtraction16-insn dsbb #xF #x7)
7838 ; dsbb.size #imm,dst
7839 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dsbb X #x9 #x0 #xE dsbb-sem)
7840 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dsbb X #x9 #x0 #xE dsbb-sem)
7841 ; dsbb.BW src,dst
7842 (binary-arith32-src-dst-Prefixed QI QI .b 0 dsbb X #x1 #xA dsbb-sem)
7843 (binary-arith32-src-dst-Prefixed HI HI .w 1 dsbb X #x1 #xA dsbb-sem)
7845 (define-pmacro (dsub-sem mode src dst)
7846 (sequence ((mode result))
7847 (set result (subc mode dst src 0))
7848 (set cbit (sub-cflag mode dst src 0))
7849 (set-z-and-s result)
7850 (set dst result))
7851 )
7853 ; dsub for m16c
7854 (decimal-subtraction16-insn dsub #xD #x5)
7856 ; dsub.size #imm,dst
7857 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dsub X #x9 #x1 #xE dsub-sem)
7858 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dsub X #x9 #x1 #xE dsub-sem)
7859 ; dsub.BW src,dst
7860 (binary-arith32-src-dst-Prefixed QI QI .b 0 dsub X #x1 #x2 dsub-sem)
7861 (binary-arith32-src-dst-Prefixed HI HI .w 1 dsub X #x1 #x2 dsub-sem)
7863 ;-------------------------------------------------------------
7864 ; sub - binary subtraction
7865 ;-------------------------------------------------------------
7867 (define-pmacro (sub-sem mode src1 dst)
7868 (sequence ((mode result))
7869 (set result (sub mode dst src1))
7870 (set obit (sub-oflag mode dst src1 0))
7871 (set cbit (sub-cflag mode dst src1 0))
7872 (set dst result)
7873 (set-z-and-s result)))
7875 ; sub.size:G #imm,dst (m16 #1 m32 #1)
7876 (binary-arith-imm-dst sub G (f-0-4 7) (f-4-3 3) (f-8-4 5) #x8 #x3 #xE sub-sem)
7877 ; sub.b:S #imm8,dst3 (m16 #2)
7878 (binary-arith16-b-S-imm8-dst3 sub ".b" (f-0-4 8) (f-4-1 1) sub-sem)
7879 ; sub.BW:G src,dst (m16 #3 m32 #4)
7880 (binary-arith-src-dst sub G (f-0-4 #xA) (f-4-3 4) #x1 #xA sub-sem)
7881 ; sub.B.S src2,r0l/r0h (m16 #4)
7882 (binary-arith16-b-S-src2 sub (f-0-4 2) (f-4-1 1) sub-sem)
7883 ; sub.L:G #imm32,dst (m32 #2)
7884 (binary-arith32-imm-dst-defn SI SI .l 0 sub G #x9 #x3 #x1 sub-sem)
7885 ; sub.BW:S #imm,dst2 (m32 #3)
7886 (binary-arith32-s-imm-dst QI .b 0 sub #x0 #x7 sub-sem)
7887 (binary-arith32-s-imm-dst HI .w 1 sub #x0 #x7 sub-sem)
7888 ; sub.L:G src,dst (m32 #5)
7889 (binary-arith32-src-dst-defn SI SI .l 1 sub G #x1 #x0 sub-sem)
7891 ;-------------------------------------------------------------
7892 ; enter - enter function
7893 ; exitd - exit and deallocate stack frame
7894 ;-------------------------------------------------------------
7896 (define-pmacro (enter16-sem mach amt)
7897 (sequence ()
7898 (set (reg h-sp) (sub (reg h-sp) 2))
7899 (set (mem16 HI (reg h-sp)) (reg h-fb))
7900 (set (reg h-fb) (reg h-sp))
7901 (set (reg h-sp) (sub (reg h-sp) amt))))
7903 (define-pmacro (exit16-sem mach)
7904 (sequence ((SI newpc))
7905 (set (reg h-sp) (reg h-fb))
7906 (set (reg h-fb) (mem16 HI (reg h-sp)))
7907 (set (reg h-sp) (add (reg h-sp) 2))
7908 (set newpc (mem16 HI (reg h-sp)))
7909 (set (reg h-sp) (add (reg h-sp) 2))
7910 (set newpc (or newpc (sll (mem16 QI (reg h-sp)) (const 16))))
7911 (set (reg h-sp) (add (reg h-sp) 1))
7912 (set pc newpc)))
7914 (define-pmacro (enter32-sem mach amt)
7915 (sequence ()
7916 (set (reg h-sp) (sub (reg h-sp) 4))
7917 (set (mem32 SI (reg h-sp)) (reg h-fb))
7918 (set (reg h-fb) (reg h-sp))
7919 (set (reg h-sp) (sub (reg h-sp) amt))))
7921 (define-pmacro (exit32-sem mach)
7922 (sequence ((SI newpc))
7923 (set (reg h-sp) (reg h-fb))
7924 (set (reg h-fb) (mem32 SI (reg h-sp)))
7925 (set (reg h-sp) (add (reg h-sp) 4))
7926 (set newpc (mem32 SI (reg h-sp)))
7927 (set (reg h-sp) (add (reg h-sp) 4))
7928 (set pc newpc)))
7930 (dni enter16 "enter #Imm-16-QI" ((machine 16))
7931 ("enter #${Dsp-16-u8}")
7932 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 2) Dsp-16-u8)
7933 (enter16-sem 16 Dsp-16-u8)
7934 ())
7936 (dni exitd16 "exitd" ((machine 16))
7937 ("exitd")
7938 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 2))
7939 (exit16-sem 16)
7940 ())
7942 (dni enter32 "enter #Imm-8-QI" ((machine 32))
7943 ("enter #${Dsp-8-u8}")
7944 (+ (f-0-4 #xE) (f-4-4 #xC) Dsp-8-u8)
7945 (enter32-sem 32 Dsp-8-u8)
7946 ())
7948 (dni exitd32 "exitd" ((machine 32))
7949 ("exitd")
7950 (+ (f-0-4 #xF) (f-4-4 #xC))
7951 (exit32-sem 32)
7952 ())
7954 ;-------------------------------------------------------------
7955 ; fclr - flag register clear
7956 ; fset - flag register set
7957 ;-------------------------------------------------------------
7959 (define-pmacro (set-flags-sem flag)
7960 (sequence ((SI tmp))
7961 (case DFLT flag
7962 ((#x0) (set cbit 1))
7963 ((#x1) (set dbit 1))
7964 ((#x2) (set zbit 1))
7965 ((#x3) (set sbit 1))
7966 ((#x4) (set bbit 1))
7967 ((#x5) (set obit 1))
7968 ((#x6) (set ibit 1))
7969 ((#x7) (set ubit 1)))
7970 )
7971 )
7973 (define-pmacro (clear-flags-sem flag)
7974 (sequence ((SI tmp))
7975 (case DFLT flag
7976 ((#x0) (set cbit 0))
7977 ((#x1) (set dbit 0))
7978 ((#x2) (set zbit 0))
7979 ((#x3) (set sbit 0))
7980 ((#x4) (set bbit 0))
7981 ((#x5) (set obit 0))
7982 ((#x6) (set ibit 0))
7983 ((#x7) (set ubit 0)))
7984 )
7985 )
7987 (dni fclr16 "fclr flag" ((machine 16))
7988 ("fclr ${flags16}")
7989 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 5))
7990 (clear-flags-sem flags16)
7991 ())
7993 (dni fset16 "fset flag" ((machine 16))
7994 ("fset ${flags16}")
7995 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 4))
7996 (set-flags-sem flags16)
7997 ())
7999 (dni fclr "fclr" ((machine 32))
8000 ("fclr ${flags32}")
8001 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xE) (f-12-1 1) flags32)
8002 (clear-flags-sem flags32)
8003 ())
8005 (dni fset "fset" ((machine 32))
8006 ("fset ${flags32}")
8007 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xE) (f-12-1 1) flags32)
8008 (set-flags-sem flags32)
8009 ())
8011 ;-------------------------------------------------------------
8012 ; inc - increment
8013 ;-------------------------------------------------------------
8015 (define-pmacro (inc-sem mode dest)
8016 (sequence ((mode result))
8017 (set result (add mode dest 1))
8018 (set-z-and-s result)
8019 (set dest result))
8020 )
8022 (dni inc16.b
8023 "inc.b Dst16-3-S-8"
8024 ((machine 16))
8025 "inc.b ${Dst16-3-S-8}"
8026 (+ (f-0-4 #xA) (f-4-1 #x0) Dst16-3-S-8)
8027 (inc-sem QI Dst16-3-S-8)
8028 ())
8030 (dni inc16.w
8031 "inc.w Dst16An-S"
8032 ((machine 16))
8033 "inc.w ${Dst16An-S}"
8034 (+ (f-0-4 #xB) (f-5-3 #x2) Dst16An-S)
8035 (inc-sem HI Dst16An-S)
8036 ())
8038 (unary32-defn QI .b 0 inc #xA #x0 #xE inc-sem)
8039 (unary32-defn HI .w 1 inc #xA #x0 #xE inc-sem)
8041 ;-------------------------------------------------------------
8042 ; freit - fast return from interrupt (m32)
8043 ; int - interrupt
8044 ; into - interrupt on overflow
8045 ;-------------------------------------------------------------
8047 ; ??? semantics
8048 (dni freit32 "FREIT" ((machine 32))
8049 ("freit")
8050 (+ (f-0-4 9) (f-4-4 #xF))
8051 (nop)
8052 ())
8054 (dni int16 "int Dsp-10-u6" ((machine 16))
8055 ("int #${Dsp-10-u6}")
8056 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-2 3) Dsp-10-u6)
8057 (c-call VOID "do_int" pc Dsp-10-u6)
8058 ())
8060 (dni into16 "into" ((machine 16))
8061 ("into")
8062 (+ (f-0-4 #xF) (f-4-4 6))
8063 (nop)
8064 ())
8066 (dni int32 "int Dsp-8-u6" ((machine 32))
8067 ("int #${Dsp-8-u6}")
8068 (+ (f-0-4 #xB) (f-4-4 #xE) Dsp-8-u6 (f-14-2 0))
8069 (c-call VOID "do_int" pc Dsp-8-u6)
8070 ())
8072 (dni into32 "into" ((machine 32))
8073 ("into")
8074 (+ (f-0-4 #xB) (f-4-4 #xF))
8075 (nop)
8076 ())
8078 ;-------------------------------------------------------------
8079 ; index (m32c)
8080 ;-------------------------------------------------------------
8082 ; TODO add support to insns allowing index
8083 (define-pmacro (indexb-sem mode d) (set SrcIndex d) (set DstIndex d))
8084 (define-pmacro (indexbd-sem mode d) (set SrcIndex (const 0)) (set DstIndex d))
8085 (define-pmacro (indexbs-sem mode d) (set SrcIndex d) (set DstIndex (const 0)))
8086 (define-pmacro (indexw-sem mode d)
8087 (set SrcIndex (sll d (const 2))) (set DstIndex (sll d (const 2))))
8088 (define-pmacro (indexwd-sem mode d)
8089 (set SrcIndex (const 0)) (set DstIndex (sll d (const 2))))
8090 (define-pmacro (indexws-sem mode d)
8091 (set SrcIndex (sll d (const 2))) (set DstIndex (const 0)))
8092 (define-pmacro (indexl-sem mode d)
8093 (set SrcIndex d) (set DstIndex (sll d (const 2))))
8094 (define-pmacro (indexld-sem mode d)
8095 (set SrcIndex (const 0)) (set DstIndex (sll d (const 2))))
8096 (define-pmacro (indexls-sem mode d)
8097 (set SrcIndex (sll d (const 2))) (set DstIndex (const 0)))
8099 ; Note that "wbit" not where the size bit goes here, hence, it's
8100 ; always 0 in these calls but op2 differs instead.
8102 ; indexb src (index byte)
8103 (unary32-defn QI .b 0 indexb #x8 0 #x3 indexb-sem)
8104 (unary32-defn HI .w 0 indexb #x8 1 #x3 indexb-sem)
8105 ; indexbd src (index byte dest)
8106 (unary32-defn QI .b 0 indexbd #xA 0 3 indexbd-sem)
8107 (unary32-defn HI .w 0 indexbd #xA 1 3 indexbd-sem)
8108 ; indexbs src (index byte src)
8109 (unary32-defn QI .b 0 indexbs #xC 0 3 indexbs-sem)
8110 (unary32-defn HI .w 0 indexbs #xC 1 3 indexbs-sem)
8111 ; indexl src (index long)
8112 (unary32-defn QI .b 0 indexl 9 2 3 indexl-sem)
8113 (unary32-defn HI .w 0 indexl 9 3 3 indexl-sem)
8114 ; indexld src (index long dest)
8115 (unary32-defn QI .b 0 indexld #xB 2 3 indexld-sem)
8116 (unary32-defn HI .w 0 indexld #xB 3 3 indexld-sem)
8117 ; indexls src (index long src)
8118 (unary32-defn QI .b 0 indexls 9 0 3 indexls-sem)
8119 (unary32-defn HI .w 0 indexls 9 1 3 indexls-sem)
8120 ; indexw src (index word)
8121 (unary32-defn QI .b 0 indexw 8 2 3 indexw-sem)
8122 (unary32-defn HI .w 0 indexw 8 3 3 indexw-sem)
8123 ; indexwd src (index word dest)
8124 (unary32-defn QI .b 0 indexwd #xA 2 3 indexwd-sem)
8125 (unary32-defn HI .w 0 indexwd #xA 3 3 indexwd-sem)
8126 ; indexws (index word src)
8127 (unary32-defn QI .b 0 indexws #xC 2 3 indexws-sem)
8128 (unary32-defn HI .w 0 indexws #xC 3 3 indexws-sem)
8130 ;-------------------------------------------------------------
8131 ; jcc - jump on condition
8132 ;-------------------------------------------------------------
8134 (define-pmacro (jcnd32-sem cnd label)
8135 (sequence ()
8136 (case DFLT cnd
8137 ((#x00) (if (not cbit) (set pc label))) ;ltu nc
8138 ((#x01) (if (not (and cbit (not zbit))) (set pc label))) ;leu
8139 ((#x02) (if (not zbit) (set pc label))) ;ne nz
8140 ((#x03) (if (not sbit) (set pc label))) ;pz
8141 ((#x04) (if (not obit) (set pc label))) ;no
8142 ((#x05) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt
8143 ((#x06) (if (not (xor sbit obit)) (set pc label))) ;ge
8144 ((#x08) (if (trunc BI cbit) (set pc label))) ;geu c
8145 ((#x09) (if (and cbit (not zbit)) (set pc label))) ;gtu
8146 ((#x0a) (if (trunc BI zbit) (set pc label))) ;eq z
8147 ((#x0b) (if (trunc BI sbit) (set pc label))) ;n
8148 ((#x0c) (if (trunc BI obit) (set pc label))) ;o
8149 ((#x0d) (if (or zbit (xor sbit obit)) (set pc label))) ;le
8150 ((#x0e) (if (xor sbit obit) (set pc label))) ;lt
8151 )
8152 )
8153 )
8155 (define-pmacro (jcnd16-sem cnd label)
8156 (sequence ()
8157 (case DFLT cnd
8158 ((#x00) (if (trunc BI cbit) (set pc label))) ;geu c
8159 ((#x01) (if (and cbit (not zbit)) (set pc label))) ;gtu
8160 ((#x02) (if (trunc BI zbit) (set pc label))) ;eq z
8161 ((#x03) (if (trunc BI sbit) (set pc label))) ;n
8162 ((#x04) (if (not cbit) (set pc label))) ;ltu nc
8163 ((#x05) (if (not (and cbit (not zbit))) (set pc label))) ;leu
8164 ((#x06) (if (not zbit) (set pc label))) ;ne nz
8165 ((#x07) (if (not sbit) (set pc label))) ;pz
8166 ((#x08) (if (or zbit (xor sbit obit)) (set pc label))) ;le
8167 ((#x09) (if (trunc BI obit) (set pc label))) ;o
8168 ((#x0a) (if (not (xor sbit obit)) (set pc label))) ;ge
8169 ((#x0c) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt
8170 ((#x0d) (if (not obit) (set pc label))) ;no
8171 ((#x0e) (if (xor sbit obit) (set pc label))) ;lt
8172 )
8173 )
8174 )
8176 (dni jcnd16-5
8177 "jCnd label"
8178 (RL_JUMP RELAXABLE (machine 16))
8179 "j$cond16j5 ${Lab-8-8}"
8180 (+ (f-0-4 #x6) (f-4-1 1) cond16j5 Lab-8-8)
8181 (jcnd16-sem cond16j5 Lab-8-8)
8182 ()
8183 )
8185 (dni jcnd16
8186 "jCnd label"
8187 (RL_JUMP RELAXABLE (machine 16))
8188 "j$cond16j ${Lab-16-8}"
8189 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xC) cond16j Lab-16-8)
8190 (jcnd16-sem cond16j Lab-16-8)
8191 ()
8192 )
8194 (dni jcnd32
8195 "jCnd label"
8196 (RL_JUMP RELAXABLE (machine 32))
8197 "j$cond32j ${Lab-8-8}"
8198 (+ (f-0-1 1) (f-4-3 5) cond32j Lab-8-8)
8199 (jcnd32-sem cond32j Lab-8-8)
8200 ()
8201 )
8203 ;-------------------------------------------------------------
8204 ; jmp - jump
8205 ;-------------------------------------------------------------
8207 ; jmp.s label3 (m16 #1)
8208 (dni jmp16.s "jmp.s Lab-5-3" (RL_JUMP RELAXABLE (machine 16))
8209 ("jmp.s ${Lab-5-3}")
8210 (+ (f-0-4 6) (f-4-1 0) Lab-5-3)
8211 (sequence () (set pc Lab-5-3))
8212 ())
8213 ; jmp.b label8 (m16 #2)
8214 (dni jmp16.b "jmp.b Lab-8-8" (RL_JUMP RELAXABLE (machine 16))
8215 ("jmp.b ${Lab-8-8}")
8216 (+ (f-0-4 #xF) (f-4-4 #xE) Lab-8-8)
8217 (sequence () (set pc Lab-8-8))
8218 ())
8219 ; jmp.w label16 (m16 #3)
8220 (dni jmp16.w "jmp.w Lab-8-16" (RL_JUMP RELAXABLE (machine 16))
8221 ("jmp.w ${Lab-8-16}")
8222 (+ (f-0-4 #xF) (f-4-4 4) Lab-8-16)
8223 (sequence () (set pc Lab-8-16))
8224 ())
8225 ; jmp.a label24 (m16 #4)
8226 (dni jmp16.a "jmp.a Lab-8-24" (RL_JUMP RELAXABLE (machine 16))
8227 ("jmp.a ${Lab-8-24}")
8228 (+ (f-0-4 #xF) (f-4-4 #xC) Lab-8-24)
8229 (sequence () (set pc Lab-8-24))
8230 ())
8232 (define-pmacro (jmp16-sem mode dst)
8233 (set pc (and dst #xfffff))
8234 )
8235 (define-pmacro (jmp32-sem mode dst)
8236 (set pc dst)
8237 )
8238 ; jmpi.w dst (m16 #1 m32 #2)
8239 (unary-insn-defn 16 16 HI .w jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 2) dst16-16-HI) jmp16-sem)
8240 (unary-insn-defn 32 16-Unprefixed HI .w jmpi (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x0) (f-12-4 #xF)) jmp32-sem)
8241 ; jmpi.a dst (m16 #2 m32 #2)
8242 (unary-insn-defn 16 16 SI .a jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 0) dst16-16-SI) jmp16-sem)
8243 (unary-insn-defn 32 16-Unprefixed SI .a jmpi (+ (f-0-4 #x8) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 #x0) (f-12-4 1)) jmp32-sem)
8244 ; jmps imm8 (m16 #1)
8245 (dni jmps16 "jmps Imm-8-QI" ((machine 16))
8246 ("jmps #${Imm-8-QI}")
8247 (+ (f-0-4 #xE) (f-4-4 #xE) Imm-8-QI)
8248 (sequence () (set pc Imm-8-QI))
8249 ())
8250 ; jmp.s label3 (m32 #1)
8251 (dni jmp32.s
8252 "jmp.s label"
8253 (RL_JUMP RELAXABLE (machine 32))
8254 "jmp.s ${Lab32-jmp-s}"
8255 (+ (f-0-2 1) (f-4-3 5) Lab32-jmp-s)
8256 (set pc Lab32-jmp-s)
8257 ()
8258 )
8259 ; jmp.b label8 (m32 #2)
8260 (dni jmp32.b "jmp.b Lab-8-8" (RL_JUMP RELAXABLE (machine 32))
8261 ("jmp.b ${Lab-8-8}")
8262 (+ (f-0-4 #xB) (f-4-4 #xB) Lab-8-8)
8263 (set pc Lab-8-8)
8264 ())
8265 ; jmp.w label16 (m32 #3)
8266 (dni jmp32.w "jmp.w Lab-8-16" (RL_JUMP RELAXABLE (machine 32))
8267 ("jmp.w ${Lab-8-16}")
8268 (+ (f-0-4 #xC) (f-4-4 #xE) Lab-8-16)
8269 (set pc Lab-8-16)
8270 ())
8271 ; jmp.a label24 (m32 #4)
8272 (dni jmp32.a "jmp.a Lab-8-24" (RL_JUMP RELAXABLE (machine 32))
8273 ("jmp.a ${Lab-8-24}")
8274 (+ (f-0-4 #xC) (f-4-4 #xC) Lab-8-24)
8275 (set pc Lab-8-24)
8276 ())
8277 ; jmp.s imm8 (m32 #1)
8278 (dni jmps32 "jmps Imm-8-QI" (RL_JUMP (machine 32))
8279 ("jmps #${Imm-8-QI}")
8280 (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI)
8281 (set pc Imm-8-QI)
8282 ())
8284 ;-------------------------------------------------------------
8285 ; jsr jump subroutine
8286 ;-------------------------------------------------------------
8288 (define-pmacro (jsr16-sem length dst)
8289 (sequence ((SI tpc))
8290 (set tpc (add pc length))
8291 (set (reg h-sp) (sub (reg h-sp) 2))
8292 (set (mem16 HI (reg h-sp)) (srl (and tpc #xffff00) 8))
8293 (set (reg h-sp) (sub (reg h-sp) 1))
8294 (set (mem16 QI (reg h-sp)) (and tpc #xff))
8295 (set pc dst)
8296 )
8297 )
8298 (define-pmacro (jsr32-sem length dst)
8299 (sequence ((SI tpc))
8300 (set tpc (add pc length))
8301 (set (reg h-sp) (sub (reg h-sp) 2))
8302 (set (mem32 HI (reg h-sp)) (srl (and tpc #xffff0000) 16))
8303 (set (reg h-sp) (sub (reg h-sp) 2))
8304 (set (mem32 HI (reg h-sp)) (and tpc #xffff))
8305 (set pc dst)
8306 )
8307 )
8309 ; jsr.w label16 (m16 #1)
8310 (dni jsr16.w "jsr.w Lab-8-16" (RL_JUMP RELAXABLE (machine 16))
8311 ("jsr.w ${Lab-8-16}")
8312 (+ (f-0-4 #xF) (f-4-4 5) Lab-8-16)
8313 (jsr16-sem 3 Lab-8-16)
8314 ())
8315 ; jsr.a label24 (m16 #2)
8316 (dni jsr16.a "jsr.a Lab-8-24" (RL_JUMP RELAXABLE (machine 16))
8317 ("jsr.a ${Lab-8-24}")
8318 (+ (f-0-4 #xF) (f-4-4 #xD) Lab-8-24)
8319 (jsr16-sem 4 Lab-8-24)
8320 ())
8321 (define-pmacro (jsri-defn mode op16 op16-1 op16-2 op16-3 op16-sem
8322 op32 op32-1 op32-2 op32-3 op32-4 op32-sem len)
8323 (begin
8324 (dni (.sym jsri16 mode - op16)
8325 (.str "jsri." mode " " op16)
8326 (RL_1ADDR (machine 16))
8327 (.str "jsri." mode " ${" op16 "}")
8328 (+ op16-1 op16-2 op16-3 op16)
8329 (op16-sem len op16)
8330 ())
8331 (dni (.sym jsri32 mode - op32)
8332 (.str "jsri." mode " " op32)
8333 (RL_1ADDR (machine 32))
8334 (.str "jsri." mode " ${" op32 "}")
8335 (+ op32-1 op32-2 op32-3 op32-4 op32)
8336 (op32-sem len op32)
8337 ())
8338 )
8339 )
8340 ; jsri.w dst (m16 #1 m32 #1))
8341 (jsri-defn w dst16-16-20ar-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8342 dst32-16-24-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 4)
8343 (jsri-defn w dst16-16-16sa-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8344 dst32-16-16sa-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 4)
8345 (jsri-defn w dst16-16-8-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8346 dst32-16-8-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 3)
8347 (jsri-defn w dst16-basic-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8348 dst32-basic-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 2)
8350 ; jsri.a (m16 #2 m32 #2)
8351 (jsri-defn a dst16-16-20ar-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8352 dst32-16-24-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 4)
8353 (jsri-defn a dst16-16-8-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8354 dst32-16-8-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 3)
8355 (jsri-defn a dst16-16-16sa-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8356 dst32-16-16sa-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 4)
8357 (jsri-defn a dst16-basic-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8358 dst32-basic-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 2)
8360 (dni jsri32.a "jsr.w dst32-16-24-Unprefixed-HI" (RL_1ADDR (machine 32))
8361 ("jsri.a ${dst32-16-24-Unprefixed-SI}")
8362 (+ (f-0-4 #x9) (f-7-1 0) dst32-16-24-Unprefixed-SI (f-10-2 #x0) (f-12-4 #x1))
8363 (jsr32-sem 6 dst32-16-24-Unprefixed-SI)
8364 ())
8365 ; jsr.w label16 (m32 #1)
8366 (dni jsr32.w "jsr.w label" (RL_JUMP RELAXABLE (machine 32))
8367 ("jsr.w ${Lab-8-16}")
8368 (+ (f-0-4 #xC) (f-4-4 #xF) Lab-8-16)
8369 (jsr32-sem 3 Lab-8-16)
8370 ())
8371 ; jsr.a label16 (m32 #2)
8372 (dni jsr32.a "jsr.a label" (RL_JUMP (machine 32))
8373 ("jsr.a ${Lab-8-24}")
8374 (+ (f-0-4 #xC) (f-4-4 #xD) Lab-8-24)
8375 (jsr32-sem 4 Lab-8-24)
8376 ())
8377 ; jsrs imm8 (m16 #1)
8378 (dni jsrs16 "jsrs Imm-8-QI" ((machine 16))
8379 ("jsrs #${Imm-8-QI}")
8380 (+ (f-0-4 #xE) (f-4-4 #xF) Imm-8-QI)
8381 (jsr16-sem 2 Imm-8-QI)
8382 ())
8383 ; jsrs imm8 (m32 #1)
8384 (dni jsrs "jsrs #Imm-8-QI" ((machine 32))
8385 ("jsrs #${Imm-8-QI}")
8386 (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI)
8387 (jsr32-sem 2 Imm-8-QI)
8388 ())
8390 ;-------------------------------------------------------------
8391 ; ldc - load control register
8392 ; stc - store control register
8393 ;-------------------------------------------------------------
8395 (define-pmacro (ldc32-cr1-sem src dst)
8396 (sequence ()
8397 (case DFLT dst
8398 ((#x0) (set (reg h-dct0) src))
8399 ((#x1) (set (reg h-dct1) src))
8400 ((#x2) (sequence ((HI tflag))
8401 (set tflag src)
8402 (if (and tflag #x1) (set cbit 1))
8403 (if (and tflag #x2) (set dbit 1))
8404 (if (and tflag #x4) (set zbit 1))
8405 (if (and tflag #x8) (set sbit 1))
8406 (if (and tflag #x10) (set bbit 1))
8407 (if (and tflag #x20) (set obit 1))
8408 (if (and tflag #x40) (set ibit 1))
8409 (if (and tflag #x80) (set ubit 1))))
8410 ((#x3) (set (reg h-svf) src))
8411 ((#x4) (set (reg h-drc0) src))
8412 ((#x5) (set (reg h-drc1) src))
8413 ((#x6) (set (reg h-dmd0) src))
8414 ((#x7) (set (reg h-dmd1) src))
8415 )
8416 )
8417 )
8418 (define-pmacro (ldc32-cr2-sem src dst)
8419 (sequence ()
8420 (case DFLT dst
8421 ((#x0) (set (reg h-intb) src))
8422 ((#x1) (set (reg h-sp) src))
8423 ((#x2) (set (reg h-sb) src))
8424 ((#x3) (set (reg h-fb) src))
8425 ((#x4) (set (reg h-svp) src))
8426 ((#x5) (set (reg h-vct) src))
8427 ((#x7) (set (reg h-isp) src))
8428 )
8429 )
8430 )
8431 (define-pmacro (ldc32-cr3-sem src dst)
8432 (sequence ()
8433 (case DFLT dst
8434 ((#x2) (set (reg h-dma0) src))
8435 ((#x3) (set (reg h-dma1) src))
8436 ((#x4) (set (reg h-dra0) src))
8437 ((#x5) (set (reg h-dra1) src))
8438 ((#x6) (set (reg h-dsa0) src))
8439 ((#x7) (set (reg h-dsa1) src))
8440 )
8441 )
8442 )
8443 (define-pmacro (ldc16-sem src dst)
8444 (sequence ()
8445 (case DFLT dst
8446 ((#x1) (set (reg h-intb) src))
8447 ((#x2) (set (reg h-intb) (or (reg h-intb) (sll src (const 16)))))
8448 ((#x3) (sequence ((HI tflag))
8449 (set tflag src)
8450 (if (and tflag #x1) (set cbit 1))
8451 (if (and tflag #x2) (set dbit 1))
8452 (if (and tflag #x4) (set zbit 1))
8453 (if (and tflag #x8) (set sbit 1))
8454 (if (and tflag #x10) (set bbit 1))
8455 (if (and tflag #x20) (set obit 1))
8456 (if (and tflag #x40) (set ibit 1))
8457 (if (and tflag #x80) (set ubit 1))))
8458 ((#x4) (set (reg h-isp) src))
8459 ((#x5) (set (reg h-sp) src))
8460 ((#x6) (set (reg h-sb) src))
8461 ((#x7) (set (reg h-fb) src))
8462 )
8463 )
8464 )
8466 (define-pmacro (stc32-cr1-sem src dst)
8467 (sequence ()
8468 (case DFLT src
8469 ((#x0) (set dst (reg h-dct0)))
8470 ((#x1) (set dst (reg h-dct1)))
8471 ((#x2) (sequence ((HI tflag))
8472 (set tflag 0)
8473 (if (eq cbit 1) (set tflag (or tflag #x1)))
8474 (if (eq dbit 1) (set tflag (or tflag #x2)))
8475 (if (eq zbit 1) (set tflag (or tflag #x4)))
8476 (if (eq sbit 1) (set tflag (or tflag #x8)))
8477 (if (eq bbit 1) (set tflag (or tflag #x10)))
8478 (if (eq obit 1) (set tflag (or tflag #x20)))
8479 (if (eq ibit 1) (set tflag (or tflag #x40)))
8480 (if (eq ubit 1) (set tflag (or tflag #x80)))
8481 (set dst tflag)))
8482 ((#x3) (set dst (reg h-svf)))
8483 ((#x4) (set dst (reg h-drc0)))
8484 ((#x5) (set dst (reg h-drc1)))
8485 ((#x6) (set dst (reg h-dmd0)))
8486 ((#x7) (set dst (reg h-dmd1)))
8487 )
8488 )
8489 )
8490 (define-pmacro (stc32-cr2-sem src dst)
8491 (sequence ()
8492 (case DFLT src
8493 ((#x0) (set dst (reg h-intb)))
8494 ((#x1) (set dst (reg h-sp)))
8495 ((#x2) (set dst (reg h-sb)))
8496 ((#x3) (set dst (reg h-fb)))
8497 ((#x4) (set dst (reg h-svp)))
8498 ((#x5) (set dst (reg h-vct)))
8499 ((#x7) (set dst (reg h-isp)))
8500 )
8501 )
8502 )
8503 (define-pmacro (stc32-cr3-sem src dst)
8504 (sequence ()
8505 (case DFLT src
8506 ((#x2) (set dst (reg h-dma0)))
8507 ((#x3) (set dst (reg h-dma1)))
8508 ((#x4) (set dst (reg h-dra0)))
8509 ((#x5) (set dst (reg h-dra1)))
8510 ((#x6) (set dst (reg h-dsa0)))
8511 ((#x7) (set dst (reg h-dsa1)))
8512 )
8513 )
8514 )
8515 (define-pmacro (stc16-sem src dst)
8516 (sequence ()
8517 (case DFLT src
8518 ((#x1) (set dst (and (reg h-intb) (const #xffff))))
8519 ((#x2) (set dst (srl (reg h-intb) (const 16))))
8520 ((#x3) (sequence ((HI tflag))
8521 (set tflag 0)
8522 (if (eq cbit 1) (set tflag (or tflag #x1)))
8523 (if (eq dbit 1) (set tflag (or tflag #x2)))
8524 (if (eq zbit 1) (set tflag (or tflag #x4)))
8525 (if (eq sbit 1) (set tflag (or tflag #x8)))
8526 (if (eq bbit 1) (set tflag (or tflag #x10)))
8527 (if (eq obit 1) (set tflag (or tflag #x20)))
8528 (if (eq ibit 1) (set tflag (or tflag #x40)))
8529 (if (eq ubit 1) (set tflag (or tflag #x80)))
8530 (set dst tflag)))
8531 ((#x4) (set dst (reg h-isp)))
8532 ((#x5) (set dst (reg h-sp)))
8533 ((#x6) (set dst (reg h-sb)))
8534 ((#x7) (set dst (reg h-fb)))
8535 )
8536 )
8537 )
8539 (dni ldc16.imm16 "ldc #imm,dst" ((machine 16))
8540 ("ldc #${Imm-16-HI},${cr16}")
8541 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 0) cr16 Imm-16-HI)
8542 (ldc16-sem Imm-16-HI cr16)
8543 ())
8545 (dni ldc16.dst "ldc src,dest" ((machine 16))
8546 ("ldc ${dst16-16-HI},${cr16}")
8547 (+ (f-0-4 7) (f-4-4 #xA) (f-8-1 1) cr16 dst16-16-HI)
8548 (ldc16-sem dst16-16-HI cr16)
8549 ())
8550 ; ldc src,dest (m32c #4)
8551 (dni ldc32.src-cr1 "ldc src,dst" ((machine 32))
8552 ("ldc ${dst32-24-Prefixed-HI},${cr1-Prefixed-32}")
8553 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI (f-15-1 1) (f-18-2 0) (f-20-1 1) cr1-Prefixed-32)
8554 (ldc32-cr1-sem dst32-24-Prefixed-HI cr1-Prefixed-32)
8555 ())
8556 ; ldc src,dest (m32c #5)
8557 (dni ldc32.src-cr2 "ldc src,dest" ((machine 32))
8558 ("ldc ${dst32-16-Unprefixed-SI},${cr2-32}")
8559 (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 0) cr2-32)
8560 (ldc32-cr2-sem dst32-16-Unprefixed-SI cr2-32)
8561 ())
8562 ; ldc src,dest (m32c #6)
8563 (dni ldc32.src-cr3 "ldc src,dst" ((machine 32))
8564 ("ldc ${dst32-24-Prefixed-SI},${cr3-Prefixed-32}")
8565 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 0) (f-20-1 0) cr3-Prefixed-32)
8566 (ldc32-cr3-sem dst32-24-Prefixed-SI cr3-Prefixed-32)
8567 ())
8568 ; ldc src,dest (m32c #1)
8569 (dni ldc32.imm16-cr1 "ldc #imm,dst" ((machine 32))
8570 ("ldc #${Imm-16-HI},${cr1-Unprefixed-32}")
8571 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32 Imm-16-HI)
8572 (ldc32-cr1-sem Imm-16-HI cr1-Unprefixed-32)
8573 ())
8574 ; ldc src,dest (m32c #2)
8575 (dni ldc32.imm16-cr2 "ldc #imm,dst" ((machine 32))
8576 ("ldc #${Dsp-16-u24},${cr2-32}")
8577 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 2) (f-12-1 1) cr2-32 Dsp-16-u24)
8578 (ldc32-cr2-sem Dsp-16-u24 cr2-32)
8579 ())
8580 ; ldc src,dest (m32c #3)
8581 (dni ldc32.imm16-cr3 "ldc #imm,dst" ((machine 32))
8582 ("ldc #${Dsp-16-u24},${cr3-Unprefixed-32}")
8583 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 6) (f-12-1 1) cr3-Unprefixed-32 Dsp-16-u24)
8584 (ldc32-cr3-sem Dsp-16-u24 cr3-Unprefixed-32)
8585 ())
8587 (dni stc16.src "stc src,dest" ((machine 16))
8588 ("stc ${cr16},${dst16-16-HI}")
8589 (+ (f-0-4 7) (f-4-4 #xB) (f-8-1 1) cr16 dst16-16-HI)
8590 (stc16-sem cr16 dst16-16-HI )
8591 ())
8593 (dni stc16.pc "stc pc,dest" ((machine 16))
8594 ("stc pc,${dst16-16-HI}")
8595 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xC) dst16-16-HI)
8596 (sequence () (set dst16-16-HI (reg h-pc)))
8597 ())
8599 (dni stc32.src-cr1 "stc src,dst" ((machine 32))
8600 ("stc ${cr1-Prefixed-32},${dst32-24-Prefixed-HI}")
8601 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI (f-15-1 1) (f-18-2 1) (f-20-1 1) cr1-Prefixed-32)
8602 (stc32-cr1-sem cr1-Prefixed-32 dst32-24-Prefixed-HI )
8603 ())
8605 (dni stc32.src-cr2 "stc src,dest" ((machine 32))
8606 ("stc ${cr2-32},${dst32-16-Unprefixed-SI}")
8607 (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 2) cr2-32)
8608 (stc32-cr2-sem cr2-32 dst32-16-Unprefixed-SI )
8609 ())
8611 (dni stc32.src-cr3 "stc src,dst" ((machine 32))
8612 ("stc ${cr3-Prefixed-32},${dst32-24-Prefixed-SI}")
8613 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 1) (f-20-1 0) cr3-Prefixed-32)
8614 (stc32-cr3-sem cr3-Prefixed-32 dst32-24-Prefixed-SI )
8615 ())
8617 ;-------------------------------------------------------------
8618 ; ldctx - load context
8619 ; stctx - store context
8620 ;-------------------------------------------------------------
8622 ; ??? semantics
8623 (dni ldctx16 "ldctx abs16,abs24" ((machine 16))
8624 ("ldctx ${Dsp-16-u16},${Dsp-32-u24}")
8625 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24)
8626 (nop)
8627 ())
8628 (dni ldctx32 "ldctx abs16,abs24" ((machine 32))
8629 ("ldctx ${Dsp-16-u16},${Dsp-32-u24}")
8630 (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xC) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24)
8631 (nop)
8632 ())
8633 (dni stctx16 "stctx abs16,abs24" ((machine 16))
8634 ("stctx ${Dsp-16-u16},${Dsp-32-u24}")
8635 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24)
8636 (nop)
8637 ())
8638 (dni stctx32 "stctx abs16,abs24" ((machine 32))
8639 ("stctx ${Dsp-16-u16},${Dsp-32-u24}")
8640 (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xD) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24)
8641 (nop)
8642 ())
8644 ;-------------------------------------------------------------
8645 ; lde - load from extra far data area (m16)
8646 ; ste - store to extra far data area (m16)
8647 ;-------------------------------------------------------------
8649 (lde-dst QI .b 0)
8650 (lde-dst HI .w 1)
8652 (ste-dst QI .b 0)
8653 (ste-dst HI .w 1)
8655 ;-------------------------------------------------------------
8656 ; ldipl - load interrupt permission level
8657 ;-------------------------------------------------------------
8659 ; ??? semantics
8660 ; ldintb <==> ldc #imm,intbh ; ldc #imm,intbl
8662 (dni ldipl16.imm "ldipl #imm" ((machine 16))
8663 ("ldipl #${Imm-13-u3}")
8664 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xA) (f-12-1 0) Imm-13-u3)
8665 (nop)
8666 ())
8667 (dni ldipl32.imm "ldipl #imm" ((machine 32))
8668 ("ldipl #${Imm-13-u3}")
8669 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xE) (f-12-1 1) Imm-13-u3)
8670 (nop)
8671 ())
8674 ;-------------------------------------------------------------
8675 ; max - maximum value
8676 ;-------------------------------------------------------------
8678 ; TODO check semantics for min -1,0
8679 (define-pmacro (max-sem mode src dst)
8680 (sequence ()
8681 (if (gt mode src dst)
8682 (set mode dst src)))
8683 )
8685 ; max.size:G #imm,dst
8686 (binary-arith32-imm-dst-Prefixed QI QI .b 0 max X #x8 #x3 #xF max-sem)
8687 (binary-arith32-imm-dst-Prefixed HI HI .w 1 max X #x8 #x3 #xF max-sem)
8689 ; max.BW:G src,dst
8690 (binary-arith32-src-dst-Prefixed QI QI .b 0 max X #x1 #xD max-sem)
8691 (binary-arith32-src-dst-Prefixed HI HI .w 1 max X #x1 #xD max-sem)
8693 ;-------------------------------------------------------------
8694 ; min - minimum value
8695 ;-------------------------------------------------------------
8697 (define-pmacro (min-sem mode src dst)
8698 (sequence ()
8699 (if (lt mode src dst)
8700 (set mode dst src)))
8701 )
8703 ; min.size:G #imm,dst
8704 (binary-arith32-imm-dst-Prefixed QI QI .b 0 min X #x8 #x2 #xF min-sem)
8705 (binary-arith32-imm-dst-Prefixed HI HI .w 1 min X #x8 #x2 #xF min-sem)
8707 ; min.BW:G src,dst
8708 (binary-arith32-src-dst-Prefixed QI QI .b 0 min X #x1 #xC min-sem)
8709 (binary-arith32-src-dst-Prefixed HI HI .w 1 min X #x1 #xC min-sem)
8711 ;-------------------------------------------------------------
8712 ; mov - move
8713 ;-------------------------------------------------------------
8715 (define-pmacro (mov-sem mode src1 dst)
8716 (sequence ((mode result))
8717 (set result src1)
8718 (set-z-and-s result)
8719 (set mode dst src1))
8720 )
8722 (define-pmacro (mov-dspsp-dst-sem mach mode src1 dst)
8723 (set dst (mem-mach mach mode (add sp src1)))
8724 )
8726 (define-pmacro (mov-src-dspsp-sem mach mode src dst1)
8727 (set (mem-mach mach mode (add sp dst1)) src)
8728 )
8730 (define-pmacro (mov16-imm-an-defn size mode imm regn op1 op2)
8731 (dni (.sym mov16. size .S-imm- regn)
8732 (.str "mov." size ":S " imm "," regn)
8733 ((machine 16))
8734 (.str "mov." size "$S #${" imm "}," regn)
8735 (+ op1 op2 imm)
8736 (mov-sem mode imm (reg (.sym h- regn)))
8737 ())
8738 )
8739 ; mov.size:G #imm,dst (m16 #1 m32 #1)
8740 (binary-arith-imm-dst mov G (f-0-4 7) (f-4-3 2) (f-8-4 #xC) #x9 #x2 #xF mov-sem)
8741 ; mov.L:G #imm32,dst (m32 #2)
8742 (binary-arith32-imm-dst-defn SI SI .l 0 mov G #xB #x3 #x1 mov-sem)
8743 ; mov.BW:S #imm,dst2 (m32 #4)
8744 (binary-arith32-s-imm-dst QI .b 0 mov #x0 #x2 mov-sem)
8745 (binary-arith32-s-imm-dst HI .w 1 mov #x0 #x2 mov-sem)
8746 ; mov.b:S #imm8,dst3 (m16 #3)
8747 (binary-arith16-b-S-imm8-dst3 mov ".b" (f-0-4 #xC) (f-4-1 0) mov-sem)
8748 ; mov.b:S #imm8,aN (m16 #4)
8749 (mov16-imm-an-defn b QI Imm-8-QI a0 (f-0-4 #xE) (f-4-4 2))
8750 (mov16-imm-an-defn b QI Imm-8-QI a1 (f-0-4 #xE) (f-4-4 #xA))
8751 (mov16-imm-an-defn w HI Imm-8-HI a0 (f-0-4 #xA) (f-4-4 2))
8752 (mov16-imm-an-defn w HI Imm-8-HI a1 (f-0-4 #xA) (f-4-4 #xA))
8753 ; mov.WL:S #imm,A0/A1 (m32 #5)
8754 (define-pmacro (mov32-wl-s-defn mode sz op1 imm regn op2)
8755 (dni (.sym mov32- sz - regn)
8756 (.str "mov." sz ":s" imm "," regn)
8757 ((machine 32))
8758 (.str "mov." sz "$S #${" imm "}," regn)
8759 (+ (f-0-4 op1) (f-4-4 op2) imm)
8760 (mov-sem mode imm (reg (.sym h- regn)))
8761 ())
8762 )
8763 (mov32-wl-s-defn HI w #x9 Imm-8-HI a0 #xC)
8764 (mov32-wl-s-defn HI w #x9 Imm-8-HI a1 #xD)
8765 (mov32-wl-s-defn SI l #xB Dsp-8-s24 a0 #xC)
8766 (mov32-wl-s-defn SI l #xB Dsp-8-s24 a1 #xD)
8768 ; mov.size:Q #imm4,dst (m16 #2 m32 #3)
8769 (binary-arith16-imm4-dst-defn QI .b 0 0 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
8770 (binary-arith16-imm4-dst-defn HI .w 0 1 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
8771 (binary-arith32-imm4-dst-defn QI .b 1 0 mov #x7 #x2 mov-sem)
8772 (binary-arith32-imm4-dst-defn HI .w 1 1 mov #x7 #x2 mov-sem)
8774 ; mov.BW:Z #0,dst (m16 #5 m32 #6)
8775 (dni mov16.b-Z-imm8-dst3
8776 "mov.b:Z #0,Dst16-3-S-8"
8777 ((machine 16))
8778 "mov.b$Z #0,${Dst16-3-S-8}"
8779 (+ (f-0-4 #xB) (f-4-1 #x0) Dst16-3-S-8)
8780 (mov-sem QI (const 0) Dst16-3-S-8)
8781 ())
8782 ; (binary-arith16-b-Z-imm8-dst3 mov ".b" (f-0-4 #xB) (f-4-1 0) mov-sem)
8783 (binary-arith32-z-imm-dst QI .b 0 mov #x0 #x1 mov-sem)
8784 (binary-arith32-z-imm-dst HI .w 1 mov #x0 #x1 mov-sem)
8785 ; mov.BW:G src,dst (m16 #6 m32 #7)
8786 (binary-arith-src-dst mov G (f-0-4 #x7) (f-4-3 1) #x1 #xB mov-sem)
8787 ; mov.B:S src2,a0/a1 (m16 #7)
8788 (dni (.sym mov 16 .b.S-An)
8789 (.str mov ".b:S src2,a[01]")
8790 ((machine 16))
8791 (.str mov ".b$S ${src16-2-S},${Dst16AnQI-S}")
8792 (+ (f-0-4 #x3) (f-4-1 0) Dst16AnQI-S src16-2-S)
8793 (mov-sem QI src16-2-S Dst16AnQI-S)
8794 ())
8795 (define-pmacro (mov16-b-s-an-defn op1 op2 op2c)
8796 (dni (.sym mov16.b.S- op1 - op2)
8797 (.str mov ".b:S " op1 "," op2)
8798 ((machine 16))
8799 (.str mov ".b$S " op1 "," op2)
8800 (+ (f-0-4 #x3) op2c)
8801 (mov-sem QI (reg (.sym h- op1)) (reg (.sym h- op2)))
8802 ())
8803 )
8804 (mov16-b-s-an-defn r0l a1 (f-4-4 #x4))
8805 (mov16-b-s-an-defn r0h a0 (f-4-4 #x0))
8807 ; mov.L:G src,dst (m32 #8)
8808 (binary-arith32-src-dst-defn SI SI .l 1 mov G #x1 #x3 mov-sem)
8809 ; mov.B:S r0l/r0h,dst2 (m16 #8)
8810 (dni (.sym mov 16 .b.S-Rn-An)
8811 (.str mov ".b:S r0[lh],src2")
8812 ((machine 16))
8813 (.str mov ".b$S ${Dst16RnQI-S},${src16-2-S}")
8814 (+ (f-0-4 #x0) (f-4-1 0) Dst16RnQI-S src16-2-S)
8815 (mov-sem QI src16-2-S Dst16RnQI-S)
8816 ())
8818 ; mov.B.S src2,r0l/r0h (m16 #9)
8819 (binary-arith16-b-S-src2 mov (f-0-4 0) (f-4-1 1) mov-sem)
8821 ; mov.BW:S src2,r0l/r0 (m32 #9)
8822 ; mov.BW:S src2,r1l/r1 (m32 #10)
8823 (define-pmacro (mov32-src-r sz szcode mode src dst opc1 opc2)
8824 (begin
8825 (dni (.sym mov32. sz - src - dst)
8826 (.str "mov." sz "src," dst)
8827 ((machine 32))
8828 (.str "mov." sz "$S ${" (.sym src - mode) "}," dst)
8829 (+ (f-0-2 opc1) (.sym src - mode) (f-4-3 opc2) (f-7-1 szcode))
8830 (mov-sem mode (.sym src - mode) (reg (.sym h- dst)))
8831 ())
8832 )
8833 )
8834 (mov32-src-r b 0 QI dst32-2-S-16 r0l 0 4)
8835 (mov32-src-r w 1 HI dst32-2-S-16 r0 0 4)
8836 (mov32-src-r b 0 QI dst32-2-S-8 r0l 0 4)
8837 (mov32-src-r w 1 HI dst32-2-S-8 r0 0 4)
8838 (mov32-src-r b 0 QI dst32-2-S-basic r1l 1 7)
8839 (mov32-src-r w 1 HI dst32-2-S-basic r1 1 7)
8840 (mov32-src-r b 0 QI dst32-2-S-16 r1l 1 7)
8841 (mov32-src-r w 1 HI dst32-2-S-16 r1 1 7)
8842 (mov32-src-r b 0 QI dst32-2-S-8 r1l 1 7)
8843 (mov32-src-r w 1 HI dst32-2-S-8 r1 1 7)
8845 ; mov.BW:S r0l/r0,dst2 (m32 #11)
8846 (define-pmacro (mov32-r-dest sz szcode mode src dst opc1 opc2)
8847 (begin
8848 (dni (.sym mov32. sz - src - dst)
8849 (.str "mov." sz "src," dst)
8850 ((machine 32))
8851 (.str "mov." sz "$S " src ",${" (.sym dst - mode) "}")
8852 (+ (f-0-2 opc1) (.sym dst - mode) (f-4-3 opc2) (f-7-1 szcode))
8853 (mov-sem mode (reg (.sym h- src)) (.sym dst - mode))
8854 ())
8855 )
8856 )
8857 (mov32-r-dest b 0 QI r0l dst32-2-S-16 0 0)
8858 (mov32-r-dest w 1 HI r0 dst32-2-S-16 0 0)
8859 (mov32-r-dest b 0 QI r0l dst32-2-S-8 0 0)
8860 (mov32-r-dest w 1 HI r0 dst32-2-S-8 0 0)
8862 ; mov.L:S src,A0/A1 (m32 #12)
8863 (define-pmacro (mov32-src-a src dst dstcode opc1 opc2)
8864 (begin
8865 (dni (.sym mov32. sz - src - dst)
8866 (.str "mov." sz "src," dst)
8867 ((machine 32))
8868 (.str "mov.l" "$S ${" (.sym src - SI) "}," dst)
8869 (+ (f-0-2 opc1) (.sym src - SI) (f-4-3 opc2) (f-7-1 dstcode))
8870 (mov-sem SI (.sym src - SI) (reg (.sym h- dst)))
8871 ())
8872 )
8873 )
8874 (mov32-src-a dst32-2-S-16 a0 0 1 4)
8875 (mov32-src-a dst32-2-S-16 a1 1 1 4)
8876 (mov32-src-a dst32-2-S-8 a0 0 1 4)
8877 (mov32-src-a dst32-2-S-8 a1 1 1 4)
8879 ; mov.BW:G dsp8[sp],dst (m16 #10 m32 #13)
8880 ; mov.BW:G src,dsp8[sp] (m16 #11 m32 #14)
8881 (mov-dspsp-dst mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #xB) #xB #x0 #xF mov-dspsp-dst-sem)
8882 (mov-src-dspsp mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #x3) #xA #x0 #xF mov-src-dspsp-sem)
8884 ;-------------------------------------------------------------
8885 ; mova - move effective address
8886 ;-------------------------------------------------------------
8888 (define-pmacro (mov16a-defn dst dstop dstcode)
8889 (dni (.sym mova16. src - dst)
8890 (.str "mova src," dst)
8891 ((machine 16))
8892 (.str "mova ${dst16-16-Mova-HI}," dst)
8893 (+ (f-0-4 #xE) (f-4-4 #xB) dst16-16-Mova-HI (f-8-4 dstcode))
8894 (sequence () (set HI (reg dstop) dst16-16-Mova-HI))
8895 ())
8896 )
8897 (mov16a-defn r0 h-r0 0)
8898 (mov16a-defn r1 h-r1 1)
8899 (mov16a-defn r2 h-r2 2)
8900 (mov16a-defn r3 h-r3 3)
8901 (mov16a-defn a0 h-a0 4)
8902 (mov16a-defn a1 h-a1 5)
8904 (define-pmacro (mov32a-defn dst dstop dstcode)
8905 (dni (.sym mova32. src - dst)
8906 (.str "mova src," dst)
8907 ((machine 32))
8908 (.str "mova ${dst32-16-Unprefixed-Mova-SI}," dst)
8909 (+ (f-0-4 #xD) dst32-16-Unprefixed-Mova-SI (f-7-1 1) (f-10-2 1) (f-12-1 1) (f-13-3 dstcode))
8910 (sequence () (set SI (reg dstop) dst32-16-Unprefixed-Mova-SI))
8911 ())
8912 )
8913 (mov32a-defn r2r0 h-r2r0 0)
8914 (mov32a-defn r3r1 h-r3r1 1)
8915 (mov32a-defn a0 h-a0 2)
8916 (mov32a-defn a1 h-a1 3)
8918 ;-------------------------------------------------------------
8919 ; movDir - move nibble
8920 ;-------------------------------------------------------------
8922 (define-pmacro (movdir-sem nib src dst)
8923 (sequence ((SI tmp))
8924 (case DFLT nib
8925 ((0) (set dst (or (and dst #xf0) (and src #xf))))
8926 ((1) (set dst (or (and dst #x0f) (sll (and src #xf) 4))))
8927 ((2) (set dst (or (and dst #xf0) (srl (and src #xf0) 4))))
8928 ((3) (set dst (or (and dst #x0f) (and src #xf0))))
8929 )
8930 )
8931 )
8932 ; movDir src,dst
8933 (define-pmacro (mov16dir-1-defn nib dircode dir)
8934 (dni (.sym mov nib 16 ".r0l-dst")
8935 (.str "mov" nib " r0l,dst")
8936 ((machine 16))
8937 (.str "mov" nib " r0l,${dst16-16-QI}")
8938 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI)
8939 (movdir-sem dircode (reg h-r0l) dst16-16-QI)
8940 ())
8941 )
8942 (mov16dir-1-defn ll 0 8)
8943 (mov16dir-1-defn lh 1 #xA)
8944 (mov16dir-1-defn hl 2 9)
8945 (mov16dir-1-defn hh 3 #xB)
8946 (define-pmacro (mov16dir-2-defn nib dircode dir)
8947 (dni (.sym mov nib 16 ".src-r0l")
8948 (.str "mov" nib " src,r0l")
8949 ((machine 16))
8950 (.str "mov" nib " ${dst16-16-QI},r0l")
8951 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI)
8952 (movdir-sem dircode dst16-16-QI (reg h-r0l))
8953 ())
8954 )
8955 (mov16dir-2-defn ll 0 0)
8956 (mov16dir-2-defn lh 1 2)
8957 (mov16dir-2-defn hl 2 1)
8958 (mov16dir-2-defn hh 3 3)
8960 (define-pmacro (mov32dir-1-defn nib o1o0)
8961 (dni (.sym mov nib 32 ".r0l-dst")
8962 (.str "mov" nib " r0l,dst")
8963 ((machine 32))
8964 (.str "mov" nib " r0l,${dst32-24-Prefixed-QI}")
8965 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xB) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE))
8966 (movdir-sem o1o0 (reg h-r0l) dst32-24-Prefixed-QI)
8967 ())
8968 )
8969 (mov32dir-1-defn ll 0)
8970 (mov32dir-1-defn lh 1)
8971 (mov32dir-1-defn hl 2)
8972 (mov32dir-1-defn hh 3)
8973 (define-pmacro (mov32dir-2-defn nib o1o0)
8974 (dni (.sym mov nib 32 ".src-r0l")
8975 (.str "mov" nib " src,r0l")
8976 ((machine 32))
8977 (.str "mov" nib " ${dst32-24-Prefixed-QI},r0l")
8978 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xA) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE))
8979 (movdir-sem o1o0 dst32-24-Prefixed-QI (reg h-r0l))
8980 ())
8981 )
8982 (mov32dir-2-defn ll 0)
8983 (mov32dir-2-defn lh 1)
8984 (mov32dir-2-defn hl 2)
8985 (mov32dir-2-defn hh 3)
8987 ;-------------------------------------------------------------
8988 ; movx - move extend sign (m32)
8989 ;-------------------------------------------------------------
8991 (define-pmacro (movx-sem mode src dst)
8992 (sequence ((SI source) (SI result))
8993 (set SI result src)
8994 (set-z-and-s result)
8995 (set dst result))
8996 )
8998 ; movx #imm,dst
8999 (binary-arith32-imm-dst-defn QI SI "" 0 movx X #xB #x1 #x1 movx-sem)
9001 ;-------------------------------------------------------------
9002 ; mul - multiply
9003 ;-------------------------------------------------------------
9005 (define-pmacro (mul-sem mode src1 dst)
9006 (sequence ((mode result))
9007 (set obit (add-oflag mode src1 dst 0))
9008 (set result (mul mode src1 dst))
9009 (set dst result))
9010 )
9012 ; mul.BW #imm,dst
9013 (binary-arith-imm-dst mul G (f-0-4 7) (f-4-3 6) (f-8-4 5) #x8 #x1 #xF mul-sem)
9014 ; mul.BW src,dst
9015 (binary-arith-src-dst mul G (f-0-4 #x7) (f-4-3 4) #x1 #xC mul-sem)
9017 (dni mul_l "mul.l src,r2r0" ((machine 32))
9018 ("mul.l ${dst32-24-Prefixed-SI},r2r0")
9019 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #x8) (f-15-1 #x1) (f-18-2 #x1) (f-20-4 #xf)
9020 dst32-24-Prefixed-SI)
9021 () ())
9023 (dni mulu_l "mulu.l src,r2r0" ((machine 32))
9024 ("mulu.l ${dst32-24-Prefixed-SI},r2r0")
9025 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #x8) (f-15-1 #x1) (f-18-2 #x0) (f-20-4 #xf)
9026 dst32-24-Prefixed-SI)
9027 () ())
9028 ;-------------------------------------------------------------
9029 ; mulex - multiple extend sign (m32)
9030 ;-------------------------------------------------------------
9032 ; mulex src,dst
9033 ; (dni mulex-absolute-indirect "mulex [src]" ((machine 32))
9034 ; ("mulex ${dst32-24-absolute-indirect-HI}")
9035 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-absolute-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE))
9036 ; (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-absolute-indirect-HI)))
9037 ; ())
9038 (dni mulex "mulex src" ((machine 32))
9039 ("mulex ${dst32-16-Unprefixed-Mulex-HI}")
9040 (+ (f-0-4 #xC) dst32-16-Unprefixed-Mulex-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
9041 (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-16-Unprefixed-Mulex-HI)))
9042 ())
9043 ; (dni mulex-indirect "mulex [src]" ((machine 32))
9044 ; ("mulex ${dst32-24-indirect-HI}")
9045 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE))
9046 ; (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-indirect-HI)))
9047 ; ())
9049 ;-------------------------------------------------------------
9050 ; mulu - multiply unsigned
9051 ;-------------------------------------------------------------
9053 (define-pmacro (mulu-sem mode src1 dst)
9054 (sequence ((mode result))
9055 (set obit (add-oflag mode src1 dst 0))
9056 (set result (mul mode src1 dst))
9057 (set dst result))
9058 )
9060 ; mulu.BW #imm,dst
9061 (binary-arith-imm-dst mulu G (f-0-4 7) (f-4-3 6) (f-8-4 4) #x8 #x0 #xF mulu-sem)
9062 ; mulu.BW src,dst
9063 (binary-arith-src-dst mulu G (f-0-4 #x7) (f-4-3 0) #x1 #x4 mulu-sem)
9065 ;-------------------------------------------------------------
9066 ; neg - twos complement
9067 ;-------------------------------------------------------------
9069 (define-pmacro (neg-sem mode dst)
9070 (sequence ((mode result))
9071 (set result (neg mode dst))
9072 (set-z-and-s result)
9073 (set dst result))
9074 )
9076 ; neg.BW:G
9077 (unary-insn neg (f-0-4 7) (f-4-3 2) (f-8-4 #x5) #xA #x2 #xF neg-sem)
9079 ;-------------------------------------------------------------
9080 ; not - twos complement
9081 ;-------------------------------------------------------------
9083 (define-pmacro (not-sem mode dst)
9084 (sequence ((mode result))
9085 (set result (not mode dst))
9086 (set-z-and-s result)
9087 (set dst result))
9088 )
9090 ; not.BW:G
9091 (unary-insn-g not (f-0-4 7) (f-4-3 2) (f-8-4 #x7) #xA #x1 #xE not-sem)
9093 (dni not16.b.s
9094 "not.b:s Dst16-3-S-8"
9095 ((machine 16))
9096 "not.b:s ${Dst16-3-S-8}"
9097 (+ (f-0-4 #xb) (f-4-1 #x1) Dst16-3-S-8)
9098 (not-sem QI Dst16-3-S-8)
9099 ())
9101 ;-------------------------------------------------------------
9102 ; nop
9103 ;-------------------------------------------------------------
9105 (dni nop16
9106 "nop"
9107 ((machine 16))
9108 "nop"
9109 (+ (f-0-4 #x0) (f-4-4 #x4))
9110 (nop)
9111 ())
9113 (dni nop32
9114 "nop"
9115 ((machine 32))
9116 "nop"
9117 (+ (f-0-4 #xD) (f-4-4 #xE))
9118 (nop)
9119 ())
9121 ;-------------------------------------------------------------
9122 ; or - logical or
9123 ;-------------------------------------------------------------
9125 (define-pmacro (or-sem mode src1 dst)
9126 (sequence ((mode result))
9127 (set result (or mode src1 dst))
9128 (set-z-and-s result)
9129 (set dst result))
9130 )
9132 ; or.BW #imm,dst (m16 #1 m32 #1)
9133 (binary-arith-imm-dst or G (f-0-4 7) (f-4-3 3) (f-8-4 3) #x8 #x2 #xF or-sem)
9134 ; or.b:S #imm8,dst3 (m16 #2 m32 #2)
9135 (binary-arith16-b-S-imm8-dst3 or ".b" (f-0-4 9) (f-4-1 1) or-sem)
9136 (binary-arith32-s-imm-dst QI .b 0 or #x1 #x2 or-sem)
9137 (binary-arith32-s-imm-dst HI .w 1 or #x1 #x2 or-sem)
9138 ; or.BW src,dst (m16 #3 m32 #3)
9139 (binary-arith-src-dst or G (f-0-4 #x9) (f-4-3 4) #x1 #x5 or-sem)
9140 ; or.b:S src,r0[lh] (m16)
9141 (binary-arith16-b-S-src2 or (f-0-4 1) (f-4-1 1) or-sem)
9143 ;-------------------------------------------------------------
9144 ; pop - restore register/memory
9145 ;-------------------------------------------------------------
9147 ; TODO future: split this into .b and .w semantics
9148 (define-pmacro (pop-sem-mach mach mode dst)
9149 (sequence ((mode b_or_w) (SI length))
9150 (set b_or_w -1)
9151 (set b_or_w (srl b_or_w #x8))
9152 (if (eq b_or_w #x0)
9153 (set length 1) ; .b
9154 (set length 2)) ; .w
9156 (case DFLT length
9157 ((1) (set dst (mem-mach mach QI (reg h-sp))))
9158 ((2) (set dst (mem-mach mach HI (reg h-sp)))))
9159 (set (reg h-sp) (add (reg h-sp) length))
9160 )
9161 )
9163 (define-pmacro (pop-sem16 mode dest) (pop-sem-mach 16 mode dest))
9164 (define-pmacro (pop-sem32 mode dest) (pop-sem-mach 32 mode dest))
9166 ; pop.BW:G (m16 #1)
9167 (unary-insn-mach-g 16 pop (f-0-4 7) (f-4-3 2) (f-8-4 #xD) pop-sem16 $G)
9168 ; pop.BW:G (m32 #1)
9169 (unary-insn-mach 32 pop #xB #x2 #xF pop-sem32)
9171 ; pop.b:S r0l/r0h
9172 (dni pop16.b-s-rn "pop.b:S r0[lh]" ((machine 16))
9173 "pop.b$S ${Rn16-push-S-anyof}"
9174 (+ (f-0-4 #x9) Rn16-push-S-anyof (f-5-3 #x2))
9175 (pop-sem16 QI Rn16-push-S-anyof)
9176 ())
9177 ; pop.w:S a0/a1
9178 (dni pop16.b-s-an "pop.w:S a[01]" ((machine 16))
9179 "pop.w$S ${An16-push-S-anyof}"
9180 (+ (f-0-4 #xD) An16-push-S-anyof (f-5-3 #x2))
9181 (pop-sem16 HI An16-push-S-anyof)
9182 ())
9184 ;-------------------------------------------------------------
9185 ; popc - pop control register
9186 ; pushc - push control register
9187 ;-------------------------------------------------------------
9189 (define-pmacro (popc32-cr1-sem mode dst)
9190 (sequence ()
9191 (case DFLT dst
9192 ((#x0) (set (reg h-dct0) (mem32 mode (reg h-sp))))
9193 ((#x1) (set (reg h-dct1) (mem32 mode (reg h-sp))))
9194 ((#x2) (sequence ((HI tflag))
9195 (set tflag (mem32 mode (reg h-sp)))
9196 (if (and tflag #x1) (set cbit 1))
9197 (if (and tflag #x2) (set dbit 1))
9198 (if (and tflag #x4) (set zbit 1))
9199 (if (and tflag #x8) (set sbit 1))
9200 (if (and tflag #x10) (set bbit 1))
9201 (if (and tflag #x20) (set obit 1))
9202 (if (and tflag #x40) (set ibit 1))
9203 (if (and tflag #x80) (set ubit 1))))
9204 ((#x3) (set (reg h-svf) (mem32 mode (reg h-sp))))
9205 ((#x4) (set (reg h-drc0) (mem32 mode (reg h-sp))))
9206 ((#x5) (set (reg h-drc1) (mem32 mode (reg h-sp))))
9207 ((#x6) (set (reg h-dmd0) (mem32 mode (reg h-sp))))
9208 ((#x7) (set (reg h-dmd1) (mem32 mode (reg h-sp))))
9209 )
9210 (set (reg h-sp) (add (reg h-sp) 2))
9211 )
9212 )
9213 (define-pmacro (popc32-cr2-sem mode dst)
9214 (sequence ()
9215 (case DFLT dst
9216 ((#x0) (set (reg h-intb) (mem32 mode (reg h-sp))))
9217 ((#x1) (set (reg h-sp) (mem32 mode (reg h-sp))))
9218 ((#x2) (set (reg h-sb) (mem32 mode (reg h-sp))))
9219 ((#x3) (set (reg h-fb) (mem32 mode (reg h-sp))))
9220 ((#x7) (set (reg h-isp) (mem32 mode (reg h-sp))))
9221 )
9222 (set (reg h-sp) (add (reg h-sp) 4))
9223 )
9224 )
9225 (define-pmacro (popc16-sem mode dst)
9226 (sequence ()
9227 (case DFLT dst
9228 ((#x1) (set (reg h-intb) (or (and (reg h-intb) #x0000)
9229 (mem16 mode (reg h-sp)))))
9230 ((#x2) (set (reg h-intb) (or (and (reg h-intb) #xffff0000)
9231 (mem16 mode (reg h-sp)))))
9232 ((#x3) (sequence ((HI tflag))
9233 (set tflag (mem16 mode (reg h-sp)))
9234 (if (and tflag #x1) (set cbit 1))
9235 (if (and tflag #x2) (set dbit 1))
9236 (if (and tflag #x4) (set zbit 1))
9237 (if (and tflag #x8) (set sbit 1))
9238 (if (and tflag #x10) (set bbit 1))
9239 (if (and tflag #x20) (set obit 1))
9240 (if (and tflag #x40) (set ibit 1))
9241 (if (and tflag #x80) (set ubit 1))))
9242 ((#x4) (set (reg h-isp) (mem16 mode (reg h-sp))))
9243 ((#x5) (set (reg h-sp) (mem16 mode (reg h-sp))))
9244 ((#x6) (set (reg h-sb) (mem16 mode (reg h-sp))))
9245 ((#x7) (set (reg h-fb) (mem16 mode (reg h-sp))))
9246 )
9247 (set (reg h-sp) (add (reg h-sp) 2))
9248 )
9249 )
9250 ; popc dest (m16c #1)
9251 (dni popc16.imm16 "popc dst" ((machine 16))
9252 ("popc ${cr16}")
9253 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 3) cr16)
9254 (popc16-sem HI cr16)
9255 ())
9256 ; popc dest (m32c #1)
9257 (dni popc32.imm16-cr1 "popc dst" ((machine 32))
9258 ("popc ${cr1-Unprefixed-32}")
9259 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32)
9260 (popc32-cr1-sem HI cr1-Unprefixed-32)
9261 ())
9262 ; popc dest (m32c #2)
9263 (dni popc32.imm16-cr2 "popc dst" ((machine 32))
9264 ("popc ${cr2-32}")
9265 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 2) (f-12-1 1) cr2-32)
9266 (popc32-cr2-sem SI cr2-32)
9267 ())
9269 (define-pmacro (pushc32-cr1-sem mode dst)
9270 (sequence ()
9271 (set (reg h-sp) (sub (reg h-sp) 2))
9272 (case DFLT dst
9273 ((#x0) (set (mem32 mode (reg h-sp)) (reg h-dct0)))
9274 ((#x1) (set (mem32 mode (reg h-sp)) (reg h-dct1)))
9275 ((#x2) (sequence ((HI tflag))
9276 (set tflag 0)
9277 (if (eq cbit 1) (set tflag (or tflag #x1)))
9278 (if (eq dbit 1) (set tflag (or tflag #x2)))
9279 (if (eq zbit 1) (set tflag (or tflag #x4)))
9280 (if (eq sbit 1) (set tflag (or tflag #x8)))
9281 (if (eq bbit 1) (set tflag (or tflag #x10)))
9282 (if (eq obit 1) (set tflag (or tflag #x20)))
9283 (if (eq ibit 1) (set tflag (or tflag #x40)))
9284 (if (eq ubit 1) (set tflag (or tflag #x80)))
9285 (set (mem32 mode (reg h-sp)) tflag)))
9286 ((#x3) (set (mem32 mode (reg h-sp)) (reg h-svf)))
9287 ((#x4) (set (mem32 mode (reg h-sp)) (reg h-drc0)))
9288 ((#x5) (set (mem32 mode (reg h-sp)) (reg h-drc1)))
9289 ((#x6) (set (mem32 mode (reg h-sp)) (reg h-dmd0)))
9290 ((#x7) (set (mem32 mode (reg h-sp)) (reg h-dmd1)))
9291 )
9292 )
9293 )
9294 (define-pmacro (pushc32-cr2-sem mode dst)
9295 (sequence ()
9296 (set (reg h-sp) (sub (reg h-sp) 4))
9297 (case DFLT dst
9298 ((#x0) (set (mem32 mode (reg h-sp)) (reg h-intb)))
9299 ((#x1) (set (mem32 mode (reg h-sp)) (reg h-sp)))
9300 ((#x2) (set (mem32 mode (reg h-sp)) (reg h-sb)))
9301 ((#x3) (set (mem32 mode (reg h-sp)) (reg h-fb)))
9302 ((#x7) (set (mem32 mode (reg h-sp)) (reg h-isp)))
9303 )
9304 )
9305 )
9306 (define-pmacro (pushc16-sem mode dst)
9307 (sequence ()
9308 (set (reg h-sp) (sub (reg h-sp) 2))
9309 (case DFLT dst
9310 ((#x1) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff)))
9311 ((#x2) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff0000)))
9312 ((#x3) (sequence ((HI tflag))
9313 (if (eq cbit 1) (set tflag (or tflag #x1)))
9314 (if (eq dbit 1) (set tflag (or tflag #x2)))
9315 (if (eq zbit 1) (set tflag (or tflag #x4)))
9316 (if (eq sbit 1) (set tflag (or tflag #x8)))
9317 (if (eq bbit 1) (set tflag (or tflag #x10)))
9318 (if (eq obit 1) (set tflag (or tflag #x20)))
9319 (if (eq ibit 1) (set tflag (or tflag #x40)))
9320 (if (eq ubit 1) (set tflag (or tflag #x80)))
9321 (set (mem16 mode (reg h-sp)) tflag)))
9323 ((#x4) (set (mem16 mode (reg h-sp)) (reg h-isp)))
9324 ((#x5) (set (mem16 mode (reg h-sp)) (reg h-sp)))
9325 ((#x6) (set (mem16 mode (reg h-sp)) (reg h-sb)))
9326 ((#x7) (set (mem16 mode (reg h-sp)) (reg h-fb)))
9327 )
9328 )
9329 )
9330 ; pushc src (m16c)
9331 (dni pushc16.imm16 "pushc dst" ((machine 16))
9332 ("pushc ${cr16}")
9333 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 2) cr16)
9334 (pushc16-sem HI cr16)
9335 ())
9336 ; pushc src (m32c #1)
9337 (dni pushc32.imm16-cr1 "pushc dst" ((machine 32))
9338 ("pushc ${cr1-Unprefixed-32}")
9339 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32)
9340 (pushc32-cr1-sem HI cr1-Unprefixed-32)
9341 ())
9342 ; pushc src (m32c #2)
9343 (dni pushc32.imm16-cr2 "pushc dst" ((machine 32))
9344 ("pushc ${cr2-32}")
9345 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 2) (f-12-1 1) cr2-32)
9346 (pushc32-cr2-sem SI cr2-32)
9347 ())
9349 ;-------------------------------------------------------------
9350 ; popm - pop multiple
9351 ; pushm - push multiple
9352 ;-------------------------------------------------------------
9354 (define-pmacro (popm-sem machine dst)
9355 (sequence ((SI addrlen))
9356 (if (eq machine 16)
9357 (set addrlen 2)
9358 (set addrlen 4))
9359 (if (and dst 1)
9360 (sequence () (set R0 (mem-mach machine HI (reg h-sp)))
9361 (set (reg h-sp) (add (reg h-sp) 2))))
9362 (if (and dst 2)
9363 (sequence () (set R1 (mem-mach machine HI (reg h-sp)))
9364 (set (reg h-sp) (add (reg h-sp) 2))))
9365 (if (and dst 4)
9366 (sequence () (set R2 (mem-mach machine HI (reg h-sp)))
9367 (set (reg h-sp) (add (reg h-sp) 2))))
9368 (if (and dst 8)
9369 (sequence () (set R3 (mem-mach machine HI (reg h-sp)))
9370 (set (reg h-sp) (add (reg h-sp) 2))))
9371 (if (and dst 16)
9372 (sequence () (set A0 (mem-mach machine HI (reg h-sp)))
9373 (set (reg h-sp) (add (reg h-sp) addrlen))))
9374 (if (and dst 32)
9375 (sequence () (set A1 (mem-mach machine HI (reg h-sp)))
9376 (set (reg h-sp) (add (reg h-sp) addrlen))))
9377 (if (and dst 64)
9378 (sequence () (set (reg h-sb) (mem-mach machine HI (reg h-sp)))
9379 (set (reg h-sp) (add (reg h-sp) addrlen))))
9380 (if (eq dst 128)
9381 (sequence () (set (reg h-fb) (mem-mach machine HI (reg h-sp)))
9382 (set (reg h-sp) (add (reg h-sp) addrlen))))
9383 )
9384 )
9386 (define-pmacro (pushm-sem machine dst)
9387 (sequence ((SI count) (SI addrlen))
9388 (if (eq machine 16)
9389 (set addrlen 2)
9390 (set addrlen 4))
9391 (if (eq dst 1)
9392 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9393 (set (mem-mach machine HI (reg h-sp)) (reg h-fb))))
9394 (if (and dst 2)
9395 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9396 (set (mem-mach machine HI (reg h-sp)) (reg h-sb))))
9397 (if (and dst 4)
9398 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9399 (set (mem-mach machine HI (reg h-sp)) A1)))
9400 (if (and dst 8)
9401 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9402 (set (mem-mach machine HI (reg h-sp)) A0)))
9403 (if (and dst 16)
9404 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9405 (set (mem-mach machine HI (reg h-sp)) R3)))
9406 (if (and dst 32)
9407 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9408 (set (mem-mach machine HI (reg h-sp)) R2)))
9409 (if (and dst 64)
9410 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9411 (set (mem-mach machine HI (reg h-sp)) R1)))
9412 (if (and dst 128)
9413 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9414 (set (mem-mach machine HI (reg h-sp)) R0)))
9415 )
9416 )
9418 (dni popm16 "popm regs" ((machine 16))
9419 ("popm ${Regsetpop}")
9420 (+ (f-0-4 #xE) (f-4-4 #xD) Regsetpop)
9421 (popm-sem 16 Regsetpop)
9422 ())
9423 (dni pushm16 "pushm regs" ((machine 16))
9424 ("pushm ${Regsetpush}")
9425 (+ (f-0-4 #xE) (f-4-4 #xC) Regsetpush)
9426 (pushm-sem 16 Regsetpush)
9427 ())
9428 (dni popm "popm regs" ((machine 32))
9429 ("popm ${Regsetpop}")
9430 (+ (f-0-4 #x8) (f-4-4 #xE) Regsetpop)
9431 (popm-sem 32 Regsetpop)
9432 ())
9433 (dni pushm "pushm regs" ((machine 32))
9434 ("pushm ${Regsetpush}")
9435 (+ (f-0-4 #x8) (f-4-4 #xF) Regsetpush)
9436 (pushm-sem 32 Regsetpush)
9437 ())
9439 ;-------------------------------------------------------------
9440 ; push - Save register/memory/immediate data
9441 ;-------------------------------------------------------------
9443 ; TODO future: split this into .b and .w semantics
9444 (define-pmacro (push-sem-mach mach mode dst)
9445 (sequence ((mode b_or_w) (SI length))
9446 (set b_or_w -1)
9447 (set b_or_w (srl b_or_w #x8))
9448 (if (eq b_or_w #x0)
9449 (set length 1) ; .b
9450 (if (eq b_or_w #xff)
9451 (set length 2) ; .w
9452 (set length 4))) ; .l
9453 (set (reg h-sp) (sub (reg h-sp) length))
9454 (case DFLT length
9455 ((1) (set (mem-mach mach QI (reg h-sp)) dst))
9456 ((2) (set (mem-mach mach HI (reg h-sp)) dst))
9457 ((4) (set (mem-mach mach SI (reg h-sp)) dst)))
9458 )
9459 )
9461 (define-pmacro (push-sem16 mode dst) (push-sem-mach 16 mode dst))
9462 (define-pmacro (push-sem32 mode dst) (push-sem-mach 32 mode dst))
9464 ; push.BW:G imm (m16 #1 m32 #1)
9465 (dni push16.b.G-imm "push.b:G #Imm-16-QI" ((machine 16))
9466 ("push.b$G #${Imm-16-QI}")
9467 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 2) Imm-16-QI)
9468 (push-sem16 QI Imm-16-QI)
9469 ())
9471 (dni push16.w.G-imm "push.w:G #Imm-16-HI" ((machine 16))
9472 ("push.w$G #${Imm-16-HI}")
9473 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 2) Imm-16-HI)
9474 (push-sem16 HI Imm-16-HI)
9475 ())
9477 (dni push32.b.imm "push.b #Imm-8-QI" ((machine 32))
9478 ("push.b #${Imm-8-QI}")
9479 (+ (f-0-4 #xA) (f-4-4 #xE) Imm-8-QI)
9480 (push-sem32 QI Imm-8-QI)
9481 ())
9483 (dni push32.w.imm "push.w #Imm-8-HI" ((machine 32))
9484 ("push.w #${Imm-8-HI}")
9485 (+ (f-0-4 #xA) (f-4-4 #xF) Imm-8-HI)
9486 (push-sem32 HI Imm-8-HI)
9487 ())
9489 ; push.BW:G src (m16 #2)
9490 (unary-insn-mach-g 16 push (f-0-4 7) (f-4-3 2) (f-8-4 #x4) push-sem16 $G)
9491 ; push.BW:G src (m32 #2)
9492 (unary-insn-mach 32 push #xC #x0 #xE push-sem32)
9495 ; push.b:S r0l/r0h (m16 #3)
9496 (dni push16.b-s-rn "push.b:S r0[lh]" ((machine 16))
9497 "push.b$S ${Rn16-push-S-anyof}"
9498 (+ (f-0-4 #x8) Rn16-push-S-anyof (f-5-3 #x2))
9499 (push-sem16 QI Rn16-push-S-anyof)
9500 ())
9501 ; push.w:S a0/a1 (m16 #4)
9502 (dni push16.b-s-an "push.w:S a[01]" ((machine 16))
9503 "push.w$S ${An16-push-S-anyof}"
9504 (+ (f-0-4 #xC) An16-push-S-anyof (f-5-3 #x2))
9505 (push-sem16 HI An16-push-S-anyof)
9506 ())
9508 ; push.l imm32 (m32 #3)
9509 (dni push32.l.imm "push.l #Imm-16-SI" ((machine 32))
9510 ("push.l #${Imm-16-SI}")
9511 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 5) (f-12-4 3) Imm-16-SI)
9512 (push-sem32 SI Imm-16-SI)
9513 ())
9514 ; push.l src (m32 #4)
9515 (unary-insn-defn 32 16-Unprefixed SI .l push (+ (f-0-4 #xA) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 0) (f-12-4 1)) push-sem32)
9517 ;-------------------------------------------------------------
9518 ; pusha - push effective address
9519 ;------------------------------------------------------------
9521 (define-pmacro (push16a-sem mode dst)
9522 (sequence ()
9523 (set (reg h-sp) (sub (reg h-sp) 2))
9524 (set (mem16 HI (reg h-sp)) dst))
9525 )
9526 (define-pmacro (push32a-sem mode dst)
9527 (sequence ()
9528 (set (reg h-sp) (sub (reg h-sp) 4))
9529 (set (mem32 SI (reg h-sp)) dst))
9530 )
9531 (unary-insn-defn 16 16-Mova HI "" pusha (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 9) dst16-16-Mova-HI) push16a-sem)
9532 (unary-insn-defn 32 16-Unprefixed-Mova SI "" pusha (+ (f-0-4 #xB) (f-7-1 0) dst32-16-Unprefixed-Mova-SI (f-10-2 0) (f-12-4 1)) push32a-sem)
9534 ;-------------------------------------------------------------
9535 ; reit - return from interrupt
9536 ;-------------------------------------------------------------
9538 ; ??? semantics
9539 (dni reit16 "REIT" ((machine 16))
9540 ("reit")
9541 (+ (f-0-4 #xF) (f-4-4 #xB))
9542 (nop)
9543 ())
9544 (dni reit32 "REIT" ((machine 32))
9545 ("reit")
9546 (+ (f-0-4 9) (f-4-4 #xE))
9547 (nop)
9548 ())
9550 ;-------------------------------------------------------------
9551 ; rmpa - repeat multiple and addition
9552 ;-------------------------------------------------------------
9554 ; TODO semantics
9555 (dni rmpa16.b "rmpa.size" ((machine 16))
9556 ("rmpa.b")
9557 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 1))
9558 (nop)
9559 ())
9560 (dni rmpa16.w "rmpa.size" ((machine 16))
9561 ("rmpa.w")
9562 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 1))
9563 (nop)
9564 ())
9565 (dni rmpa32.b "rmpa.size" ((machine 32))
9566 ("rmpa.b")
9567 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 4) (f-12-4 3))
9568 (nop)
9569 ())
9571 (dni rmpa32.w "rmpa.size" ((machine 32))
9572 ("rmpa.w")
9573 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 5) (f-12-4 3))
9574 (nop)
9575 ())
9577 ;-------------------------------------------------------------
9578 ; rolc - rotate left with carry
9579 ;-------------------------------------------------------------
9581 ; TODO check semantics
9582 ; TODO future: split this into .b and .w semantics
9583 (define-pmacro (rolc-sem mode dst)
9584 (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask))
9585 (set b_or_w -1)
9586 (set b_or_w (srl b_or_w #x8))
9587 (if (eq b_or_w #x0)
9588 (set mask #x8000) ; .b
9589 (set mask #x80000000)) ; .w
9590 (set ocbit cbit)
9591 (set cbit (and dst mask))
9592 (set result (sll mode dst 1))
9593 (set result (or result ocbit))
9594 (set-z-and-s result)
9595 (set dst result))
9596 )
9597 ; rolc.BW src,dst
9598 (unary-insn rolc (f-0-4 7) (f-4-3 3) (f-8-4 #xA) #xB #x2 #xE rolc-sem)
9600 ;-------------------------------------------------------------
9601 ; rorc - rotate right with carry
9602 ;-------------------------------------------------------------
9604 ; TODO check semantics
9605 ; TODO future: split this into .b and .w semantics
9606 (define-pmacro (rorc-sem mode dst)
9607 (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask) (SI shamt))
9608 (set b_or_w -1)
9609 (set b_or_w (srl b_or_w #x8))
9610 (if (eq b_or_w #x0)
9611 (sequence () (set mask #x7fff) (set shamt 15)) ; .b
9612 (sequence () (set mask #x7fffffff) (set shamt 31))) ; .w
9613 (set ocbit cbit)
9614 (set cbit (and dst #x1))
9615 (set result (srl mode dst (const 1)))
9616 (set result (or (and result mask) (sll ocbit shamt)))
9617 (set-z-and-s result)
9618 (set dst result))
9619 )
9620 ; rorc.BW src,dst
9621 (unary-insn rorc (f-0-4 7) (f-4-3 3) (f-8-4 #xB) #xA #x2 #xE rorc-sem)
9623 ;-------------------------------------------------------------
9624 ; rot - rotate
9625 ;-------------------------------------------------------------
9627 ; TODO future: split this into .b and .w semantics
9628 (define-pmacro (rot-1-sem mode src1 dst)
9629 (sequence ((mode tmp) (mode b_or_w) (USI mask) (SI shift))
9630 (case DFLT src1
9631 ((#x0) (set shift 1))
9632 ((#x1) (set shift 2))
9633 ((#x2) (set shift 3))
9634 ((#x3) (set shift 4))
9635 ((#x4) (set shift 5))
9636 ((#x5) (set shift 6))
9637 ((#x6) (set shift 7))
9638 ((#x7) (set shift 8))
9639 ((-8) (set shift -1))
9640 ((-7) (set shift -2))
9641 ((-6) (set shift -3))
9642 ((-5) (set shift -4))
9643 ((-4) (set shift -5))
9644 ((-3) (set shift -6))
9645 ((-2) (set shift -7))
9646 ((-1) (set shift -8))
9647 (else (set shift 0))
9648 )
9649 (set b_or_w -1)
9650 (set b_or_w (srl b_or_w #x8))
9651 (if (eq b_or_w #x0)
9652 (set mask #x7fff) ; .b
9653 (set mask #x7fffffff)) ; .w
9654 (set tmp dst)
9655 (if (gt mode shift 0)
9656 (sequence ()
9657 (set tmp (rol mode tmp shift))
9658 (set cbit (and tmp #x1)))
9659 (sequence ()
9660 (set tmp (ror mode tmp (mul shift -1)))
9661 (set cbit (and tmp mask))))
9662 (set-z-and-s tmp)
9663 (set dst tmp))
9664 )
9665 (define-pmacro (rot-2-sem mode dst)
9666 (sequence ((mode tmp) (mode b_or_w) (USI mask))
9667 (set b_or_w -1)
9668 (set b_or_w (srl b_or_w #x8))
9669 (if (eq b_or_w #x0)
9670 (set mask #x7fff) ; .b
9671 (set mask #x7fffffff)) ; .w
9672 (set tmp dst)
9673 (if (gt mode (reg h-r1h) 0)
9674 (sequence ()
9675 (set tmp (rol mode tmp (reg h-r1h)))
9676 (set cbit (and tmp #x1)))
9677 (sequence ()
9678 (set tmp (ror mode tmp (reg h-r1h)))
9679 (set cbit (and tmp mask))))
9680 (set-z-and-s tmp)
9681 (set dst tmp))
9682 )
9684 ; rot.BW #imm4,dst
9685 (binary-arith16-shimm4-dst-defn QI .b 0 0 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem)
9686 (binary-arith16-shimm4-dst-defn HI .w 0 1 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem)
9687 (binary-arith32-shimm4-dst-defn QI .b 0 0 rot #x7 #x2 rot-1-sem)
9688 (binary-arith32-shimm4-dst-defn HI .w 0 1 rot #x7 #x2 rot-1-sem)
9689 ; rot.BW src,dst
9691 (dni rot16.b-dst "rot r1h,dest" ((machine 16))
9692 ("rot.b r1h,${dst16-16-QI}")
9693 (+ (f-0-4 7) (f-4-4 #x4) (f-8-4 #x6) dst16-16-QI)
9694 (rot-2-sem QI dst16-16-QI)
9695 ())
9696 (dni rot16.w-dst "rot r1h,dest" ((machine 16))
9697 ("rot.w r1h,${dst16-16-HI}")
9698 (+ (f-0-4 7) (f-4-4 #x5) (f-8-4 #x6) dst16-16-HI)
9699 (rot-2-sem HI dst16-16-HI)
9700 ())
9702 (dni rot32.b-dst "rot r1h,dest" ((machine 32))
9703 ("rot.b r1h,${dst32-16-Unprefixed-QI}")
9704 (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xF))
9705 (rot-2-sem QI dst32-16-Unprefixed-QI)
9706 ())
9707 (dni rot32.w-dst "rot r1h,dest" ((machine 32))
9708 ("rot.w r1h,${dst32-16-Unprefixed-HI}")
9709 (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xF))
9710 (rot-2-sem HI dst32-16-Unprefixed-HI)
9711 ())
9713 ;-------------------------------------------------------------
9714 ; rts - return from subroutine
9715 ;-------------------------------------------------------------
9717 (define-pmacro (rts16-sem)
9718 (sequence ((SI tpc))
9719 (set tpc (mem16 HI (reg h-sp)))
9720 (set (reg h-sp) (add (reg h-sp) 2))
9721 (set tpc (or tpc (sll (mem16 QI (reg h-sp)) 16)))
9722 (set (reg h-sp) (add (reg h-sp) 1))
9723 (set pc tpc)
9724 )
9725 )
9726 (define-pmacro (rts32-sem)
9727 (sequence ((SI tpc))
9728 (set tpc (mem32 HI (reg h-sp)))
9729 (set (reg h-sp) (add (reg h-sp) 2))
9730 (set tpc (or tpc (sll (mem32 HI (reg h-sp)) 16)))
9731 (set (reg h-sp) (add (reg h-sp) 2))
9732 (set pc tpc)
9733 )
9734 )
9736 (dni rts16 "rts" ((machine 16))
9737 ("rts")
9738 (+ (f-0-4 #xF) (f-4-4 3))
9739 (rts16-sem)
9740 ())
9742 (dni rts32 "rts" ((machine 32))
9743 ("rts")
9744 (+ (f-0-4 #xD) (f-4-4 #xF))
9745 (rts32-sem)
9746 ())
9748 ;-------------------------------------------------------------
9749 ; sbb - subtract with borrow
9750 ;-------------------------------------------------------------
9752 (define-pmacro (sbb-sem mode src dst)
9753 (sequence ((mode result))
9754 (set result (subc mode dst src cbit))
9755 (set obit (add-oflag mode dst src cbit))
9756 (set cbit (add-oflag mode dst src cbit))
9757 (set-z-and-s result)
9758 (set dst result))
9759 )
9761 ; sbb.size:G #imm,dst
9762 (binary-arith16-imm-dst-defn QI QI .b 0 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem)
9763 (binary-arith16-imm-dst-defn HI HI .w 1 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem)
9764 (binary-arith32-imm-dst-Prefixed QI QI .b 0 sbb X #x9 #x2 #xE sbb-sem)
9765 (binary-arith32-imm-dst-Prefixed HI HI .w 1 sbb X #x9 #x2 #xE sbb-sem)
9767 ; sbb.BW:G src,dst
9768 (binary-arith16-src-dst-defn QI QI .b 0 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem)
9769 (binary-arith16-src-dst-defn HI HI .w 1 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem)
9770 (binary-arith32-src-dst-Prefixed QI QI .b 0 sbb X #x1 #x6 sbb-sem)
9771 (binary-arith32-src-dst-Prefixed HI HI .w 1 sbb X #x1 #x6 sbb-sem)
9773 ;-------------------------------------------------------------
9774 ; sbjnz - subtract then jump on not zero
9775 ;-------------------------------------------------------------
9777 (define-pmacro (sub-jnz-sem mode src dst label)
9778 (sequence ((mode result))
9779 (set result (sub mode dst src))
9780 (set dst result)
9781 (if (ne result 0)
9782 (set pc label)))
9783 )
9785 ; sbjnz.size #imm4,dst,label
9786 (arith-jnz-imm4-dst sbjnz s4n (f-0-4 #xF) (f-4-3 4) #xf #x1 sub-jnz-sem)
9788 ;-------------------------------------------------------------
9789 ; sccnd - store condition on condition (m32)
9790 ;-------------------------------------------------------------
9792 (define-pmacro (sccnd-sem cnd dst)
9793 (sequence ()
9794 (set dst 0)
9795 (case DFLT cnd
9796 ((#x00) (if (not cbit) (set dst 1))) ;ltu nc
9797 ((#x01) (if (or cbit zbit) (set dst 1))) ;leu
9798 ((#x02) (if (not zbit) (set dst 1))) ;ne nz
9799 ((#x03) (if (not sbit) (set dst 1))) ;pz
9800 ((#x04) (if (not obit) (set dst 1))) ;no
9801 ((#x05) (if (not (or zbit (xor sbit obit))) (set dst 1))) ;gt
9802 ((#x06) (if (xor sbit obit) (set dst 1))) ;ge
9803 ((#x08) (if (trunc BI cbit) (set dst 1))) ;geu c
9804 ((#x09) (if (not (or cbit zbit)) (set dst 1))) ;gtu
9805 ((#x0a) (if (trunc BI zbit) (set dst 1))) ;eq z
9806 ((#x0b) (if (trunc BI sbit) (set dst 1))) ;n
9807 ((#x0c) (if (trunc BI obit) (set dst 1))) ;o
9808 ((#x0d) (if (or zbit (xor sbit obit)) (set dst 1))) ;le
9809 ((#x0e) (if (xor sbit obit) (set dst 1))) ;lt
9810 )
9811 )
9812 )
9814 ; scCND dst
9815 (dni sccnd
9816 "sccnd dst"
9817 ((machine 32))
9818 "sc$sccond32 ${dst32-16-Unprefixed-HI}"
9819 (+ (f-0-4 #xD) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) sccond32)
9820 (sccnd-sem sccond32 dst32-16-Unprefixed-HI)
9821 ())
9823 ;-------------------------------------------------------------
9824 ; scmpu - string compare unequal (m32)
9825 ;-------------------------------------------------------------
9827 ; TODO semantics
9828 (dni scmpu.b "scmpu.b" ((machine 32))
9829 ("scmpu.b")
9830 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xC) (f-12-4 3))
9831 (c-call VOID "scmpu_QI_semantics")
9832 ())
9834 (dni scmpu.w "scmpu.w" ((machine 32))
9835 ("scmpu.w")
9836 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xD) (f-12-4 3))
9837 (c-call VOID "scmpu_HI_semantics")
9838 ())
9840 ;-------------------------------------------------------------
9841 ; sha - shift arithmetic
9842 ;-------------------------------------------------------------
9844 ; TODO future: split this into .b and .w semantics
9845 (define-pmacro (sha-sem mode src1 dst)
9846 (sequence ((mode result)(mode shift)(mode shmode))
9847 (case DFLT src1
9848 ((#x0) (set shift 1))
9849 ((#x1) (set shift 2))
9850 ((#x2) (set shift 3))
9851 ((#x3) (set shift 4))
9852 ((#x4) (set shift 5))
9853 ((#x5) (set shift 6))
9854 ((#x6) (set shift 7))
9855 ((#x7) (set shift 8))
9856 ((-8) (set shift -1))
9857 ((-7) (set shift -2))
9858 ((-6) (set shift -3))
9859 ((-5) (set shift -4))
9860 ((-4) (set shift -5))
9861 ((-3) (set shift -6))
9862 ((-2) (set shift -7))
9863 ((-1) (set shift -8))
9864 (else (set shift 0))
9865 )
9866 (set shmode -1)
9867 (set shmode (srl shmode #x8))
9868 (if (lt mode shift #x0) (set result (sra mode dst (mul shift -1))))
9869 (if (gt mode shift 0) (set result (sll mode dst shift)))
9870 (if (eq shmode #x0) ; QI
9871 (sequence
9872 ((mode cbitamt))
9873 (if (lt mode shift #x0)
9874 (set cbitamt (sub #x8 shift)) ; sra
9875 (set cbitamt (sub shift 1))) ; sll
9876 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9877 (set obit (ne (and dst #x80) (and result #x80)))
9878 ))
9879 (if (eq shmode #xff) ; HI
9880 (sequence
9881 ((mode cbitamt))
9882 (if (lt mode shift #x0)
9883 (set cbitamt (sub 16 shift)) ; sra
9884 (set cbitamt (sub shift 1))) ; sll
9885 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9886 (set obit (ne (and dst #x8000) (and result #x8000)))
9887 ))
9888 (set-z-and-s result)
9889 (set dst result))
9890 )
9891 (define-pmacro (shar1h-sem mode dst)
9892 (sequence ((mode result)(mode shmode))
9893 (set shmode -1)
9894 (set shmode (srl shmode #x8))
9895 (if (lt mode (reg h-r1h) 0) (set result (sra mode dst (reg h-r1h))))
9896 (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h))))
9897 (if (eq shmode #x0) ; QI
9898 (sequence
9899 ((mode cbitamt))
9900 (if (lt mode (reg h-r1h) #x0)
9901 (set cbitamt (sub #x8 (reg h-r1h))) ; sra
9902 (set cbitamt (sub (reg h-r1h) 1))) ; sll
9903 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9904 (set obit (ne (and dst #x80) (and result #x80)))
9905 ))
9906 (if (eq shmode #xff) ; HI
9907 (sequence
9908 ((mode cbitamt))
9909 (if (lt mode (reg h-r1h) #x0)
9910 (set cbitamt (sub 16 (reg h-r1h))) ; sra
9911 (set cbitamt (sub (reg h-r1h) 1))) ; sll
9912 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9913 (set obit (ne (and dst #x8000) (and result #x8000)))
9914 ))
9915 (set-z-and-s result)
9916 (set dst result))
9917 )
9918 ; sha.BW #imm4,dst (m16 #1 m32 #1)
9919 (binary-arith16-shimm4-dst-defn QI .b 0 0 sha (f-0-4 #xF) (f-4-3 0) sha-sem)
9920 (binary-arith16-shimm4-dst-defn HI .w 0 1 sha (f-0-4 #xF) (f-4-3 0) sha-sem)
9921 (binary-arith32-shimm4-dst-defn QI .b 1 0 sha #x7 #x0 sha-sem)
9922 (binary-arith32-shimm4-dst-defn HI .w 1 1 sha #x7 #x0 sha-sem)
9923 ; sha.BW r1h,dst (m16 #2 m32 #3)
9924 (dni sha16.b-dst "sha.b r1h,dest" ((machine 16))
9925 ("sha.b r1h,${dst16-16-QI}")
9926 (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xF) dst16-16-QI)
9927 (shar1h-sem HI dst16-16-QI)
9928 ())
9929 (dni sha16.w-dst "sha.w r1h,dest" ((machine 16))
9930 ("sha.w r1h,${dst16-16-HI}")
9931 (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xF) dst16-16-HI)
9932 (shar1h-sem HI dst16-16-HI)
9933 ())
9934 (dni sha32.b-dst "sha.b r1h,dest" ((machine 32))
9935 ("sha.b r1h,${dst32-16-Unprefixed-QI}")
9936 (+ (f-0-4 #xB) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE))
9937 (shar1h-sem QI dst32-16-Unprefixed-QI)
9938 ())
9939 (dni sha32.w-dst "sha.w r1h,dest" ((machine 32))
9940 ("sha.w r1h,${dst32-16-Unprefixed-HI}")
9941 (+ (f-0-4 #xB) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
9942 (shar1h-sem HI dst32-16-Unprefixed-HI)
9943 ())
9944 ; sha.L #imm,dst (m16 #3)
9945 (dni sha16-L-imm-r2r0 "sha.L #Imm-sh-12-s4,r2r0" ((machine 16))
9946 "sha.l #${Imm-sh-12-s4},r2r0"
9947 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xA) Imm-sh-12-s4)
9948 (sha-sem SI Imm-sh-12-s4 (reg h-r2r0))
9949 ())
9950 (dni sha16-L-imm-r3r1 "sha.L #Imm-sh-12-s4,r3r1" ((machine 16))
9951 "sha.l #${Imm-sh-12-s4},r3r1"
9952 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xB) Imm-sh-12-s4)
9953 (sha-sem SI Imm-sh-12-s4 (reg h-r3r1))
9954 ())
9955 ; sha.L r1h,dst (m16 #4)
9956 (dni sha16-L-r1h-r2r0 "sha.L r1h,r2r0" ((machine 16))
9957 "sha.l r1h,r2r0"
9958 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 2) (f-12-4 1))
9959 (sha-sem SI (reg h-r1h) (reg h-r2r0))
9960 ())
9961 (dni sha16-L-r1h-r3r1 "sha.L r1h,r3r1" ((machine 16))
9962 "sha.l r1h,r3r1"
9963 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 3) (f-12-4 1))
9964 (sha-sem SI (reg h-r1h) (reg h-r3r1))
9965 ())
9966 ; sha.L #imm8,dst (m32 #2)
9967 (binary-arith32-imm-dst-defn QI SI .l 0 sha X #xA #x2 #x1 sha-sem)
9968 ; sha.L r1h,dst (m32 #4)
9969 (dni sha32.l-dst "sha.l r1h,dest" ((machine 32))
9970 ("sha.l r1h,${dst32-16-Unprefixed-SI}")
9971 (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 1) (f-12-4 1))
9972 (shar1h-sem QI dst32-16-Unprefixed-SI)
9973 ())
9975 ;-------------------------------------------------------------
9976 ; shanc - shift arithmetic non carry (m32)
9977 ;-------------------------------------------------------------
9979 ; TODO check semantics
9980 ; shanc.L #imm8,dst
9981 (binary-arith32-imm-dst-defn QI SI .l 0 shanc X #xC #x2 #x1 sha-sem)
9983 ;-------------------------------------------------------------
9984 ; shl - shift logical
9985 ;-------------------------------------------------------------
9987 ; TODO future: split this into .b and .w semantics
9988 (define-pmacro (shl-sem mode src1 dst)
9989 (sequence ((mode result)(mode shift)(mode shmode))
9990 (case DFLT src1
9991 ((#x0) (set shift 1))
9992 ((#x1) (set shift 2))
9993 ((#x2) (set shift 3))
9994 ((#x3) (set shift 4))
9995 ((#x4) (set shift 5))
9996 ((#x5) (set shift 6))
9997 ((#x6) (set shift 7))
9998 ((#x7) (set shift 8))
9999 ((-8) (set shift -1))
10000 ((-7) (set shift -2))
10001 ((-6) (set shift -3))
10002 ((-5) (set shift -4))
10003 ((-4) (set shift -5))
10004 ((-3) (set shift -6))
10005 ((-2) (set shift -7))
10006 ((-1) (set shift -8))
10007 (else (set shift 0))
10008 )
10009 (set shmode -1)
10010 (set shmode (srl shmode #x8))
10011 (if (lt mode shift #x0) (set result (srl mode dst (mul shift -1))))
10012 (if (gt mode shift 0) (set result (sll mode dst shift)))
10013 (if (eq shmode #x0) ; QI
10014 (sequence
10015 ((mode cbitamt))
10016 (if (lt mode shift #x0)
10017 (set cbitamt (sub #x8 shift)); srl
10018 (set cbitamt (sub shift 1))) ; sll
10019 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
10020 (set obit (ne (and dst #x80) (and result #x80)))
10021 ))
10022 (if (eq shmode #xff) ; HI
10023 (sequence
10024 ((mode cbitamt))
10025 (if (lt mode shift #x0)
10026 (set cbitamt (sub 16 shift)) ; srl
10027 (set cbitamt (sub shift 1))) ; sll
10028 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
10029 (set obit (ne (and dst #x8000) (and result #x8000)))
10030 ))
10031 (set-z-and-s result)
10032 (set dst result))
10033 )
10034 (define-pmacro (shlr1h-sem mode dst)
10035 (sequence ((mode result)(mode shmode))
10036 (set shmode -1)
10037 (set shmode (srl shmode #x8))
10038 (if (lt mode (reg h-r1h) 0) (set result (srl mode dst (reg h-r1h))))
10039 (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h))))
10040 (if (eq shmode #x0) ; QI
10041 (sequence
10042 ((mode cbitamt))
10043 (if (lt mode (reg h-r1h) #x0)
10044 (set cbitamt (sub #x8 (reg h-r1h))) ; srl
10045 (set cbitamt (sub (reg h-r1h) 1))) ; sll
10046 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
10047 (set obit (ne (and dst #x80) (and result #x80)))
10048 ))
10049 (if (eq shmode #xff) ; HI
10050 (sequence
10051 ((mode cbitamt))
10052 (if (lt mode (reg h-r1h) #x0)
10053 (set cbitamt (sub 16 (reg h-r1h))) ; srl
10054 (set cbitamt (sub (reg h-r1h) 1))) ; sll
10055 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
10056 (set obit (ne (and dst #x8000) (and result #x8000)))
10057 ))
10058 (set-z-and-s result)
10059 (set dst result))
10060 )
10061 ; shl.BW #imm4,dst (m16 #1 m32 #1)
10062 (binary-arith16-shimm4-dst-defn QI .b 0 0 shl (f-0-4 #xE) (f-4-3 4) shl-sem)
10063 (binary-arith16-shimm4-dst-defn HI .w 0 1 shl (f-0-4 #xE) (f-4-3 4) shl-sem)
10064 (binary-arith32-shimm4-dst-defn QI .b 0 0 shl #x7 #x0 shl-sem)
10065 (binary-arith32-shimm4-dst-defn HI .w 0 1 shl #x7 #x0 shl-sem)
10066 ; shl.BW r1h,dst (m16 #2 m32 #3)
10067 (dni shl16.b-dst "shl.b r1h,dest" ((machine 16))
10068 ("shl.b r1h,${dst16-16-QI}")
10069 (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xE) dst16-16-QI)
10070 (shlr1h-sem HI dst16-16-QI)
10071 ())
10072 (dni shl16.w-dst "shl.w r1h,dest" ((machine 16))
10073 ("shl.w r1h,${dst16-16-HI}")
10074 (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xE) dst16-16-HI)
10075 (shlr1h-sem HI dst16-16-HI)
10076 ())
10077 (dni shl32.b-dst "shl.b r1h,dest" ((machine 32))
10078 ("shl.b r1h,${dst32-16-Unprefixed-QI}")
10079 (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE))
10080 (shlr1h-sem QI dst32-16-Unprefixed-QI)
10081 ())
10082 (dni shl32.w-dst "shl.w r1h,dest" ((machine 32))
10083 ("shl.w r1h,${dst32-16-Unprefixed-HI}")
10084 (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
10085 (shlr1h-sem HI dst32-16-Unprefixed-HI)
10086 ())
10087 ; shl.L #imm,dst (m16 #3)
10088 (dni shl16-L-imm-r2r0 "shl.L #Imm-sh-12-s4,r2r0" ((machine 16))
10089 "shl.l #${Imm-sh-12-s4},r2r0"
10090 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x8) Imm-sh-12-s4)
10091 (shl-sem SI Imm-sh-12-s4 (reg h-r2r0))
10092 ())
10093 (dni shl16-L-imm-r3r1 "shl.L #Imm-sh-12-s4,r3r1" ((machine 16))
10094 "shl.l #${Imm-sh-12-s4},r3r1"
10095 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x9) Imm-sh-12-s4)
10096 (shl-sem SI Imm-sh-12-s4 (reg h-r3r1))
10097 ())
10098 ; shl.L r1h,dst (m16 #4)
10099 (dni shl16-L-r1h-r2r0 "shl.L r1h,r2r0" ((machine 16))
10100 "shl.l r1h,r2r0"
10101 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 0) (f-12-4 1))
10102 (shl-sem SI (reg h-r1h) (reg h-r2r0))
10103 ())
10104 (dni shl16-L-r1h-r3r1 "shl.L r1h,r3r1" ((machine 16))
10105 "shl.l r1h,r3r1"
10106 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 1) (f-12-4 1))
10107 (shl-sem SI (reg h-r1h) (reg h-r3r1))
10108 ())
10109 ; shl.L #imm8,dst (m32 #2)
10110 (binary-arith32-imm-dst-defn QI SI .l 0 shl X #x9 #x2 #x1 shl-sem)
10111 ; shl.L r1h,dst (m32 #4)
10112 (dni shl32.l-dst "shl.l r1h,dest" ((machine 32))
10113 ("shl.l r1h,${dst32-16-Unprefixed-SI}")
10114 (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 0) (f-12-4 1))
10115 (shlr1h-sem QI dst32-16-Unprefixed-SI)
10116 ())
10118 ;-------------------------------------------------------------
10119 ; shlnc - shift logical non carry
10120 ;-------------------------------------------------------------
10122 ; TODO check semantics
10123 ; shlnc.L #imm8,dst
10124 (binary-arith32-imm-dst-defn QI SI .l 0 shlnc X #x8 #x2 #x1 shl-sem)
10126 ;-------------------------------------------------------------
10127 ; sin - string input (m32)
10128 ;-------------------------------------------------------------
10130 ; TODO semantics
10131 (dni sin32.b "sin" ((machine 32))
10132 ("sin.b")
10133 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 8) (f-12-4 3))
10134 (c-call VOID "sin_QI_semantics")
10135 ())
10137 (dni sin32.w "sin" ((machine 32))
10138 ("sin.w")
10139 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 9) (f-12-4 3))
10140 (c-call VOID "sin_HI_semantics")
10141 ())
10143 ;-------------------------------------------------------------
10144 ; smovb - string move backward
10145 ;-------------------------------------------------------------
10147 ; TODO semantics
10148 (dni smovb16.b "smovb.b" ((machine 16))
10149 ("smovb.b")
10150 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 9))
10151 (c-call VOID "smovb_QI_semantics")
10152 ())
10154 (dni smovb16.w "smovb.w" ((machine 16))
10155 ("smovb.w")
10156 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 9))
10157 (c-call VOID "smovb_HI_semantics")
10158 ())
10160 (dni smovb32.b "smovb.b" ((machine 32))
10161 ("smovb.b")
10162 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 8) (f-12-4 3))
10163 (c-call VOID "smovb_QI_semantics")
10164 ())
10166 (dni smovb32.w "smovb.w" ((machine 32))
10167 ("smovb.w")
10168 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 9) (f-12-4 3))
10169 (c-call VOID "smovb_HI_semantics")
10170 ())
10172 ;-------------------------------------------------------------
10173 ; smovf - string move forward (m32)
10174 ;-------------------------------------------------------------
10176 ; TODO semantics
10177 (dni smovf16.b "smovf.b" ((machine 16))
10178 ("smovf.b")
10179 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 8))
10180 (c-call VOID "smovf_QI_semantics")
10181 ())
10183 (dni smovf16.w "smovf.w" ((machine 16))
10184 ("smovf.w")
10185 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 8))
10186 (c-call VOID "smovf_HI_semantics")
10187 ())
10189 (dni smovf32.b "smovf.b" ((machine 32))
10190 ("smovf.b")
10191 (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 8) (f-12-4 3))
10192 (c-call VOID "smovf_QI_semantics")
10193 ())
10195 (dni smovf32.w "smovf.w" ((machine 32))
10196 ("smovf.w")
10197 (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 9) (f-12-4 3))
10198 (c-call VOID "smovf_HI_semantics")
10199 ())
10201 ;-------------------------------------------------------------
10202 ; smovu - string move unequal (m32)
10203 ;-------------------------------------------------------------
10205 ; TODO semantics
10206 (dni smovu.b "smovu.b" ((machine 32))
10207 ("smovu.b")
10208 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 8) (f-12-4 3))
10209 (c-call VOID "smovu_QI_semantics")
10210 ())
10212 (dni smovu.w "smovu.w" ((machine 32))
10213 ("smovu.w")
10214 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 9) (f-12-4 3))
10215 (c-call VOID "smovu_HI_semantics")
10216 ())
10218 ;-------------------------------------------------------------
10219 ; sout - string output (m32)
10220 ;-------------------------------------------------------------
10222 ; TODO semantics
10223 (dni sout.b "sout.b" ((machine 32))
10224 ("sout.b")
10225 (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 8) (f-12-4 3))
10226 (c-call VOID "sout_QI_semantics")
10227 ())
10229 (dni sout.w "sout" ((machine 32))
10230 ("sout.w")
10231 (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 9) (f-12-4 3))
10232 (c-call VOID "sout_HI_semantics")
10233 ())
10235 ;-------------------------------------------------------------
10236 ; sstr - string store
10237 ;-------------------------------------------------------------
10239 ; TODO semantics
10240 (dni sstr16.b "sstr.b" ((machine 16))
10241 ("sstr.b")
10242 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 #xA))
10243 (c-call VOID "sstr_QI_semantics")
10244 ())
10246 (dni sstr16.w "sstr.w" ((machine 16))
10247 ("sstr.w")
10248 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 #xA))
10249 (c-call VOID "sstr_HI_semantics")
10250 ())
10252 (dni sstr.b "sstr" ((machine 32))
10253 ("sstr.b")
10254 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 0) (f-12-4 3))
10255 (c-call VOID "sstr_QI_semantics")
10256 ())
10258 (dni sstr.w "sstr" ((machine 32))
10259 ("sstr.w")
10260 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 1) (f-12-4 3))
10261 (c-call VOID "sstr_HI_semantics")
10262 ())
10264 ;-------------------------------------------------------------
10265 ; stnz - store on not zero
10266 ;-------------------------------------------------------------
10268 (define-pmacro (stnz-sem mode src dst)
10269 (sequence ()
10270 (if (ne zbit (const 1))
10271 (set dst src)))
10272 )
10273 ; stnz #imm8,dst3 (m16)
10274 (binary-arith16-b-S-imm8-dst3 stnz "" (f-0-4 #xD) (f-4-1 0) stnz-sem)
10275 ; stnz.BW #imm,dst (m32)
10276 (binary-arith32-imm-dst-defn QI QI .b 0 stnz X #x9 #x1 #xF stnz-sem)
10277 (binary-arith32-imm-dst-defn HI HI .w 1 stnz X #x9 #x1 #xF stnz-sem)
10279 ;-------------------------------------------------------------
10280 ; stz - store on zero
10281 ;-------------------------------------------------------------
10283 (define-pmacro (stz-sem mode src dst)
10284 (sequence ()
10285 (if (eq zbit (const 1))
10286 (set dst src)))
10287 )
10288 ; stz #imm8,dst3 (m16)
10289 (binary-arith16-b-S-imm8-dst3 stz "" (f-0-4 #xC) (f-4-1 1) stz-sem)
10290 ; stz.BW #imm,dst (m32)
10291 (binary-arith32-imm-dst-defn QI QI .b 0 stz X #x9 #x0 #xF stz-sem)
10292 (binary-arith32-imm-dst-defn HI HI .w 1 stz X #x9 #x0 #xF stz-sem)
10294 ;-------------------------------------------------------------
10295 ; stzx - store on zero extention
10296 ;-------------------------------------------------------------
10298 (define-pmacro (stzx-sem mode src1 src2 dst)
10299 (sequence ()
10300 (if (eq zbit (const 1))
10301 (set dst src1)
10302 (set dst src2)))
10303 )
10304 ; stzx #imm8,dst3 (m16)
10305 (dni stzx16-imm8-imm8-r0h "stzx #Imm8,#Imm8,r0h" ((machine 16))
10306 ("stzx #${Imm-8-QI},#${Imm-16-QI},r0h")
10307 (+ (f-0-4 #xD) (f-4-4 #xB) Imm-8-QI Imm-16-QI)
10308 (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0h))
10309 ())
10310 (dni stzx16-imm8-imm8-r0l "stzx #Imm8,#Imm8,r0l" ((machine 16))
10311 ("stzx #${Imm-8-QI},#${Imm-16-QI},r0l")
10312 (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI Imm-16-QI)
10313 (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0l))
10314 ())
10315 (dni stzx16-imm8-imm8-dsp8sb "stzx #Imm8,#Imm8,dsp8[sb]" ((machine 16))
10316 ("stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-u8}[sb]")
10317 (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI Dsp-16-u8 Imm-24-QI)
10318 (stzx-sem QI Imm-8-QI Imm-16-QI (mem16 QI (add (reg h-sb) Dsp-24-u8)))
10319 ())
10320 (dni stzx16-imm8-imm8-dsp8fb "stzx #Imm8,#Imm8,dsp8[fb]" ((machine 16))
10321 ("stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-s8}[fb]")
10322 (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-s8 Imm-24-QI)
10323 (stzx-sem QI Imm-8-QI Imm-24-QI (mem16 QI (add (reg h-fb) Dsp-16-s8)))
10324 ())
10325 (dni stzx16-imm8-imm8-abs16 "stzx #Imm8,#Imm8,abs16" ((machine 16))
10326 ("stzx #${Imm-8-QI},#${Imm-32-QI},${Dsp-16-u16}")
10327 (+ (f-0-4 #xD) (f-4-4 #xF) Imm-8-QI Dsp-16-u16 Imm-32-QI)
10328 (stzx-sem QI Imm-8-QI Imm-32-QI (mem16 QI Dsp-16-u16))
10329 ())
10330 ; stzx.BW #imm,dst (m32)
10331 (insn-imm1-imm2-dst-Unprefixed stzx #x9 #x3 #xF stzx-sem)
10333 ;-------------------------------------------------------------
10334 ; subx - subtract extend (m32)
10335 ;-------------------------------------------------------------
10337 (define-pmacro (subx-sem mode src1 dst)
10338 (sequence ((mode result))
10339 (set result (sub mode dst (ext mode src1)))
10340 (set obit (sub-oflag mode dst (ext mode src1) 0))
10341 (set cbit (sub-cflag mode dst (ext mode src1) 0))
10342 (set dst result)
10343 (set-z-and-s result)))
10344 ; subx #imm8,dst
10345 (binary-arith32-imm-dst-defn QI SI "" 0 subx G #x9 #x1 #x1 subx-sem)
10346 ; subx src,dst
10347 (binary-arith32-src-dst-defn QI SI "" 0 subx G #x1 #x0 subx-sem)
10349 ;-------------------------------------------------------------
10350 ; tst - test
10351 ;-------------------------------------------------------------
10353 (define-pmacro (tst-sem mode src1 dst)
10354 (sequence ((mode result))
10355 (set result (and mode dst src1))
10356 (set-z-and-s result))
10357 )
10359 ; tst.BW #imm,dst (m16 #1 m32 #1)
10360 (binary-arith-imm-dst tst G (f-0-4 7) (f-4-3 3) (f-8-4 0) #x9 #x3 #xE tst-sem)
10361 ; tst.BW src,dst (m16 #2 m32 #3)
10362 (binary-arith16-src-dst-defn QI QI .b 0 tst X (f-0-4 #x8) (f-4-3 0) tst-sem)
10363 (binary-arith16-src-dst-defn HI HI .w 1 tst X (f-0-4 #x8) (f-4-3 0) tst-sem)
10364 (binary-arith32-src-dst-Prefixed QI QI .b 0 tst G #x1 #x9 tst-sem)
10365 (binary-arith32-src-dst-Prefixed HI HI .w 1 tst G #x1 #x9 tst-sem)
10366 ; tst.BW:S #imm,dst2 (m32 #2)
10367 (binary-arith32-s-imm-dst QI .b 0 tst #x0 #x6 tst-sem)
10368 (binary-arith32-s-imm-dst HI .w 1 tst #x0 #x6 tst-sem)
10370 ;-------------------------------------------------------------
10371 ; und - undefined
10372 ;-------------------------------------------------------------
10374 (dni und16 "und" ((machine 16))
10375 ("und")
10376 (+ (f-0-4 #xF) (f-4-4 #xF))
10377 (nop)
10378 ())
10380 (dni und32 "und" ((machine 32))
10381 ("und")
10382 (+ (f-0-4 #xF) (f-4-4 #xF))
10383 (nop)
10384 ())
10386 ;-------------------------------------------------------------
10387 ; wait
10388 ;-------------------------------------------------------------
10390 ; ??? semantics
10391 (dni wait16 "wait" ((machine 16))
10392 ("wait")
10393 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 3))
10394 (nop)
10395 ())
10397 (dni wait "wait" ((machine 32))
10398 ("wait")
10399 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 0) (f-12-4 3))
10400 (nop)
10401 ())
10403 ;-------------------------------------------------------------
10404 ; xchg - exchange
10405 ;-------------------------------------------------------------
10407 (define-pmacro (xchg-sem mode src dst)
10408 (sequence ((mode result))
10409 (set result src)
10410 (set src dst)
10411 (set dst result))
10412 )
10413 (define-pmacro (xchg16-defn mode sz szc src srcreg)
10414 (dni (.sym xchg16 sz - srcreg)
10415 (.str "xchg" sz "-" srcreg ",dst16-16-" mode)
10416 ((machine 16))
10417 (.str "xchg." sz " " srcreg ",${dst16-16-" mode "}")
10418 (+ (f-0-4 #x7) (f-4-3 #x5) (f-7-1 szc) (f-8-2 0) (f-10-2 src) (.sym dst16-16- mode))
10419 (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst16-16- mode))
10420 ())
10421 )
10422 (xchg16-defn QI b 0 0 r0l)
10423 (xchg16-defn QI b 0 1 r0h)
10424 (xchg16-defn QI b 0 2 r1l)
10425 (xchg16-defn QI b 0 3 r1h)
10426 (xchg16-defn HI w 1 0 r0)
10427 (xchg16-defn HI w 1 1 r1)
10428 (xchg16-defn HI w 1 2 r2)
10429 (xchg16-defn HI w 1 3 r3)
10430 (define-pmacro (xchg32-defn mode sz szc src srcreg)
10431 (dni (.sym xchg32 sz - srcreg)
10432 (.str "xchg" sz "-" srcreg ",dst32-16-Unprefixed-" mode)
10433 ((machine 32))
10434 (.str "xchg." sz " " srcreg ",${dst32-16-Unprefixed-" mode "}")
10435 (+ (f-0-4 #xD) (.sym dst32-16-Unprefixed- mode) (f-7-1 szc) (f-10-2 0) (f-12-1 1) (f-13-3 src))
10436 (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst32-16-Unprefixed- mode))
10437 ())
10438 )
10439 (xchg32-defn QI b 0 0 r0l)
10440 (xchg32-defn QI b 0 1 r1l)
10441 (xchg32-defn QI b 0 2 a0)
10442 (xchg32-defn QI b 0 3 a1)
10443 (xchg32-defn QI b 0 4 r0h)
10444 (xchg32-defn QI b 0 5 r1h)
10445 (xchg32-defn HI w 1 0 r0)
10446 (xchg32-defn HI w 1 1 r1)
10447 (xchg32-defn HI w 1 2 a0)
10448 (xchg32-defn HI w 1 3 a1)
10449 (xchg32-defn HI w 1 4 r2)
10450 (xchg32-defn HI w 1 5 r3)
10452 ;-------------------------------------------------------------
10453 ; xor - exclusive or
10454 ;-------------------------------------------------------------
10456 (define-pmacro (xor-sem mode src1 dst)
10457 (sequence ((mode result))
10458 (set result (xor mode src1 dst))
10459 (set-z-and-s result)
10460 (set dst result))
10461 )
10463 ; xor.BW #imm,dst (m16 #1 m32 #1)
10464 (binary-arith-imm-dst xor G (f-0-4 7) (f-4-3 3) (f-8-4 1) #x9 #x0 #xE xor-sem)
10465 ; xor.BW src,dst (m16 #3 m32 #3)
10466 (binary-arith-src-dst xor G (f-0-4 #x8) (f-4-3 4) #x1 #x9 xor-sem)
10468 ;-------------------------------------------------------------
10469 ; Widening
10470 ;-------------------------------------------------------------
10472 (define-pmacro (exts-sem smode dmode src dst)
10473 (set dst (ext dmode (trunc smode src)))
10474 )
10475 (define-pmacro (extz-sem smode dmode src dst)
10476 (set dst (zext dmode (trunc smode src)))
10477 )
10479 ; exts.b dst for m16c
10480 (ext16-defn QI HI .b 0 exts (f-0-4 7) (f-4-3 6) (f-8-4 6) exts-sem)
10482 ; exts.w r0 for m16c
10483 (dni exts16.w-r0
10484 "exts.w r0"
10485 ((machine 16))
10486 "exts.w r0"
10487 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 3))
10488 (exts-sem HI SI R0 R2R0)
10489 ())
10491 ; exts.size dst for m32c
10492 (ext32-defn QI HI .b 0 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem)
10493 (ext32-defn HI SI .w 1 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem)
10494 ; exts.b src,dst for m32c
10495 (ext32-binary-defn exts .b #x1 #x7 exts-sem)
10497 ; extz.b src,dst for m32c
10498 (ext32-binary-defn extz "" #x1 #xB extz-sem)
10500 ;-------------------------------------------------------------
10501 ; Indirect
10502 ;-------------------------------------------------------------
10504 ; TODO semantics
10505 (dni srcind "SRC-INDIRECT" ((machine 32))
10506 ("src-indirect")
10507 (+ (f-0-4 4) (f-4-4 1))
10508 (set (reg h-src-indirect) 1)
10509 ())
10511 (dni destind "DEST-INDIRECT" ((machine 32))
10512 ("dest-indirect")
10513 (+ (f-0-4 0) (f-4-4 9))
10514 (set (reg h-dst-indirect) 1)
10515 ())
10517 (dni srcdestind "SRC-DEST-INDIRECT" ((machine 32))
10518 ("src-dest-indirect")
10519 (+ (f-0-4 4) (f-4-4 9))
10520 (sequence () (set (reg h-src-indirect) 1) (set (reg h-dst-indirect) 1))
10521 ())