sim/lm32/decode.h

   1 /* Decode header for lm32bf.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright 1996-2020 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU simulators.
   8
   9    This file is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3, or (at your option)
  12    any later version.
  13
  14    It is distributed in the hope that it will be useful, but WITHOUT
  15    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  16    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  17    License for more details.
  18
  19    You should have received a copy of the GNU General Public License along
  20    with this program; if not, see <http://www.gnu.org/licenses/>.
  21
  22 */
  23
  24 #ifndef LM32BF_DECODE_H
  25 #define LM32BF_DECODE_H
  26
  27 extern const IDESC *lm32bf_decode (SIM_CPU *, IADDR,
  28                                   CGEN_INSN_WORD, CGEN_INSN_WORD,
  29                                   ARGBUF *);
  30 extern void lm32bf_init_idesc_table (SIM_CPU *);
  31 extern void lm32bf_sem_init_idesc_table (SIM_CPU *);
  32 extern void lm32bf_semf_init_idesc_table (SIM_CPU *);
  33
  34 /* Enum declaration for instructions in cpu family lm32bf.  */
  35 typedef enum lm32bf_insn_type {
  36   LM32BF_INSN_X_INVALID, LM32BF_INSN_X_AFTER, LM32BF_INSN_X_BEFORE, LM32BF_INSN_X_CTI_CHAIN
  37  , LM32BF_INSN_X_CHAIN, LM32BF_INSN_X_BEGIN, LM32BF_INSN_ADD, LM32BF_INSN_ADDI
  38  , LM32BF_INSN_AND, LM32BF_INSN_ANDI, LM32BF_INSN_ANDHII, LM32BF_INSN_B
  39  , LM32BF_INSN_BI, LM32BF_INSN_BE, LM32BF_INSN_BG, LM32BF_INSN_BGE
  40  , LM32BF_INSN_BGEU, LM32BF_INSN_BGU, LM32BF_INSN_BNE, LM32BF_INSN_CALL
  41  , LM32BF_INSN_CALLI, LM32BF_INSN_CMPE, LM32BF_INSN_CMPEI, LM32BF_INSN_CMPG
  42  , LM32BF_INSN_CMPGI, LM32BF_INSN_CMPGE, LM32BF_INSN_CMPGEI, LM32BF_INSN_CMPGEU
  43  , LM32BF_INSN_CMPGEUI, LM32BF_INSN_CMPGU, LM32BF_INSN_CMPGUI, LM32BF_INSN_CMPNE
  44  , LM32BF_INSN_CMPNEI, LM32BF_INSN_DIVU, LM32BF_INSN_LB, LM32BF_INSN_LBU
  45  , LM32BF_INSN_LH, LM32BF_INSN_LHU, LM32BF_INSN_LW, LM32BF_INSN_MODU
  46  , LM32BF_INSN_MUL, LM32BF_INSN_MULI, LM32BF_INSN_NOR, LM32BF_INSN_NORI
  47  , LM32BF_INSN_OR, LM32BF_INSN_ORI, LM32BF_INSN_ORHII, LM32BF_INSN_RCSR
  48  , LM32BF_INSN_SB, LM32BF_INSN_SEXTB, LM32BF_INSN_SEXTH, LM32BF_INSN_SH
  49  , LM32BF_INSN_SL, LM32BF_INSN_SLI, LM32BF_INSN_SR, LM32BF_INSN_SRI
  50  , LM32BF_INSN_SRU, LM32BF_INSN_SRUI, LM32BF_INSN_SUB, LM32BF_INSN_SW
  51  , LM32BF_INSN_USER, LM32BF_INSN_WCSR, LM32BF_INSN_XOR, LM32BF_INSN_XORI
  52  , LM32BF_INSN_XNOR, LM32BF_INSN_XNORI, LM32BF_INSN_BREAK, LM32BF_INSN_SCALL
  53  , LM32BF_INSN__MAX
  54 } LM32BF_INSN_TYPE;
  55
  56 /* Enum declaration for semantic formats in cpu family lm32bf.  */
  57 typedef enum lm32bf_sfmt_type {
  58   LM32BF_SFMT_EMPTY, LM32BF_SFMT_ADD, LM32BF_SFMT_ADDI, LM32BF_SFMT_ANDI
  59  , LM32BF_SFMT_ANDHII, LM32BF_SFMT_B, LM32BF_SFMT_BI, LM32BF_SFMT_BE
  60  , LM32BF_SFMT_CALL, LM32BF_SFMT_CALLI, LM32BF_SFMT_DIVU, LM32BF_SFMT_LB
  61  , LM32BF_SFMT_LH, LM32BF_SFMT_LW, LM32BF_SFMT_ORI, LM32BF_SFMT_RCSR
  62  , LM32BF_SFMT_SB, LM32BF_SFMT_SEXTB, LM32BF_SFMT_SH, LM32BF_SFMT_SW
  63  , LM32BF_SFMT_USER, LM32BF_SFMT_WCSR, LM32BF_SFMT_BREAK
  64 } LM32BF_SFMT_TYPE;
  65
  66 /* Function unit handlers (user written).  */
  67
  68 extern int lm32bf_model_lm32_u_exec (SIM_CPU *, const IDESC *, int /*unit_num*/, int /*referenced*/);
  69
  70 /* Profiling before/after handlers (user written) */
  71
  72 extern void lm32bf_model_insn_before (SIM_CPU *, int /*first_p*/);
  73 extern void lm32bf_model_insn_after (SIM_CPU *, int /*last_p*/, int /*cycles*/);
  74
  75 #endif /* LM32BF_DECODE_H */