?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
[PATCH 16/57][Arm][GAS] Add support for MVE instructions: vdup, vddup, vdwdup, vidup...
[binutils-gdb.git] / opcodes / m32c-ibld.c
blob29c9411a279f1e515e5bec4170d6d686a366dcd9
1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction building/extraction support for m32c. -*- C -*-
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5 - the resultant file is machine generated, cgen-ibld.in isn't
6
7 Copyright (C) 1996-2019 Free Software Foundation, Inc.
8
9 This file is part of libopcodes.
10
11 This library is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
14 any later version.
15
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "dis-asm.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "cgen/basic-modes.h"
37 #include "opintl.h"
38 #include "safe-ctype.h"
39
40 #undef min
41 #define min(a,b) ((a) < (b) ? (a) : (b))
42 #undef max
43 #define max(a,b) ((a) > (b) ? (a) : (b))
44
45 /* Used by the ifield rtx function. */
46 #define FLD(f) (fields->f)
47
48 static const char * insert_normal
49 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
51 static const char * insert_insn_normal
52 (CGEN_CPU_DESC, const CGEN_INSN *,
53 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
54 static int extract_normal
55 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma, long *);
58 static int extract_insn_normal
59 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
61 #if CGEN_INT_INSN_P
62 static void put_insn_int_value
63 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
64 #endif
65 #if ! CGEN_INT_INSN_P
66 static CGEN_INLINE void insert_1
67 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
68 static CGEN_INLINE int fill_cache
69 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
70 static CGEN_INLINE long extract_1
71 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
72 #endif
73 \f
74 /* Operand insertion. */
75
76 #if ! CGEN_INT_INSN_P
77
78 /* Subroutine of insert_normal. */
79
80 static CGEN_INLINE void
81 insert_1 (CGEN_CPU_DESC cd,
82 unsigned long value,
83 int start,
84 int length,
85 int word_length,
86 unsigned char *bufp)
87 {
88 unsigned long x,mask;
89 int shift;
90
91 x = cgen_get_insn_value (cd, bufp, word_length);
92
93 /* Written this way to avoid undefined behaviour. */
94 mask = (((1L << (length - 1)) - 1) << 1) | 1;
95 if (CGEN_INSN_LSB0_P)
96 shift = (start + 1) - length;
97 else
98 shift = (word_length - (start + length));
99 x = (x & ~(mask << shift)) | ((value & mask) << shift);
100
101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
102 }
103
104 #endif /* ! CGEN_INT_INSN_P */
105
106 /* Default insertion routine.
107
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
114
115 The result is an error message or NULL if success. */
116
117 /* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119 /* ??? This doesn't handle bfd_vma's. Create another function when
120 necessary. */
121
122 static const char *
123 insert_normal (CGEN_CPU_DESC cd,
124 long value,
125 unsigned int attrs,
126 unsigned int word_offset,
127 unsigned int start,
128 unsigned int length,
129 unsigned int word_length,
130 unsigned int total_length,
131 CGEN_INSN_BYTES_PTR buffer)
132 {
133 static char errbuf[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
136
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
138 if (length == 0)
139 return NULL;
140
141 if (word_length > 8 * sizeof (CGEN_INSN_INT))
142 abort ();
143
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
147 {
148 if (word_offset == 0
149 && word_length > total_length)
150 word_length = total_length;
151 }
152
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
155 {
156 long minval = - (1L << (length - 1));
157 unsigned long maxval = mask;
158
159 if ((value > 0 && (unsigned long) value > maxval)
160 || value < minval)
161 {
162 /* xgettext:c-format */
163 sprintf (errbuf,
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value, minval, maxval);
166 return errbuf;
167 }
168 }
169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
170 {
171 unsigned long maxval = mask;
172 unsigned long val = (unsigned long) value;
173
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
179 val &= 0xFFFFFFFF;
180
181 if (val > maxval)
182 {
183 /* xgettext:c-format */
184 sprintf (errbuf,
185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
186 val, maxval);
187 return errbuf;
188 }
189 }
190 else
191 {
192 if (! cgen_signed_overflow_ok_p (cd))
193 {
194 long minval = - (1L << (length - 1));
195 long maxval = (1L << (length - 1)) - 1;
196
197 if (value < minval || value > maxval)
198 {
199 sprintf
200 /* xgettext:c-format */
201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
202 value, minval, maxval);
203 return errbuf;
204 }
205 }
206 }
207
208 #if CGEN_INT_INSN_P
209
210 {
211 int shift_within_word, shift_to_word, shift;
212
213 /* How to shift the value to BIT0 of the word. */
214 shift_to_word = total_length - (word_offset + word_length);
215
216 /* How to shift the value to the field within the word. */
217 if (CGEN_INSN_LSB0_P)
218 shift_within_word = start + 1 - length;
219 else
220 shift_within_word = word_length - start - length;
221
222 /* The total SHIFT, then mask in the value. */
223 shift = shift_to_word + shift_within_word;
224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
225 }
226
227 #else /* ! CGEN_INT_INSN_P */
228
229 {
230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
231
232 insert_1 (cd, value, start, length, word_length, bufp);
233 }
234
235 #endif /* ! CGEN_INT_INSN_P */
236
237 return NULL;
238 }
239
240 /* Default insn builder (insert handler).
241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
243 recorded in host byte order, otherwise BUFFER is an array of bytes
244 and the value is recorded in target byte order).
245 The result is an error message or NULL if success. */
246
247 static const char *
248 insert_insn_normal (CGEN_CPU_DESC cd,
249 const CGEN_INSN * insn,
250 CGEN_FIELDS * fields,
251 CGEN_INSN_BYTES_PTR buffer,
252 bfd_vma pc)
253 {
254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
255 unsigned long value;
256 const CGEN_SYNTAX_CHAR_TYPE * syn;
257
258 CGEN_INIT_INSERT (cd);
259 value = CGEN_INSN_BASE_VALUE (insn);
260
261 /* If we're recording insns as numbers (rather than a string of bytes),
262 target byte order handling is deferred until later. */
263
264 #if CGEN_INT_INSN_P
265
266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
267 CGEN_FIELDS_BITSIZE (fields), value);
268
269 #else
270
271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
272 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
273 value);
274
275 #endif /* ! CGEN_INT_INSN_P */
276
277 /* ??? It would be better to scan the format's fields.
278 Still need to be able to insert a value based on the operand though;
279 e.g. storing a branch displacement that got resolved later.
280 Needs more thought first. */
281
282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
283 {
284 const char *errmsg;
285
286 if (CGEN_SYNTAX_CHAR_P (* syn))
287 continue;
288
289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
290 fields, buffer, pc);
291 if (errmsg)
292 return errmsg;
293 }
294
295 return NULL;
296 }
297
298 #if CGEN_INT_INSN_P
299 /* Cover function to store an insn value into an integral insn. Must go here
300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
301
302 static void
303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
304 CGEN_INSN_BYTES_PTR buf,
305 int length,
306 int insn_length,
307 CGEN_INSN_INT value)
308 {
309 /* For architectures with insns smaller than the base-insn-bitsize,
310 length may be too big. */
311 if (length > insn_length)
312 *buf = value;
313 else
314 {
315 int shift = insn_length - length;
316 /* Written this way to avoid undefined behaviour. */
317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
318
319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
320 }
321 }
322 #endif
323 \f
324 /* Operand extraction. */
325
326 #if ! CGEN_INT_INSN_P
327
328 /* Subroutine of extract_normal.
329 Ensure sufficient bytes are cached in EX_INFO.
330 OFFSET is the offset in bytes from the start of the insn of the value.
331 BYTES is the length of the needed value.
332 Returns 1 for success, 0 for failure. */
333
334 static CGEN_INLINE int
335 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
336 CGEN_EXTRACT_INFO *ex_info,
337 int offset,
338 int bytes,
339 bfd_vma pc)
340 {
341 /* It's doubtful that the middle part has already been fetched so
342 we don't optimize that case. kiss. */
343 unsigned int mask;
344 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
345
346 /* First do a quick check. */
347 mask = (1 << bytes) - 1;
348 if (((ex_info->valid >> offset) & mask) == mask)
349 return 1;
350
351 /* Search for the first byte we need to read. */
352 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
353 if (! (mask & ex_info->valid))
354 break;
355
356 if (bytes)
357 {
358 int status;
359
360 pc += offset;
361 status = (*info->read_memory_func)
362 (pc, ex_info->insn_bytes + offset, bytes, info);
363
364 if (status != 0)
365 {
366 (*info->memory_error_func) (status, pc, info);
367 return 0;
368 }
369
370 ex_info->valid |= ((1 << bytes) - 1) << offset;
371 }
372
373 return 1;
374 }
375
376 /* Subroutine of extract_normal. */
377
378 static CGEN_INLINE long
379 extract_1 (CGEN_CPU_DESC cd,
380 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
381 int start,
382 int length,
383 int word_length,
384 unsigned char *bufp,
385 bfd_vma pc ATTRIBUTE_UNUSED)
386 {
387 unsigned long x;
388 int shift;
389
390 x = cgen_get_insn_value (cd, bufp, word_length);
391
392 if (CGEN_INSN_LSB0_P)
393 shift = (start + 1) - length;
394 else
395 shift = (word_length - (start + length));
396 return x >> shift;
397 }
398
399 #endif /* ! CGEN_INT_INSN_P */
400
401 /* Default extraction routine.
402
403 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
404 or sometimes less for cases like the m32r where the base insn size is 32
405 but some insns are 16 bits.
406 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
407 but for generality we take a bitmask of all of them.
408 WORD_OFFSET is the offset in bits from the start of the insn of the value.
409 WORD_LENGTH is the length of the word in bits in which the value resides.
410 START is the starting bit number in the word, architecture origin.
411 LENGTH is the length of VALUE in bits.
412 TOTAL_LENGTH is the total length of the insn in bits.
413
414 Returns 1 for success, 0 for failure. */
415
416 /* ??? The return code isn't properly used. wip. */
417
418 /* ??? This doesn't handle bfd_vma's. Create another function when
419 necessary. */
420
421 static int
422 extract_normal (CGEN_CPU_DESC cd,
423 #if ! CGEN_INT_INSN_P
424 CGEN_EXTRACT_INFO *ex_info,
425 #else
426 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
427 #endif
428 CGEN_INSN_INT insn_value,
429 unsigned int attrs,
430 unsigned int word_offset,
431 unsigned int start,
432 unsigned int length,
433 unsigned int word_length,
434 unsigned int total_length,
435 #if ! CGEN_INT_INSN_P
436 bfd_vma pc,
437 #else
438 bfd_vma pc ATTRIBUTE_UNUSED,
439 #endif
440 long *valuep)
441 {
442 long value, mask;
443
444 /* If LENGTH is zero, this operand doesn't contribute to the value
445 so give it a standard value of zero. */
446 if (length == 0)
447 {
448 *valuep = 0;
449 return 1;
450 }
451
452 if (word_length > 8 * sizeof (CGEN_INSN_INT))
453 abort ();
454
455 /* For architectures with insns smaller than the insn-base-bitsize,
456 word_length may be too big. */
457 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
458 {
459 if (word_offset + word_length > total_length)
460 word_length = total_length - word_offset;
461 }
462
463 /* Does the value reside in INSN_VALUE, and at the right alignment? */
464
465 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
466 {
467 if (CGEN_INSN_LSB0_P)
468 value = insn_value >> ((word_offset + start + 1) - length);
469 else
470 value = insn_value >> (total_length - ( word_offset + start + length));
471 }
472
473 #if ! CGEN_INT_INSN_P
474
475 else
476 {
477 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
478
479 if (word_length > 8 * sizeof (CGEN_INSN_INT))
480 abort ();
481
482 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
483 return 0;
484
485 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
486 }
487
488 #endif /* ! CGEN_INT_INSN_P */
489
490 /* Written this way to avoid undefined behaviour. */
491 mask = (((1L << (length - 1)) - 1) << 1) | 1;
492
493 value &= mask;
494 /* sign extend? */
495 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
496 && (value & (1L << (length - 1))))
497 value |= ~mask;
498
499 *valuep = value;
500
501 return 1;
502 }
503
504 /* Default insn extractor.
505
506 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
507 The extracted fields are stored in FIELDS.
508 EX_INFO is used to handle reading variable length insns.
509 Return the length of the insn in bits, or 0 if no match,
510 or -1 if an error occurs fetching data (memory_error_func will have
511 been called). */
512
513 static int
514 extract_insn_normal (CGEN_CPU_DESC cd,
515 const CGEN_INSN *insn,
516 CGEN_EXTRACT_INFO *ex_info,
517 CGEN_INSN_INT insn_value,
518 CGEN_FIELDS *fields,
519 bfd_vma pc)
520 {
521 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
522 const CGEN_SYNTAX_CHAR_TYPE *syn;
523
524 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
525
526 CGEN_INIT_EXTRACT (cd);
527
528 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
529 {
530 int length;
531
532 if (CGEN_SYNTAX_CHAR_P (*syn))
533 continue;
534
535 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
536 ex_info, insn_value, fields, pc);
537 if (length <= 0)
538 return length;
539 }
540
541 /* We recognized and successfully extracted this insn. */
542 return CGEN_INSN_BITSIZE (insn);
543 }
544 \f
545 /* Machine generated code added here. */
546
547 const char * m32c_cgen_insert_operand
548 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
549
550 /* Main entry point for operand insertion.
551
552 This function is basically just a big switch statement. Earlier versions
553 used tables to look up the function to use, but
554 - if the table contains both assembler and disassembler functions then
555 the disassembler contains much of the assembler and vice-versa,
556 - there's a lot of inlining possibilities as things grow,
557 - using a switch statement avoids the function call overhead.
558
559 This function could be moved into `parse_insn_normal', but keeping it
560 separate makes clear the interface between `parse_insn_normal' and each of
561 the handlers. It's also needed by GAS to insert operands that couldn't be
562 resolved during parsing. */
563
564 const char *
565 m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
566 int opindex,
567 CGEN_FIELDS * fields,
568 CGEN_INSN_BYTES_PTR buffer,
569 bfd_vma pc ATTRIBUTE_UNUSED)
570 {
571 const char * errmsg = NULL;
572 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
573
574 switch (opindex)
575 {
576 case M32C_OPERAND_A0 :
577 break;
578 case M32C_OPERAND_A1 :
579 break;
580 case M32C_OPERAND_AN16_PUSH_S :
581 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
582 break;
583 case M32C_OPERAND_BIT16AN :
584 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
585 break;
586 case M32C_OPERAND_BIT16RN :
587 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
588 break;
589 case M32C_OPERAND_BIT3_S :
590 {
591 {
592 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
593 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
594 }
595 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
596 if (errmsg)
597 break;
598 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
599 if (errmsg)
600 break;
601 }
602 break;
603 case M32C_OPERAND_BIT32ANPREFIXED :
604 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
605 break;
606 case M32C_OPERAND_BIT32ANUNPREFIXED :
607 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
608 break;
609 case M32C_OPERAND_BIT32RNPREFIXED :
610 {
611 long value = fields->f_dst32_rn_prefixed_QI;
612 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
613 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
614 }
615 break;
616 case M32C_OPERAND_BIT32RNUNPREFIXED :
617 {
618 long value = fields->f_dst32_rn_unprefixed_QI;
619 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
620 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
621 }
622 break;
623 case M32C_OPERAND_BITBASE16_16_S8 :
624 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
625 break;
626 case M32C_OPERAND_BITBASE16_16_U16 :
627 {
628 long value = fields->f_dsp_16_u16;
629 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
630 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
631 }
632 break;
633 case M32C_OPERAND_BITBASE16_16_U8 :
634 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
635 break;
636 case M32C_OPERAND_BITBASE16_8_U11_S :
637 {
638 {
639 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
640 FLD (f_dsp_8_u8) = ((((UINT) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
641 }
642 errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer);
643 if (errmsg)
644 break;
645 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
646 if (errmsg)
647 break;
648 }
649 break;
650 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
651 {
652 {
653 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7));
654 FLD (f_dsp_16_s8) = ((INT) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
655 }
656 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
657 if (errmsg)
658 break;
659 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
660 if (errmsg)
661 break;
662 }
663 break;
664 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
665 {
666 {
667 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7));
668 FLD (f_dsp_16_s16) = ((INT) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
669 }
670 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
671 if (errmsg)
672 break;
673 {
674 long value = fields->f_dsp_16_s16;
675 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
676 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
677 }
678 if (errmsg)
679 break;
680 }
681 break;
682 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
683 {
684 {
685 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7));
686 FLD (f_dsp_16_u8) = ((((UINT) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
687 }
688 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
689 if (errmsg)
690 break;
691 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
692 if (errmsg)
693 break;
694 }
695 break;
696 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
697 {
698 {
699 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7));
700 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
701 }
702 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
703 if (errmsg)
704 break;
705 {
706 long value = fields->f_dsp_16_u16;
707 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
708 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
709 }
710 if (errmsg)
711 break;
712 }
713 break;
714 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
715 {
716 {
717 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7));
718 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
719 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
720 }
721 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
722 if (errmsg)
723 break;
724 {
725 long value = fields->f_dsp_16_u16;
726 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
727 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
728 }
729 if (errmsg)
730 break;
731 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
732 if (errmsg)
733 break;
734 }
735 break;
736 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
737 {
738 {
739 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7));
740 FLD (f_dsp_24_s8) = ((INT) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
741 }
742 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
743 if (errmsg)
744 break;
745 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
746 if (errmsg)
747 break;
748 }
749 break;
750 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
751 {
752 {
753 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7));
754 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
755 FLD (f_dsp_32_s8) = ((INT) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
756 }
757 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
758 if (errmsg)
759 break;
760 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
761 if (errmsg)
762 break;
763 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
764 if (errmsg)
765 break;
766 }
767 break;
768 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
769 {
770 {
771 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7));
772 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
773 }
774 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
775 if (errmsg)
776 break;
777 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
778 if (errmsg)
779 break;
780 }
781 break;
782 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
783 {
784 {
785 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7));
786 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
787 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
788 }
789 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
790 if (errmsg)
791 break;
792 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
793 if (errmsg)
794 break;
795 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
796 if (errmsg)
797 break;
798 }
799 break;
800 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
801 {
802 {
803 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7));
804 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
805 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
806 }
807 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
808 if (errmsg)
809 break;
810 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
811 if (errmsg)
812 break;
813 {
814 long value = fields->f_dsp_32_u16;
815 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
816 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
817 }
818 if (errmsg)
819 break;
820 }
821 break;
822 case M32C_OPERAND_BITNO16R :
823 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
824 break;
825 case M32C_OPERAND_BITNO32PREFIXED :
826 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
827 break;
828 case M32C_OPERAND_BITNO32UNPREFIXED :
829 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
830 break;
831 case M32C_OPERAND_DSP_10_U6 :
832 errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer);
833 break;
834 case M32C_OPERAND_DSP_16_S16 :
835 {
836 long value = fields->f_dsp_16_s16;
837 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
838 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
839 }
840 break;
841 case M32C_OPERAND_DSP_16_S8 :
842 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
843 break;
844 case M32C_OPERAND_DSP_16_U16 :
845 {
846 long value = fields->f_dsp_16_u16;
847 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
848 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
849 }
850 break;
851 case M32C_OPERAND_DSP_16_U20 :
852 {
853 {
854 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
855 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255));
856 }
857 {
858 long value = fields->f_dsp_16_u16;
859 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
860 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
861 }
862 if (errmsg)
863 break;
864 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
865 if (errmsg)
866 break;
867 }
868 break;
869 case M32C_OPERAND_DSP_16_U24 :
870 {
871 {
872 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
873 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255));
874 }
875 {
876 long value = fields->f_dsp_16_u16;
877 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
878 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
879 }
880 if (errmsg)
881 break;
882 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
883 if (errmsg)
884 break;
885 }
886 break;
887 case M32C_OPERAND_DSP_16_U8 :
888 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
889 break;
890 case M32C_OPERAND_DSP_24_S16 :
891 {
892 {
893 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
894 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255));
895 }
896 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
897 if (errmsg)
898 break;
899 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
900 if (errmsg)
901 break;
902 }
903 break;
904 case M32C_OPERAND_DSP_24_S8 :
905 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
906 break;
907 case M32C_OPERAND_DSP_24_U16 :
908 {
909 {
910 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255));
911 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_u16)) >> (8))) & (255));
912 }
913 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
914 if (errmsg)
915 break;
916 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
917 if (errmsg)
918 break;
919 }
920 break;
921 case M32C_OPERAND_DSP_24_U20 :
922 {
923 {
924 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
925 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
926 }
927 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
928 if (errmsg)
929 break;
930 {
931 long value = fields->f_dsp_32_u16;
932 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
933 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
934 }
935 if (errmsg)
936 break;
937 }
938 break;
939 case M32C_OPERAND_DSP_24_U24 :
940 {
941 {
942 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
943 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
944 }
945 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
946 if (errmsg)
947 break;
948 {
949 long value = fields->f_dsp_32_u16;
950 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
951 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
952 }
953 if (errmsg)
954 break;
955 }
956 break;
957 case M32C_OPERAND_DSP_24_U8 :
958 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
959 break;
960 case M32C_OPERAND_DSP_32_S16 :
961 {
962 long value = fields->f_dsp_32_s16;
963 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
964 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
965 }
966 break;
967 case M32C_OPERAND_DSP_32_S8 :
968 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
969 break;
970 case M32C_OPERAND_DSP_32_U16 :
971 {
972 long value = fields->f_dsp_32_u16;
973 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
974 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
975 }
976 break;
977 case M32C_OPERAND_DSP_32_U20 :
978 {
979 long value = fields->f_dsp_32_u24;
980 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
981 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
982 }
983 break;
984 case M32C_OPERAND_DSP_32_U24 :
985 {
986 long value = fields->f_dsp_32_u24;
987 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
988 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
989 }
990 break;
991 case M32C_OPERAND_DSP_32_U8 :
992 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
993 break;
994 case M32C_OPERAND_DSP_40_S16 :
995 {
996 long value = fields->f_dsp_40_s16;
997 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
998 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
999 }
1000 break;
1001 case M32C_OPERAND_DSP_40_S8 :
1002 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1003 break;
1004 case M32C_OPERAND_DSP_40_U16 :
1005 {
1006 long value = fields->f_dsp_40_u16;
1007 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1008 errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer);
1009 }
1010 break;
1011 case M32C_OPERAND_DSP_40_U20 :
1012 {
1013 long value = fields->f_dsp_40_u20;
1014 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
1015 errmsg = insert_normal (cd, value, 0, 32, 8, 20, 32, total_length, buffer);
1016 }
1017 break;
1018 case M32C_OPERAND_DSP_40_U24 :
1019 {
1020 long value = fields->f_dsp_40_u24;
1021 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1022 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1023 }
1024 break;
1025 case M32C_OPERAND_DSP_40_U8 :
1026 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1027 break;
1028 case M32C_OPERAND_DSP_48_S16 :
1029 {
1030 long value = fields->f_dsp_48_s16;
1031 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1032 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1033 }
1034 break;
1035 case M32C_OPERAND_DSP_48_S8 :
1036 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1037 break;
1038 case M32C_OPERAND_DSP_48_U16 :
1039 {
1040 long value = fields->f_dsp_48_u16;
1041 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1042 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1043 }
1044 break;
1045 case M32C_OPERAND_DSP_48_U20 :
1046 {
1047 {
1048 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u20)) >> (16))) & (15));
1049 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u20)) & (65535));
1050 }
1051 {
1052 long value = fields->f_dsp_48_u16;
1053 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1054 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1055 }
1056 if (errmsg)
1057 break;
1058 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1059 if (errmsg)
1060 break;
1061 }
1062 break;
1063 case M32C_OPERAND_DSP_48_U24 :
1064 {
1065 {
1066 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u24)) >> (16))) & (255));
1067 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535));
1068 }
1069 {
1070 long value = fields->f_dsp_48_u16;
1071 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1072 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1073 }
1074 if (errmsg)
1075 break;
1076 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1077 if (errmsg)
1078 break;
1079 }
1080 break;
1081 case M32C_OPERAND_DSP_48_U8 :
1082 errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer);
1083 break;
1084 case M32C_OPERAND_DSP_8_S24 :
1085 {
1086 long value = fields->f_dsp_8_s24;
1087 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
1088 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer);
1089 }
1090 break;
1091 case M32C_OPERAND_DSP_8_S8 :
1092 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1093 break;
1094 case M32C_OPERAND_DSP_8_U16 :
1095 {
1096 long value = fields->f_dsp_8_u16;
1097 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1098 errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
1099 }
1100 break;
1101 case M32C_OPERAND_DSP_8_U24 :
1102 {
1103 long value = fields->f_dsp_8_u24;
1104 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1105 errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
1106 }
1107 break;
1108 case M32C_OPERAND_DSP_8_U6 :
1109 errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer);
1110 break;
1111 case M32C_OPERAND_DSP_8_U8 :
1112 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
1113 break;
1114 case M32C_OPERAND_DST16AN :
1115 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1116 break;
1117 case M32C_OPERAND_DST16AN_S :
1118 errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer);
1119 break;
1120 case M32C_OPERAND_DST16ANHI :
1121 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1122 break;
1123 case M32C_OPERAND_DST16ANQI :
1124 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1125 break;
1126 case M32C_OPERAND_DST16ANQI_S :
1127 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1128 break;
1129 case M32C_OPERAND_DST16ANSI :
1130 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1131 break;
1132 case M32C_OPERAND_DST16RNEXTQI :
1133 errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer);
1134 break;
1135 case M32C_OPERAND_DST16RNHI :
1136 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1137 break;
1138 case M32C_OPERAND_DST16RNQI :
1139 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1140 break;
1141 case M32C_OPERAND_DST16RNQI_S :
1142 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1143 break;
1144 case M32C_OPERAND_DST16RNSI :
1145 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1146 break;
1147 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1148 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1149 break;
1150 case M32C_OPERAND_DST32ANPREFIXED :
1151 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1152 break;
1153 case M32C_OPERAND_DST32ANPREFIXEDHI :
1154 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1155 break;
1156 case M32C_OPERAND_DST32ANPREFIXEDQI :
1157 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1158 break;
1159 case M32C_OPERAND_DST32ANPREFIXEDSI :
1160 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1161 break;
1162 case M32C_OPERAND_DST32ANUNPREFIXED :
1163 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1164 break;
1165 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1166 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1167 break;
1168 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1169 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1170 break;
1171 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1172 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1173 break;
1174 case M32C_OPERAND_DST32R0HI_S :
1175 break;
1176 case M32C_OPERAND_DST32R0QI_S :
1177 break;
1178 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1179 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1180 break;
1181 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1182 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1183 break;
1184 case M32C_OPERAND_DST32RNPREFIXEDHI :
1185 {
1186 long value = fields->f_dst32_rn_prefixed_HI;
1187 value = ((((value) + (2))) % (4));
1188 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1189 }
1190 break;
1191 case M32C_OPERAND_DST32RNPREFIXEDQI :
1192 {
1193 long value = fields->f_dst32_rn_prefixed_QI;
1194 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1195 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1196 }
1197 break;
1198 case M32C_OPERAND_DST32RNPREFIXEDSI :
1199 {
1200 long value = fields->f_dst32_rn_prefixed_SI;
1201 value = ((value) + (2));
1202 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1203 }
1204 break;
1205 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1206 {
1207 long value = fields->f_dst32_rn_unprefixed_HI;
1208 value = ((((value) + (2))) % (4));
1209 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1210 }
1211 break;
1212 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1213 {
1214 long value = fields->f_dst32_rn_unprefixed_QI;
1215 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1216 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1217 }
1218 break;
1219 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1220 {
1221 long value = fields->f_dst32_rn_unprefixed_SI;
1222 value = ((value) + (2));
1223 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1224 }
1225 break;
1226 case M32C_OPERAND_G :
1227 break;
1228 case M32C_OPERAND_IMM_12_S4 :
1229 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1230 break;
1231 case M32C_OPERAND_IMM_12_S4N :
1232 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1233 break;
1234 case M32C_OPERAND_IMM_13_U3 :
1235 errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer);
1236 break;
1237 case M32C_OPERAND_IMM_16_HI :
1238 {
1239 long value = fields->f_dsp_16_s16;
1240 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1241 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
1242 }
1243 break;
1244 case M32C_OPERAND_IMM_16_QI :
1245 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
1246 break;
1247 case M32C_OPERAND_IMM_16_SI :
1248 {
1249 {
1250 FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
1251 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535));
1252 }
1253 {
1254 long value = fields->f_dsp_16_u16;
1255 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1256 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
1257 }
1258 if (errmsg)
1259 break;
1260 {
1261 long value = fields->f_dsp_32_u16;
1262 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1263 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
1264 }
1265 if (errmsg)
1266 break;
1267 }
1268 break;
1269 case M32C_OPERAND_IMM_20_S4 :
1270 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1271 break;
1272 case M32C_OPERAND_IMM_24_HI :
1273 {
1274 {
1275 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
1276 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255));
1277 }
1278 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1279 if (errmsg)
1280 break;
1281 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1282 if (errmsg)
1283 break;
1284 }
1285 break;
1286 case M32C_OPERAND_IMM_24_QI :
1287 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
1288 break;
1289 case M32C_OPERAND_IMM_24_SI :
1290 {
1291 {
1292 FLD (f_dsp_32_u24) = ((((UINT) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
1293 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255));
1294 }
1295 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1296 if (errmsg)
1297 break;
1298 {
1299 long value = fields->f_dsp_32_u24;
1300 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1301 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
1302 }
1303 if (errmsg)
1304 break;
1305 }
1306 break;
1307 case M32C_OPERAND_IMM_32_HI :
1308 {
1309 long value = fields->f_dsp_32_s16;
1310 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1311 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
1312 }
1313 break;
1314 case M32C_OPERAND_IMM_32_QI :
1315 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
1316 break;
1317 case M32C_OPERAND_IMM_32_SI :
1318 {
1319 long value = fields->f_dsp_32_s32;
1320 value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
1321 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer);
1322 }
1323 break;
1324 case M32C_OPERAND_IMM_40_HI :
1325 {
1326 long value = fields->f_dsp_40_s16;
1327 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1328 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1329 }
1330 break;
1331 case M32C_OPERAND_IMM_40_QI :
1332 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1333 break;
1334 case M32C_OPERAND_IMM_40_SI :
1335 {
1336 {
1337 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_40_s32)) >> (24))) & (255));
1338 FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215));
1339 }
1340 {
1341 long value = fields->f_dsp_40_u24;
1342 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1343 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1344 }
1345 if (errmsg)
1346 break;
1347 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1348 if (errmsg)
1349 break;
1350 }
1351 break;
1352 case M32C_OPERAND_IMM_48_HI :
1353 {
1354 long value = fields->f_dsp_48_s16;
1355 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1356 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1357 }
1358 break;
1359 case M32C_OPERAND_IMM_48_QI :
1360 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1361 break;
1362 case M32C_OPERAND_IMM_48_SI :
1363 {
1364 {
1365 FLD (f_dsp_64_u16) = ((((UINT) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
1366 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535));
1367 }
1368 {
1369 long value = fields->f_dsp_48_u16;
1370 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1371 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1372 }
1373 if (errmsg)
1374 break;
1375 {
1376 long value = fields->f_dsp_64_u16;
1377 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1378 errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer);
1379 }
1380 if (errmsg)
1381 break;
1382 }
1383 break;
1384 case M32C_OPERAND_IMM_56_HI :
1385 {
1386 {
1387 FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255));
1388 FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_56_s16)) >> (8))) & (255));
1389 }
1390 errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer);
1391 if (errmsg)
1392 break;
1393 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1394 if (errmsg)
1395 break;
1396 }
1397 break;
1398 case M32C_OPERAND_IMM_56_QI :
1399 errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer);
1400 break;
1401 case M32C_OPERAND_IMM_64_HI :
1402 {
1403 long value = fields->f_dsp_64_s16;
1404 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1405 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
1406 }
1407 break;
1408 case M32C_OPERAND_IMM_8_HI :
1409 {
1410 long value = fields->f_dsp_8_s16;
1411 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1412 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer);
1413 }
1414 break;
1415 case M32C_OPERAND_IMM_8_QI :
1416 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1417 break;
1418 case M32C_OPERAND_IMM_8_S4 :
1419 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1420 break;
1421 case M32C_OPERAND_IMM_8_S4N :
1422 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1423 break;
1424 case M32C_OPERAND_IMM_SH_12_S4 :
1425 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1426 break;
1427 case M32C_OPERAND_IMM_SH_20_S4 :
1428 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1429 break;
1430 case M32C_OPERAND_IMM_SH_8_S4 :
1431 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1432 break;
1433 case M32C_OPERAND_IMM1_S :
1434 {
1435 long value = fields->f_imm1_S;
1436 value = ((value) - (1));
1437 errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer);
1438 }
1439 break;
1440 case M32C_OPERAND_IMM3_S :
1441 {
1442 {
1443 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
1444 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
1445 }
1446 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1447 if (errmsg)
1448 break;
1449 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1450 if (errmsg)
1451 break;
1452 }
1453 break;
1454 case M32C_OPERAND_LAB_16_8 :
1455 {
1456 long value = fields->f_lab_16_8;
1457 value = ((value) - (((pc) + (2))));
1458 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer);
1459 }
1460 break;
1461 case M32C_OPERAND_LAB_24_8 :
1462 {
1463 long value = fields->f_lab_24_8;
1464 value = ((value) - (((pc) + (2))));
1465 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer);
1466 }
1467 break;
1468 case M32C_OPERAND_LAB_32_8 :
1469 {
1470 long value = fields->f_lab_32_8;
1471 value = ((value) - (((pc) + (2))));
1472 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer);
1473 }
1474 break;
1475 case M32C_OPERAND_LAB_40_8 :
1476 {
1477 long value = fields->f_lab_40_8;
1478 value = ((value) - (((pc) + (2))));
1479 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer);
1480 }
1481 break;
1482 case M32C_OPERAND_LAB_5_3 :
1483 {
1484 long value = fields->f_lab_5_3;
1485 value = ((value) - (((pc) + (2))));
1486 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
1487 }
1488 break;
1489 case M32C_OPERAND_LAB_8_16 :
1490 {
1491 long value = fields->f_lab_8_16;
1492 value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((USI) (((((value) - (((pc) + (1))))) & (65535))) >> (8))));
1493 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer);
1494 }
1495 break;
1496 case M32C_OPERAND_LAB_8_24 :
1497 {
1498 long value = fields->f_lab_8_24;
1499 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1500 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer);
1501 }
1502 break;
1503 case M32C_OPERAND_LAB_8_8 :
1504 {
1505 long value = fields->f_lab_8_8;
1506 value = ((value) - (((pc) + (1))));
1507 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
1508 }
1509 break;
1510 case M32C_OPERAND_LAB32_JMP_S :
1511 {
1512 {
1513 SI tmp_val;
1514 tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
1515 FLD (f_7_1) = ((tmp_val) & (1));
1516 FLD (f_2_2) = ((USI) (tmp_val) >> (1));
1517 }
1518 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1519 if (errmsg)
1520 break;
1521 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1522 if (errmsg)
1523 break;
1524 }
1525 break;
1526 case M32C_OPERAND_Q :
1527 break;
1528 case M32C_OPERAND_R0 :
1529 break;
1530 case M32C_OPERAND_R0H :
1531 break;
1532 case M32C_OPERAND_R0L :
1533 break;
1534 case M32C_OPERAND_R1 :
1535 break;
1536 case M32C_OPERAND_R1R2R0 :
1537 break;
1538 case M32C_OPERAND_R2 :
1539 break;
1540 case M32C_OPERAND_R2R0 :
1541 break;
1542 case M32C_OPERAND_R3 :
1543 break;
1544 case M32C_OPERAND_R3R1 :
1545 break;
1546 case M32C_OPERAND_REGSETPOP :
1547 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1548 break;
1549 case M32C_OPERAND_REGSETPUSH :
1550 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1551 break;
1552 case M32C_OPERAND_RN16_PUSH_S :
1553 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
1554 break;
1555 case M32C_OPERAND_S :
1556 break;
1557 case M32C_OPERAND_SRC16AN :
1558 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1559 break;
1560 case M32C_OPERAND_SRC16ANHI :
1561 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1562 break;
1563 case M32C_OPERAND_SRC16ANQI :
1564 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1565 break;
1566 case M32C_OPERAND_SRC16RNHI :
1567 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1568 break;
1569 case M32C_OPERAND_SRC16RNQI :
1570 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1571 break;
1572 case M32C_OPERAND_SRC32ANPREFIXED :
1573 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1574 break;
1575 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1576 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1577 break;
1578 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1579 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1580 break;
1581 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1582 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1583 break;
1584 case M32C_OPERAND_SRC32ANUNPREFIXED :
1585 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1586 break;
1587 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1588 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1589 break;
1590 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1591 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1592 break;
1593 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1594 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1595 break;
1596 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1597 {
1598 long value = fields->f_src32_rn_prefixed_HI;
1599 value = ((((value) + (2))) % (4));
1600 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1601 }
1602 break;
1603 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1604 {
1605 long value = fields->f_src32_rn_prefixed_QI;
1606 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1607 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1608 }
1609 break;
1610 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1611 {
1612 long value = fields->f_src32_rn_prefixed_SI;
1613 value = ((value) + (2));
1614 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1615 }
1616 break;
1617 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1618 {
1619 long value = fields->f_src32_rn_unprefixed_HI;
1620 value = ((((value) + (2))) % (4));
1621 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1622 }
1623 break;
1624 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1625 {
1626 long value = fields->f_src32_rn_unprefixed_QI;
1627 value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
1628 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1629 }
1630 break;
1631 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1632 {
1633 long value = fields->f_src32_rn_unprefixed_SI;
1634 value = ((value) + (2));
1635 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1636 }
1637 break;
1638 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1639 errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer);
1640 break;
1641 case M32C_OPERAND_X :
1642 break;
1643 case M32C_OPERAND_Z :
1644 break;
1645 case M32C_OPERAND_COND16_16 :
1646 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1647 break;
1648 case M32C_OPERAND_COND16_24 :
1649 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1650 break;
1651 case M32C_OPERAND_COND16_32 :
1652 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1653 break;
1654 case M32C_OPERAND_COND16C :
1655 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1656 break;
1657 case M32C_OPERAND_COND16J :
1658 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1659 break;
1660 case M32C_OPERAND_COND16J5 :
1661 errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer);
1662 break;
1663 case M32C_OPERAND_COND32 :
1664 {
1665 {
1666 FLD (f_9_1) = ((((UINT) (FLD (f_cond32)) >> (3))) & (1));
1667 FLD (f_13_3) = ((FLD (f_cond32)) & (7));
1668 }
1669 errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer);
1670 if (errmsg)
1671 break;
1672 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1673 if (errmsg)
1674 break;
1675 }
1676 break;
1677 case M32C_OPERAND_COND32_16 :
1678 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1679 break;
1680 case M32C_OPERAND_COND32_24 :
1681 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1682 break;
1683 case M32C_OPERAND_COND32_32 :
1684 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1685 break;
1686 case M32C_OPERAND_COND32_40 :
1687 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1688 break;
1689 case M32C_OPERAND_COND32J :
1690 {
1691 {
1692 FLD (f_1_3) = ((((UINT) (FLD (f_cond32j)) >> (1))) & (7));
1693 FLD (f_7_1) = ((FLD (f_cond32j)) & (1));
1694 }
1695 errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer);
1696 if (errmsg)
1697 break;
1698 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1699 if (errmsg)
1700 break;
1701 }
1702 break;
1703 case M32C_OPERAND_CR1_PREFIXED_32 :
1704 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1705 break;
1706 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1707 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1708 break;
1709 case M32C_OPERAND_CR16 :
1710 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1711 break;
1712 case M32C_OPERAND_CR2_32 :
1713 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1714 break;
1715 case M32C_OPERAND_CR3_PREFIXED_32 :
1716 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1717 break;
1718 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1719 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1720 break;
1721 case M32C_OPERAND_FLAGS16 :
1722 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1723 break;
1724 case M32C_OPERAND_FLAGS32 :
1725 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1726 break;
1727 case M32C_OPERAND_SCCOND32 :
1728 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1729 break;
1730 case M32C_OPERAND_SIZE :
1731 break;
1732
1733 default :
1734 /* xgettext:c-format */
1735 opcodes_error_handler
1736 (_("internal error: unrecognized field %d while building insn"),
1737 opindex);
1738 abort ();
1739 }
1740
1741 return errmsg;
1742 }
1743
1744 int m32c_cgen_extract_operand
1745 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
1746
1747 /* Main entry point for operand extraction.
1748 The result is <= 0 for error, >0 for success.
1749 ??? Actual values aren't well defined right now.
1750
1751 This function is basically just a big switch statement. Earlier versions
1752 used tables to look up the function to use, but
1753 - if the table contains both assembler and disassembler functions then
1754 the disassembler contains much of the assembler and vice-versa,
1755 - there's a lot of inlining possibilities as things grow,
1756 - using a switch statement avoids the function call overhead.
1757
1758 This function could be moved into `print_insn_normal', but keeping it
1759 separate makes clear the interface between `print_insn_normal' and each of
1760 the handlers. */
1761
1762 int
1763 m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
1764 int opindex,
1765 CGEN_EXTRACT_INFO *ex_info,
1766 CGEN_INSN_INT insn_value,
1767 CGEN_FIELDS * fields,
1768 bfd_vma pc)
1769 {
1770 /* Assume success (for those operands that are nops). */
1771 int length = 1;
1772 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
1773
1774 switch (opindex)
1775 {
1776 case M32C_OPERAND_A0 :
1777 break;
1778 case M32C_OPERAND_A1 :
1779 break;
1780 case M32C_OPERAND_AN16_PUSH_S :
1781 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
1782 break;
1783 case M32C_OPERAND_BIT16AN :
1784 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
1785 break;
1786 case M32C_OPERAND_BIT16RN :
1787 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
1788 break;
1789 case M32C_OPERAND_BIT3_S :
1790 {
1791 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
1792 if (length <= 0) break;
1793 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
1794 if (length <= 0) break;
1795 {
1796 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
1797 }
1798 }
1799 break;
1800 case M32C_OPERAND_BIT32ANPREFIXED :
1801 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
1802 break;
1803 case M32C_OPERAND_BIT32ANUNPREFIXED :
1804 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
1805 break;
1806 case M32C_OPERAND_BIT32RNPREFIXED :
1807 {
1808 long value;
1809 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
1810 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1811 fields->f_dst32_rn_prefixed_QI = value;
1812 }
1813 break;
1814 case M32C_OPERAND_BIT32RNUNPREFIXED :
1815 {
1816 long value;
1817 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
1818 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1819 fields->f_dst32_rn_unprefixed_QI = value;
1820 }
1821 break;
1822 case M32C_OPERAND_BITBASE16_16_S8 :
1823 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1824 break;
1825 case M32C_OPERAND_BITBASE16_16_U16 :
1826 {
1827 long value;
1828 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1829 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1830 fields->f_dsp_16_u16 = value;
1831 }
1832 break;
1833 case M32C_OPERAND_BITBASE16_16_U8 :
1834 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1835 break;
1836 case M32C_OPERAND_BITBASE16_8_U11_S :
1837 {
1838 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S);
1839 if (length <= 0) break;
1840 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
1841 if (length <= 0) break;
1842 {
1843 FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S)));
1844 }
1845 }
1846 break;
1847 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1848 {
1849 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1850 if (length <= 0) break;
1851 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1852 if (length <= 0) break;
1853 {
1854 FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1855 }
1856 }
1857 break;
1858 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1859 {
1860 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1861 if (length <= 0) break;
1862 {
1863 long value;
1864 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1865 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1866 fields->f_dsp_16_s16 = value;
1867 }
1868 if (length <= 0) break;
1869 {
1870 FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1871 }
1872 }
1873 break;
1874 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1875 {
1876 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1877 if (length <= 0) break;
1878 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1879 if (length <= 0) break;
1880 {
1881 FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1882 }
1883 }
1884 break;
1885 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1886 {
1887 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1888 if (length <= 0) break;
1889 {
1890 long value;
1891 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1892 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1893 fields->f_dsp_16_u16 = value;
1894 }
1895 if (length <= 0) break;
1896 {
1897 FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1898 }
1899 }
1900 break;
1901 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1902 {
1903 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1904 if (length <= 0) break;
1905 {
1906 long value;
1907 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1908 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1909 fields->f_dsp_16_u16 = value;
1910 }
1911 if (length <= 0) break;
1912 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1913 if (length <= 0) break;
1914 {
1915 FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed)))));
1916 }
1917 }
1918 break;
1919 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1920 {
1921 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1922 if (length <= 0) break;
1923 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1924 if (length <= 0) break;
1925 {
1926 FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed)));
1927 }
1928 }
1929 break;
1930 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1931 {
1932 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1933 if (length <= 0) break;
1934 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1935 if (length <= 0) break;
1936 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
1937 if (length <= 0) break;
1938 {
1939 FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1940 }
1941 }
1942 break;
1943 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1944 {
1945 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1946 if (length <= 0) break;
1947 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1948 if (length <= 0) break;
1949 {
1950 FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed)));
1951 }
1952 }
1953 break;
1954 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1955 {
1956 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1957 if (length <= 0) break;
1958 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1959 if (length <= 0) break;
1960 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1961 if (length <= 0) break;
1962 {
1963 FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1964 }
1965 }
1966 break;
1967 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1968 {
1969 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1970 if (length <= 0) break;
1971 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1972 if (length <= 0) break;
1973 {
1974 long value;
1975 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
1976 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1977 fields->f_dsp_32_u16 = value;
1978 }
1979 if (length <= 0) break;
1980 {
1981 FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed)))));
1982 }
1983 }
1984 break;
1985 case M32C_OPERAND_BITNO16R :
1986 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1987 break;
1988 case M32C_OPERAND_BITNO32PREFIXED :
1989 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1990 break;
1991 case M32C_OPERAND_BITNO32UNPREFIXED :
1992 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1993 break;
1994 case M32C_OPERAND_DSP_10_U6 :
1995 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6);
1996 break;
1997 case M32C_OPERAND_DSP_16_S16 :
1998 {
1999 long value;
2000 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2001 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2002 fields->f_dsp_16_s16 = value;
2003 }
2004 break;
2005 case M32C_OPERAND_DSP_16_S8 :
2006 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2007 break;
2008 case M32C_OPERAND_DSP_16_U16 :
2009 {
2010 long value;
2011 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2012 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2013 fields->f_dsp_16_u16 = value;
2014 }
2015 break;
2016 case M32C_OPERAND_DSP_16_U20 :
2017 {
2018 {
2019 long value;
2020 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2021 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2022 fields->f_dsp_16_u16 = value;
2023 }
2024 if (length <= 0) break;
2025 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2026 if (length <= 0) break;
2027 {
2028 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2029 }
2030 }
2031 break;
2032 case M32C_OPERAND_DSP_16_U24 :
2033 {
2034 {
2035 long value;
2036 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2037 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2038 fields->f_dsp_16_u16 = value;
2039 }
2040 if (length <= 0) break;
2041 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2042 if (length <= 0) break;
2043 {
2044 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2045 }
2046 }
2047 break;
2048 case M32C_OPERAND_DSP_16_U8 :
2049 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2050 break;
2051 case M32C_OPERAND_DSP_24_S16 :
2052 {
2053 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2054 if (length <= 0) break;
2055 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2056 if (length <= 0) break;
2057 {
2058 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2059 }
2060 }
2061 break;
2062 case M32C_OPERAND_DSP_24_S8 :
2063 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2064 break;
2065 case M32C_OPERAND_DSP_24_U16 :
2066 {
2067 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2068 if (length <= 0) break;
2069 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2070 if (length <= 0) break;
2071 {
2072 FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)));
2073 }
2074 }
2075 break;
2076 case M32C_OPERAND_DSP_24_U20 :
2077 {
2078 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2079 if (length <= 0) break;
2080 {
2081 long value;
2082 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2083 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2084 fields->f_dsp_32_u16 = value;
2085 }
2086 if (length <= 0) break;
2087 {
2088 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2089 }
2090 }
2091 break;
2092 case M32C_OPERAND_DSP_24_U24 :
2093 {
2094 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2095 if (length <= 0) break;
2096 {
2097 long value;
2098 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2099 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2100 fields->f_dsp_32_u16 = value;
2101 }
2102 if (length <= 0) break;
2103 {
2104 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2105 }
2106 }
2107 break;
2108 case M32C_OPERAND_DSP_24_U8 :
2109 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2110 break;
2111 case M32C_OPERAND_DSP_32_S16 :
2112 {
2113 long value;
2114 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2115 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2116 fields->f_dsp_32_s16 = value;
2117 }
2118 break;
2119 case M32C_OPERAND_DSP_32_S8 :
2120 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2121 break;
2122 case M32C_OPERAND_DSP_32_U16 :
2123 {
2124 long value;
2125 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2126 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2127 fields->f_dsp_32_u16 = value;
2128 }
2129 break;
2130 case M32C_OPERAND_DSP_32_U20 :
2131 {
2132 long value;
2133 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2134 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2135 fields->f_dsp_32_u24 = value;
2136 }
2137 break;
2138 case M32C_OPERAND_DSP_32_U24 :
2139 {
2140 long value;
2141 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2142 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2143 fields->f_dsp_32_u24 = value;
2144 }
2145 break;
2146 case M32C_OPERAND_DSP_32_U8 :
2147 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2148 break;
2149 case M32C_OPERAND_DSP_40_S16 :
2150 {
2151 long value;
2152 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2153 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2154 fields->f_dsp_40_s16 = value;
2155 }
2156 break;
2157 case M32C_OPERAND_DSP_40_S8 :
2158 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2159 break;
2160 case M32C_OPERAND_DSP_40_U16 :
2161 {
2162 long value;
2163 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
2164 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2165 fields->f_dsp_40_u16 = value;
2166 }
2167 break;
2168 case M32C_OPERAND_DSP_40_U20 :
2169 {
2170 long value;
2171 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value);
2172 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
2173 fields->f_dsp_40_u20 = value;
2174 }
2175 break;
2176 case M32C_OPERAND_DSP_40_U24 :
2177 {
2178 long value;
2179 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2180 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2181 fields->f_dsp_40_u24 = value;
2182 }
2183 break;
2184 case M32C_OPERAND_DSP_40_U8 :
2185 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2186 break;
2187 case M32C_OPERAND_DSP_48_S16 :
2188 {
2189 long value;
2190 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2191 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2192 fields->f_dsp_48_s16 = value;
2193 }
2194 break;
2195 case M32C_OPERAND_DSP_48_S8 :
2196 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2197 break;
2198 case M32C_OPERAND_DSP_48_U16 :
2199 {
2200 long value;
2201 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2202 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2203 fields->f_dsp_48_u16 = value;
2204 }
2205 break;
2206 case M32C_OPERAND_DSP_48_U20 :
2207 {
2208 {
2209 long value;
2210 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2211 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2212 fields->f_dsp_48_u16 = value;
2213 }
2214 if (length <= 0) break;
2215 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2216 if (length <= 0) break;
2217 {
2218 FLD (f_dsp_48_u20) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (983040))));
2219 }
2220 }
2221 break;
2222 case M32C_OPERAND_DSP_48_U24 :
2223 {
2224 {
2225 long value;
2226 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2227 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2228 fields->f_dsp_48_u16 = value;
2229 }
2230 if (length <= 0) break;
2231 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2232 if (length <= 0) break;
2233 {
2234 FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680))));
2235 }
2236 }
2237 break;
2238 case M32C_OPERAND_DSP_48_U8 :
2239 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8);
2240 break;
2241 case M32C_OPERAND_DSP_8_S24 :
2242 {
2243 long value;
2244 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
2245 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
2246 fields->f_dsp_8_s24 = value;
2247 }
2248 break;
2249 case M32C_OPERAND_DSP_8_S8 :
2250 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2251 break;
2252 case M32C_OPERAND_DSP_8_U16 :
2253 {
2254 long value;
2255 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
2256 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2257 fields->f_dsp_8_u16 = value;
2258 }
2259 break;
2260 case M32C_OPERAND_DSP_8_U24 :
2261 {
2262 long value;
2263 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
2264 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2265 fields->f_dsp_8_u24 = value;
2266 }
2267 break;
2268 case M32C_OPERAND_DSP_8_U6 :
2269 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6);
2270 break;
2271 case M32C_OPERAND_DSP_8_U8 :
2272 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
2273 break;
2274 case M32C_OPERAND_DST16AN :
2275 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2276 break;
2277 case M32C_OPERAND_DST16AN_S :
2278 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s);
2279 break;
2280 case M32C_OPERAND_DST16ANHI :
2281 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2282 break;
2283 case M32C_OPERAND_DST16ANQI :
2284 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2285 break;
2286 case M32C_OPERAND_DST16ANQI_S :
2287 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2288 break;
2289 case M32C_OPERAND_DST16ANSI :
2290 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2291 break;
2292 case M32C_OPERAND_DST16RNEXTQI :
2293 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext);
2294 break;
2295 case M32C_OPERAND_DST16RNHI :
2296 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2297 break;
2298 case M32C_OPERAND_DST16RNQI :
2299 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2300 break;
2301 case M32C_OPERAND_DST16RNQI_S :
2302 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2303 break;
2304 case M32C_OPERAND_DST16RNSI :
2305 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2306 break;
2307 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
2308 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2309 break;
2310 case M32C_OPERAND_DST32ANPREFIXED :
2311 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2312 break;
2313 case M32C_OPERAND_DST32ANPREFIXEDHI :
2314 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2315 break;
2316 case M32C_OPERAND_DST32ANPREFIXEDQI :
2317 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2318 break;
2319 case M32C_OPERAND_DST32ANPREFIXEDSI :
2320 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2321 break;
2322 case M32C_OPERAND_DST32ANUNPREFIXED :
2323 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2324 break;
2325 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
2326 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2327 break;
2328 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
2329 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2330 break;
2331 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
2332 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2333 break;
2334 case M32C_OPERAND_DST32R0HI_S :
2335 break;
2336 case M32C_OPERAND_DST32R0QI_S :
2337 break;
2338 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
2339 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2340 break;
2341 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
2342 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2343 break;
2344 case M32C_OPERAND_DST32RNPREFIXEDHI :
2345 {
2346 long value;
2347 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2348 value = ((((value) + (2))) % (4));
2349 fields->f_dst32_rn_prefixed_HI = value;
2350 }
2351 break;
2352 case M32C_OPERAND_DST32RNPREFIXEDQI :
2353 {
2354 long value;
2355 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2356 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2357 fields->f_dst32_rn_prefixed_QI = value;
2358 }
2359 break;
2360 case M32C_OPERAND_DST32RNPREFIXEDSI :
2361 {
2362 long value;
2363 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2364 value = ((value) - (2));
2365 fields->f_dst32_rn_prefixed_SI = value;
2366 }
2367 break;
2368 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
2369 {
2370 long value;
2371 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2372 value = ((((value) + (2))) % (4));
2373 fields->f_dst32_rn_unprefixed_HI = value;
2374 }
2375 break;
2376 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
2377 {
2378 long value;
2379 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2380 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2381 fields->f_dst32_rn_unprefixed_QI = value;
2382 }
2383 break;
2384 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
2385 {
2386 long value;
2387 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2388 value = ((value) - (2));
2389 fields->f_dst32_rn_unprefixed_SI = value;
2390 }
2391 break;
2392 case M32C_OPERAND_G :
2393 break;
2394 case M32C_OPERAND_IMM_12_S4 :
2395 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2396 break;
2397 case M32C_OPERAND_IMM_12_S4N :
2398 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2399 break;
2400 case M32C_OPERAND_IMM_13_U3 :
2401 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3);
2402 break;
2403 case M32C_OPERAND_IMM_16_HI :
2404 {
2405 long value;
2406 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2407 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2408 fields->f_dsp_16_s16 = value;
2409 }
2410 break;
2411 case M32C_OPERAND_IMM_16_QI :
2412 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2413 break;
2414 case M32C_OPERAND_IMM_16_SI :
2415 {
2416 {
2417 long value;
2418 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2419 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2420 fields->f_dsp_16_u16 = value;
2421 }
2422 if (length <= 0) break;
2423 {
2424 long value;
2425 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2426 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2427 fields->f_dsp_32_u16 = value;
2428 }
2429 if (length <= 0) break;
2430 {
2431 FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000))));
2432 }
2433 }
2434 break;
2435 case M32C_OPERAND_IMM_20_S4 :
2436 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2437 break;
2438 case M32C_OPERAND_IMM_24_HI :
2439 {
2440 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2441 if (length <= 0) break;
2442 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2443 if (length <= 0) break;
2444 {
2445 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2446 }
2447 }
2448 break;
2449 case M32C_OPERAND_IMM_24_QI :
2450 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2451 break;
2452 case M32C_OPERAND_IMM_24_SI :
2453 {
2454 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2455 if (length <= 0) break;
2456 {
2457 long value;
2458 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2459 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2460 fields->f_dsp_32_u24 = value;
2461 }
2462 if (length <= 0) break;
2463 {
2464 FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00))));
2465 }
2466 }
2467 break;
2468 case M32C_OPERAND_IMM_32_HI :
2469 {
2470 long value;
2471 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2472 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2473 fields->f_dsp_32_s16 = value;
2474 }
2475 break;
2476 case M32C_OPERAND_IMM_32_QI :
2477 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2478 break;
2479 case M32C_OPERAND_IMM_32_SI :
2480 {
2481 long value;
2482 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value);
2483 value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
2484 fields->f_dsp_32_s32 = value;
2485 }
2486 break;
2487 case M32C_OPERAND_IMM_40_HI :
2488 {
2489 long value;
2490 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2491 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2492 fields->f_dsp_40_s16 = value;
2493 }
2494 break;
2495 case M32C_OPERAND_IMM_40_QI :
2496 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2497 break;
2498 case M32C_OPERAND_IMM_40_SI :
2499 {
2500 {
2501 long value;
2502 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2503 value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2504 fields->f_dsp_40_u24 = value;
2505 }
2506 if (length <= 0) break;
2507 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2508 if (length <= 0) break;
2509 {
2510 FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000))));
2511 }
2512 }
2513 break;
2514 case M32C_OPERAND_IMM_48_HI :
2515 {
2516 long value;
2517 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2518 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2519 fields->f_dsp_48_s16 = value;
2520 }
2521 break;
2522 case M32C_OPERAND_IMM_48_QI :
2523 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2524 break;
2525 case M32C_OPERAND_IMM_48_SI :
2526 {
2527 {
2528 long value;
2529 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2530 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2531 fields->f_dsp_48_u16 = value;
2532 }
2533 if (length <= 0) break;
2534 {
2535 long value;
2536 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
2537 value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2538 fields->f_dsp_64_u16 = value;
2539 }
2540 if (length <= 0) break;
2541 {
2542 FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000))));
2543 }
2544 }
2545 break;
2546 case M32C_OPERAND_IMM_56_HI :
2547 {
2548 length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8);
2549 if (length <= 0) break;
2550 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2551 if (length <= 0) break;
2552 {
2553 FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8))))));
2554 }
2555 }
2556 break;
2557 case M32C_OPERAND_IMM_56_QI :
2558 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8);
2559 break;
2560 case M32C_OPERAND_IMM_64_HI :
2561 {
2562 long value;
2563 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
2564 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2565 fields->f_dsp_64_s16 = value;
2566 }
2567 break;
2568 case M32C_OPERAND_IMM_8_HI :
2569 {
2570 long value;
2571 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
2572 value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2573 fields->f_dsp_8_s16 = value;
2574 }
2575 break;
2576 case M32C_OPERAND_IMM_8_QI :
2577 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2578 break;
2579 case M32C_OPERAND_IMM_8_S4 :
2580 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2581 break;
2582 case M32C_OPERAND_IMM_8_S4N :
2583 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2584 break;
2585 case M32C_OPERAND_IMM_SH_12_S4 :
2586 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2587 break;
2588 case M32C_OPERAND_IMM_SH_20_S4 :
2589 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2590 break;
2591 case M32C_OPERAND_IMM_SH_8_S4 :
2592 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2593 break;
2594 case M32C_OPERAND_IMM1_S :
2595 {
2596 long value;
2597 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
2598 value = ((value) + (1));
2599 fields->f_imm1_S = value;
2600 }
2601 break;
2602 case M32C_OPERAND_IMM3_S :
2603 {
2604 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2605 if (length <= 0) break;
2606 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2607 if (length <= 0) break;
2608 {
2609 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
2610 }
2611 }
2612 break;
2613 case M32C_OPERAND_LAB_16_8 :
2614 {
2615 long value;
2616 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
2617 value = ((value) + (((pc) + (2))));
2618 fields->f_lab_16_8 = value;
2619 }
2620 break;
2621 case M32C_OPERAND_LAB_24_8 :
2622 {
2623 long value;
2624 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
2625 value = ((value) + (((pc) + (2))));
2626 fields->f_lab_24_8 = value;
2627 }
2628 break;
2629 case M32C_OPERAND_LAB_32_8 :
2630 {
2631 long value;
2632 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
2633 value = ((value) + (((pc) + (2))));
2634 fields->f_lab_32_8 = value;
2635 }
2636 break;
2637 case M32C_OPERAND_LAB_40_8 :
2638 {
2639 long value;
2640 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
2641 value = ((value) + (((pc) + (2))));
2642 fields->f_lab_40_8 = value;
2643 }
2644 break;
2645 case M32C_OPERAND_LAB_5_3 :
2646 {
2647 long value;
2648 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
2649 value = ((value) + (((pc) + (2))));
2650 fields->f_lab_5_3 = value;
2651 }
2652 break;
2653 case M32C_OPERAND_LAB_8_16 :
2654 {
2655 long value;
2656 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
2657 value = ((((((USI) (((value) & (65535))) >> (8))) | (((SI) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1))));
2658 fields->f_lab_8_16 = value;
2659 }
2660 break;
2661 case M32C_OPERAND_LAB_8_24 :
2662 {
2663 long value;
2664 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
2665 value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2666 fields->f_lab_8_24 = value;
2667 }
2668 break;
2669 case M32C_OPERAND_LAB_8_8 :
2670 {
2671 long value;
2672 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
2673 value = ((value) + (((pc) + (1))));
2674 fields->f_lab_8_8 = value;
2675 }
2676 break;
2677 case M32C_OPERAND_LAB32_JMP_S :
2678 {
2679 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2680 if (length <= 0) break;
2681 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2682 if (length <= 0) break;
2683 {
2684 FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2))));
2685 }
2686 }
2687 break;
2688 case M32C_OPERAND_Q :
2689 break;
2690 case M32C_OPERAND_R0 :
2691 break;
2692 case M32C_OPERAND_R0H :
2693 break;
2694 case M32C_OPERAND_R0L :
2695 break;
2696 case M32C_OPERAND_R1 :
2697 break;
2698 case M32C_OPERAND_R1R2R0 :
2699 break;
2700 case M32C_OPERAND_R2 :
2701 break;
2702 case M32C_OPERAND_R2R0 :
2703 break;
2704 case M32C_OPERAND_R3 :
2705 break;
2706 case M32C_OPERAND_R3R1 :
2707 break;
2708 case M32C_OPERAND_REGSETPOP :
2709 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2710 break;
2711 case M32C_OPERAND_REGSETPUSH :
2712 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2713 break;
2714 case M32C_OPERAND_RN16_PUSH_S :
2715 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
2716 break;
2717 case M32C_OPERAND_S :
2718 break;
2719 case M32C_OPERAND_SRC16AN :
2720 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2721 break;
2722 case M32C_OPERAND_SRC16ANHI :
2723 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2724 break;
2725 case M32C_OPERAND_SRC16ANQI :
2726 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2727 break;
2728 case M32C_OPERAND_SRC16RNHI :
2729 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2730 break;
2731 case M32C_OPERAND_SRC16RNQI :
2732 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2733 break;
2734 case M32C_OPERAND_SRC32ANPREFIXED :
2735 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2736 break;
2737 case M32C_OPERAND_SRC32ANPREFIXEDHI :
2738 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2739 break;
2740 case M32C_OPERAND_SRC32ANPREFIXEDQI :
2741 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2742 break;
2743 case M32C_OPERAND_SRC32ANPREFIXEDSI :
2744 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2745 break;
2746 case M32C_OPERAND_SRC32ANUNPREFIXED :
2747 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2748 break;
2749 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
2750 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2751 break;
2752 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
2753 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2754 break;
2755 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
2756 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2757 break;
2758 case M32C_OPERAND_SRC32RNPREFIXEDHI :
2759 {
2760 long value;
2761 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2762 value = ((((value) + (2))) % (4));
2763 fields->f_src32_rn_prefixed_HI = value;
2764 }
2765 break;
2766 case M32C_OPERAND_SRC32RNPREFIXEDQI :
2767 {
2768 long value;
2769 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2770 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2771 fields->f_src32_rn_prefixed_QI = value;
2772 }
2773 break;
2774 case M32C_OPERAND_SRC32RNPREFIXEDSI :
2775 {
2776 long value;
2777 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2778 value = ((value) - (2));
2779 fields->f_src32_rn_prefixed_SI = value;
2780 }
2781 break;
2782 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
2783 {
2784 long value;
2785 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2786 value = ((((value) + (2))) % (4));
2787 fields->f_src32_rn_unprefixed_HI = value;
2788 }
2789 break;
2790 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
2791 {
2792 long value;
2793 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2794 value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2795 fields->f_src32_rn_unprefixed_QI = value;
2796 }
2797 break;
2798 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
2799 {
2800 long value;
2801 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2802 value = ((value) - (2));
2803 fields->f_src32_rn_unprefixed_SI = value;
2804 }
2805 break;
2806 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
2807 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1);
2808 break;
2809 case M32C_OPERAND_X :
2810 break;
2811 case M32C_OPERAND_Z :
2812 break;
2813 case M32C_OPERAND_COND16_16 :
2814 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2815 break;
2816 case M32C_OPERAND_COND16_24 :
2817 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2818 break;
2819 case M32C_OPERAND_COND16_32 :
2820 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2821 break;
2822 case M32C_OPERAND_COND16C :
2823 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2824 break;
2825 case M32C_OPERAND_COND16J :
2826 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2827 break;
2828 case M32C_OPERAND_COND16J5 :
2829 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5);
2830 break;
2831 case M32C_OPERAND_COND32 :
2832 {
2833 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1);
2834 if (length <= 0) break;
2835 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2836 if (length <= 0) break;
2837 {
2838 FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3)));
2839 }
2840 }
2841 break;
2842 case M32C_OPERAND_COND32_16 :
2843 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2844 break;
2845 case M32C_OPERAND_COND32_24 :
2846 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2847 break;
2848 case M32C_OPERAND_COND32_32 :
2849 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2850 break;
2851 case M32C_OPERAND_COND32_40 :
2852 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2853 break;
2854 case M32C_OPERAND_COND32J :
2855 {
2856 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3);
2857 if (length <= 0) break;
2858 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2859 if (length <= 0) break;
2860 {
2861 FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1)));
2862 }
2863 }
2864 break;
2865 case M32C_OPERAND_CR1_PREFIXED_32 :
2866 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2867 break;
2868 case M32C_OPERAND_CR1_UNPREFIXED_32 :
2869 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2870 break;
2871 case M32C_OPERAND_CR16 :
2872 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2873 break;
2874 case M32C_OPERAND_CR2_32 :
2875 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2876 break;
2877 case M32C_OPERAND_CR3_PREFIXED_32 :
2878 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2879 break;
2880 case M32C_OPERAND_CR3_UNPREFIXED_32 :
2881 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2882 break;
2883 case M32C_OPERAND_FLAGS16 :
2884 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2885 break;
2886 case M32C_OPERAND_FLAGS32 :
2887 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2888 break;
2889 case M32C_OPERAND_SCCOND32 :
2890 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2891 break;
2892 case M32C_OPERAND_SIZE :
2893 break;
2894
2895 default :
2896 /* xgettext:c-format */
2897 opcodes_error_handler
2898 (_("internal error: unrecognized field %d while decoding insn"),
2899 opindex);
2900 abort ();
2901 }
2902
2903 return length;
2904 }
2905
2906 cgen_insert_fn * const m32c_cgen_insert_handlers[] =
2907 {
2908 insert_insn_normal,
2909 };
2910
2911 cgen_extract_fn * const m32c_cgen_extract_handlers[] =
2912 {
2913 extract_insn_normal,
2914 };
2915
2916 int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2917 bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2918
2919 /* Getting values from cgen_fields is handled by a collection of functions.
2920 They are distinguished by the type of the VALUE argument they return.
2921 TODO: floating point, inlining support, remove cases where result type
2922 not appropriate. */
2923
2924 int
2925 m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
2926 int opindex,
2927 const CGEN_FIELDS * fields)
2928 {
2929 int value;
2930
2931 switch (opindex)
2932 {
2933 case M32C_OPERAND_A0 :
2934 value = 0;
2935 break;
2936 case M32C_OPERAND_A1 :
2937 value = 0;
2938 break;
2939 case M32C_OPERAND_AN16_PUSH_S :
2940 value = fields->f_4_1;
2941 break;
2942 case M32C_OPERAND_BIT16AN :
2943 value = fields->f_dst16_an;
2944 break;
2945 case M32C_OPERAND_BIT16RN :
2946 value = fields->f_dst16_rn;
2947 break;
2948 case M32C_OPERAND_BIT3_S :
2949 value = fields->f_imm3_S;
2950 break;
2951 case M32C_OPERAND_BIT32ANPREFIXED :
2952 value = fields->f_dst32_an_prefixed;
2953 break;
2954 case M32C_OPERAND_BIT32ANUNPREFIXED :
2955 value = fields->f_dst32_an_unprefixed;
2956 break;
2957 case M32C_OPERAND_BIT32RNPREFIXED :
2958 value = fields->f_dst32_rn_prefixed_QI;
2959 break;
2960 case M32C_OPERAND_BIT32RNUNPREFIXED :
2961 value = fields->f_dst32_rn_unprefixed_QI;
2962 break;
2963 case M32C_OPERAND_BITBASE16_16_S8 :
2964 value = fields->f_dsp_16_s8;
2965 break;
2966 case M32C_OPERAND_BITBASE16_16_U16 :
2967 value = fields->f_dsp_16_u16;
2968 break;
2969 case M32C_OPERAND_BITBASE16_16_U8 :
2970 value = fields->f_dsp_16_u8;
2971 break;
2972 case M32C_OPERAND_BITBASE16_8_U11_S :
2973 value = fields->f_bitbase16_u11_S;
2974 break;
2975 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
2976 value = fields->f_bitbase32_16_s11_unprefixed;
2977 break;
2978 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
2979 value = fields->f_bitbase32_16_s19_unprefixed;
2980 break;
2981 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
2982 value = fields->f_bitbase32_16_u11_unprefixed;
2983 break;
2984 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
2985 value = fields->f_bitbase32_16_u19_unprefixed;
2986 break;
2987 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
2988 value = fields->f_bitbase32_16_u27_unprefixed;
2989 break;
2990 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
2991 value = fields->f_bitbase32_24_s11_prefixed;
2992 break;
2993 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
2994 value = fields->f_bitbase32_24_s19_prefixed;
2995 break;
2996 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
2997 value = fields->f_bitbase32_24_u11_prefixed;
2998 break;
2999 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3000 value = fields->f_bitbase32_24_u19_prefixed;
3001 break;
3002 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3003 value = fields->f_bitbase32_24_u27_prefixed;
3004 break;
3005 case M32C_OPERAND_BITNO16R :
3006 value = fields->f_dsp_16_u8;
3007 break;
3008 case M32C_OPERAND_BITNO32PREFIXED :
3009 value = fields->f_bitno32_prefixed;
3010 break;
3011 case M32C_OPERAND_BITNO32UNPREFIXED :
3012 value = fields->f_bitno32_unprefixed;
3013 break;
3014 case M32C_OPERAND_DSP_10_U6 :
3015 value = fields->f_dsp_10_u6;
3016 break;
3017 case M32C_OPERAND_DSP_16_S16 :
3018 value = fields->f_dsp_16_s16;
3019 break;
3020 case M32C_OPERAND_DSP_16_S8 :
3021 value = fields->f_dsp_16_s8;
3022 break;
3023 case M32C_OPERAND_DSP_16_U16 :
3024 value = fields->f_dsp_16_u16;
3025 break;
3026 case M32C_OPERAND_DSP_16_U20 :
3027 value = fields->f_dsp_16_u24;
3028 break;
3029 case M32C_OPERAND_DSP_16_U24 :
3030 value = fields->f_dsp_16_u24;
3031 break;
3032 case M32C_OPERAND_DSP_16_U8 :
3033 value = fields->f_dsp_16_u8;
3034 break;
3035 case M32C_OPERAND_DSP_24_S16 :
3036 value = fields->f_dsp_24_s16;
3037 break;
3038 case M32C_OPERAND_DSP_24_S8 :
3039 value = fields->f_dsp_24_s8;
3040 break;
3041 case M32C_OPERAND_DSP_24_U16 :
3042 value = fields->f_dsp_24_u16;
3043 break;
3044 case M32C_OPERAND_DSP_24_U20 :
3045 value = fields->f_dsp_24_u24;
3046 break;
3047 case M32C_OPERAND_DSP_24_U24 :
3048 value = fields->f_dsp_24_u24;
3049 break;
3050 case M32C_OPERAND_DSP_24_U8 :
3051 value = fields->f_dsp_24_u8;
3052 break;
3053 case M32C_OPERAND_DSP_32_S16 :
3054 value = fields->f_dsp_32_s16;
3055 break;
3056 case M32C_OPERAND_DSP_32_S8 :
3057 value = fields->f_dsp_32_s8;
3058 break;
3059 case M32C_OPERAND_DSP_32_U16 :
3060 value = fields->f_dsp_32_u16;
3061 break;
3062 case M32C_OPERAND_DSP_32_U20 :
3063 value = fields->f_dsp_32_u24;
3064 break;
3065 case M32C_OPERAND_DSP_32_U24 :
3066 value = fields->f_dsp_32_u24;
3067 break;
3068 case M32C_OPERAND_DSP_32_U8 :
3069 value = fields->f_dsp_32_u8;
3070 break;
3071 case M32C_OPERAND_DSP_40_S16 :
3072 value = fields->f_dsp_40_s16;
3073 break;
3074 case M32C_OPERAND_DSP_40_S8 :
3075 value = fields->f_dsp_40_s8;
3076 break;
3077 case M32C_OPERAND_DSP_40_U16 :
3078 value = fields->f_dsp_40_u16;
3079 break;
3080 case M32C_OPERAND_DSP_40_U20 :
3081 value = fields->f_dsp_40_u20;
3082 break;
3083 case M32C_OPERAND_DSP_40_U24 :
3084 value = fields->f_dsp_40_u24;
3085 break;
3086 case M32C_OPERAND_DSP_40_U8 :
3087 value = fields->f_dsp_40_u8;
3088 break;
3089 case M32C_OPERAND_DSP_48_S16 :
3090 value = fields->f_dsp_48_s16;
3091 break;
3092 case M32C_OPERAND_DSP_48_S8 :
3093 value = fields->f_dsp_48_s8;
3094 break;
3095 case M32C_OPERAND_DSP_48_U16 :
3096 value = fields->f_dsp_48_u16;
3097 break;
3098 case M32C_OPERAND_DSP_48_U20 :
3099 value = fields->f_dsp_48_u20;
3100 break;
3101 case M32C_OPERAND_DSP_48_U24 :
3102 value = fields->f_dsp_48_u24;
3103 break;
3104 case M32C_OPERAND_DSP_48_U8 :
3105 value = fields->f_dsp_48_u8;
3106 break;
3107 case M32C_OPERAND_DSP_8_S24 :
3108 value = fields->f_dsp_8_s24;
3109 break;
3110 case M32C_OPERAND_DSP_8_S8 :
3111 value = fields->f_dsp_8_s8;
3112 break;
3113 case M32C_OPERAND_DSP_8_U16 :
3114 value = fields->f_dsp_8_u16;
3115 break;
3116 case M32C_OPERAND_DSP_8_U24 :
3117 value = fields->f_dsp_8_u24;
3118 break;
3119 case M32C_OPERAND_DSP_8_U6 :
3120 value = fields->f_dsp_8_u6;
3121 break;
3122 case M32C_OPERAND_DSP_8_U8 :
3123 value = fields->f_dsp_8_u8;
3124 break;
3125 case M32C_OPERAND_DST16AN :
3126 value = fields->f_dst16_an;
3127 break;
3128 case M32C_OPERAND_DST16AN_S :
3129 value = fields->f_dst16_an_s;
3130 break;
3131 case M32C_OPERAND_DST16ANHI :
3132 value = fields->f_dst16_an;
3133 break;
3134 case M32C_OPERAND_DST16ANQI :
3135 value = fields->f_dst16_an;
3136 break;
3137 case M32C_OPERAND_DST16ANQI_S :
3138 value = fields->f_dst16_rn_QI_s;
3139 break;
3140 case M32C_OPERAND_DST16ANSI :
3141 value = fields->f_dst16_an;
3142 break;
3143 case M32C_OPERAND_DST16RNEXTQI :
3144 value = fields->f_dst16_rn_ext;
3145 break;
3146 case M32C_OPERAND_DST16RNHI :
3147 value = fields->f_dst16_rn;
3148 break;
3149 case M32C_OPERAND_DST16RNQI :
3150 value = fields->f_dst16_rn;
3151 break;
3152 case M32C_OPERAND_DST16RNQI_S :
3153 value = fields->f_dst16_rn_QI_s;
3154 break;
3155 case M32C_OPERAND_DST16RNSI :
3156 value = fields->f_dst16_rn;
3157 break;
3158 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3159 value = fields->f_dst32_an_unprefixed;
3160 break;
3161 case M32C_OPERAND_DST32ANPREFIXED :
3162 value = fields->f_dst32_an_prefixed;
3163 break;
3164 case M32C_OPERAND_DST32ANPREFIXEDHI :
3165 value = fields->f_dst32_an_prefixed;
3166 break;
3167 case M32C_OPERAND_DST32ANPREFIXEDQI :
3168 value = fields->f_dst32_an_prefixed;
3169 break;
3170 case M32C_OPERAND_DST32ANPREFIXEDSI :
3171 value = fields->f_dst32_an_prefixed;
3172 break;
3173 case M32C_OPERAND_DST32ANUNPREFIXED :
3174 value = fields->f_dst32_an_unprefixed;
3175 break;
3176 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3177 value = fields->f_dst32_an_unprefixed;
3178 break;
3179 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3180 value = fields->f_dst32_an_unprefixed;
3181 break;
3182 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3183 value = fields->f_dst32_an_unprefixed;
3184 break;
3185 case M32C_OPERAND_DST32R0HI_S :
3186 value = 0;
3187 break;
3188 case M32C_OPERAND_DST32R0QI_S :
3189 value = 0;
3190 break;
3191 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3192 value = fields->f_dst32_rn_ext_unprefixed;
3193 break;
3194 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3195 value = fields->f_dst32_rn_ext_unprefixed;
3196 break;
3197 case M32C_OPERAND_DST32RNPREFIXEDHI :
3198 value = fields->f_dst32_rn_prefixed_HI;
3199 break;
3200 case M32C_OPERAND_DST32RNPREFIXEDQI :
3201 value = fields->f_dst32_rn_prefixed_QI;
3202 break;
3203 case M32C_OPERAND_DST32RNPREFIXEDSI :
3204 value = fields->f_dst32_rn_prefixed_SI;
3205 break;
3206 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3207 value = fields->f_dst32_rn_unprefixed_HI;
3208 break;
3209 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3210 value = fields->f_dst32_rn_unprefixed_QI;
3211 break;
3212 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3213 value = fields->f_dst32_rn_unprefixed_SI;
3214 break;
3215 case M32C_OPERAND_G :
3216 value = 0;
3217 break;
3218 case M32C_OPERAND_IMM_12_S4 :
3219 value = fields->f_imm_12_s4;
3220 break;
3221 case M32C_OPERAND_IMM_12_S4N :
3222 value = fields->f_imm_12_s4;
3223 break;
3224 case M32C_OPERAND_IMM_13_U3 :
3225 value = fields->f_imm_13_u3;
3226 break;
3227 case M32C_OPERAND_IMM_16_HI :
3228 value = fields->f_dsp_16_s16;
3229 break;
3230 case M32C_OPERAND_IMM_16_QI :
3231 value = fields->f_dsp_16_s8;
3232 break;
3233 case M32C_OPERAND_IMM_16_SI :
3234 value = fields->f_dsp_16_s32;
3235 break;
3236 case M32C_OPERAND_IMM_20_S4 :
3237 value = fields->f_imm_20_s4;
3238 break;
3239 case M32C_OPERAND_IMM_24_HI :
3240 value = fields->f_dsp_24_s16;
3241 break;
3242 case M32C_OPERAND_IMM_24_QI :
3243 value = fields->f_dsp_24_s8;
3244 break;
3245 case M32C_OPERAND_IMM_24_SI :
3246 value = fields->f_dsp_24_s32;
3247 break;
3248 case M32C_OPERAND_IMM_32_HI :
3249 value = fields->f_dsp_32_s16;
3250 break;
3251 case M32C_OPERAND_IMM_32_QI :
3252 value = fields->f_dsp_32_s8;
3253 break;
3254 case M32C_OPERAND_IMM_32_SI :
3255 value = fields->f_dsp_32_s32;
3256 break;
3257 case M32C_OPERAND_IMM_40_HI :
3258 value = fields->f_dsp_40_s16;
3259 break;
3260 case M32C_OPERAND_IMM_40_QI :
3261 value = fields->f_dsp_40_s8;
3262 break;
3263 case M32C_OPERAND_IMM_40_SI :
3264 value = fields->f_dsp_40_s32;
3265 break;
3266 case M32C_OPERAND_IMM_48_HI :
3267 value = fields->f_dsp_48_s16;
3268 break;
3269 case M32C_OPERAND_IMM_48_QI :
3270 value = fields->f_dsp_48_s8;
3271 break;
3272 case M32C_OPERAND_IMM_48_SI :
3273 value = fields->f_dsp_48_s32;
3274 break;
3275 case M32C_OPERAND_IMM_56_HI :
3276 value = fields->f_dsp_56_s16;
3277 break;
3278 case M32C_OPERAND_IMM_56_QI :
3279 value = fields->f_dsp_56_s8;
3280 break;
3281 case M32C_OPERAND_IMM_64_HI :
3282 value = fields->f_dsp_64_s16;
3283 break;
3284 case M32C_OPERAND_IMM_8_HI :
3285 value = fields->f_dsp_8_s16;
3286 break;
3287 case M32C_OPERAND_IMM_8_QI :
3288 value = fields->f_dsp_8_s8;
3289 break;
3290 case M32C_OPERAND_IMM_8_S4 :
3291 value = fields->f_imm_8_s4;
3292 break;
3293 case M32C_OPERAND_IMM_8_S4N :
3294 value = fields->f_imm_8_s4;
3295 break;
3296 case M32C_OPERAND_IMM_SH_12_S4 :
3297 value = fields->f_imm_12_s4;
3298 break;
3299 case M32C_OPERAND_IMM_SH_20_S4 :
3300 value = fields->f_imm_20_s4;
3301 break;
3302 case M32C_OPERAND_IMM_SH_8_S4 :
3303 value = fields->f_imm_8_s4;
3304 break;
3305 case M32C_OPERAND_IMM1_S :
3306 value = fields->f_imm1_S;
3307 break;
3308 case M32C_OPERAND_IMM3_S :
3309 value = fields->f_imm3_S;
3310 break;
3311 case M32C_OPERAND_LAB_16_8 :
3312 value = fields->f_lab_16_8;
3313 break;
3314 case M32C_OPERAND_LAB_24_8 :
3315 value = fields->f_lab_24_8;
3316 break;
3317 case M32C_OPERAND_LAB_32_8 :
3318 value = fields->f_lab_32_8;
3319 break;
3320 case M32C_OPERAND_LAB_40_8 :
3321 value = fields->f_lab_40_8;
3322 break;
3323 case M32C_OPERAND_LAB_5_3 :
3324 value = fields->f_lab_5_3;
3325 break;
3326 case M32C_OPERAND_LAB_8_16 :
3327 value = fields->f_lab_8_16;
3328 break;
3329 case M32C_OPERAND_LAB_8_24 :
3330 value = fields->f_lab_8_24;
3331 break;
3332 case M32C_OPERAND_LAB_8_8 :
3333 value = fields->f_lab_8_8;
3334 break;
3335 case M32C_OPERAND_LAB32_JMP_S :
3336 value = fields->f_lab32_jmp_s;
3337 break;
3338 case M32C_OPERAND_Q :
3339 value = 0;
3340 break;
3341 case M32C_OPERAND_R0 :
3342 value = 0;
3343 break;
3344 case M32C_OPERAND_R0H :
3345 value = 0;
3346 break;
3347 case M32C_OPERAND_R0L :
3348 value = 0;
3349 break;
3350 case M32C_OPERAND_R1 :
3351 value = 0;
3352 break;
3353 case M32C_OPERAND_R1R2R0 :
3354 value = 0;
3355 break;
3356 case M32C_OPERAND_R2 :
3357 value = 0;
3358 break;
3359 case M32C_OPERAND_R2R0 :
3360 value = 0;
3361 break;
3362 case M32C_OPERAND_R3 :
3363 value = 0;
3364 break;
3365 case M32C_OPERAND_R3R1 :
3366 value = 0;
3367 break;
3368 case M32C_OPERAND_REGSETPOP :
3369 value = fields->f_8_8;
3370 break;
3371 case M32C_OPERAND_REGSETPUSH :
3372 value = fields->f_8_8;
3373 break;
3374 case M32C_OPERAND_RN16_PUSH_S :
3375 value = fields->f_4_1;
3376 break;
3377 case M32C_OPERAND_S :
3378 value = 0;
3379 break;
3380 case M32C_OPERAND_SRC16AN :
3381 value = fields->f_src16_an;
3382 break;
3383 case M32C_OPERAND_SRC16ANHI :
3384 value = fields->f_src16_an;
3385 break;
3386 case M32C_OPERAND_SRC16ANQI :
3387 value = fields->f_src16_an;
3388 break;
3389 case M32C_OPERAND_SRC16RNHI :
3390 value = fields->f_src16_rn;
3391 break;
3392 case M32C_OPERAND_SRC16RNQI :
3393 value = fields->f_src16_rn;
3394 break;
3395 case M32C_OPERAND_SRC32ANPREFIXED :
3396 value = fields->f_src32_an_prefixed;
3397 break;
3398 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3399 value = fields->f_src32_an_prefixed;
3400 break;
3401 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3402 value = fields->f_src32_an_prefixed;
3403 break;
3404 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3405 value = fields->f_src32_an_prefixed;
3406 break;
3407 case M32C_OPERAND_SRC32ANUNPREFIXED :
3408 value = fields->f_src32_an_unprefixed;
3409 break;
3410 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3411 value = fields->f_src32_an_unprefixed;
3412 break;
3413 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3414 value = fields->f_src32_an_unprefixed;
3415 break;
3416 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3417 value = fields->f_src32_an_unprefixed;
3418 break;
3419 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3420 value = fields->f_src32_rn_prefixed_HI;
3421 break;
3422 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3423 value = fields->f_src32_rn_prefixed_QI;
3424 break;
3425 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3426 value = fields->f_src32_rn_prefixed_SI;
3427 break;
3428 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3429 value = fields->f_src32_rn_unprefixed_HI;
3430 break;
3431 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3432 value = fields->f_src32_rn_unprefixed_QI;
3433 break;
3434 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3435 value = fields->f_src32_rn_unprefixed_SI;
3436 break;
3437 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3438 value = fields->f_5_1;
3439 break;
3440 case M32C_OPERAND_X :
3441 value = 0;
3442 break;
3443 case M32C_OPERAND_Z :
3444 value = 0;
3445 break;
3446 case M32C_OPERAND_COND16_16 :
3447 value = fields->f_dsp_16_u8;
3448 break;
3449 case M32C_OPERAND_COND16_24 :
3450 value = fields->f_dsp_24_u8;
3451 break;
3452 case M32C_OPERAND_COND16_32 :
3453 value = fields->f_dsp_32_u8;
3454 break;
3455 case M32C_OPERAND_COND16C :
3456 value = fields->f_cond16;
3457 break;
3458 case M32C_OPERAND_COND16J :
3459 value = fields->f_cond16;
3460 break;
3461 case M32C_OPERAND_COND16J5 :
3462 value = fields->f_cond16j_5;
3463 break;
3464 case M32C_OPERAND_COND32 :
3465 value = fields->f_cond32;
3466 break;
3467 case M32C_OPERAND_COND32_16 :
3468 value = fields->f_dsp_16_u8;
3469 break;
3470 case M32C_OPERAND_COND32_24 :
3471 value = fields->f_dsp_24_u8;
3472 break;
3473 case M32C_OPERAND_COND32_32 :
3474 value = fields->f_dsp_32_u8;
3475 break;
3476 case M32C_OPERAND_COND32_40 :
3477 value = fields->f_dsp_40_u8;
3478 break;
3479 case M32C_OPERAND_COND32J :
3480 value = fields->f_cond32j;
3481 break;
3482 case M32C_OPERAND_CR1_PREFIXED_32 :
3483 value = fields->f_21_3;
3484 break;
3485 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3486 value = fields->f_13_3;
3487 break;
3488 case M32C_OPERAND_CR16 :
3489 value = fields->f_9_3;
3490 break;
3491 case M32C_OPERAND_CR2_32 :
3492 value = fields->f_13_3;
3493 break;
3494 case M32C_OPERAND_CR3_PREFIXED_32 :
3495 value = fields->f_21_3;
3496 break;
3497 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3498 value = fields->f_13_3;
3499 break;
3500 case M32C_OPERAND_FLAGS16 :
3501 value = fields->f_9_3;
3502 break;
3503 case M32C_OPERAND_FLAGS32 :
3504 value = fields->f_13_3;
3505 break;
3506 case M32C_OPERAND_SCCOND32 :
3507 value = fields->f_cond16;
3508 break;
3509 case M32C_OPERAND_SIZE :
3510 value = 0;
3511 break;
3512
3513 default :
3514 /* xgettext:c-format */
3515 opcodes_error_handler
3516 (_("internal error: unrecognized field %d while getting int operand"),
3517 opindex);
3518 abort ();
3519 }
3520
3521 return value;
3522 }
3523
3524 bfd_vma
3525 m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3526 int opindex,
3527 const CGEN_FIELDS * fields)
3528 {
3529 bfd_vma value;
3530
3531 switch (opindex)
3532 {
3533 case M32C_OPERAND_A0 :
3534 value = 0;
3535 break;
3536 case M32C_OPERAND_A1 :
3537 value = 0;
3538 break;
3539 case M32C_OPERAND_AN16_PUSH_S :
3540 value = fields->f_4_1;
3541 break;
3542 case M32C_OPERAND_BIT16AN :
3543 value = fields->f_dst16_an;
3544 break;
3545 case M32C_OPERAND_BIT16RN :
3546 value = fields->f_dst16_rn;
3547 break;
3548 case M32C_OPERAND_BIT3_S :
3549 value = fields->f_imm3_S;
3550 break;
3551 case M32C_OPERAND_BIT32ANPREFIXED :
3552 value = fields->f_dst32_an_prefixed;
3553 break;
3554 case M32C_OPERAND_BIT32ANUNPREFIXED :
3555 value = fields->f_dst32_an_unprefixed;
3556 break;
3557 case M32C_OPERAND_BIT32RNPREFIXED :
3558 value = fields->f_dst32_rn_prefixed_QI;
3559 break;
3560 case M32C_OPERAND_BIT32RNUNPREFIXED :
3561 value = fields->f_dst32_rn_unprefixed_QI;
3562 break;
3563 case M32C_OPERAND_BITBASE16_16_S8 :
3564 value = fields->f_dsp_16_s8;
3565 break;
3566 case M32C_OPERAND_BITBASE16_16_U16 :
3567 value = fields->f_dsp_16_u16;
3568 break;
3569 case M32C_OPERAND_BITBASE16_16_U8 :
3570 value = fields->f_dsp_16_u8;
3571 break;
3572 case M32C_OPERAND_BITBASE16_8_U11_S :
3573 value = fields->f_bitbase16_u11_S;
3574 break;
3575 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
3576 value = fields->f_bitbase32_16_s11_unprefixed;
3577 break;
3578 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
3579 value = fields->f_bitbase32_16_s19_unprefixed;
3580 break;
3581 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
3582 value = fields->f_bitbase32_16_u11_unprefixed;
3583 break;
3584 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
3585 value = fields->f_bitbase32_16_u19_unprefixed;
3586 break;
3587 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
3588 value = fields->f_bitbase32_16_u27_unprefixed;
3589 break;
3590 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
3591 value = fields->f_bitbase32_24_s11_prefixed;
3592 break;
3593 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
3594 value = fields->f_bitbase32_24_s19_prefixed;
3595 break;
3596 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3597 value = fields->f_bitbase32_24_u11_prefixed;
3598 break;
3599 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3600 value = fields->f_bitbase32_24_u19_prefixed;
3601 break;
3602 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3603 value = fields->f_bitbase32_24_u27_prefixed;
3604 break;
3605 case M32C_OPERAND_BITNO16R :
3606 value = fields->f_dsp_16_u8;
3607 break;
3608 case M32C_OPERAND_BITNO32PREFIXED :
3609 value = fields->f_bitno32_prefixed;
3610 break;
3611 case M32C_OPERAND_BITNO32UNPREFIXED :
3612 value = fields->f_bitno32_unprefixed;
3613 break;
3614 case M32C_OPERAND_DSP_10_U6 :
3615 value = fields->f_dsp_10_u6;
3616 break;
3617 case M32C_OPERAND_DSP_16_S16 :
3618 value = fields->f_dsp_16_s16;
3619 break;
3620 case M32C_OPERAND_DSP_16_S8 :
3621 value = fields->f_dsp_16_s8;
3622 break;
3623 case M32C_OPERAND_DSP_16_U16 :
3624 value = fields->f_dsp_16_u16;
3625 break;
3626 case M32C_OPERAND_DSP_16_U20 :
3627 value = fields->f_dsp_16_u24;
3628 break;
3629 case M32C_OPERAND_DSP_16_U24 :
3630 value = fields->f_dsp_16_u24;
3631 break;
3632 case M32C_OPERAND_DSP_16_U8 :
3633 value = fields->f_dsp_16_u8;
3634 break;
3635 case M32C_OPERAND_DSP_24_S16 :
3636 value = fields->f_dsp_24_s16;
3637 break;
3638 case M32C_OPERAND_DSP_24_S8 :
3639 value = fields->f_dsp_24_s8;
3640 break;
3641 case M32C_OPERAND_DSP_24_U16 :
3642 value = fields->f_dsp_24_u16;
3643 break;
3644 case M32C_OPERAND_DSP_24_U20 :
3645 value = fields->f_dsp_24_u24;
3646 break;
3647 case M32C_OPERAND_DSP_24_U24 :
3648 value = fields->f_dsp_24_u24;
3649 break;
3650 case M32C_OPERAND_DSP_24_U8 :
3651 value = fields->f_dsp_24_u8;
3652 break;
3653 case M32C_OPERAND_DSP_32_S16 :
3654 value = fields->f_dsp_32_s16;
3655 break;
3656 case M32C_OPERAND_DSP_32_S8 :
3657 value = fields->f_dsp_32_s8;
3658 break;
3659 case M32C_OPERAND_DSP_32_U16 :
3660 value = fields->f_dsp_32_u16;
3661 break;
3662 case M32C_OPERAND_DSP_32_U20 :
3663 value = fields->f_dsp_32_u24;
3664 break;
3665 case M32C_OPERAND_DSP_32_U24 :
3666 value = fields->f_dsp_32_u24;
3667 break;
3668 case M32C_OPERAND_DSP_32_U8 :
3669 value = fields->f_dsp_32_u8;
3670 break;
3671 case M32C_OPERAND_DSP_40_S16 :
3672 value = fields->f_dsp_40_s16;
3673 break;
3674 case M32C_OPERAND_DSP_40_S8 :
3675 value = fields->f_dsp_40_s8;
3676 break;
3677 case M32C_OPERAND_DSP_40_U16 :
3678 value = fields->f_dsp_40_u16;
3679 break;
3680 case M32C_OPERAND_DSP_40_U20 :
3681 value = fields->f_dsp_40_u20;
3682 break;
3683 case M32C_OPERAND_DSP_40_U24 :
3684 value = fields->f_dsp_40_u24;
3685 break;
3686 case M32C_OPERAND_DSP_40_U8 :
3687 value = fields->f_dsp_40_u8;
3688 break;
3689 case M32C_OPERAND_DSP_48_S16 :
3690 value = fields->f_dsp_48_s16;
3691 break;
3692 case M32C_OPERAND_DSP_48_S8 :
3693 value = fields->f_dsp_48_s8;
3694 break;
3695 case M32C_OPERAND_DSP_48_U16 :
3696 value = fields->f_dsp_48_u16;
3697 break;
3698 case M32C_OPERAND_DSP_48_U20 :
3699 value = fields->f_dsp_48_u20;
3700 break;
3701 case M32C_OPERAND_DSP_48_U24 :
3702 value = fields->f_dsp_48_u24;
3703 break;
3704 case M32C_OPERAND_DSP_48_U8 :
3705 value = fields->f_dsp_48_u8;
3706 break;
3707 case M32C_OPERAND_DSP_8_S24 :
3708 value = fields->f_dsp_8_s24;
3709 break;
3710 case M32C_OPERAND_DSP_8_S8 :
3711 value = fields->f_dsp_8_s8;
3712 break;
3713 case M32C_OPERAND_DSP_8_U16 :
3714 value = fields->f_dsp_8_u16;
3715 break;
3716 case M32C_OPERAND_DSP_8_U24 :
3717 value = fields->f_dsp_8_u24;
3718 break;
3719 case M32C_OPERAND_DSP_8_U6 :
3720 value = fields->f_dsp_8_u6;
3721 break;
3722 case M32C_OPERAND_DSP_8_U8 :
3723 value = fields->f_dsp_8_u8;
3724 break;
3725 case M32C_OPERAND_DST16AN :
3726 value = fields->f_dst16_an;
3727 break;
3728 case M32C_OPERAND_DST16AN_S :
3729 value = fields->f_dst16_an_s;
3730 break;
3731 case M32C_OPERAND_DST16ANHI :
3732 value = fields->f_dst16_an;
3733 break;
3734 case M32C_OPERAND_DST16ANQI :
3735 value = fields->f_dst16_an;
3736 break;
3737 case M32C_OPERAND_DST16ANQI_S :
3738 value = fields->f_dst16_rn_QI_s;
3739 break;
3740 case M32C_OPERAND_DST16ANSI :
3741 value = fields->f_dst16_an;
3742 break;
3743 case M32C_OPERAND_DST16RNEXTQI :
3744 value = fields->f_dst16_rn_ext;
3745 break;
3746 case M32C_OPERAND_DST16RNHI :
3747 value = fields->f_dst16_rn;
3748 break;
3749 case M32C_OPERAND_DST16RNQI :
3750 value = fields->f_dst16_rn;
3751 break;
3752 case M32C_OPERAND_DST16RNQI_S :
3753 value = fields->f_dst16_rn_QI_s;
3754 break;
3755 case M32C_OPERAND_DST16RNSI :
3756 value = fields->f_dst16_rn;
3757 break;
3758 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3759 value = fields->f_dst32_an_unprefixed;
3760 break;
3761 case M32C_OPERAND_DST32ANPREFIXED :
3762 value = fields->f_dst32_an_prefixed;
3763 break;
3764 case M32C_OPERAND_DST32ANPREFIXEDHI :
3765 value = fields->f_dst32_an_prefixed;
3766 break;
3767 case M32C_OPERAND_DST32ANPREFIXEDQI :
3768 value = fields->f_dst32_an_prefixed;
3769 break;
3770 case M32C_OPERAND_DST32ANPREFIXEDSI :
3771 value = fields->f_dst32_an_prefixed;
3772 break;
3773 case M32C_OPERAND_DST32ANUNPREFIXED :
3774 value = fields->f_dst32_an_unprefixed;
3775 break;
3776 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3777 value = fields->f_dst32_an_unprefixed;
3778 break;
3779 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3780 value = fields->f_dst32_an_unprefixed;
3781 break;
3782 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3783 value = fields->f_dst32_an_unprefixed;
3784 break;
3785 case M32C_OPERAND_DST32R0HI_S :
3786 value = 0;
3787 break;
3788 case M32C_OPERAND_DST32R0QI_S :
3789 value = 0;
3790 break;
3791 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3792 value = fields->f_dst32_rn_ext_unprefixed;
3793 break;
3794 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3795 value = fields->f_dst32_rn_ext_unprefixed;
3796 break;
3797 case M32C_OPERAND_DST32RNPREFIXEDHI :
3798 value = fields->f_dst32_rn_prefixed_HI;
3799 break;
3800 case M32C_OPERAND_DST32RNPREFIXEDQI :
3801 value = fields->f_dst32_rn_prefixed_QI;
3802 break;
3803 case M32C_OPERAND_DST32RNPREFIXEDSI :
3804 value = fields->f_dst32_rn_prefixed_SI;
3805 break;
3806 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3807 value = fields->f_dst32_rn_unprefixed_HI;
3808 break;
3809 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3810 value = fields->f_dst32_rn_unprefixed_QI;
3811 break;
3812 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3813 value = fields->f_dst32_rn_unprefixed_SI;
3814 break;
3815 case M32C_OPERAND_G :
3816 value = 0;
3817 break;
3818 case M32C_OPERAND_IMM_12_S4 :
3819 value = fields->f_imm_12_s4;
3820 break;
3821 case M32C_OPERAND_IMM_12_S4N :
3822 value = fields->f_imm_12_s4;
3823 break;
3824 case M32C_OPERAND_IMM_13_U3 :
3825 value = fields->f_imm_13_u3;
3826 break;
3827 case M32C_OPERAND_IMM_16_HI :
3828 value = fields->f_dsp_16_s16;
3829 break;
3830 case M32C_OPERAND_IMM_16_QI :
3831 value = fields->f_dsp_16_s8;
3832 break;
3833 case M32C_OPERAND_IMM_16_SI :
3834 value = fields->f_dsp_16_s32;
3835 break;
3836 case M32C_OPERAND_IMM_20_S4 :
3837 value = fields->f_imm_20_s4;
3838 break;
3839 case M32C_OPERAND_IMM_24_HI :
3840 value = fields->f_dsp_24_s16;
3841 break;
3842 case M32C_OPERAND_IMM_24_QI :
3843 value = fields->f_dsp_24_s8;
3844 break;
3845 case M32C_OPERAND_IMM_24_SI :
3846 value = fields->f_dsp_24_s32;
3847 break;
3848 case M32C_OPERAND_IMM_32_HI :
3849 value = fields->f_dsp_32_s16;
3850 break;
3851 case M32C_OPERAND_IMM_32_QI :
3852 value = fields->f_dsp_32_s8;
3853 break;
3854 case M32C_OPERAND_IMM_32_SI :
3855 value = fields->f_dsp_32_s32;
3856 break;
3857 case M32C_OPERAND_IMM_40_HI :
3858 value = fields->f_dsp_40_s16;
3859 break;
3860 case M32C_OPERAND_IMM_40_QI :
3861 value = fields->f_dsp_40_s8;
3862 break;
3863 case M32C_OPERAND_IMM_40_SI :
3864 value = fields->f_dsp_40_s32;
3865 break;
3866 case M32C_OPERAND_IMM_48_HI :
3867 value = fields->f_dsp_48_s16;
3868 break;
3869 case M32C_OPERAND_IMM_48_QI :
3870 value = fields->f_dsp_48_s8;
3871 break;
3872 case M32C_OPERAND_IMM_48_SI :
3873 value = fields->f_dsp_48_s32;
3874 break;
3875 case M32C_OPERAND_IMM_56_HI :
3876 value = fields->f_dsp_56_s16;
3877 break;
3878 case M32C_OPERAND_IMM_56_QI :
3879 value = fields->f_dsp_56_s8;
3880 break;
3881 case M32C_OPERAND_IMM_64_HI :
3882 value = fields->f_dsp_64_s16;
3883 break;
3884 case M32C_OPERAND_IMM_8_HI :
3885 value = fields->f_dsp_8_s16;
3886 break;
3887 case M32C_OPERAND_IMM_8_QI :
3888 value = fields->f_dsp_8_s8;
3889 break;
3890 case M32C_OPERAND_IMM_8_S4 :
3891 value = fields->f_imm_8_s4;
3892 break;
3893 case M32C_OPERAND_IMM_8_S4N :
3894 value = fields->f_imm_8_s4;
3895 break;
3896 case M32C_OPERAND_IMM_SH_12_S4 :
3897 value = fields->f_imm_12_s4;
3898 break;
3899 case M32C_OPERAND_IMM_SH_20_S4 :
3900 value = fields->f_imm_20_s4;
3901 break;
3902 case M32C_OPERAND_IMM_SH_8_S4 :
3903 value = fields->f_imm_8_s4;
3904 break;
3905 case M32C_OPERAND_IMM1_S :
3906 value = fields->f_imm1_S;
3907 break;
3908 case M32C_OPERAND_IMM3_S :
3909 value = fields->f_imm3_S;
3910 break;
3911 case M32C_OPERAND_LAB_16_8 :
3912 value = fields->f_lab_16_8;
3913 break;
3914 case M32C_OPERAND_LAB_24_8 :
3915 value = fields->f_lab_24_8;
3916 break;
3917 case M32C_OPERAND_LAB_32_8 :
3918 value = fields->f_lab_32_8;
3919 break;
3920 case M32C_OPERAND_LAB_40_8 :
3921 value = fields->f_lab_40_8;
3922 break;
3923 case M32C_OPERAND_LAB_5_3 :
3924 value = fields->f_lab_5_3;
3925 break;
3926 case M32C_OPERAND_LAB_8_16 :
3927 value = fields->f_lab_8_16;
3928 break;
3929 case M32C_OPERAND_LAB_8_24 :
3930 value = fields->f_lab_8_24;
3931 break;
3932 case M32C_OPERAND_LAB_8_8 :
3933 value = fields->f_lab_8_8;
3934 break;
3935 case M32C_OPERAND_LAB32_JMP_S :
3936 value = fields->f_lab32_jmp_s;
3937 break;
3938 case M32C_OPERAND_Q :
3939 value = 0;
3940 break;
3941 case M32C_OPERAND_R0 :
3942 value = 0;
3943 break;
3944 case M32C_OPERAND_R0H :
3945 value = 0;
3946 break;
3947 case M32C_OPERAND_R0L :
3948 value = 0;
3949 break;
3950 case M32C_OPERAND_R1 :
3951 value = 0;
3952 break;
3953 case M32C_OPERAND_R1R2R0 :
3954 value = 0;
3955 break;
3956 case M32C_OPERAND_R2 :
3957 value = 0;
3958 break;
3959 case M32C_OPERAND_R2R0 :
3960 value = 0;
3961 break;
3962 case M32C_OPERAND_R3 :
3963 value = 0;
3964 break;
3965 case M32C_OPERAND_R3R1 :
3966 value = 0;
3967 break;
3968 case M32C_OPERAND_REGSETPOP :
3969 value = fields->f_8_8;
3970 break;
3971 case M32C_OPERAND_REGSETPUSH :
3972 value = fields->f_8_8;
3973 break;
3974 case M32C_OPERAND_RN16_PUSH_S :
3975 value = fields->f_4_1;
3976 break;
3977 case M32C_OPERAND_S :
3978 value = 0;
3979 break;
3980 case M32C_OPERAND_SRC16AN :
3981 value = fields->f_src16_an;
3982 break;
3983 case M32C_OPERAND_SRC16ANHI :
3984 value = fields->f_src16_an;
3985 break;
3986 case M32C_OPERAND_SRC16ANQI :
3987 value = fields->f_src16_an;
3988 break;
3989 case M32C_OPERAND_SRC16RNHI :
3990 value = fields->f_src16_rn;
3991 break;
3992 case M32C_OPERAND_SRC16RNQI :
3993 value = fields->f_src16_rn;
3994 break;
3995 case M32C_OPERAND_SRC32ANPREFIXED :
3996 value = fields->f_src32_an_prefixed;
3997 break;
3998 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3999 value = fields->f_src32_an_prefixed;
4000 break;
4001 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4002 value = fields->f_src32_an_prefixed;
4003 break;
4004 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4005 value = fields->f_src32_an_prefixed;
4006 break;
4007 case M32C_OPERAND_SRC32ANUNPREFIXED :
4008 value = fields->f_src32_an_unprefixed;
4009 break;
4010 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4011 value = fields->f_src32_an_unprefixed;
4012 break;
4013 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4014 value = fields->f_src32_an_unprefixed;
4015 break;
4016 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4017 value = fields->f_src32_an_unprefixed;
4018 break;
4019 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4020 value = fields->f_src32_rn_prefixed_HI;
4021 break;
4022 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4023 value = fields->f_src32_rn_prefixed_QI;
4024 break;
4025 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4026 value = fields->f_src32_rn_prefixed_SI;
4027 break;
4028 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4029 value = fields->f_src32_rn_unprefixed_HI;
4030 break;
4031 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4032 value = fields->f_src32_rn_unprefixed_QI;
4033 break;
4034 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4035 value = fields->f_src32_rn_unprefixed_SI;
4036 break;
4037 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4038 value = fields->f_5_1;
4039 break;
4040 case M32C_OPERAND_X :
4041 value = 0;
4042 break;
4043 case M32C_OPERAND_Z :
4044 value = 0;
4045 break;
4046 case M32C_OPERAND_COND16_16 :
4047 value = fields->f_dsp_16_u8;
4048 break;
4049 case M32C_OPERAND_COND16_24 :
4050 value = fields->f_dsp_24_u8;
4051 break;
4052 case M32C_OPERAND_COND16_32 :
4053 value = fields->f_dsp_32_u8;
4054 break;
4055 case M32C_OPERAND_COND16C :
4056 value = fields->f_cond16;
4057 break;
4058 case M32C_OPERAND_COND16J :
4059 value = fields->f_cond16;
4060 break;
4061 case M32C_OPERAND_COND16J5 :
4062 value = fields->f_cond16j_5;
4063 break;
4064 case M32C_OPERAND_COND32 :
4065 value = fields->f_cond32;
4066 break;
4067 case M32C_OPERAND_COND32_16 :
4068 value = fields->f_dsp_16_u8;
4069 break;
4070 case M32C_OPERAND_COND32_24 :
4071 value = fields->f_dsp_24_u8;
4072 break;
4073 case M32C_OPERAND_COND32_32 :
4074 value = fields->f_dsp_32_u8;
4075 break;
4076 case M32C_OPERAND_COND32_40 :
4077 value = fields->f_dsp_40_u8;
4078 break;
4079 case M32C_OPERAND_COND32J :
4080 value = fields->f_cond32j;
4081 break;
4082 case M32C_OPERAND_CR1_PREFIXED_32 :
4083 value = fields->f_21_3;
4084 break;
4085 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4086 value = fields->f_13_3;
4087 break;
4088 case M32C_OPERAND_CR16 :
4089 value = fields->f_9_3;
4090 break;
4091 case M32C_OPERAND_CR2_32 :
4092 value = fields->f_13_3;
4093 break;
4094 case M32C_OPERAND_CR3_PREFIXED_32 :
4095 value = fields->f_21_3;
4096 break;
4097 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4098 value = fields->f_13_3;
4099 break;
4100 case M32C_OPERAND_FLAGS16 :
4101 value = fields->f_9_3;
4102 break;
4103 case M32C_OPERAND_FLAGS32 :
4104 value = fields->f_13_3;
4105 break;
4106 case M32C_OPERAND_SCCOND32 :
4107 value = fields->f_cond16;
4108 break;
4109 case M32C_OPERAND_SIZE :
4110 value = 0;
4111 break;
4112
4113 default :
4114 /* xgettext:c-format */
4115 opcodes_error_handler
4116 (_("internal error: unrecognized field %d while getting vma operand"),
4117 opindex);
4118 abort ();
4119 }
4120
4121 return value;
4122 }
4123
4124 void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
4125 void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
4126
4127 /* Stuffing values in cgen_fields is handled by a collection of functions.
4128 They are distinguished by the type of the VALUE argument they accept.
4129 TODO: floating point, inlining support, remove cases where argument type
4130 not appropriate. */
4131
4132 void
4133 m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4134 int opindex,
4135 CGEN_FIELDS * fields,
4136 int value)
4137 {
4138 switch (opindex)
4139 {
4140 case M32C_OPERAND_A0 :
4141 break;
4142 case M32C_OPERAND_A1 :
4143 break;
4144 case M32C_OPERAND_AN16_PUSH_S :
4145 fields->f_4_1 = value;
4146 break;
4147 case M32C_OPERAND_BIT16AN :
4148 fields->f_dst16_an = value;
4149 break;
4150 case M32C_OPERAND_BIT16RN :
4151 fields->f_dst16_rn = value;
4152 break;
4153 case M32C_OPERAND_BIT3_S :
4154 fields->f_imm3_S = value;
4155 break;
4156 case M32C_OPERAND_BIT32ANPREFIXED :
4157 fields->f_dst32_an_prefixed = value;
4158 break;
4159 case M32C_OPERAND_BIT32ANUNPREFIXED :
4160 fields->f_dst32_an_unprefixed = value;
4161 break;
4162 case M32C_OPERAND_BIT32RNPREFIXED :
4163 fields->f_dst32_rn_prefixed_QI = value;
4164 break;
4165 case M32C_OPERAND_BIT32RNUNPREFIXED :
4166 fields->f_dst32_rn_unprefixed_QI = value;
4167 break;
4168 case M32C_OPERAND_BITBASE16_16_S8 :
4169 fields->f_dsp_16_s8 = value;
4170 break;
4171 case M32C_OPERAND_BITBASE16_16_U16 :
4172 fields->f_dsp_16_u16 = value;
4173 break;
4174 case M32C_OPERAND_BITBASE16_16_U8 :
4175 fields->f_dsp_16_u8 = value;
4176 break;
4177 case M32C_OPERAND_BITBASE16_8_U11_S :
4178 fields->f_bitbase16_u11_S = value;
4179 break;
4180 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4181 fields->f_bitbase32_16_s11_unprefixed = value;
4182 break;
4183 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4184 fields->f_bitbase32_16_s19_unprefixed = value;
4185 break;
4186 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4187 fields->f_bitbase32_16_u11_unprefixed = value;
4188 break;
4189 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4190 fields->f_bitbase32_16_u19_unprefixed = value;
4191 break;
4192 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4193 fields->f_bitbase32_16_u27_unprefixed = value;
4194 break;
4195 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4196 fields->f_bitbase32_24_s11_prefixed = value;
4197 break;
4198 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4199 fields->f_bitbase32_24_s19_prefixed = value;
4200 break;
4201 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4202 fields->f_bitbase32_24_u11_prefixed = value;
4203 break;
4204 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4205 fields->f_bitbase32_24_u19_prefixed = value;
4206 break;
4207 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4208 fields->f_bitbase32_24_u27_prefixed = value;
4209 break;
4210 case M32C_OPERAND_BITNO16R :
4211 fields->f_dsp_16_u8 = value;
4212 break;
4213 case M32C_OPERAND_BITNO32PREFIXED :
4214 fields->f_bitno32_prefixed = value;
4215 break;
4216 case M32C_OPERAND_BITNO32UNPREFIXED :
4217 fields->f_bitno32_unprefixed = value;
4218 break;
4219 case M32C_OPERAND_DSP_10_U6 :
4220 fields->f_dsp_10_u6 = value;
4221 break;
4222 case M32C_OPERAND_DSP_16_S16 :
4223 fields->f_dsp_16_s16 = value;
4224 break;
4225 case M32C_OPERAND_DSP_16_S8 :
4226 fields->f_dsp_16_s8 = value;
4227 break;
4228 case M32C_OPERAND_DSP_16_U16 :
4229 fields->f_dsp_16_u16 = value;
4230 break;
4231 case M32C_OPERAND_DSP_16_U20 :
4232 fields->f_dsp_16_u24 = value;
4233 break;
4234 case M32C_OPERAND_DSP_16_U24 :
4235 fields->f_dsp_16_u24 = value;
4236 break;
4237 case M32C_OPERAND_DSP_16_U8 :
4238 fields->f_dsp_16_u8 = value;
4239 break;
4240 case M32C_OPERAND_DSP_24_S16 :
4241 fields->f_dsp_24_s16 = value;
4242 break;
4243 case M32C_OPERAND_DSP_24_S8 :
4244 fields->f_dsp_24_s8 = value;
4245 break;
4246 case M32C_OPERAND_DSP_24_U16 :
4247 fields->f_dsp_24_u16 = value;
4248 break;
4249 case M32C_OPERAND_DSP_24_U20 :
4250 fields->f_dsp_24_u24 = value;
4251 break;
4252 case M32C_OPERAND_DSP_24_U24 :
4253 fields->f_dsp_24_u24 = value;
4254 break;
4255 case M32C_OPERAND_DSP_24_U8 :
4256 fields->f_dsp_24_u8 = value;
4257 break;
4258 case M32C_OPERAND_DSP_32_S16 :
4259 fields->f_dsp_32_s16 = value;
4260 break;
4261 case M32C_OPERAND_DSP_32_S8 :
4262 fields->f_dsp_32_s8 = value;
4263 break;
4264 case M32C_OPERAND_DSP_32_U16 :
4265 fields->f_dsp_32_u16 = value;
4266 break;
4267 case M32C_OPERAND_DSP_32_U20 :
4268 fields->f_dsp_32_u24 = value;
4269 break;
4270 case M32C_OPERAND_DSP_32_U24 :
4271 fields->f_dsp_32_u24 = value;
4272 break;
4273 case M32C_OPERAND_DSP_32_U8 :
4274 fields->f_dsp_32_u8 = value;
4275 break;
4276 case M32C_OPERAND_DSP_40_S16 :
4277 fields->f_dsp_40_s16 = value;
4278 break;
4279 case M32C_OPERAND_DSP_40_S8 :
4280 fields->f_dsp_40_s8 = value;
4281 break;
4282 case M32C_OPERAND_DSP_40_U16 :
4283 fields->f_dsp_40_u16 = value;
4284 break;
4285 case M32C_OPERAND_DSP_40_U20 :
4286 fields->f_dsp_40_u20 = value;
4287 break;
4288 case M32C_OPERAND_DSP_40_U24 :
4289 fields->f_dsp_40_u24 = value;
4290 break;
4291 case M32C_OPERAND_DSP_40_U8 :
4292 fields->f_dsp_40_u8 = value;
4293 break;
4294 case M32C_OPERAND_DSP_48_S16 :
4295 fields->f_dsp_48_s16 = value;
4296 break;
4297 case M32C_OPERAND_DSP_48_S8 :
4298 fields->f_dsp_48_s8 = value;
4299 break;
4300 case M32C_OPERAND_DSP_48_U16 :
4301 fields->f_dsp_48_u16 = value;
4302 break;
4303 case M32C_OPERAND_DSP_48_U20 :
4304 fields->f_dsp_48_u20 = value;
4305 break;
4306 case M32C_OPERAND_DSP_48_U24 :
4307 fields->f_dsp_48_u24 = value;
4308 break;
4309 case M32C_OPERAND_DSP_48_U8 :
4310 fields->f_dsp_48_u8 = value;
4311 break;
4312 case M32C_OPERAND_DSP_8_S24 :
4313 fields->f_dsp_8_s24 = value;
4314 break;
4315 case M32C_OPERAND_DSP_8_S8 :
4316 fields->f_dsp_8_s8 = value;
4317 break;
4318 case M32C_OPERAND_DSP_8_U16 :
4319 fields->f_dsp_8_u16 = value;
4320 break;
4321 case M32C_OPERAND_DSP_8_U24 :
4322 fields->f_dsp_8_u24 = value;
4323 break;
4324 case M32C_OPERAND_DSP_8_U6 :
4325 fields->f_dsp_8_u6 = value;
4326 break;
4327 case M32C_OPERAND_DSP_8_U8 :
4328 fields->f_dsp_8_u8 = value;
4329 break;
4330 case M32C_OPERAND_DST16AN :
4331 fields->f_dst16_an = value;
4332 break;
4333 case M32C_OPERAND_DST16AN_S :
4334 fields->f_dst16_an_s = value;
4335 break;
4336 case M32C_OPERAND_DST16ANHI :
4337 fields->f_dst16_an = value;
4338 break;
4339 case M32C_OPERAND_DST16ANQI :
4340 fields->f_dst16_an = value;
4341 break;
4342 case M32C_OPERAND_DST16ANQI_S :
4343 fields->f_dst16_rn_QI_s = value;
4344 break;
4345 case M32C_OPERAND_DST16ANSI :
4346 fields->f_dst16_an = value;
4347 break;
4348 case M32C_OPERAND_DST16RNEXTQI :
4349 fields->f_dst16_rn_ext = value;
4350 break;
4351 case M32C_OPERAND_DST16RNHI :
4352 fields->f_dst16_rn = value;
4353 break;
4354 case M32C_OPERAND_DST16RNQI :
4355 fields->f_dst16_rn = value;
4356 break;
4357 case M32C_OPERAND_DST16RNQI_S :
4358 fields->f_dst16_rn_QI_s = value;
4359 break;
4360 case M32C_OPERAND_DST16RNSI :
4361 fields->f_dst16_rn = value;
4362 break;
4363 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4364 fields->f_dst32_an_unprefixed = value;
4365 break;
4366 case M32C_OPERAND_DST32ANPREFIXED :
4367 fields->f_dst32_an_prefixed = value;
4368 break;
4369 case M32C_OPERAND_DST32ANPREFIXEDHI :
4370 fields->f_dst32_an_prefixed = value;
4371 break;
4372 case M32C_OPERAND_DST32ANPREFIXEDQI :
4373 fields->f_dst32_an_prefixed = value;
4374 break;
4375 case M32C_OPERAND_DST32ANPREFIXEDSI :
4376 fields->f_dst32_an_prefixed = value;
4377 break;
4378 case M32C_OPERAND_DST32ANUNPREFIXED :
4379 fields->f_dst32_an_unprefixed = value;
4380 break;
4381 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4382 fields->f_dst32_an_unprefixed = value;
4383 break;
4384 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4385 fields->f_dst32_an_unprefixed = value;
4386 break;
4387 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4388 fields->f_dst32_an_unprefixed = value;
4389 break;
4390 case M32C_OPERAND_DST32R0HI_S :
4391 break;
4392 case M32C_OPERAND_DST32R0QI_S :
4393 break;
4394 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4395 fields->f_dst32_rn_ext_unprefixed = value;
4396 break;
4397 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4398 fields->f_dst32_rn_ext_unprefixed = value;
4399 break;
4400 case M32C_OPERAND_DST32RNPREFIXEDHI :
4401 fields->f_dst32_rn_prefixed_HI = value;
4402 break;
4403 case M32C_OPERAND_DST32RNPREFIXEDQI :
4404 fields->f_dst32_rn_prefixed_QI = value;
4405 break;
4406 case M32C_OPERAND_DST32RNPREFIXEDSI :
4407 fields->f_dst32_rn_prefixed_SI = value;
4408 break;
4409 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4410 fields->f_dst32_rn_unprefixed_HI = value;
4411 break;
4412 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4413 fields->f_dst32_rn_unprefixed_QI = value;
4414 break;
4415 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4416 fields->f_dst32_rn_unprefixed_SI = value;
4417 break;
4418 case M32C_OPERAND_G :
4419 break;
4420 case M32C_OPERAND_IMM_12_S4 :
4421 fields->f_imm_12_s4 = value;
4422 break;
4423 case M32C_OPERAND_IMM_12_S4N :
4424 fields->f_imm_12_s4 = value;
4425 break;
4426 case M32C_OPERAND_IMM_13_U3 :
4427 fields->f_imm_13_u3 = value;
4428 break;
4429 case M32C_OPERAND_IMM_16_HI :
4430 fields->f_dsp_16_s16 = value;
4431 break;
4432 case M32C_OPERAND_IMM_16_QI :
4433 fields->f_dsp_16_s8 = value;
4434 break;
4435 case M32C_OPERAND_IMM_16_SI :
4436 fields->f_dsp_16_s32 = value;
4437 break;
4438 case M32C_OPERAND_IMM_20_S4 :
4439 fields->f_imm_20_s4 = value;
4440 break;
4441 case M32C_OPERAND_IMM_24_HI :
4442 fields->f_dsp_24_s16 = value;
4443 break;
4444 case M32C_OPERAND_IMM_24_QI :
4445 fields->f_dsp_24_s8 = value;
4446 break;
4447 case M32C_OPERAND_IMM_24_SI :
4448 fields->f_dsp_24_s32 = value;
4449 break;
4450 case M32C_OPERAND_IMM_32_HI :
4451 fields->f_dsp_32_s16 = value;
4452 break;
4453 case M32C_OPERAND_IMM_32_QI :
4454 fields->f_dsp_32_s8 = value;
4455 break;
4456 case M32C_OPERAND_IMM_32_SI :
4457 fields->f_dsp_32_s32 = value;
4458 break;
4459 case M32C_OPERAND_IMM_40_HI :
4460 fields->f_dsp_40_s16 = value;
4461 break;
4462 case M32C_OPERAND_IMM_40_QI :
4463 fields->f_dsp_40_s8 = value;
4464 break;
4465 case M32C_OPERAND_IMM_40_SI :
4466 fields->f_dsp_40_s32 = value;
4467 break;
4468 case M32C_OPERAND_IMM_48_HI :
4469 fields->f_dsp_48_s16 = value;
4470 break;
4471 case M32C_OPERAND_IMM_48_QI :
4472 fields->f_dsp_48_s8 = value;
4473 break;
4474 case M32C_OPERAND_IMM_48_SI :
4475 fields->f_dsp_48_s32 = value;
4476 break;
4477 case M32C_OPERAND_IMM_56_HI :
4478 fields->f_dsp_56_s16 = value;
4479 break;
4480 case M32C_OPERAND_IMM_56_QI :
4481 fields->f_dsp_56_s8 = value;
4482 break;
4483 case M32C_OPERAND_IMM_64_HI :
4484 fields->f_dsp_64_s16 = value;
4485 break;
4486 case M32C_OPERAND_IMM_8_HI :
4487 fields->f_dsp_8_s16 = value;
4488 break;
4489 case M32C_OPERAND_IMM_8_QI :
4490 fields->f_dsp_8_s8 = value;
4491 break;
4492 case M32C_OPERAND_IMM_8_S4 :
4493 fields->f_imm_8_s4 = value;
4494 break;
4495 case M32C_OPERAND_IMM_8_S4N :
4496 fields->f_imm_8_s4 = value;
4497 break;
4498 case M32C_OPERAND_IMM_SH_12_S4 :
4499 fields->f_imm_12_s4 = value;
4500 break;
4501 case M32C_OPERAND_IMM_SH_20_S4 :
4502 fields->f_imm_20_s4 = value;
4503 break;
4504 case M32C_OPERAND_IMM_SH_8_S4 :
4505 fields->f_imm_8_s4 = value;
4506 break;
4507 case M32C_OPERAND_IMM1_S :
4508 fields->f_imm1_S = value;
4509 break;
4510 case M32C_OPERAND_IMM3_S :
4511 fields->f_imm3_S = value;
4512 break;
4513 case M32C_OPERAND_LAB_16_8 :
4514 fields->f_lab_16_8 = value;
4515 break;
4516 case M32C_OPERAND_LAB_24_8 :
4517 fields->f_lab_24_8 = value;
4518 break;
4519 case M32C_OPERAND_LAB_32_8 :
4520 fields->f_lab_32_8 = value;
4521 break;
4522 case M32C_OPERAND_LAB_40_8 :
4523 fields->f_lab_40_8 = value;
4524 break;
4525 case M32C_OPERAND_LAB_5_3 :
4526 fields->f_lab_5_3 = value;
4527 break;
4528 case M32C_OPERAND_LAB_8_16 :
4529 fields->f_lab_8_16 = value;
4530 break;
4531 case M32C_OPERAND_LAB_8_24 :
4532 fields->f_lab_8_24 = value;
4533 break;
4534 case M32C_OPERAND_LAB_8_8 :
4535 fields->f_lab_8_8 = value;
4536 break;
4537 case M32C_OPERAND_LAB32_JMP_S :
4538 fields->f_lab32_jmp_s = value;
4539 break;
4540 case M32C_OPERAND_Q :
4541 break;
4542 case M32C_OPERAND_R0 :
4543 break;
4544 case M32C_OPERAND_R0H :
4545 break;
4546 case M32C_OPERAND_R0L :
4547 break;
4548 case M32C_OPERAND_R1 :
4549 break;
4550 case M32C_OPERAND_R1R2R0 :
4551 break;
4552 case M32C_OPERAND_R2 :
4553 break;
4554 case M32C_OPERAND_R2R0 :
4555 break;
4556 case M32C_OPERAND_R3 :
4557 break;
4558 case M32C_OPERAND_R3R1 :
4559 break;
4560 case M32C_OPERAND_REGSETPOP :
4561 fields->f_8_8 = value;
4562 break;
4563 case M32C_OPERAND_REGSETPUSH :
4564 fields->f_8_8 = value;
4565 break;
4566 case M32C_OPERAND_RN16_PUSH_S :
4567 fields->f_4_1 = value;
4568 break;
4569 case M32C_OPERAND_S :
4570 break;
4571 case M32C_OPERAND_SRC16AN :
4572 fields->f_src16_an = value;
4573 break;
4574 case M32C_OPERAND_SRC16ANHI :
4575 fields->f_src16_an = value;
4576 break;
4577 case M32C_OPERAND_SRC16ANQI :
4578 fields->f_src16_an = value;
4579 break;
4580 case M32C_OPERAND_SRC16RNHI :
4581 fields->f_src16_rn = value;
4582 break;
4583 case M32C_OPERAND_SRC16RNQI :
4584 fields->f_src16_rn = value;
4585 break;
4586 case M32C_OPERAND_SRC32ANPREFIXED :
4587 fields->f_src32_an_prefixed = value;
4588 break;
4589 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4590 fields->f_src32_an_prefixed = value;
4591 break;
4592 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4593 fields->f_src32_an_prefixed = value;
4594 break;
4595 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4596 fields->f_src32_an_prefixed = value;
4597 break;
4598 case M32C_OPERAND_SRC32ANUNPREFIXED :
4599 fields->f_src32_an_unprefixed = value;
4600 break;
4601 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4602 fields->f_src32_an_unprefixed = value;
4603 break;
4604 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4605 fields->f_src32_an_unprefixed = value;
4606 break;
4607 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4608 fields->f_src32_an_unprefixed = value;
4609 break;
4610 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4611 fields->f_src32_rn_prefixed_HI = value;
4612 break;
4613 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4614 fields->f_src32_rn_prefixed_QI = value;
4615 break;
4616 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4617 fields->f_src32_rn_prefixed_SI = value;
4618 break;
4619 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4620 fields->f_src32_rn_unprefixed_HI = value;
4621 break;
4622 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4623 fields->f_src32_rn_unprefixed_QI = value;
4624 break;
4625 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4626 fields->f_src32_rn_unprefixed_SI = value;
4627 break;
4628 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4629 fields->f_5_1 = value;
4630 break;
4631 case M32C_OPERAND_X :
4632 break;
4633 case M32C_OPERAND_Z :
4634 break;
4635 case M32C_OPERAND_COND16_16 :
4636 fields->f_dsp_16_u8 = value;
4637 break;
4638 case M32C_OPERAND_COND16_24 :
4639 fields->f_dsp_24_u8 = value;
4640 break;
4641 case M32C_OPERAND_COND16_32 :
4642 fields->f_dsp_32_u8 = value;
4643 break;
4644 case M32C_OPERAND_COND16C :
4645 fields->f_cond16 = value;
4646 break;
4647 case M32C_OPERAND_COND16J :
4648 fields->f_cond16 = value;
4649 break;
4650 case M32C_OPERAND_COND16J5 :
4651 fields->f_cond16j_5 = value;
4652 break;
4653 case M32C_OPERAND_COND32 :
4654 fields->f_cond32 = value;
4655 break;
4656 case M32C_OPERAND_COND32_16 :
4657 fields->f_dsp_16_u8 = value;
4658 break;
4659 case M32C_OPERAND_COND32_24 :
4660 fields->f_dsp_24_u8 = value;
4661 break;
4662 case M32C_OPERAND_COND32_32 :
4663 fields->f_dsp_32_u8 = value;
4664 break;
4665 case M32C_OPERAND_COND32_40 :
4666 fields->f_dsp_40_u8 = value;
4667 break;
4668 case M32C_OPERAND_COND32J :
4669 fields->f_cond32j = value;
4670 break;
4671 case M32C_OPERAND_CR1_PREFIXED_32 :
4672 fields->f_21_3 = value;
4673 break;
4674 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4675 fields->f_13_3 = value;
4676 break;
4677 case M32C_OPERAND_CR16 :
4678 fields->f_9_3 = value;
4679 break;
4680 case M32C_OPERAND_CR2_32 :
4681 fields->f_13_3 = value;
4682 break;
4683 case M32C_OPERAND_CR3_PREFIXED_32 :
4684 fields->f_21_3 = value;
4685 break;
4686 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4687 fields->f_13_3 = value;
4688 break;
4689 case M32C_OPERAND_FLAGS16 :
4690 fields->f_9_3 = value;
4691 break;
4692 case M32C_OPERAND_FLAGS32 :
4693 fields->f_13_3 = value;
4694 break;
4695 case M32C_OPERAND_SCCOND32 :
4696 fields->f_cond16 = value;
4697 break;
4698 case M32C_OPERAND_SIZE :
4699 break;
4700
4701 default :
4702 /* xgettext:c-format */
4703 opcodes_error_handler
4704 (_("internal error: unrecognized field %d while setting int operand"),
4705 opindex);
4706 abort ();
4707 }
4708 }
4709
4710 void
4711 m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4712 int opindex,
4713 CGEN_FIELDS * fields,
4714 bfd_vma value)
4715 {
4716 switch (opindex)
4717 {
4718 case M32C_OPERAND_A0 :
4719 break;
4720 case M32C_OPERAND_A1 :
4721 break;
4722 case M32C_OPERAND_AN16_PUSH_S :
4723 fields->f_4_1 = value;
4724 break;
4725 case M32C_OPERAND_BIT16AN :
4726 fields->f_dst16_an = value;
4727 break;
4728 case M32C_OPERAND_BIT16RN :
4729 fields->f_dst16_rn = value;
4730 break;
4731 case M32C_OPERAND_BIT3_S :
4732 fields->f_imm3_S = value;
4733 break;
4734 case M32C_OPERAND_BIT32ANPREFIXED :
4735 fields->f_dst32_an_prefixed = value;
4736 break;
4737 case M32C_OPERAND_BIT32ANUNPREFIXED :
4738 fields->f_dst32_an_unprefixed = value;
4739 break;
4740 case M32C_OPERAND_BIT32RNPREFIXED :
4741 fields->f_dst32_rn_prefixed_QI = value;
4742 break;
4743 case M32C_OPERAND_BIT32RNUNPREFIXED :
4744 fields->f_dst32_rn_unprefixed_QI = value;
4745 break;
4746 case M32C_OPERAND_BITBASE16_16_S8 :
4747 fields->f_dsp_16_s8 = value;
4748 break;
4749 case M32C_OPERAND_BITBASE16_16_U16 :
4750 fields->f_dsp_16_u16 = value;
4751 break;
4752 case M32C_OPERAND_BITBASE16_16_U8 :
4753 fields->f_dsp_16_u8 = value;
4754 break;
4755 case M32C_OPERAND_BITBASE16_8_U11_S :
4756 fields->f_bitbase16_u11_S = value;
4757 break;
4758 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4759 fields->f_bitbase32_16_s11_unprefixed = value;
4760 break;
4761 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4762 fields->f_bitbase32_16_s19_unprefixed = value;
4763 break;
4764 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4765 fields->f_bitbase32_16_u11_unprefixed = value;
4766 break;
4767 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4768 fields->f_bitbase32_16_u19_unprefixed = value;
4769 break;
4770 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4771 fields->f_bitbase32_16_u27_unprefixed = value;
4772 break;
4773 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4774 fields->f_bitbase32_24_s11_prefixed = value;
4775 break;
4776 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4777 fields->f_bitbase32_24_s19_prefixed = value;
4778 break;
4779 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4780 fields->f_bitbase32_24_u11_prefixed = value;
4781 break;
4782 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4783 fields->f_bitbase32_24_u19_prefixed = value;
4784 break;
4785 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4786 fields->f_bitbase32_24_u27_prefixed = value;
4787 break;
4788 case M32C_OPERAND_BITNO16R :
4789 fields->f_dsp_16_u8 = value;
4790 break;
4791 case M32C_OPERAND_BITNO32PREFIXED :
4792 fields->f_bitno32_prefixed = value;
4793 break;
4794 case M32C_OPERAND_BITNO32UNPREFIXED :
4795 fields->f_bitno32_unprefixed = value;
4796 break;
4797 case M32C_OPERAND_DSP_10_U6 :
4798 fields->f_dsp_10_u6 = value;
4799 break;
4800 case M32C_OPERAND_DSP_16_S16 :
4801 fields->f_dsp_16_s16 = value;
4802 break;
4803 case M32C_OPERAND_DSP_16_S8 :
4804 fields->f_dsp_16_s8 = value;
4805 break;
4806 case M32C_OPERAND_DSP_16_U16 :
4807 fields->f_dsp_16_u16 = value;
4808 break;
4809 case M32C_OPERAND_DSP_16_U20 :
4810 fields->f_dsp_16_u24 = value;
4811 break;
4812 case M32C_OPERAND_DSP_16_U24 :
4813 fields->f_dsp_16_u24 = value;
4814 break;
4815 case M32C_OPERAND_DSP_16_U8 :
4816 fields->f_dsp_16_u8 = value;
4817 break;
4818 case M32C_OPERAND_DSP_24_S16 :
4819 fields->f_dsp_24_s16 = value;
4820 break;
4821 case M32C_OPERAND_DSP_24_S8 :
4822 fields->f_dsp_24_s8 = value;
4823 break;
4824 case M32C_OPERAND_DSP_24_U16 :
4825 fields->f_dsp_24_u16 = value;
4826 break;
4827 case M32C_OPERAND_DSP_24_U20 :
4828 fields->f_dsp_24_u24 = value;
4829 break;
4830 case M32C_OPERAND_DSP_24_U24 :
4831 fields->f_dsp_24_u24 = value;
4832 break;
4833 case M32C_OPERAND_DSP_24_U8 :
4834 fields->f_dsp_24_u8 = value;
4835 break;
4836 case M32C_OPERAND_DSP_32_S16 :
4837 fields->f_dsp_32_s16 = value;
4838 break;
4839 case M32C_OPERAND_DSP_32_S8 :
4840 fields->f_dsp_32_s8 = value;
4841 break;
4842 case M32C_OPERAND_DSP_32_U16 :
4843 fields->f_dsp_32_u16 = value;
4844 break;
4845 case M32C_OPERAND_DSP_32_U20 :
4846 fields->f_dsp_32_u24 = value;
4847 break;
4848 case M32C_OPERAND_DSP_32_U24 :
4849 fields->f_dsp_32_u24 = value;
4850 break;
4851 case M32C_OPERAND_DSP_32_U8 :
4852 fields->f_dsp_32_u8 = value;
4853 break;
4854 case M32C_OPERAND_DSP_40_S16 :
4855 fields->f_dsp_40_s16 = value;
4856 break;
4857 case M32C_OPERAND_DSP_40_S8 :
4858 fields->f_dsp_40_s8 = value;
4859 break;
4860 case M32C_OPERAND_DSP_40_U16 :
4861 fields->f_dsp_40_u16 = value;
4862 break;
4863 case M32C_OPERAND_DSP_40_U20 :
4864 fields->f_dsp_40_u20 = value;
4865 break;
4866 case M32C_OPERAND_DSP_40_U24 :
4867 fields->f_dsp_40_u24 = value;
4868 break;
4869 case M32C_OPERAND_DSP_40_U8 :
4870 fields->f_dsp_40_u8 = value;
4871 break;
4872 case M32C_OPERAND_DSP_48_S16 :
4873 fields->f_dsp_48_s16 = value;
4874 break;
4875 case M32C_OPERAND_DSP_48_S8 :
4876 fields->f_dsp_48_s8 = value;
4877 break;
4878 case M32C_OPERAND_DSP_48_U16 :
4879 fields->f_dsp_48_u16 = value;
4880 break;
4881 case M32C_OPERAND_DSP_48_U20 :
4882 fields->f_dsp_48_u20 = value;
4883 break;
4884 case M32C_OPERAND_DSP_48_U24 :
4885 fields->f_dsp_48_u24 = value;
4886 break;
4887 case M32C_OPERAND_DSP_48_U8 :
4888 fields->f_dsp_48_u8 = value;
4889 break;
4890 case M32C_OPERAND_DSP_8_S24 :
4891 fields->f_dsp_8_s24 = value;
4892 break;
4893 case M32C_OPERAND_DSP_8_S8 :
4894 fields->f_dsp_8_s8 = value;
4895 break;
4896 case M32C_OPERAND_DSP_8_U16 :
4897 fields->f_dsp_8_u16 = value;
4898 break;
4899 case M32C_OPERAND_DSP_8_U24 :
4900 fields->f_dsp_8_u24 = value;
4901 break;
4902 case M32C_OPERAND_DSP_8_U6 :
4903 fields->f_dsp_8_u6 = value;
4904 break;
4905 case M32C_OPERAND_DSP_8_U8 :
4906 fields->f_dsp_8_u8 = value;
4907 break;
4908 case M32C_OPERAND_DST16AN :
4909 fields->f_dst16_an = value;
4910 break;
4911 case M32C_OPERAND_DST16AN_S :
4912 fields->f_dst16_an_s = value;
4913 break;
4914 case M32C_OPERAND_DST16ANHI :
4915 fields->f_dst16_an = value;
4916 break;
4917 case M32C_OPERAND_DST16ANQI :
4918 fields->f_dst16_an = value;
4919 break;
4920 case M32C_OPERAND_DST16ANQI_S :
4921 fields->f_dst16_rn_QI_s = value;
4922 break;
4923 case M32C_OPERAND_DST16ANSI :
4924 fields->f_dst16_an = value;
4925 break;
4926 case M32C_OPERAND_DST16RNEXTQI :
4927 fields->f_dst16_rn_ext = value;
4928 break;
4929 case M32C_OPERAND_DST16RNHI :
4930 fields->f_dst16_rn = value;
4931 break;
4932 case M32C_OPERAND_DST16RNQI :
4933 fields->f_dst16_rn = value;
4934 break;
4935 case M32C_OPERAND_DST16RNQI_S :
4936 fields->f_dst16_rn_QI_s = value;
4937 break;
4938 case M32C_OPERAND_DST16RNSI :
4939 fields->f_dst16_rn = value;
4940 break;
4941 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4942 fields->f_dst32_an_unprefixed = value;
4943 break;
4944 case M32C_OPERAND_DST32ANPREFIXED :
4945 fields->f_dst32_an_prefixed = value;
4946 break;
4947 case M32C_OPERAND_DST32ANPREFIXEDHI :
4948 fields->f_dst32_an_prefixed = value;
4949 break;
4950 case M32C_OPERAND_DST32ANPREFIXEDQI :
4951 fields->f_dst32_an_prefixed = value;
4952 break;
4953 case M32C_OPERAND_DST32ANPREFIXEDSI :
4954 fields->f_dst32_an_prefixed = value;
4955 break;
4956 case M32C_OPERAND_DST32ANUNPREFIXED :
4957 fields->f_dst32_an_unprefixed = value;
4958 break;
4959 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4960 fields->f_dst32_an_unprefixed = value;
4961 break;
4962 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4963 fields->f_dst32_an_unprefixed = value;
4964 break;
4965 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4966 fields->f_dst32_an_unprefixed = value;
4967 break;
4968 case M32C_OPERAND_DST32R0HI_S :
4969 break;
4970 case M32C_OPERAND_DST32R0QI_S :
4971 break;
4972 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4973 fields->f_dst32_rn_ext_unprefixed = value;
4974 break;
4975 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4976 fields->f_dst32_rn_ext_unprefixed = value;
4977 break;
4978 case M32C_OPERAND_DST32RNPREFIXEDHI :
4979 fields->f_dst32_rn_prefixed_HI = value;
4980 break;
4981 case M32C_OPERAND_DST32RNPREFIXEDQI :
4982 fields->f_dst32_rn_prefixed_QI = value;
4983 break;
4984 case M32C_OPERAND_DST32RNPREFIXEDSI :
4985 fields->f_dst32_rn_prefixed_SI = value;
4986 break;
4987 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4988 fields->f_dst32_rn_unprefixed_HI = value;
4989 break;
4990 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4991 fields->f_dst32_rn_unprefixed_QI = value;
4992 break;
4993 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4994 fields->f_dst32_rn_unprefixed_SI = value;
4995 break;
4996 case M32C_OPERAND_G :
4997 break;
4998 case M32C_OPERAND_IMM_12_S4 :
4999 fields->f_imm_12_s4 = value;
5000 break;
5001 case M32C_OPERAND_IMM_12_S4N :
5002 fields->f_imm_12_s4 = value;
5003 break;
5004 case M32C_OPERAND_IMM_13_U3 :
5005 fields->f_imm_13_u3 = value;
5006 break;
5007 case M32C_OPERAND_IMM_16_HI :
5008 fields->f_dsp_16_s16 = value;
5009 break;
5010 case M32C_OPERAND_IMM_16_QI :
5011 fields->f_dsp_16_s8 = value;
5012 break;
5013 case M32C_OPERAND_IMM_16_SI :
5014 fields->f_dsp_16_s32 = value;
5015 break;
5016 case M32C_OPERAND_IMM_20_S4 :
5017 fields->f_imm_20_s4 = value;
5018 break;
5019 case M32C_OPERAND_IMM_24_HI :
5020 fields->f_dsp_24_s16 = value;
5021 break;
5022 case M32C_OPERAND_IMM_24_QI :
5023 fields->f_dsp_24_s8 = value;
5024 break;
5025 case M32C_OPERAND_IMM_24_SI :
5026 fields->f_dsp_24_s32 = value;
5027 break;
5028 case M32C_OPERAND_IMM_32_HI :
5029 fields->f_dsp_32_s16 = value;
5030 break;
5031 case M32C_OPERAND_IMM_32_QI :
5032 fields->f_dsp_32_s8 = value;
5033 break;
5034 case M32C_OPERAND_IMM_32_SI :
5035 fields->f_dsp_32_s32 = value;
5036 break;
5037 case M32C_OPERAND_IMM_40_HI :
5038 fields->f_dsp_40_s16 = value;
5039 break;
5040 case M32C_OPERAND_IMM_40_QI :
5041 fields->f_dsp_40_s8 = value;
5042 break;
5043 case M32C_OPERAND_IMM_40_SI :
5044 fields->f_dsp_40_s32 = value;
5045 break;
5046 case M32C_OPERAND_IMM_48_HI :
5047 fields->f_dsp_48_s16 = value;
5048 break;
5049 case M32C_OPERAND_IMM_48_QI :
5050 fields->f_dsp_48_s8 = value;
5051 break;
5052 case M32C_OPERAND_IMM_48_SI :
5053 fields->f_dsp_48_s32 = value;
5054 break;
5055 case M32C_OPERAND_IMM_56_HI :
5056 fields->f_dsp_56_s16 = value;
5057 break;
5058 case M32C_OPERAND_IMM_56_QI :
5059 fields->f_dsp_56_s8 = value;
5060 break;
5061 case M32C_OPERAND_IMM_64_HI :
5062 fields->f_dsp_64_s16 = value;
5063 break;
5064 case M32C_OPERAND_IMM_8_HI :
5065 fields->f_dsp_8_s16 = value;
5066 break;
5067 case M32C_OPERAND_IMM_8_QI :
5068 fields->f_dsp_8_s8 = value;
5069 break;
5070 case M32C_OPERAND_IMM_8_S4 :
5071 fields->f_imm_8_s4 = value;
5072 break;
5073 case M32C_OPERAND_IMM_8_S4N :
5074 fields->f_imm_8_s4 = value;
5075 break;
5076 case M32C_OPERAND_IMM_SH_12_S4 :
5077 fields->f_imm_12_s4 = value;
5078 break;
5079 case M32C_OPERAND_IMM_SH_20_S4 :
5080 fields->f_imm_20_s4 = value;
5081 break;
5082 case M32C_OPERAND_IMM_SH_8_S4 :
5083 fields->f_imm_8_s4 = value;
5084 break;
5085 case M32C_OPERAND_IMM1_S :
5086 fields->f_imm1_S = value;
5087 break;
5088 case M32C_OPERAND_IMM3_S :
5089 fields->f_imm3_S = value;
5090 break;
5091 case M32C_OPERAND_LAB_16_8 :
5092 fields->f_lab_16_8 = value;
5093 break;
5094 case M32C_OPERAND_LAB_24_8 :
5095 fields->f_lab_24_8 = value;
5096 break;
5097 case M32C_OPERAND_LAB_32_8 :
5098 fields->f_lab_32_8 = value;
5099 break;
5100 case M32C_OPERAND_LAB_40_8 :
5101 fields->f_lab_40_8 = value;
5102 break;
5103 case M32C_OPERAND_LAB_5_3 :
5104 fields->f_lab_5_3 = value;
5105 break;
5106 case M32C_OPERAND_LAB_8_16 :
5107 fields->f_lab_8_16 = value;
5108 break;
5109 case M32C_OPERAND_LAB_8_24 :
5110 fields->f_lab_8_24 = value;
5111 break;
5112 case M32C_OPERAND_LAB_8_8 :
5113 fields->f_lab_8_8 = value;
5114 break;
5115 case M32C_OPERAND_LAB32_JMP_S :
5116 fields->f_lab32_jmp_s = value;
5117 break;
5118 case M32C_OPERAND_Q :
5119 break;
5120 case M32C_OPERAND_R0 :
5121 break;
5122 case M32C_OPERAND_R0H :
5123 break;
5124 case M32C_OPERAND_R0L :
5125 break;
5126 case M32C_OPERAND_R1 :
5127 break;
5128 case M32C_OPERAND_R1R2R0 :
5129 break;
5130 case M32C_OPERAND_R2 :
5131 break;
5132 case M32C_OPERAND_R2R0 :
5133 break;
5134 case M32C_OPERAND_R3 :
5135 break;
5136 case M32C_OPERAND_R3R1 :
5137 break;
5138 case M32C_OPERAND_REGSETPOP :
5139 fields->f_8_8 = value;
5140 break;
5141 case M32C_OPERAND_REGSETPUSH :
5142 fields->f_8_8 = value;
5143 break;
5144 case M32C_OPERAND_RN16_PUSH_S :
5145 fields->f_4_1 = value;
5146 break;
5147 case M32C_OPERAND_S :
5148 break;
5149 case M32C_OPERAND_SRC16AN :
5150 fields->f_src16_an = value;
5151 break;
5152 case M32C_OPERAND_SRC16ANHI :
5153 fields->f_src16_an = value;
5154 break;
5155 case M32C_OPERAND_SRC16ANQI :
5156 fields->f_src16_an = value;
5157 break;
5158 case M32C_OPERAND_SRC16RNHI :
5159 fields->f_src16_rn = value;
5160 break;
5161 case M32C_OPERAND_SRC16RNQI :
5162 fields->f_src16_rn = value;
5163 break;
5164 case M32C_OPERAND_SRC32ANPREFIXED :
5165 fields->f_src32_an_prefixed = value;
5166 break;
5167 case M32C_OPERAND_SRC32ANPREFIXEDHI :
5168 fields->f_src32_an_prefixed = value;
5169 break;
5170 case M32C_OPERAND_SRC32ANPREFIXEDQI :
5171 fields->f_src32_an_prefixed = value;
5172 break;
5173 case M32C_OPERAND_SRC32ANPREFIXEDSI :
5174 fields->f_src32_an_prefixed = value;
5175 break;
5176 case M32C_OPERAND_SRC32ANUNPREFIXED :
5177 fields->f_src32_an_unprefixed = value;
5178 break;
5179 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
5180 fields->f_src32_an_unprefixed = value;
5181 break;
5182 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
5183 fields->f_src32_an_unprefixed = value;
5184 break;
5185 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
5186 fields->f_src32_an_unprefixed = value;
5187 break;
5188 case M32C_OPERAND_SRC32RNPREFIXEDHI :
5189 fields->f_src32_rn_prefixed_HI = value;
5190 break;
5191 case M32C_OPERAND_SRC32RNPREFIXEDQI :
5192 fields->f_src32_rn_prefixed_QI = value;
5193 break;
5194 case M32C_OPERAND_SRC32RNPREFIXEDSI :
5195 fields->f_src32_rn_prefixed_SI = value;
5196 break;
5197 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
5198 fields->f_src32_rn_unprefixed_HI = value;
5199 break;
5200 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
5201 fields->f_src32_rn_unprefixed_QI = value;
5202 break;
5203 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
5204 fields->f_src32_rn_unprefixed_SI = value;
5205 break;
5206 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
5207 fields->f_5_1 = value;
5208 break;
5209 case M32C_OPERAND_X :
5210 break;
5211 case M32C_OPERAND_Z :
5212 break;
5213 case M32C_OPERAND_COND16_16 :
5214 fields->f_dsp_16_u8 = value;
5215 break;
5216 case M32C_OPERAND_COND16_24 :
5217 fields->f_dsp_24_u8 = value;
5218 break;
5219 case M32C_OPERAND_COND16_32 :
5220 fields->f_dsp_32_u8 = value;
5221 break;
5222 case M32C_OPERAND_COND16C :
5223 fields->f_cond16 = value;
5224 break;
5225 case M32C_OPERAND_COND16J :
5226 fields->f_cond16 = value;
5227 break;
5228 case M32C_OPERAND_COND16J5 :
5229 fields->f_cond16j_5 = value;
5230 break;
5231 case M32C_OPERAND_COND32 :
5232 fields->f_cond32 = value;
5233 break;
5234 case M32C_OPERAND_COND32_16 :
5235 fields->f_dsp_16_u8 = value;
5236 break;
5237 case M32C_OPERAND_COND32_24 :
5238 fields->f_dsp_24_u8 = value;
5239 break;
5240 case M32C_OPERAND_COND32_32 :
5241 fields->f_dsp_32_u8 = value;
5242 break;
5243 case M32C_OPERAND_COND32_40 :
5244 fields->f_dsp_40_u8 = value;
5245 break;
5246 case M32C_OPERAND_COND32J :
5247 fields->f_cond32j = value;
5248 break;
5249 case M32C_OPERAND_CR1_PREFIXED_32 :
5250 fields->f_21_3 = value;
5251 break;
5252 case M32C_OPERAND_CR1_UNPREFIXED_32 :
5253 fields->f_13_3 = value;
5254 break;
5255 case M32C_OPERAND_CR16 :
5256 fields->f_9_3 = value;
5257 break;
5258 case M32C_OPERAND_CR2_32 :
5259 fields->f_13_3 = value;
5260 break;
5261 case M32C_OPERAND_CR3_PREFIXED_32 :
5262 fields->f_21_3 = value;
5263 break;
5264 case M32C_OPERAND_CR3_UNPREFIXED_32 :
5265 fields->f_13_3 = value;
5266 break;
5267 case M32C_OPERAND_FLAGS16 :
5268 fields->f_9_3 = value;
5269 break;
5270 case M32C_OPERAND_FLAGS32 :
5271 fields->f_13_3 = value;
5272 break;
5273 case M32C_OPERAND_SCCOND32 :
5274 fields->f_cond16 = value;
5275 break;
5276 case M32C_OPERAND_SIZE :
5277 break;
5278
5279 default :
5280 /* xgettext:c-format */
5281 opcodes_error_handler
5282 (_("internal error: unrecognized field %d while setting vma operand"),
5283 opindex);
5284 abort ();
5285 }
5286 }
5287
5288 /* Function to call before using the instruction builder tables. */
5289
5290 void
5291 m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
5292 {
5293 cd->insert_handlers = & m32c_cgen_insert_handlers[0];
5294 cd->extract_handlers = & m32c_cgen_extract_handlers[0];
5295
5296 cd->insert_operand = m32c_cgen_insert_operand;
5297 cd->extract_operand = m32c_cgen_extract_operand;
5298
5299 cd->get_int_operand = m32c_cgen_get_int_operand;
5300 cd->set_int_operand = m32c_cgen_set_int_operand;
5301 cd->get_vma_operand = m32c_cgen_get_vma_operand;
5302 cd->set_vma_operand = m32c_cgen_set_vma_operand;
5303 }
The GNU Binutils are a collection of binary tools.