sim/testsuite/riscv/c-ext.s

   1 # Basic Tests for C extension.
   2 # mach: riscv32 riscv64
   3 # sim(riscv32): --model RV32IC
   4 # sim(riscv64): --model RV64IC
   5 # ld(riscv32): -m elf32lriscv
   6 # ld(riscv64): -m elf64lriscv
   7 # as(riscv32): -march=rv32ic
   8 # as(riscv64): -march=rv64ic
   9
  10 .include "testutils.inc"
  11
  12         .data
  13         .align 4
  14 _data:
  15         .word   1234
  16         .word   0
  17
  18         start
  19         la      a0, _data
  20
  21         # Test load-store instructions.
  22         c.lw    a1,0(a0)
  23         c.sw    a1,4(a0)
  24         c.lw    a2,4(a0)
  25
  26         li      a5,1234
  27         bne     a1,a5,test_fail
  28         bne     a2,a5,test_fail
  29
  30         # Test basic arithmetic.
  31         c.li    a0,0
  32         c.li    a1,1
  33         c.addi  a0,1
  34         c.addi  a0,-1
  35         c.add   a0,a1
  36         c.sub   a0,a1
  37
  38         li      a5,1
  39         bne     a0,x0,test_fail
  40         bne     a1,a5,test_fail
  41
  42         # Test logical operations.
  43         c.li    a0,7
  44         c.li    a1,7
  45         c.li    a2,4
  46         c.li    a3,3
  47         c.li    a4,3
  48         c.andi  a0,3
  49         c.and   a1,a0
  50         c.or    a2,a3
  51         c.xor   a4,a4
  52
  53         li      a5,3
  54         bne     a0,a5,test_fail
  55         bne     a1,a5,test_fail
  56         bne     a4,x0,test_fail
  57         li      a5,7
  58         bne     a2,a5,test_fail
  59
  60         # Test shift operations.
  61         c.li    a0,4
  62         c.li    a1,4
  63         c.slli  a0,1
  64         c.srli  a1,1
  65
  66         li      a5,8
  67         bne     a0,a5,test_fail
  68         li      a5,2
  69         bne     a1,a5,test_fail
  70
  71         # Test jump instruction.
  72         c.j     1f
  73
  74         j       test_fail
  75 1:
  76         la      a0,2f
  77
  78         # Test jump register instruction.
  79         c.jr    a0
  80
  81         j       test_fail
  82
  83 2:
  84         # Test branch instruction.
  85         c.li    a0,1
  86         c.beqz  a0,test_fail
  87         c.li    a0,0
  88         c.bnez  a0,test_fail
  89
  90 test_pass:
  91         pass
  92         fail
  93
  94 test_fail:
  95         fail