sim/testsuite/sh/movua.s

   1 # sh testcase for movua
   2 # mach:  all
   3 # as(sh):       -defsym sim_cpu=0
   4 # as(shdsp):    -defsym sim_cpu=1 -dsp
   5
   6         .include "testutils.inc"
   7
   8         start
   9 movua_1:
  10         set_grs_a5a5
  11         mov.l   srcp, r1
  12         movua.l @r1, r0
  13 .ifdef LITTLE
  14         assertreg0      0x03020100
  15 .else
  16         assertreg0      0x00010203
  17 .endif
  18
  19         add     #1, r1
  20         movua.l @r1, r0
  21 .ifdef LITTLE
  22         assertreg0      0x04030201
  23 .else
  24         assertreg0      0x01020304
  25 .endif
  26
  27         add     #1, r1
  28         movua.l @r1, r0
  29 .ifdef LITTLE
  30         assertreg0      0x05040302
  31 .else
  32         assertreg0      0x02030405
  33 .endif
  34
  35         add     #1, r1
  36         movua.l @r1, r0
  37 .ifdef LITTLE
  38         assertreg0      0x06050403
  39 .else
  40         assertreg0      0x03040506
  41 .endif
  42
  43         add     #1, r1
  44         movua.l @r1, r0
  45 .ifdef LITTLE
  46         assertreg0      0x07060504
  47 .else
  48         assertreg0      0x04050607
  49 .endif
  50
  51         add     #1, r1
  52         movua.l @r1, r0
  53 .ifdef LITTLE
  54         assertreg0      0x08070605
  55 .else
  56         assertreg0      0x05060708
  57 .endif
  58
  59         add     #1, r1
  60         movua.l @r1, r0
  61 .ifdef LITTLE
  62         assertreg0      0x09080706
  63 .else
  64         assertreg0      0x06070809
  65 .endif
  66
  67         add     #1, r1
  68         movua.l @r1, r0
  69 .ifdef LITTLE
  70         assertreg0      0x0a090807
  71 .else
  72         assertreg0      0x0708090a
  73 .endif
  74
  75         add     #1, r1
  76         movua.l @r1, r0
  77 .ifdef LITTLE
  78         assertreg0      0x0b0a0908
  79 .else
  80         assertreg0      0x08090a0b
  81 .endif
  82
  83         add     #1, r1
  84         movua.l @r1, r0
  85 .ifdef LITTLE
  86         assertreg0      0x0c0b0a09
  87 .else
  88         assertreg0      0x090a0b0c
  89 .endif
  90
  91         add     #1, r1
  92         movua.l @r1, r0
  93 .ifdef LITTLE
  94         assertreg0      0x0d0c0b0a
  95 .else
  96         assertreg0      0x0a0b0c0d
  97 .endif
  98
  99         add     #1, r1
 100         movua.l @r1, r0
 101 .ifdef LITTLE
 102         assertreg0      0x0e0d0c0b
 103 .else
 104         assertreg0      0x0b0c0d0e
 105 .endif
 106
 107         add     #1, r1
 108         movua.l @r1, r0
 109 .ifdef LITTLE
 110         assertreg0      0x0f0e0d0c
 111 .else
 112         assertreg0      0x0c0d0e0f
 113 .endif
 114
 115         assertreg       src+12, r1
 116         test_gr_a5a5    r2
 117         test_gr_a5a5    r3
 118         test_gr_a5a5    r4
 119         test_gr_a5a5    r5
 120         test_gr_a5a5    r6
 121         test_gr_a5a5    r7
 122         test_gr_a5a5    r8
 123         test_gr_a5a5    r9
 124         test_gr_a5a5    r10
 125         test_gr_a5a5    r11
 126         test_gr_a5a5    r12
 127         test_gr_a5a5    r13
 128         test_gr_a5a5    r14
 129
 130         bra     movua_4:
 131         nop
 132
 133         .align 0
 134 src:    .byte   0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16
 135         .align 2
 136 srcp:   .long   src
 137
 138 movua_4:
 139         set_grs_a5a5
 140         mov.l   srcp2, r1
 141         movua.l @r1+, r0
 142 .ifdef LITTLE
 143         assertreg0      0x03020100
 144 .else
 145         assertreg0      0x00010203
 146 .endif
 147         assertreg       src+4, r1
 148
 149         mov.l   srcp2, r1
 150         add     #1, r1
 151         movua.l @r1+, r0
 152 .ifdef LITTLE
 153         assertreg0      0x04030201
 154 .else
 155         assertreg0      0x01020304
 156 .endif
 157         assertreg       src+5, r1
 158
 159         mov.l   srcp2, r1
 160         add     #2, r1
 161         movua.l @r1+, r0
 162 .ifdef LITTLE
 163         assertreg0      0x05040302
 164 .else
 165         assertreg0      0x02030405
 166 .endif
 167         assertreg       src+6, r1
 168
 169         mov.l   srcp2, r1
 170         add     #3, r1
 171         movua.l @r1+, r0
 172 .ifdef LITTLE
 173         assertreg0      0x06050403
 174 .else
 175         assertreg0      0x03040506
 176 .endif
 177         assertreg       src+7, r1
 178
 179         test_gr_a5a5    r2
 180         test_gr_a5a5    r3
 181         test_gr_a5a5    r4
 182         test_gr_a5a5    r5
 183         test_gr_a5a5    r6
 184         test_gr_a5a5    r7
 185         test_gr_a5a5    r8
 186         test_gr_a5a5    r9
 187         test_gr_a5a5    r10
 188         test_gr_a5a5    r11
 189         test_gr_a5a5    r12
 190         test_gr_a5a5    r13
 191         test_gr_a5a5    r14
 192
 193         pass
 194         exit 0
 195
 196 srcp2:  .long   src
 197