sim/testsuite/bfin/c_br_preg_killed_ac.s

   1 //Original:/testcases/seq/c_br_preg_killed_ac/c_br_preg_killed_ac.dsp
   2 // Spec Reference: brcc kills  data cache hits
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8         imm32 r0, 0x00000000;
   9         imm32 r1, 0x00000001;
  10         imm32 r2, 0x00000002;
  11         imm32 r3, 0x00000003;
  12         imm32 r4, 0x00000004;
  13         imm32 r5, 0x00000005;
  14         imm32 r6, 0x00000006;
  15         imm32 r7, 0x00000007;
  16         imm32 p1, 0x00000011;
  17         imm32 p2, 0x00000012;
  18
  19         P4 = 4;
  20         P2 = 2;
  21         loadsym P5, DATA0;
  22         loadsym I0, DATA1;
  23
  24 begin:
  25         ASTAT = R0;             // clear CC
  26         IF !CC JUMP LABEL1;     // (bp);
  27         CC = R4 < R5;           // CC FLAG   killed
  28         R1 = 21;
  29 LABEL1:
  30         JUMP ( PC + P4 );       //brf LABEL2;  // (bp);
  31         CC = ! CC;
  32 LABEL2:
  33         JUMP ( PC + P4 );       //brf LABEL3;  //  (bp);
  34         R2 = - R2;              // ALU2op    killed
  35 LABEL3:
  36         JUMP ( PC + P4 );       //brf LABEL4;
  37         R3 <<= 2;               // LOGI2op   killed
  38 LABEL4:
  39         JUMP ( PC + P4 );       //brf LABEL5;
  40         R0 = R1 + R2;           // COMP3op   killed
  41 LABEL5:
  42         JUMP ( PC + P4 );       //brf LABEL6;
  43         R4 += 3;                // COMPI2opD killed
  44 LABEL6:
  45         JUMP ( PC + P4 );       //brf LABEL7;  // (bp);
  46         R5 = 25;                // LDIMMHALF killed
  47 LABEL7:
  48         JUMP ( PC + P4 );       //brf LABEL8;
  49         R6 = CC;                // CC2REG    killed
  50 LABEL8:
  51         JUMP ( PC + P4 );       //brf LABEL9;
  52         JUMP ( PC + P2 );       //BAD1;              // UJUMP     killed
  53 LABEL9:
  54         JUMP ( PC + P4 );       //brf LABELCHK1;
  55 BAD1:
  56         R7 = [ P5 ];            // LDST      killed
  57
  58 LABELCHK1:
  59         CHECKREG r0, 0x00000000;
  60         CHECKREG r1, 0x00000001;
  61         CHECKREG r2, 0x00000002;
  62         CHECKREG r3, 0x00000003;
  63         CHECKREG r4, 0x00000004;
  64         CHECKREG r5, 0x00000005;
  65         CHECKREG r6, 0x00000006;
  66         CHECKREG r7, 0x00000007;
  67
  68         pass
  69
  70         .data
  71 DATA0:
  72         .dd 0x000a0000
  73         .dd 0x000b0001
  74         .dd 0x000c0002
  75         .dd 0x000d0003
  76         .dd 0x000e0004
  77
  78 DATA1:
  79         .dd 0x00f00100
  80         .dd 0x00e00101
  81         .dd 0x00d00102
  82         .dd 0x00c00103