ld: Move the .note.build-id section to near the start of the memory map.
[binutils-gdb.git] / sim / testsuite / bfin / c_brcc_brf_brt_bp.s
blobc9f2945171673e746c1b6066b89bbdd331cc5dae
1 //Original:/testcases/core/c_brcc_brf_brt_bp/c_brcc_brf_brt_bp.dsp
2 // Spec Reference: brcc brfbrt
3 # mach: bfin
5 .include "testutils.inc"
6 start
11 imm32 r0, 0x00000000;
12 imm32 r1, 0x00000000;
13 imm32 r2, 0x00000000;
14 imm32 r3, 0x00000000;
15 imm32 r4, 0x00000444;
16 imm32 r5, 0x00000555;
17 imm32 r6, 0x00000000;
18 imm32 r7, 0x00000000;
20 begin:
21 ASTAT = R0; // clear cc
22 CC = R4 < R5;
23 IF CC JUMP good1 (BP); // branch on true (should branch)
24 R1 = 1; // if go here, error
25 good1: IF !CC JUMP bad1 (BP); // branch on false (should not branch)
26 CC = ! CC;
27 IF !CC JUMP good2; // should branch here
28 bad1: R2 = 2; // if go here, error
29 good2: CC = ! CC; // clear cc=0
30 IF CC JUMP good3 (BP); // branch on false (should branch)
31 R3 = 3; // if go here, error
32 good3: IF !CC JUMP bad2 (BP); // branch on true (should not branch)
33 IF CC JUMP end; // we're done
34 bad2: R0 = 8; // if go here error
36 end:
38 CHECKREG r0, 0x00000000;
39 CHECKREG r1, 0x00000000;
40 CHECKREG r2, 0x00000000;
41 CHECKREG r3, 0x00000000;
42 CHECKREG r4, 0x00000444;
43 CHECKREG r5, 0x00000555;
44 CHECKREG r6, 0x00000000;
45 CHECKREG r7, 0x00000000;
47 pass