ld: Move the .note.build-id section to near the start of the memory map.
[binutils-gdb.git] / sim / testsuite / bfin / c_brcc_brf_nbp.s
blob52eb0f3c39428d24f3b8ddccfb796e6ffd93384e
1 //Original:/testcases/core/c_brcc_brf_nbp/c_brcc_brf_nbp.dsp
2 // Spec Reference: brcc brf no bp
3 # mach: bfin
5 .include "testutils.inc"
6 start
10 imm32 r0, 0x00000000;
11 imm32 r1, 0x00000000;
12 imm32 r2, 0x00000000;
13 imm32 r3, 0x00000000;
14 imm32 r4, 0x00000000;
15 imm32 r5, 0x00000000;
16 imm32 r6, 0x00000000;
17 imm32 r7, 0x00000000;
19 begin:
20 ASTAT = R0; // clear cc
21 IF !CC JUMP good1; // branch on false (should branch)
22 CC = ! CC; // set cc=1
23 R1 = 1; // if go here, error
24 good1: IF !CC JUMP good2; // branch on false (should branch)
25 bad1: R2 = 2; // if go here, error
26 good2: CC = ! CC; //
27 IF !CC JUMP bad2; // branch on false (should not branch)
28 CC = ! CC;
29 IF !CC JUMP good3; // branch on false (should branch)
30 R3 = 3; // if go here, error
31 good3: IF !CC JUMP end; // branch on true (should branch)
32 bad2: R4 = 4; // if go here error
34 end:
36 CHECKREG r0, 0x00000000;
37 CHECKREG r1, 0x00000000;
38 CHECKREG r2, 0x00000000;
39 CHECKREG r3, 0x00000000;
40 CHECKREG r4, 0x00000000;
41 CHECKREG r5, 0x00000000;
42 CHECKREG r6, 0x00000000;
43 CHECKREG r7, 0x00000000;
45 pass