sim/testsuite/bfin/c_compi2opd_dr_eq_i7_n.s

   1 //Original:/testcases/core/c_compi2opd_dr_eq_i7_n/c_compi2opd_dr_eq_i7_n.dsp
   2 // Spec Reference: compi2opd dregs = imm7 negative
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8
   9 INIT_R_REGS 0;
  10
  11
  12 R0 = -0;
  13 R1 = -1;
  14 R2 = -2;
  15 R3 = -3;
  16 R4 = -4;
  17 R5 = -5;
  18 R6 = -6;
  19 R7 = -7;
  20 CHECKREG r0, -0;
  21 CHECKREG r1, -1;
  22 CHECKREG r2, -2;
  23 CHECKREG r3, -3;
  24 CHECKREG r4, -4;
  25 CHECKREG r5, -5;
  26 CHECKREG r6, -6;
  27 CHECKREG r7, -7;
  28
  29 R0 = -8;
  30 R1 = -9;
  31 R2 = -10;
  32 R3 = -11;
  33 R4 = -12;
  34 R5 = -13;
  35 R6 = -14;
  36 R7 = -15;
  37 CHECKREG r0, -8;
  38 CHECKREG r1, -9;
  39 CHECKREG r2, -10;
  40 CHECKREG r3, -11;
  41 CHECKREG r4, -12;
  42 CHECKREG r5, -13;
  43 CHECKREG r6, -14;
  44 CHECKREG r7, -15;
  45
  46 R0 = -16;
  47 R1 = -17;
  48 R2 = -18;
  49 R3 = -19;
  50 R4 = -20;
  51 R5 = -21;
  52 R6 = -22;
  53 R7 = -23;
  54 CHECKREG r0, -16;
  55 CHECKREG r1, -17;
  56 CHECKREG r2, -18;
  57 CHECKREG r3, -19;
  58 CHECKREG r4, -20;
  59 CHECKREG r5, -21;
  60 CHECKREG r6, -22;
  61 CHECKREG r7, -23;
  62
  63 R0 = -24;
  64 R1 = -25;
  65 R2 = -26;
  66 R3 = -27;
  67 R4 = -28;
  68 R5 = -29;
  69 R6 = -30;
  70 R7 = -31;
  71 CHECKREG r0, -24;
  72 CHECKREG r1, -25;
  73 CHECKREG r2, -26;
  74 CHECKREG r3, -27;
  75 CHECKREG r4, -28;
  76 CHECKREG r5, -29;
  77 CHECKREG r6, -30;
  78 CHECKREG r7, -31;
  79
  80 R0 = -32;
  81 R1 = -33;
  82 R2 = -34;
  83 R3 = -35;
  84 R4 = -36;
  85 R5 = -37;
  86 R6 = -38;
  87 R7 = -39;
  88 CHECKREG r0, -32;
  89 CHECKREG r1, -33;
  90 CHECKREG r2, -34;
  91 CHECKREG r3, -35;
  92 CHECKREG r4, -36;
  93 CHECKREG r5, -37;
  94 CHECKREG r6, -38;
  95 CHECKREG r7, -39;
  96
  97 R0 = -40;
  98 R1 = -41;
  99 R2 = -42;
 100 R3 = -43;
 101 R4 = -44;
 102 R5 = -45;
 103 R6 = -46;
 104 R7 = -47;
 105 CHECKREG r0, -40;
 106 CHECKREG r1, -41;
 107 CHECKREG r2, -42;
 108 CHECKREG r3, -43;
 109 CHECKREG r4, -44;
 110 CHECKREG r5, -45;
 111 CHECKREG r6, -46;
 112 CHECKREG r7, -47;
 113
 114 R0 = -48;
 115 R1 = -49;
 116 R2 = -50;
 117 R3 = -51;
 118 R4 = -52;
 119 R5 = -53;
 120 R6 = -54;
 121 R7 = -55;
 122 CHECKREG r0, -48;
 123 CHECKREG r1, -49;
 124 CHECKREG r2, -50;
 125 CHECKREG r3, -51;
 126 CHECKREG r4, -52;
 127 CHECKREG r5, -53;
 128 CHECKREG r6, -54;
 129 CHECKREG r7, -55;
 130
 131 R0 = -56;
 132 R1 = -57;
 133 R2 = -58;
 134 R3 = -59;
 135 R4 = -60;
 136 R5 = -61;
 137 R6 = -62;
 138 R7 = -63;
 139 CHECKREG r0, -56;
 140 CHECKREG r1, -57;
 141 CHECKREG r2, -58;
 142 CHECKREG r3, -59;
 143 CHECKREG r4, -60;
 144 CHECKREG r5, -61;
 145 CHECKREG r6, -62;
 146 CHECKREG r7, -63;
 147
 148 R0 = -64;
 149 R1 = -64;
 150 R2 = -64;
 151 R3 = -64;
 152 R4 = -64;
 153 R5 = -64;
 154 R6 = -64;
 155 R7 = -64;
 156 CHECKREG r0, -64;
 157 CHECKREG r1, -64;
 158 CHECKREG r2, -64;
 159 CHECKREG r3, -64;
 160 CHECKREG r4, -64;
 161 CHECKREG r5, -64;
 162 CHECKREG r6, -64;
 163 CHECKREG r7, -64;
 164
 165
 166 pass