sim/testsuite/bfin/c_dsp32alu_rr_lph_a1a0.s

   1 //Original:/testcases/core/c_dsp32alu_rr_lph_a1a0/c_dsp32alu_rr_lph_a1a0.dsp
   2 // Spec Reference: dsp32alu (dregs, dregs) = L + H, L + H (a1, a0)
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8
   9
  10
  11 imm32 r0, 0x25678911;
  12 imm32 r1, 0x0029ab2d;
  13 imm32 r2, 0x00145535;
  14 imm32 r3, 0xf6567747;
  15 imm32 r4, 0xe566895b;
  16 imm32 r5, 0x67897b6d;
  17 imm32 r6, 0xb4445875;
  18 imm32 r7, 0x86667797;
  19 A1 = R1;
  20 A0 = R0;
  21
  22 R2 = A1.L + A1.H, R3 = A0.L + A0.H;
  23 R4 = A1.L + A1.H, R5 = A0.L + A0.H;
  24 R6 = A1.L + A1.H, R7 = A0.L + A0.H;
  25 CHECKREG r2, 0xFFFFAB56;
  26 CHECKREG r3, 0xFFFFAE78;
  27 CHECKREG r4, 0xFFFFAB56;
  28 CHECKREG r5, 0xFFFFAE78;
  29 CHECKREG r6, 0xFFFFAB56;
  30 CHECKREG r7, 0xFFFFAE78;
  31
  32
  33 pass