sim/testsuite/bfin/c_dsp32alu_rrpm.s

   1 //Original:/testcases/core/c_dsp32alu_rrpm/c_dsp32alu_rrpm.dsp
   2 // Spec Reference: dsp32alu (dreg, dreg)
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8
   9
  10
  11 imm32 r0, 0x75678911;
  12 imm32 r1, 0x2789ab1d;
  13 imm32 r2, 0x34745515;
  14 imm32 r3, 0x46677717;
  15 imm32 r0, 0x5567a91b;
  16 imm32 r1, 0x6789aa1d;
  17 imm32 r2, 0x744455a5;
  18 imm32 r3, 0x8666777a;
  19 R0 = R0 + R0, R7 = R0 - R0 (NS);
  20 R1 = R0 + R1, R6 = R0 - R1 (NS);
  21 R2 = R0 + R2, R5 = R0 - R2 (NS);
  22 R3 = R0 + R3, R4 = R0 - R3 (NS);
  23 R4 = R0 + R4, R3 = R0 - R4 (NS);
  24 R5 = R0 + R5, R2 = R0 - R5 (NS);
  25 R6 = R0 + R6, R1 = R0 - R6 (NS);
  26 R7 = R0 + R7, R0 = R0 - R7 (NS);
  27 CHECKREG r0, 0xAACF5236;
  28 CHECKREG r1, 0x6789AA1D;
  29 CHECKREG r2, 0x744455A5;
  30 CHECKREG r3, 0x8666777A;
  31 CHECKREG r4, 0xCF382CF2;
  32 CHECKREG r5, 0xE15A4EC7;
  33 CHECKREG r6, 0xEE14FA4F;
  34 CHECKREG r7, 0xAACF5236;
  35
  36 imm32 r0, 0x4567892b;
  37 imm32 r1, 0x4489ab2d;
  38 imm32 r2, 0x54445525;
  39 imm32 r3, 0x66645727;
  40 imm32 r4, 0x78889629;
  41 imm32 r5, 0x8aaabb6b;
  42 imm32 r6, 0x9cccdd2d;
  43 imm32 r7, 0x0eee3fff;
  44 R0 = R1 + R0, R7 = R1 - R0 (NS);
  45 R1 = R1 + R1, R6 = R1 - R1 (NS);
  46 R2 = R1 + R2, R5 = R1 - R2 (NS);
  47 R3 = R1 + R3, R4 = R1 - R3 (NS);
  48 R4 = R1 + R4, R3 = R1 - R4 (NS);
  49 R5 = R1 + R5, R2 = R1 - R5 (NS);
  50 R6 = R1 + R6, R1 = R1 - R6 (NS);
  51 R7 = R1 + R7, R0 = R1 - R7 (NS);
  52 CHECKREG r0, 0x89F13458;
  53 CHECKREG r1, 0x8913565A;
  54 CHECKREG r2, 0x54445525;
  55 CHECKREG r3, 0x66645727;
  56 CHECKREG r4, 0xABC2558D;
  57 CHECKREG r5, 0xBDE2578F;
  58 CHECKREG r6, 0x8913565A;
  59 CHECKREG r7, 0x8835785C;
  60
  61
  62 imm32 r0, 0x496789ab;
  63 imm32 r1, 0x6489abcd;
  64 imm32 r2, 0x4b445555;
  65 imm32 r3, 0x6c647777;
  66 imm32 r4, 0x8d889999;
  67 imm32 r5, 0x1eaa4bbb;
  68 imm32 r6, 0x2fccd44d;
  69 imm32 r7, 0x31eefff4;
  70 R0 = R2 + R0, R7 = R2 - R0 (NS);
  71 R1 = R2 + R1, R6 = R2 - R1 (NS);
  72 R2 = R2 + R2, R5 = R2 - R2 (NS);
  73 R3 = R2 + R3, R4 = R2 - R3 (NS);
  74 R4 = R2 + R4, R3 = R2 - R4 (NS);
  75 R5 = R2 + R5, R2 = R2 - R5 (NS);
  76 R6 = R2 + R6, R1 = R2 - R6 (NS);
  77 R7 = R2 + R7, R0 = R2 - R7 (NS);
  78 CHECKREG r0, 0x94ABDF00;
  79 CHECKREG r1, 0xAFCE0122;
  80 CHECKREG r2, 0x9688AAAA;
  81 CHECKREG r3, 0x6C647777;
  82 CHECKREG r4, 0xC0ACDDDD;
  83 CHECKREG r5, 0x9688AAAA;
  84 CHECKREG r6, 0x7D435432;
  85 CHECKREG r7, 0x98657654;
  86
  87 imm32 r0, 0xa537891b;
  88 imm32 r1, 0x6a59ab2d;
  89 imm32 r2, 0x44a55535;
  90 imm32 r3, 0x166a5747;
  91 imm32 r4, 0x6878a565;
  92 imm32 r5, 0x7a8aba5b;
  93 imm32 r6, 0x8c9cdd85;
  94 imm32 r7, 0x9eaeffaf;
  95 R0 = R3 + R0, R7 = R3 - R0 (NS);
  96 R1 = R3 + R1, R6 = R3 - R1 (NS);
  97 R2 = R3 + R2, R5 = R3 - R2 (NS);
  98 R3 = R3 + R3, R4 = R3 - R3 (NS);
  99 R4 = R3 + R4, R3 = R3 - R4 (NS);
 100 R5 = R3 + R5, R2 = R3 - R5 (NS);
 101 R6 = R3 + R6, R1 = R3 - R6 (NS);
 102 R7 = R3 + R7, R0 = R3 - R7 (NS);
 103 CHECKREG r0, 0xBBA1E062;
 104 CHECKREG r1, 0x80C40274;
 105 CHECKREG r2, 0x5B0FAC7C;
 106 CHECKREG r3, 0x2CD4AE8E;
 107 CHECKREG r4, 0x2CD4AE8E;
 108 CHECKREG r5, 0xFE99B0A0;
 109 CHECKREG r6, 0xD8E55AA8;
 110 CHECKREG r7, 0x9E077CBA;
 111
 112 imm32 r0, 0x15678911;
 113 imm32 r1, 0x9789ab1d;
 114 imm32 r2, 0x94445515;
 115 imm32 r3, 0x96667717;
 116 imm32 r0, 0x5267891b;
 117 imm32 r1, 0x67a9ab1d;
 118 imm32 r2, 0x744c5515;
 119 imm32 r3, 0x8666d777;
 120 R0 = R4 + R0, R7 = R4 - R0 (NS);
 121 R1 = R4 + R1, R6 = R4 - R1 (NS);
 122 R2 = R4 + R2, R5 = R4 - R2 (NS);
 123 R3 = R4 + R3, R4 = R4 - R3 (NS);
 124 R4 = R4 + R4, R3 = R4 - R4 (NS);
 125 R5 = R4 + R5, R2 = R4 - R5 (NS);
 126 R6 = R4 + R6, R1 = R4 - R6 (NS);
 127 R7 = R4 + R7, R0 = R4 - R7 (NS);
 128 CHECKREG r0, 0x726E88BB;
 129 CHECKREG r1, 0x87B0AABD;
 130 CHECKREG r2, 0x945354B5;
 131 CHECKREG r3, 0x00000000;
 132 CHECKREG r4, 0x4CDBAE2E;
 133 CHECKREG r5, 0x056407A7;
 134 CHECKREG r6, 0x1206B19F;
 135 CHECKREG r7, 0x2748D3A1;
 136
 137 imm32 r0, 0xa567892b;
 138 imm32 r1, 0x4a89ab2d;
 139 imm32 r2, 0x54a45525;
 140 imm32 r3, 0x666d7727;
 141 imm32 r4, 0x7888d929;
 142 imm32 r5, 0x8aaabe2b;
 143 imm32 r6, 0x9cccdd2d;
 144 imm32 r7, 0x0eeeffef;
 145 R0 = R5 + R0, R7 = R5 - R0 (NS);
 146 R1 = R5 + R1, R6 = R5 - R1 (NS);
 147 R2 = R5 + R2, R5 = R5 - R2 (NS);
 148 R3 = R5 + R3, R4 = R5 - R3 (NS);
 149 R4 = R5 + R4, R3 = R5 - R4 (NS);
 150 R5 = R5 + R5, R2 = R5 - R5 (NS);
 151 R6 = R5 + R6, R1 = R5 - R6 (NS);
 152 R7 = R5 + R7, R0 = R5 - R7 (NS);
 153 CHECKREG r0, 0x86C99D0C;
 154 CHECKREG r1, 0x2BEBBF0E;
 155 CHECKREG r2, 0x00000000;
 156 CHECKREG r3, 0x666D7727;
 157 CHECKREG r4, 0x059F5AE5;
 158 CHECKREG r5, 0x6C0CD20C;
 159 CHECKREG r6, 0xAC2DE50A;
 160 CHECKREG r7, 0x5150070C;
 161
 162
 163 imm32 r0, 0x496789ab;
 164 imm32 r1, 0x6489abcd;
 165 imm32 r2, 0x4b445555;
 166 imm32 r3, 0x6c647777;
 167 imm32 r4, 0x8d889999;
 168 imm32 r5, 0x1eaa4bbb;
 169 imm32 r6, 0x2fccd44d;
 170 imm32 r7, 0x31eefff4;
 171 R0 = R6 + R0, R7 = R6 - R0 (NS);
 172 R1 = R6 + R1, R6 = R6 - R1 (NS);
 173 R2 = R6 + R2, R5 = R6 - R2 (NS);
 174 R3 = R6 + R3, R4 = R6 - R3 (NS);
 175 R4 = R6 + R4, R3 = R6 - R4 (NS);
 176 R5 = R6 + R5, R2 = R6 - R5 (NS);
 177 R6 = R6 + R6, R1 = R6 - R6 (NS);
 178 R7 = R6 + R7, R0 = R6 - R7 (NS);
 179 CHECKREG r0, 0xB021065E;
 180 CHECKREG r1, 0x00000000;
 181 CHECKREG r2, 0x4B445555;
 182 CHECKREG r3, 0x6C647777;
 183 CHECKREG r4, 0x2A21D989;
 184 CHECKREG r5, 0x4B41FBAB;
 185 CHECKREG r6, 0x96865100;
 186 CHECKREG r7, 0x7CEB9BA2;
 187
 188 imm32 r0, 0xe537891b;
 189 imm32 r1, 0xe759ab2d;
 190 imm32 r2, 0x4e555535;
 191 imm32 r3, 0x16e65747;
 192 imm32 r4, 0x687e9565;
 193 imm32 r5, 0x7a8aeb5b;
 194 imm32 r6, 0x8c9cdd85;
 195 imm32 r7, 0x9eaefe9f;
 196 R0 = R7 + R0, R7 = R7 - R0 (NS);
 197 R1 = R7 + R1, R6 = R7 - R1 (NS);
 198 R2 = R7 + R2, R5 = R7 - R2 (NS);
 199 R3 = R7 + R3, R4 = R7 - R3 (NS);
 200 R4 = R7 + R4, R3 = R7 - R4 (NS);
 201 R5 = R7 + R5, R2 = R7 - R5 (NS);
 202 R6 = R7 + R6, R1 = R7 - R6 (NS);
 203 R7 = R7 + R7, R0 = R7 - R7 (NS);
 204 CHECKREG r0, 0x00000000;
 205 CHECKREG r1, 0xE759AB2D;
 206 CHECKREG r2, 0x4E555535;
 207 CHECKREG r3, 0x16E65747;
 208 CHECKREG r4, 0x5C0893C1;
 209 CHECKREG r5, 0x249995D3;
 210 CHECKREG r6, 0x8B953FDB;
 211 CHECKREG r7, 0x72EEEB08;
 212
 213 imm32 r0, 0x496789ab;
 214 imm32 r1, 0x6489abcd;
 215 imm32 r2, 0x4b445555;
 216 imm32 r3, 0x6c647777;
 217 imm32 r4, 0x8d889999;
 218 imm32 r5, 0x1eaa4bbb;
 219 imm32 r6, 0x2fccd44d;
 220 imm32 r7, 0x31eefff4;
 221 R2 = R4 + R0, R7 = R4 - R0 (S);
 222 R3 = R7 + R1, R6 = R7 - R1 (NS);
 223 R4 = R0 + R2, R5 = R0 - R2 (S);
 224 R5 = R4 + R3, R4 = R4 - R3 (NS);
 225 R6 = R2 + R4, R3 = R2 - R4 (S);
 226 R7 = R3 + R5, R2 = R3 - R5 (NS);
 227 R0 = R1 + R6, R1 = R1 - R6 (S);
 228 R1 = R5 + R7, R0 = R5 - R7 (S);
 229 CHECKREG r0, 0x64DDDDDE;
 230 CHECKREG r1, 0xA4E4D39A;
 231 CHECKREG r2, 0x9640C966;
 232 CHECKREG r3, 0x9B222222;
 233 CHECKREG r4, 0x3BCE0122;
 234 CHECKREG r5, 0x04E158BC;
 235 CHECKREG r6, 0x12BE2466;
 236 CHECKREG r7, 0xA0037ADE;
 237
 238 imm32 r0, 0xa537891b;
 239 imm32 r1, 0x6d59ab2d;
 240 imm32 r2, 0x4f555535;
 241 imm32 r3, 0x16c65747;
 242 imm32 r4, 0x687c9565;
 243 imm32 r5, 0x7a8acb5b;
 244 imm32 r6, 0x8c9cdc85;
 245 imm32 r7, 0x9eaefb9f;
 246 R4 = R3 + R0, R1 = R3 - R0 (S);
 247 R5 = R6 + R1, R2 = R6 - R1 (S);
 248 R6 = R7 + R2, R3 = R7 - R2 (S);
 249 R7 = R0 + R3, R4 = R0 - R3 (NS);
 250 R0 = R2 + R4, R5 = R2 - R4 (S);
 251 R1 = R1 + R5, R6 = R1 - R5 (S);
 252 R2 = R5 + R6, R7 = R5 - R6 (NS);
 253 R3 = R4 + R7, R0 = R4 - R7 (S);
 254 CHECKREG r0, 0x052876A0;
 255 CHECKREG r1, 0x6B0640B0;
 256 CHECKREG r2, 0x718ECE2C;
 257 CHECKREG r3, 0x80000000;
 258 CHECKREG r4, 0x86888D7C;
 259 CHECKREG r5, 0xF9777284;
 260 CHECKREG r6, 0x78175BA8;
 261 CHECKREG r7, 0x816016DC;
 262
 263
 264
 265 pass