sim/testsuite/bfin/c_dsp32mac_dr_a1.s

   1 //Original:/testcases/core/c_dsp32mac_dr_a1/c_dsp32mac_dr_a1.dsp
   2 // Spec Reference: dsp32mac dr_a1
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8
   9
  10 A1 = A0 = 0;
  11
  12 // The result accumulated in A1 , and stored to a reg half
  13 imm32 r0, 0x13545abd;
  14 imm32 r1, 0xadbcfec7;
  15 imm32 r2, 0xa1245679;
  16 imm32 r3, 0x00060007;
  17 imm32 r4, 0xefbc4569;
  18 imm32 r5, 0x1235000b;
  19 imm32 r6, 0x000c000d;
  20 imm32 r7, 0x678e000f;
  21 R0.H = ( A1 += R1.L * R0.L ), A0 = R1.L * R0.L;
  22 R1 = A1.w;
  23 R2.H = ( A1 = R2.L * R3.L ), A0 = R2.H * R3.L;
  24 R3 = A1.w;
  25 R4.H = ( A1 = R4.L * R5.L ), A0 += R4.H * R5.H;
  26 R5 = A1.w;
  27 R6.H = ( A1 += R6.L * R7.L ), A0 += R6.L * R7.H;
  28 R7 = A1.w;
  29 CHECKREG r0, 0xFF225ABD;
  30 CHECKREG r1, 0xFF221DD6;
  31 CHECKREG r2, 0x00055679;
  32 CHECKREG r3, 0x0004BA9E;
  33 CHECKREG r4, 0x00064569;
  34 CHECKREG r5, 0x0005F706;
  35 CHECKREG r6, 0x0006000D;
  36 CHECKREG r7, 0x0005F88C;
  37
  38 imm32 r0, 0x13545abd;
  39 imm32 r1, 0xa1bcfec7;
  40 imm32 r2, 0xa1145679;
  41 imm32 r3, 0x00010007;
  42 imm32 r4, 0xefbc1569;
  43 imm32 r5, 0x1235010b;
  44 imm32 r6, 0x000c001d;
  45 imm32 r7, 0x678e0001;
  46 R4.H = ( A1 += R1.L * R0.H ), A0 = R1.L * R0.L;
  47 R5 = A1.w;
  48 R0.H = ( A1 = R2.L * R3.H ), A0 = R2.H * R3.L;
  49 R1 = A1.w;
  50 R2.H = ( A1 = R4.L * R5.H ), A0 += R4.H * R5.H;
  51 R3 = A1.w;
  52 R6.H = ( A1 += R6.L * R7.H ), A0 += R6.L * R7.H;
  53 R7 = A1.w;
  54 CHECKREG r0, 0x00015ABD;
  55 CHECKREG r1, 0x0000ACF2;
  56 CHECKREG r2, 0xFFF95679;
  57 CHECKREG r3, 0xFFF8F98C;
  58 CHECKREG r4, 0xFFD71569;
  59 CHECKREG r5, 0xFFD6B524;
  60 CHECKREG r6, 0x0010001D;
  61 CHECKREG r7, 0x00106FB8;
  62
  63 imm32 r0, 0x83545abd;
  64 imm32 r1, 0xa8bcfec7;
  65 imm32 r2, 0xa1845679;
  66 imm32 r3, 0x00080007;
  67 imm32 r4, 0xefbc8569;
  68 imm32 r5, 0x1235080b;
  69 imm32 r6, 0x000c008d;
  70 imm32 r7, 0x678e0008;
  71 R6.H = ( A1 += R1.H * R0.L ), A0 = R1.L * R0.L;
  72 R7 = A1.w;
  73 R2.H = ( A1 = R2.H * R3.L ), A0 = R2.H * R3.L;
  74 R3 = A1.w;
  75 R4.H = ( A1 = R4.H * R5.L ), A0 += R4.H * R5.H;
  76 R5 = A1.w;
  77 R0.H = ( A1 += R6.H * R7.L ), A0 += R6.L * R7.H;
  78 R1 = A1.w;
  79 CHECKREG r0, 0x1B505ABD;
  80 CHECKREG r1, 0x1B4FC2A8;
  81 CHECKREG r2, 0xFFFB5679;
  82 CHECKREG r3, 0xFFFAD538;
  83 CHECKREG r4, 0xFEFA8569;
  84 CHECKREG r5, 0xFEFA5A28;
  85 CHECKREG r6, 0xC234008D;
  86 CHECKREG r7, 0xC233C550;
  87
  88 imm32 r0, 0xc3545abd;
  89 imm32 r1, 0xacbcfec7;
  90 imm32 r2, 0xa1c45679;
  91 imm32 r3, 0x000c0007;
  92 imm32 r4, 0xefbcc569;
  93 imm32 r5, 0x12350c0b;
  94 imm32 r6, 0x000c00cd;
  95 imm32 r7, 0x678e000c;
  96 R6.H = ( A1 += R1.H * R0.H ), A0 = R1.L * R0.L;
  97 R7 = A1.w;
  98 R0.H = ( A1 = R2.H * R3.H ), A0 = R2.H * R3.L;
  99 R1 = A1.w;
 100 R4.H = ( A1 = R4.H * R5.H ), A0 += R4.H * R5.H;
 101 R5 = A1.w;
 102 R2.H = ( A1 += R6.H * R7.H ), A0 += R6.L * R7.H;
 103 R3 = A1.w;
 104 CHECKREG r0, 0xFFF75ABD;
 105 CHECKREG r1, 0xFFF72A60;
 106 CHECKREG r2, 0x20875679;
 107 CHECKREG r3, 0x2086A6C8;
 108 CHECKREG r4, 0xFDB0C569;
 109 CHECKREG r5, 0xFDAFB3D8;
 110 CHECKREG r6, 0x42C800CD;
 111 CHECKREG r7, 0x42C78608;
 112
 113 imm32 r0, 0x01542abd;
 114 imm32 r1, 0x02bc4ec7;
 115 imm32 r2, 0x03240679;
 116 imm32 r3, 0x04061007;
 117 imm32 r4, 0x05bc2569;
 118 imm32 r5, 0x0635300b;
 119 imm32 r6, 0x070c200d;
 120 imm32 r7, 0x088e100f;
 121 R0.H = ( A1 -= R1.L * R0.L ), A0 = R1.L * R0.L;
 122 R1 = A1.w;
 123 R2.H = ( A1 -= R2.L * R3.L ), A0 -= R2.H * R3.L;
 124 R3 = A1.w;
 125 R4.H = ( A1 -= R4.L * R5.L ), A0 += R4.H * R5.H;
 126 R5 = A1.w;
 127 R6.H = ( A1 += R6.L * R7.L ), A0 -= R6.L * R7.H;
 128 R7 = A1.w;
 129 CHECKREG r0, 0x06392ABD;
 130 CHECKREG r1, 0x063908F2;
 131 CHECKREG r2, 0x056A0679;
 132 CHECKREG r3, 0x05698E54;
 133 CHECKREG r4, 0xF75F2569;
 134 CHECKREG r5, 0xF75EF74E;
 135 CHECKREG r6, 0xFB64200D;
 136 CHECKREG r7, 0xFB6458D4;
 137
 138 imm32 r0, 0x03545abd;
 139 imm32 r1, 0x31bcfec7;
 140 imm32 r2, 0x11145679;
 141 imm32 r3, 0x00010007;
 142 imm32 r4, 0xefbc1569;
 143 imm32 r5, 0x1235010b;
 144 imm32 r6, 0x000c001d;
 145 imm32 r7, 0x678e0001;
 146 R4.H = ( A1 += R1.L * R0.H ), A0 -= R1.L * R0.L;
 147 R5 = A1.w;
 148 R0.H = ( A1 -= R2.L * R3.H ), A0 = R2.H * R3.L;
 149 R1 = A1.w;
 150 R2.H = ( A1 -= R4.L * R5.H ), A0 += R4.H * R5.H;
 151 R3 = A1.w;
 152 R6.H = ( A1 += R6.L * R7.H ), A0 -= R6.L * R7.H;
 153 R7 = A1.w;
 154 CHECKREG r0, 0xFB5C5ABD;
 155 CHECKREG r1, 0xFB5B887A;
 156 CHECKREG r2, 0xFC225679;
 157 CHECKREG r3, 0xFC223F02;
 158 CHECKREG r4, 0xFB5C1569;
 159 CHECKREG r5, 0xFB5C356C;
 160 CHECKREG r6, 0xFC3A001D;
 161 CHECKREG r7, 0xFC39B52E;
 162
 163 imm32 r0, 0x83545abd;
 164 imm32 r1, 0xa8bcfec7;
 165 imm32 r2, 0xa1845679;
 166 imm32 r3, 0x00080007;
 167 imm32 r4, 0xefbc8569;
 168 imm32 r5, 0x1235080b;
 169 imm32 r6, 0x000c008d;
 170 imm32 r7, 0x678e0008;
 171 R6.H = ( A1 += R1.H * R0.L ), A0 -= R1.L * R0.L;
 172 R7 = A1.w;
 173 R2.H = ( A1 -= R2.H * R3.L ), A0 -= R2.H * R3.L;
 174 R3 = A1.w;
 175 R4.H = ( A1 = R4.H * R5.L ), A0 -= R4.H * R5.H;
 176 R5 = A1.w;
 177 R0.H = ( A1 += R6.H * R7.L ), A0 -= R6.L * R7.H;
 178 R1 = A1.w;
 179 CHECKREG r0, 0xF9745ABD;
 180 CHECKREG r1, 0xF9741604;
 181 CHECKREG r2, 0xBE625679;
 182 CHECKREG r3, 0xBE62358E;
 183 CHECKREG r4, 0xFEFA8569;
 184 CHECKREG r5, 0xFEFA5A28;
 185 CHECKREG r6, 0xBE5D008D;
 186 CHECKREG r7, 0xBE5D0AC6;
 187
 188 imm32 r0, 0xc3545abd;
 189 imm32 r1, 0xacbcfec7;
 190 imm32 r2, 0xa1c45679;
 191 imm32 r3, 0x000c0007;
 192 imm32 r4, 0xefbcc569;
 193 imm32 r5, 0x12350c0b;
 194 imm32 r6, 0x000c00cd;
 195 imm32 r7, 0x678e000c;
 196 R6.H = ( A1 += R1.H * R0.H ), A0 -= R1.L * R0.L;
 197 R7 = A1.w;
 198 R0.H = ( A1 = R2.H * R3.H ), A0 -= R2.H * R3.L;
 199 R1 = A1.w;
 200 R4.H = ( A1 -= R4.H * R5.H ), A0 += R4.H * R5.H;
 201 R5 = A1.w;
 202 R2.H = ( A1 -= R6.H * R7.H ), A0 += R6.L * R7.H;
 203 R3 = A1.w;
 204 CHECKREG r0, 0xFFF75ABD;
 205 CHECKREG r1, 0xFFF72A60;
 206 CHECKREG r2, 0xF9D05679;
 207 CHECKREG r3, 0xF9D00540;
 208 CHECKREG r4, 0x0247C569;
 209 CHECKREG r5, 0x02477688;
 210 CHECKREG r6, 0x20EC00CD;
 211 CHECKREG r7, 0x20EBD964;
 212
 213 pass