sim/testsuite/bfin/c_dsp32mac_pair_a0_is.s

   1 //Original:/proj/frio/dv/testcases/core/c_dsp32mac_pair_a0_is/c_dsp32mac_pair_a0_is.dsp
   2 // Spec Reference: dsp32mac pair a0  IS
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8         A1 = A0 = 0;
   9
  10 // The result accumulated in A       , and stored to a reg half
  11         imm32 r0, 0x63545abd;
  12         imm32 r1, 0x86bcfec7;
  13         imm32 r2, 0xa8645679;
  14         imm32 r3, 0x00860007;
  15         imm32 r4, 0xefb86569;
  16         imm32 r5, 0x1235860b;
  17         imm32 r6, 0x000c086d;
  18         imm32 r7, 0x678e0086;
  19         A1 += R1.L * R0.L, R6 = ( A0 -= R1.L * R0.L ) (ISS2);
  20         P1 = A1.w;
  21         A1 = R2.L * R3.L, R0 = ( A0 = R2.H * R3.L ) (ISS2);
  22         P2 = A1.w;
  23         A1 -= R7.L * R4.L, R2 = ( A0 += R7.H * R4.H ) (ISS2);
  24         P3 = A1.w;
  25         A1 += R6.L * R5.L, R4 = ( A0 += R6.L * R5.H ) (ISS2);
  26         P4 = A1.w;
  27         CHECKREG r0, 0xFFFB3578;
  28         CHECKREG r1, 0x86BCFEC7;
  29         CHECKREG r2, 0xF2CF3598;
  30         CHECKREG r3, 0x00860007;
  31         CHECKREG r4, 0xEE90C2FC;
  32         CHECKREG r5, 0x1235860B;
  33         CHECKREG r6, 0x00DDE22A;
  34         CHECKREG r7, 0x678E0086;
  35         CHECKREG p1, 0xFF910EEB;
  36         CHECKREG p2, 0x00025D4F;
  37         CHECKREG p3, 0xFFCD4859;
  38         CHECKREG p4, 0x0E03FC27;
  39
  40         imm32 r0, 0x98764abd;
  41         imm32 r1, 0xa1bcf4c7;
  42         imm32 r2, 0xa1145649;
  43         imm32 r3, 0x00010005;
  44         imm32 r4, 0xefbc1569;
  45         imm32 r5, 0x1235010b;
  46         imm32 r6, 0x000c001d;
  47         imm32 r7, 0x678e0001;
  48         A1 += R1.L * R0.H, R4 = ( A0 = R1.L * R0.L ) (ISS2);
  49         P1 = A0.w;
  50         A1 -= R2.L * R3.H, R0 = ( A0 -= R2.H * R3.L ) (ISS2);
  51         P2 = A0.w;
  52         A1 -= R4.L * R5.H, R2 = ( A0 += R4.H * R5.H ) (ISS2);
  53         P3 = A0.w;
  54         A1 += R6.L * R7.H, R0 = ( A0 += R6.L * R7.H ) (ISS2);
  55         P4 = A0.w;
  56         CHECKREG r0, 0xF89EF66E;
  57         CHECKREG r1, 0xA1BCF4C7;
  58         CHECKREG r2, 0xF8878042;
  59         CHECKREG r3, 0x00010005;
  60         CHECKREG r4, 0xF97279D6;
  61         CHECKREG r5, 0x1235010B;
  62         CHECKREG r6, 0x000C001D;
  63         CHECKREG r7, 0x678E0001;
  64         CHECKREG p1, 0xFCB93CEB;
  65         CHECKREG p2, 0xFCBB1787;
  66         CHECKREG p3, 0xFC43C021;
  67         CHECKREG p4, 0xFC4F7B37;
  68
  69         imm32 r0, 0x7136459d;
  70         imm32 r1, 0xabd69ec7;
  71         imm32 r2, 0x71145679;
  72         imm32 r3, 0x08010007;
  73         imm32 r4, 0xef9c1569;
  74         imm32 r5, 0x1225010b;
  75         imm32 r6, 0x0003401d;
  76         imm32 r7, 0x678e0561;
  77         A1 += R1.H * R0.L, R4 = ( A0 = R1.L * R0.L ) (ISS2);
  78         P1 = A0.w;
  79         A1 = R2.H * R3.L, R6 = ( A0 = R2.H * R3.L ) (ISS2);
  80         P2 = A0.w;
  81         A1 -= R4.H * R5.L, R0 = ( A0 += R4.H * R5.H ) (ISS2);
  82         P3 = A0.w;
  83         A1 += R6.H * R7.L, R4 = ( A0 -= R6.L * R7.H ) (ISS2);
  84         P4 = A0.w;
  85         CHECKREG r0, 0xF8876658;
  86         CHECKREG r1, 0xABD69EC7;
  87         CHECKREG r2, 0x71145679;
  88         CHECKREG r3, 0x08010007;
  89         CHECKREG r4, 0xD26DD7B8;
  90         CHECKREG r5, 0x1225010B;
  91         CHECKREG r6, 0x00062F18;
  92         CHECKREG r7, 0x678E0561;
  93         CHECKREG p1, 0xE590030B;
  94         CHECKREG p2, 0x0003178C;
  95         CHECKREG p3, 0xFC43B32C;
  96         CHECKREG p4, 0xE936EBDC;
  97
  98         imm32 r0, 0x123489bd;
  99         imm32 r1, 0x91bcfec7;
 100         imm32 r2, 0xa9145679;
 101         imm32 r3, 0xd0910007;
 102         imm32 r4, 0xedb91569;
 103         imm32 r5, 0xd235910b;
 104         imm32 r6, 0x0d0c0999;
 105         imm32 r7, 0x67de0009;
 106         A1 += R5.H * R3.H, R0 = ( A0 = R5.L * R3.L ) (ISS2);
 107         P1 = A0.w;
 108         A1 -= R2.H * R1.H, R2 = ( A0 -= R2.H * R1.L ) (ISS2);
 109         P2 = A0.w;
 110         A1 = R7.H * R0.H, R4 = ( A0 += R7.H * R0.H ) (ISS2);
 111         P3 = A0.w;
 112         A1 += R4.H * R6.H, R6 = ( A0 += R4.L * R6.H ) (ISS2);
 113         P4 = A0.w;
 114         CHECKREG r0, 0xFFF9EE9A;
 115         CHECKREG r1, 0x91BCFEC7;
 116         CHECKREG r2, 0xFF256182;
 117         CHECKREG r3, 0xD0910007;
 118         CHECKREG r4, 0xFF1FB35E;
 119         CHECKREG r5, 0xD235910B;
 120         CHECKREG r6, 0xF750102E;
 121         CHECKREG r7, 0x67DE0009;
 122         CHECKREG p1, 0xFFFCF74D;
 123         CHECKREG p2, 0xFF92B0C1;
 124         CHECKREG p3, 0xFF8FD9AF;
 125         CHECKREG p4, 0xFBA80817;
 126
 127         imm32 r0, 0x63545abd;
 128         imm32 r1, 0x86bcfec7;
 129         imm32 r2, 0xa8645679;
 130         imm32 r3, 0x00860007;
 131         imm32 r4, 0xefb86569;
 132         imm32 r5, 0x1235860b;
 133         imm32 r6, 0x000c086d;
 134         imm32 r7, 0x678e0086;
 135         A1 += R1.L * R0.L (M), R6 = ( A0 -= R1.L * R0.L ) (ISS2);
 136         P5 = A1.w;
 137         P1 = A0.w;
 138         A1 = R2.L * R3.L (M), R0 = ( A0 = R2.H * R3.L ) (ISS2);
 139         P2 = A0.w;
 140         A1 -= R7.L * R4.L (M), R2 = ( A0 += R7.H * R4.H ) (ISS2);
 141         P3 = A0.w;
 142         A1 += R6.L * R5.L (M), R4 = ( A0 += R6.L * R5.H ) (ISS2);
 143         P4 = A0.w;
 144         CHECKREG r0, 0xFFFB3578;
 145         CHECKREG r1, 0x86BCFEC7;
 146         CHECKREG r2, 0xF2CF3598;
 147         CHECKREG r3, 0x00860007;
 148         CHECKREG r4, 0xF0DDEE08;
 149         CHECKREG r5, 0x1235860B;
 150         CHECKREG r6, 0xF82DF258;
 151         CHECKREG r7, 0x678E0086;
 152         CHECKREG p1, 0xFC16F92C;
 153         CHECKREG p2, 0xFFFD9ABC;
 154         CHECKREG p3, 0xF9679ACC;
 155         CHECKREG p4, 0xF86EF704;
 156         CHECKREG p5, 0xFF82C04D;
 157
 158         imm32 r0, 0x98764abd;
 159         imm32 r1, 0xa1bcf4c7;
 160         imm32 r2, 0xa1145649;
 161         imm32 r3, 0x00010005;
 162         imm32 r4, 0xefbc1569;
 163         imm32 r5, 0x1235010b;
 164         imm32 r6, 0x000c001d;
 165         imm32 r7, 0x678e0001;
 166         R4 = ( A0 = R1.L * R0.L ) (ISS2);
 167         P1 = A0.w;
 168         R0 = ( A0 -= R2.H * R3.L ) (ISS2);
 169         P2 = A0.w;
 170         R2 = ( A0 += R4.H * R5.H ) (ISS2);
 171         P3 = A0.w;
 172         R0 = ( A0 += R6.L * R7.H ) (ISS2);
 173         P4 = A0.w;
 174         CHECKREG r0, 0xF89EF66E;
 175         CHECKREG r1, 0xA1BCF4C7;
 176         CHECKREG r2, 0xF8878042;
 177         CHECKREG r3, 0x00010005;
 178         CHECKREG r4, 0xF97279D6;
 179         CHECKREG r5, 0x1235010B;
 180         CHECKREG r6, 0x000C001D;
 181         CHECKREG r7, 0x678E0001;
 182         CHECKREG p1, 0xFCB93CEB;
 183         CHECKREG p2, 0xFCBB1787;
 184         CHECKREG p3, 0xFC43C021;
 185         CHECKREG p4, 0xFC4F7B37;
 186
 187         imm32 r0, 0x7136459d;
 188         imm32 r1, 0xabd69ec7;
 189         imm32 r2, 0x71145679;
 190         imm32 r3, 0x08010007;
 191         imm32 r4, 0xef9c1569;
 192         imm32 r5, 0x1225010b;
 193         imm32 r6, 0x0003401d;
 194         imm32 r7, 0x678e0561;
 195         A1 += R1.H * R0.L (M), R4 = ( A0 = R1.L * R0.L ) (ISS2);
 196         P1 = A0.w;
 197         R6 = ( A0 = R2.H * R3.L ) (ISS2);
 198         P2 = A0.w;
 199         A1 = R4.H * R5.L (M), R0 = ( A0 += R4.H * R5.H ) (ISS2);
 200         P3 = A0.w;
 201         R4 = ( A0 += R6.L * R7.H ) (ISS2);
 202         P4 = A0.w;
 203         CHECKREG r0, 0xF8876658;
 204         CHECKREG r1, 0xABD69EC7;
 205         CHECKREG r2, 0x71145679;
 206         CHECKREG r3, 0x08010007;
 207         CHECKREG r4, 0x1EA0F4F8;
 208         CHECKREG r5, 0x1225010B;
 209         CHECKREG r6, 0x00062F18;
 210         CHECKREG r7, 0x678E0561;
 211         CHECKREG p1, 0xE590030B;
 212         CHECKREG p2, 0x0003178C;
 213         CHECKREG p3, 0xFC43B32C;
 214         CHECKREG p4, 0x0F507A7C;
 215
 216         imm32 r0, 0x123489bd;
 217         imm32 r1, 0x91bcfec7;
 218         imm32 r2, 0xa9145679;
 219         imm32 r3, 0xd0910007;
 220         imm32 r4, 0xedb91569;
 221         imm32 r5, 0xd235910b;
 222         imm32 r6, 0x0d0c0999;
 223         imm32 r7, 0x67de0009;
 224         R0 = ( A0 = R5.L * R3.L ) (ISS2);
 225         P1 = A0.w;
 226         A1 = R2.H * R1.H (M), R2 = ( A0 = R2.H * R1.L ) (ISS2);
 227         P2 = A0.w;
 228         A1 = R7.H * R0.H (M), R4 = ( A0 -= R7.H * R0.H ) (ISS2);
 229         P3 = A0.w;
 230         R6 = ( A0 += R4.L * R6.H ) (ISS2);
 231         P4 = A0.w;
 232         CHECKREG r0, 0xFFF9EE9A;
 233         CHECKREG r1, 0x91BCFEC7;
 234         CHECKREG r2, 0x00D48D18;
 235         CHECKREG r3, 0xD0910007;
 236         CHECKREG r4, 0x00DA3B3C;
 237         CHECKREG r5, 0xD235910B;
 238         CHECKREG r6, 0x06E3E0DC;
 239         CHECKREG r7, 0x67DE0009;
 240         CHECKREG p1, 0xFFFCF74D;
 241         CHECKREG p2, 0x006A468C;
 242         CHECKREG p3, 0x006D1D9E;
 243         CHECKREG p4, 0x0371F06E;
 244
 245         pass