1 //Original
:/proj
/frio
/dv
/testcases
/core
/c_dsp32mac_pair_a0_u
/c_dsp32mac_pair_a0_u.dsp
2 // Spec Reference
: dsp32mac pair a0 U
5 .include "testutils.inc"
10 // The result accumulated in
A , and stored to
a reg half
19 A1
+= R1.
L * R0.
L, R6 = ( A0
-= R1.
L * R0.
L ) (FU
);
21 A1
-= R2.
L * R3.
L, R0 = ( A0
= R2.H
* R3.
L ) (FU
);
23 A1
= R7.
L * R4.
L, R2 = ( A0
+= R7.H
* R4.H
) (FU
);
25 A1
+= R6.
L * R5.
L, R4 = ( A0
+= R6.
L * R5.H
) (FU
);
27 CHECKREG
r0, 0x00049ABC;
28 CHECKREG
r1, 0x86BCFEC7;
29 CHECKREG
r2, 0x60FC9ACC;
30 CHECKREG
r3, 0x00860007;
31 CHECKREG
r4, 0x60FC9ACC;
32 CHECKREG
r5, 0x1235860B;
33 CHECKREG
r6, 0x00000000;
34 CHECKREG
r7, 0x678E0086;
35 CHECKREG p1
, 0x00000000;
36 CHECKREG p2
, 0x00049ABC;
37 CHECKREG p3
, 0x60FC9ACC;
38 CHECKREG p4
, 0x60FC9ACC;
48 A1
+= R1.
L * R0.H
, R4 = ( A0
= R1.
L * R0.
L ) (FU
);
50 A1
-= R2.
L * R3.H
, R0 = ( A0
= R2.H
* R3.
L ) (FU
);
52 A1
= R4.
L * R5.H
, R2 = ( A0
+= R4.H
* R5.H
) (FU
);
54 A1
+= R6.
L * R7.H
, R0 = ( A0
+= R6.
L * R7.H
) (FU
);
56 CHECKREG
r0, 0x0523F7E8;
57 CHECKREG
r1, 0xA1BCF4C7;
58 CHECKREG
r2, 0x05183CD2;
59 CHECKREG
r3, 0x00010005;
60 CHECKREG
r4, 0x47763CEB;
61 CHECKREG
r5, 0x1235010B;
62 CHECKREG
r6, 0x000C001D;
63 CHECKREG
r7, 0x678E0001;
64 CHECKREG p1
, 0x47763CEB;
65 CHECKREG p2
, 0x00032564;
66 CHECKREG p3
, 0x05183CD2;
67 CHECKREG p4
, 0x0523F7E8;
77 A1
+= R1.H
* R0.
L, R4 = ( A0
= R1.
L * R0.
L ) (FU
);
79 A1
-= R2.H
* R3.
L, R6 = ( A0
-= R2.H
* R3.
L ) (FU
);
81 A1
= R4.H
* R5.
L, R0 = ( A0
+= R4.H
* R5.H
) (FU
);
83 A1
+= R6.H
* R7.
L, R4 = ( A0
+= R6.
L * R7.H
) (FU
);
85 CHECKREG
r0, 0x2E395300;
86 CHECKREG
r1, 0xABD69EC7;
87 CHECKREG
r2, 0x71145679;
88 CHECKREG
r3, 0x08010007;
89 CHECKREG
r4, 0x8D7C0C72;
90 CHECKREG
r5, 0x1225010B;
91 CHECKREG
r6, 0x2B29EB7F;
92 CHECKREG
r7, 0x678E0561;
93 CHECKREG p1
, 0x2B2D030B;
94 CHECKREG p2
, 0x2B29EB7F;
95 CHECKREG p3
, 0x2E395300;
96 CHECKREG p4
, 0x8D7C0C72;
100 imm32
r2, 0xa9145679;
101 imm32
r3, 0xd0910007;
102 imm32
r4, 0xedb91569;
103 imm32
r5, 0xd235910b;
104 imm32
r6, 0x0d0c0999;
105 imm32
r7, 0x67de0009;
106 A1
+= R5.H
* R3.H
, R0 = ( A0
= R5.
L * R3.
L ) (FU
);
108 A1
= R2.H
* R1.H
, R2 = ( A0
= R2.H
* R1.
L ) (FU
);
110 A1
-= R7.H
* R0.H
, R4 = ( A0
+= R7.H
* R0.H
) (FU
);
112 A1
-= R4.H
* R6.H
, R6 = ( A0
-= R4.
L * R6.H
) (FU
);
114 CHECKREG
r0, 0x0003F74D;
115 CHECKREG
r1, 0x91BCFEC7;
116 CHECKREG
r2, 0xA845468C;
117 CHECKREG
r3, 0xD0910007;
118 CHECKREG
r4, 0xA8467E26;
119 CHECKREG
r5, 0xD235910B;
120 CHECKREG
r6, 0xA1D8A65E;
121 CHECKREG
r7, 0x67DE0009;
122 CHECKREG p1
, 0x0003F74D;
123 CHECKREG p2
, 0xA845468C;
124 CHECKREG p3
, 0xA8467E26;
125 CHECKREG p4
, 0xA1D8A65E;
127 imm32
r0, 0x63545abd;
128 imm32
r1, 0x86bcfec7;
129 imm32
r2, 0xa8645679;
130 imm32
r3, 0x00860007;
131 imm32
r4, 0xefb86569;
132 imm32
r5, 0x1235860b;
133 imm32
r6, 0x000c086d;
134 imm32
r7, 0x678e0086;
135 A1
+= R1.
L * R0.
L (M
), R6 = ( A0
= R1.
L * R0.
L ) (FU
);
138 A1
= R2.
L * R3.
L (M
), R0 = ( A0
-= R2.H
* R3.
L ) (FU
);
140 A1
= R7.
L * R4.
L (M
), R2 = ( A0
+= R7.H
* R4.H
) (FU
);
142 A1
-= R6.
L * R5.
L (M
), R4 = ( A0
+= R6.
L * R5.H
) (FU
);
144 CHECKREG
r0, 0x5A49742F;
145 CHECKREG
r1, 0x86BCFEC7;
146 CHECKREG
r2, 0xBB41743F;
147 CHECKREG
r3, 0x00860007;
148 CHECKREG
r4, 0xBC5110E6;
149 CHECKREG
r5, 0x1235860B;
150 CHECKREG
r6, 0x5A4E0EEB;
151 CHECKREG
r7, 0x678E0086;
152 CHECKREG p1
, 0x5A4E0EEB;
153 CHECKREG p2
, 0x5A49742F;
154 CHECKREG p3
, 0xBB41743F;
155 CHECKREG p4
, 0xBC5110E6;
156 CHECKREG p5
, 0x573CE4B9;
158 imm32
r0, 0x98764abd;
159 imm32
r1, 0xa1bcf4c7;
160 imm32
r2, 0xa1145649;
161 imm32
r3, 0x00010005;
162 imm32
r4, 0xefbc1569;
163 imm32
r5, 0x1235010b;
164 imm32
r6, 0x000c001d;
165 imm32
r7, 0x678e0001;
166 R4 = ( A0
-= R1.
L * R0.
L ) (FU
);
168 R0 = ( A0
= R2.H
* R3.
L ) (FU
);
170 R2 = ( A0
+= R4.H
* R5.H
) (FU
);
172 R0 = ( A0
-= R6.
L * R7.H
) (FU
);
174 CHECKREG
r0, 0x0846EF70;
175 CHECKREG
r1, 0xA1BCF4C7;
176 CHECKREG
r2, 0x0852AA86;
177 CHECKREG
r3, 0x00010005;
178 CHECKREG
r4, 0x74DAD3FB;
179 CHECKREG
r5, 0x1235010B;
180 CHECKREG
r6, 0x000C001D;
181 CHECKREG
r7, 0x678E0001;
182 CHECKREG p1
, 0x74DAD3FB;
183 CHECKREG p2
, 0x00032564;
184 CHECKREG p3
, 0x0852AA86;
185 CHECKREG p4
, 0x0846EF70;
187 imm32
r0, 0x7136459d;
188 imm32
r1, 0xabd69ec7;
189 imm32
r2, 0x71145679;
190 imm32
r3, 0x08010007;
191 imm32
r4, 0xef9c1569;
192 imm32
r5, 0x1225010b;
193 imm32
r6, 0x0003401d;
194 imm32
r7, 0x678e0561;
195 A1
+= R1.H
* R0.
L (M
), R4 = ( A0
= R1.
L * R0.
L ) (FU
);
197 R6 = ( A0
= R2.H
* R3.
L ) (FU
);
199 A1
= R4.H
* R5.
L (M
), R0 = ( A0
+= R4.H
* R5.H
) (FU
);
201 R4 = ( A0
+= R6.
L * R7.H
) (FU
);
203 CHECKREG
r0, 0x03127F0D;
204 CHECKREG
r1, 0xABD69EC7;
205 CHECKREG
r2, 0x71145679;
206 CHECKREG
r3, 0x08010007;
207 CHECKREG
r4, 0x0C98E2B5;
208 CHECKREG
r5, 0x1225010B;
209 CHECKREG
r6, 0x0003178C;
210 CHECKREG
r7, 0x678E0561;
211 CHECKREG p1
, 0x2B2D030B;
212 CHECKREG p2
, 0x0003178C;
213 CHECKREG p3
, 0x03127F0D;
214 CHECKREG p4
, 0x0C98E2B5;
216 imm32
r0, 0x123489bd;
217 imm32
r1, 0x91bcfec7;
218 imm32
r2, 0xa9145679;
219 imm32
r3, 0xd0910007;
220 imm32
r4, 0xedb91569;
221 imm32
r5, 0xd235910b;
222 imm32
r6, 0x0d0c0999;
223 imm32
r7, 0x67de0009;
224 R0 = ( A0
= R5.
L * R3.
L ) (FU
);
226 A1
-= R2.H
* R1.H
(M
), R2 = ( A0
= R2.H
* R1.
L ) (FU
);
228 A1
= R7.H
* R0.H
(M
), R4 = ( A0
-= R7.H
* R0.H
) (FU
);
230 R6 = ( A0
+= R4.
L * R6.H
) (FU
);
232 CHECKREG
r0, 0x0003F74D;
233 CHECKREG
r1, 0x91BCFEC7;
234 CHECKREG
r2, 0xA845468C;
235 CHECKREG
r3, 0xD0910007;
236 CHECKREG
r4, 0xA8440EF2;
237 CHECKREG
r5, 0xD235910B;
238 CHECKREG
r6, 0xA9070C4A;
239 CHECKREG
r7, 0x67DE0009;
240 CHECKREG p1
, 0x0003F74D;
241 CHECKREG p2
, 0xA845468C;
242 CHECKREG p3
, 0xA8440EF2;
243 CHECKREG p4
, 0xA9070C4A;