sim/testsuite/bfin/c_dsp32mac_pair_a1a0_s.s

   1 //Original:/proj/frio/dv/testcases/core/c_dsp32mac_pair_a1a0_s/c_dsp32mac_pair_a1a0_s.dsp
   2 // Spec Reference: dsp32mac pair a1a0 S
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8         A1 = A0 = 0;
   9
  10 // The result accumulated in A       , and stored to a reg half
  11         imm32 r0, 0x63545abd;
  12         imm32 r1, 0x86bcfec7;
  13         imm32 r2, 0xa8645679;
  14         imm32 r3, 0x00860007;
  15         imm32 r4, 0xefb86569;
  16         imm32 r5, 0x1235860b;
  17         imm32 r6, 0x000c086d;
  18         imm32 r7, 0x678e0086;
  19         R7 = ( A1 += R1.L * R0.L ),  R6 = ( A0 = R1.L * R0.L )  (S2RND);
  20         P1 = A1.w;
  21         P2 = A0.w;
  22         R1 = ( A1 = R2.L * R3.L ),  R0 = ( A0 = R2.H * R3.L )  (S2RND);
  23         P3 = A1.w;
  24         P4 = A0.w;
  25         R3 = ( A1 = R7.L * R4.L ),  R2 = ( A0 += R7.H * R4.H )  (S2RND);
  26         P5 = A1.w;
  27         SP = A0.w;
  28         R5 = ( A1 += R6.L * R5.L ),  R4 = ( A0 += R6.L * R5.H )  (S2RND);
  29         FP = A1.w;
  30         CHECKREG r0, 0xFFF66AF0;
  31         CHECKREG r1, 0x0009753C;
  32         CHECKREG r2, 0x00675E70;
  33         CHECKREG r3, 0x5E8D5630;
  34         CHECKREG r4, 0x116128E0;
  35         CHECKREG r5, 0xECD7B7C0;
  36         CHECKREG r6, 0xFE443BAC;
  37         CHECKREG r7, 0xFE443BAC;
  38         CHECKREG p1, 0xFF221DD6;
  39         CHECKREG p2, 0xFF221DD6;
  40         CHECKREG p3, 0x0004BA9E;
  41         CHECKREG p4, 0xFFFB3578;
  42         CHECKREG p5, 0x2F46AB18;
  43         CHECKREG sp, 0x0033AF38;
  44         CHECKREG fp, 0xF66BDBE0;
  45
  46         imm32 r0, 0x98764abd;
  47         imm32 r1, 0xa1bcf4c7;
  48         imm32 r2, 0xa1145649;
  49         imm32 r3, 0x00010005;
  50         imm32 r4, 0xefbc1569;
  51         imm32 r5, 0x1235010b;
  52         imm32 r6, 0x000c001d;
  53         imm32 r7, 0x678e0001;
  54         A0 = R2;
  55         A1 = R3;
  56         R5 = ( A1 += R1.L * R0.H ),  R4 = ( A0 = R1.L * R0.L )  (S2RND);
  57         P1 = A1.w;
  58         P2 = A0.w;
  59         R1 = ( A1 = R2.L * R3.H ),  R0 = ( A0 = R2.H * R3.L )  (S2RND);
  60         P2 = A0.w;
  61         P3 = A1.w;
  62         P4 = A0.w;
  63         R3 = ( A1 = R4.L * R5.H ),  R2 = ( A0 += R4.H * R5.H )  (S2RND);
  64         P5 = A1.w;
  65         SP = A0.w;
  66         R1 = ( A1 += R6.L * R7.H ),  R0 = ( A0 += R6.L * R7.H )  (S2RND);
  67         FP = A0.w;
  68         CHECKREG r0, 0xFC6F3BF8;
  69         CHECKREG r1, 0xFCAF6688;
  70         CHECKREG r2, 0xFC404FA0;
  71         CHECKREG r3, 0xFC807A30;
  72         CHECKREG r4, 0xF2E4F3AC;
  73         CHECKREG r5, 0x1229EEF2;
  74         CHECKREG r6, 0x000C001D;
  75         CHECKREG r7, 0x678E0001;
  76         CHECKREG p1, 0x0914F779;
  77         CHECKREG p2, 0xFFFC4AC8;
  78         CHECKREG p3, 0x0000AC92;
  79         CHECKREG p4, 0xFFFC4AC8;
  80         CHECKREG p5, 0xFE403D18;
  81         CHECKREG sp, 0xFE2027D0;
  82         CHECKREG fp, 0xFE379DFC;
  83
  84         imm32 r0, 0x7136459d;
  85         imm32 r1, 0xabd69ec7;
  86         imm32 r2, 0x71145679;
  87         imm32 r3, 0x08010007;
  88         imm32 r4, 0xef9c1569;
  89         imm32 r5, 0x1225010b;
  90         imm32 r6, 0x0003401d;
  91         imm32 r7, 0x678e0561;
  92         A0 = R0;
  93         A1 = R1;
  94         R5 = ( A1 += R1.H * R0.L ),  R4 = ( A0 = R1.L * R0.L )  (S2RND);
  95         P1 = A1.w;
  96         P2 = A0.w;
  97         R7 = ( A1 = R2.H * R3.L ),  R6 = ( A0 = R2.H * R3.L )  (S2RND);
  98         P3 = A1.w;
  99         P4 = A0.w;
 100         R1 = ( A1 = R4.H * R5.L ),  R0 = ( A0 += R4.H * R5.H )  (S2RND);
 101         P5 = A1.w;
 102         SP = A0.w;
 103         R5 = ( A1 += R6.H * R7.L ),  R4 = ( A0 += R6.L * R7.H )  (S2RND);
 104         FP = A0.w;
 105         CHECKREG r0, 0x7FFFFFFF;
 106         CHECKREG r1, 0x00000000;
 107         CHECKREG r2, 0x71145679;
 108         CHECKREG r3, 0x08010007;
 109         CHECKREG r4, 0x7FFFFFFF;
 110         CHECKREG r5, 0x0011A900;
 111         CHECKREG r6, 0x000C5E30;
 112         CHECKREG r7, 0x000C5E30;
 113         CHECKREG p1, 0x7E10BF43;
 114         CHECKREG p2, 0xCB200616;
 115         CHECKREG p3, 0x00062F18;
 116         CHECKREG p5, 0x00000000;
 117         CHECKREG p4, 0x00062F18;
 118         CHECKREG sp, 0x69C62F18;
 119         CHECKREG fp, 0x69CF0398;
 120
 121         imm32 r0, 0x123489bd;
 122         imm32 r1, 0x91bcfec7;
 123         imm32 r2, 0xa9145679;
 124         imm32 r3, 0xd0910007;
 125         imm32 r4, 0xedb91569;
 126         imm32 r5, 0xd235910b;
 127         imm32 r6, 0x0d0c0999;
 128         imm32 r7, 0x67de0009;
 129         A0 = R0;
 130         A1 = R1;
 131         R1 = ( A1 += R5.H * R3.H ),  R0 = ( A0 = R5.L * R3.L )  (S2RND);
 132         P1 = A1.w;
 133         P2 = A0.w;
 134         R3 = ( A1 = R2.H * R1.H ),  R2 = ( A0 = R2.H * R1.L )  (S2RND);
 135         P3 = A1.w;
 136         P4 = A0.w;
 137         R5 = ( A1 = R7.H * R0.H ),  R4 = ( A0 += R7.H * R0.H )  (S2RND);
 138         P5 = A1.w;
 139         SP = A0.w;
 140         R7 = ( A1 += R4.H * R6.H ),  R6 = ( A0 += R4.L * R6.H )  (S2RND);
 141         FP = A0.w;
 142         CHECKREG r0, 0xFFF3DD34;
 143         CHECKREG r1, 0x80000000;
 144         CHECKREG r2, 0x00000000;
 145         CHECKREG r3, 0x7FFFFFFF;
 146         CHECKREG r4, 0xFFEAE6E8;
 147         CHECKREG r5, 0xFFEAE6E8;
 148         CHECKREG r6, 0xFACD5268;
 149         CHECKREG r7, 0xFFE66AC8;
 150         CHECKREG p1, 0xA2B53ED1;
 151         CHECKREG p2, 0xFFF9EE9A;
 152         CHECKREG p3, 0x56EC0000;
 153         CHECKREG p4, 0x00000000;
 154         CHECKREG p5, 0xFFF57374;
 155         CHECKREG sp, 0xFFF57374;
 156         CHECKREG fp, 0xFD66A934;
 157
 158         imm32 r0, 0x63545abd;
 159         imm32 r1, 0x86bcfec7;
 160         imm32 r2, 0xa8645679;
 161         imm32 r3, 0x00860007;
 162         imm32 r4, 0xefb86569;
 163         imm32 r5, 0x1235860b;
 164         imm32 r6, 0x000c086d;
 165         imm32 r7, 0x678e0086;
 166         A0 = R0;
 167         A1 = R1;
 168         R7 = ( A1 += R1.L * R0.L ) (M),  R6 = ( A0 = R1.L * R0.L )  (S2RND);
 169         P1 = A1.w;
 170         P2 = A0.w;
 171         R1 = ( A1 -= R2.L * R3.L ) (M),  R0 = ( A0 = R2.H * R3.L )  (S2RND);
 172         P3 = A1.w;
 173         P4 = A0.w;
 174         R3 = ( A1 -= R7.L * R4.L ) (M),  R2 = ( A0 += R7.H * R4.H )  (S2RND);
 175         P5 = A1.w;
 176         SP = A0.w;
 177         R5 = ( A1 += R6.L * R5.L ) (M),  R4 = ( A0 += R6.L * R5.H )  (S2RND);
 178         FP = A0.w;
 179         CHECKREG r0, 0xFFF66AF0;
 180         CHECKREG r1, 0x80000000;
 181         CHECKREG r2, 0x20866AF0;
 182         CHECKREG r3, 0x80000000;
 183         CHECKREG r4, 0x31803560;
 184         CHECKREG r5, 0x80000000;
 185         CHECKREG r6, 0xFE443BAC;
 186         CHECKREG r7, 0x80000000;
 187         CHECKREG p1, 0x864E0DB2;
 188         CHECKREG p2, 0xFF221DD6;
 189         CHECKREG p3, 0x864BB063;
 190         CHECKREG p4, 0xFFFB3578;
 191         CHECKREG p5, 0x864BB063;
 192         CHECKREG sp, 0x10433578;
 193         CHECKREG fp, 0x18C01AB0;
 194
 195         imm32 r0, 0x98764abd;
 196         imm32 r1, 0xa1bcf4c7;
 197         imm32 r2, 0xa1145649;
 198         imm32 r3, 0x00010005;
 199         imm32 r4, 0xefbc1569;
 200         imm32 r5, 0x1235010b;
 201         imm32 r6, 0x000c001d;
 202         imm32 r7, 0x678e0001;
 203         A0 = R0;
 204         A1 = R1;
 205         R5 = A1,  R4 = ( A0 = R3.L * R0.L )  (S2RND);
 206         P1 = A1.w;
 207         P2 = A0.w;
 208         R1 = A1,  R0 = ( A0 = R2.H * R1.L )  (S2RND);
 209         P3 = A1.w;
 210         P4 = A0.w;
 211         R3 = A1,  R2 = ( A0 += R7.H * R5.H )  (S2RND);
 212         P5 = A1.w;
 213         SP = A0.w;
 214         R1 = A1,  R0 = ( A0 += R4.L * R6.H )  (S2RND);
 215         FP = A1.w;
 216         CHECKREG r0, 0x80000000;
 217         CHECKREG r1, 0x80000000;
 218         CHECKREG r2, 0x80000000;
 219         CHECKREG r3, 0x80000000;
 220         CHECKREG r4, 0x0005D6C4;
 221         CHECKREG r5, 0x80000000;
 222         CHECKREG r6, 0x000C001D;
 223         CHECKREG r7, 0x678E0001;
 224         CHECKREG p1, 0xA1BCF4C7;
 225         CHECKREG p2, 0x0002EB62;
 226         CHECKREG p3, 0xA1BCF4C7;
 227         CHECKREG p4, 0x08528D18;
 228         CHECKREG p5, 0xA1BCF4C7;
 229         CHECKREG sp, 0xA0C48D18;
 230         CHECKREG fp, 0xA1BCF4C7;
 231
 232         imm32 r0, 0x7136459d;
 233         imm32 r1, 0xabd69ec7;
 234         imm32 r2, 0x71145679;
 235         imm32 r3, 0x08010007;
 236         imm32 r4, 0xef9c1569;
 237         imm32 r5, 0x1225010b;
 238         imm32 r6, 0x0003401d;
 239         imm32 r7, 0x678e0561;
 240         A0 = R0;
 241         A1 = R1;
 242         R5 = ( A1 += R1.H * R6.L ) (M),  R4 = ( A0 = R1.L * R6.L )  (S2RND);
 243         P1 = A1.w;
 244         P2 = A0.w;
 245         R7 = A1,  R6 = ( A0 -= R4.H * R3.L )  (S2RND);
 246         P3 = A1.w;
 247         P4 = A0.w;
 248         R1 = ( A1 = R2.H * R5.L ) (M),  R0 = ( A0 += R2.H * R5.H )  (S2RND);
 249         P5 = A1.w;
 250         SP = A0.w;
 251         R5 = A1,  R4 = ( A0 += R0.L * R7.H )  (S2RND);
 252         FP = A1.w;
 253         CHECKREG r0, 0x80000000;
 254         CHECKREG r1, 0x00000000;
 255         CHECKREG r2, 0x71145679;
 256         CHECKREG r3, 0x08010007;
 257         CHECKREG r4, 0x80000000;
 258         CHECKREG r5, 0x00000000;
 259         CHECKREG r6, 0x9EA59954;
 260         CHECKREG r7, 0x80000000;
 261         CHECKREG p1, 0x96C29605;
 262         CHECKREG p2, 0xCF4D7916;
 263         CHECKREG p3, 0x96C29605;
 264         CHECKREG p4, 0xCF52CCAA;
 265         CHECKREG p5, 0x00000000;
 266         CHECKREG sp, 0x5E3ECCAA;
 267         CHECKREG fp, 0x00000000;
 268
 269         imm32 r0, 0x123489bd;
 270         imm32 r1, 0x91bcfec7;
 271         imm32 r2, 0xa9145679;
 272         imm32 r3, 0xd0910007;
 273         imm32 r4, 0xedb91569;
 274         imm32 r5, 0xd235910b;
 275         imm32 r6, 0x0d0c0999;
 276         imm32 r7, 0x67de0009;
 277         A0 = R0;
 278         A1 = R1;
 279         R1 = A1,  R0 = ( A0 -= R5.L * R3.L )  (S2RND);
 280         P1 = A1.w;
 281         P2 = A0.w;
 282         R3 = ( A1 -= R2.H * R1.H ) (M),  R2 = ( A0 = R2.H * R1.L )  (S2RND);
 283         P3 = A1.w;
 284         P4 = A0.w;
 285         R5 = ( A1 = R7.H * R0.H ) (M),  R4 = ( A0 -= R7.H * R0.H )  (S2RND);
 286         P5 = A0.w;
 287         SP = A1.w;
 288         R7 = A1,  R6 = ( A0 += R4.L * R6.H )  (S2RND);
 289         FP = A0.w;
 290         CHECKREG r0, 0x24753646;
 291         CHECKREG r1, 0x80000000;
 292         CHECKREG r2, 0x00000000;
 293         CHECKREG r3, 0x80000000;
 294         CHECKREG r4, 0xC4D53E28;
 295         CHECKREG r5, 0x1D9560EC;
 296         CHECKREG r6, 0xD18105A8;
 297         CHECKREG r7, 0x1D9560EC;
 298         CHECKREG p1, 0x91BCFEC7;
 299         CHECKREG p2, 0x123A9B23;
 300         CHECKREG p3, 0xBD32FEC7;
 301         CHECKREG p4, 0x00000000;
 302         CHECKREG p5, 0xE26A9F14;
 303         CHECKREG sp, 0x0ECAB076;
 304         CHECKREG fp, 0xE8C082D4;
 305
 306         pass