sim/testsuite/bfin/c_dspldst_st_drlo_ipp.s

   1 //Original:testcases/core/c_dspldst_st_drlo_ipp/c_dspldst_st_drlo_ipp.dsp
   2 // Spec Reference: c_dspldst st_drlo_ipp
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8 // set all regs
   9 INIT_I_REGS -1;
  10 init_b_regs 0;
  11 init_l_regs 0;
  12 init_m_regs -1;
  13
  14 // Half reg 16 bit mem store
  15
  16         imm32 r0, 0x0a123456;
  17         imm32 r1, 0x11b12345;
  18         imm32 r2, 0x222c1234;
  19         imm32 r3, 0x3344d012;
  20         imm32 r4, 0x5566e012;
  21         imm32 r5, 0x789abf01;
  22         imm32 r6, 0xabcd0123;
  23         imm32 r7, 0x01234567;
  24
  25 // initial values
  26         loadsym i0, DATA_ADDR_3;
  27         loadsym i1, DATA_ADDR_4;
  28         loadsym i2, DATA_ADDR_5;
  29         loadsym i3, DATA_ADDR_6;
  30
  31         W [ I0 ++ ] = R0.L;
  32         W [ I1 ++ ] = R1.L;
  33         W [ I2 ++ ] = R2.L;
  34         W [ I3 ++ ] = R3.L;
  35         W [ I0 ++ ] = R1.L;
  36         W [ I1 ++ ] = R2.L;
  37         W [ I2 ++ ] = R3.L;
  38         W [ I3 ++ ] = R4.L;
  39
  40         W [ I0 ++ ] = R3.L;
  41         W [ I1 ++ ] = R4.L;
  42         W [ I2 ++ ] = R5.L;
  43         W [ I3 ++ ] = R6.L;
  44         W [ I0 ++ ] = R4.L;
  45         W [ I1 ++ ] = R5.L;
  46         W [ I2 ++ ] = R6.L;
  47         W [ I3 ++ ] = R7.L;
  48         loadsym i0, DATA_ADDR_3;
  49         loadsym i1, DATA_ADDR_4;
  50         loadsym i2, DATA_ADDR_5;
  51         loadsym i3, DATA_ADDR_6;
  52         R0 = [ I0 ++ ];
  53         R1 = [ I1 ++ ];
  54         R2 = [ I2 ++ ];
  55         R3 = [ I3 ++ ];
  56         R4 = [ I0 ++ ];
  57         R5 = [ I1 ++ ];
  58         R6 = [ I2 ++ ];
  59         R7 = [ I3 ++ ];
  60         CHECKREG r0, 0x23453456;
  61         CHECKREG r1, 0x12342345;
  62         CHECKREG r2, 0xD0121234;
  63         CHECKREG r3, 0xE012D012;
  64         CHECKREG r4, 0xE012D012;
  65         CHECKREG r5, 0xBF01E012;
  66         CHECKREG r6, 0x0123BF01;
  67         CHECKREG r7, 0x45670123;
  68
  69         R0 = [ I0 ++ ];
  70         R1 = [ I1 ++ ];
  71         R2 = [ I2 ++ ];
  72         R3 = [ I3 ++ ];
  73         R4 = [ I0 ++ ];
  74         R5 = [ I1 ++ ];
  75         R6 = [ I2 ++ ];
  76         R7 = [ I3 ++ ];
  77         CHECKREG r0, 0x08090A0B;
  78         CHECKREG r1, 0x28292A2B;
  79         CHECKREG r2, 0x48494A4B;
  80         CHECKREG r3, 0x68696A6B;
  81         CHECKREG r4, 0x0C0D0E0F;
  82         CHECKREG r5, 0x2C2D2E2F;
  83         CHECKREG r6, 0x4C4D4E4F;
  84         CHECKREG r7, 0x6C6D6E6F;
  85
  86 // initial values
  87
  88         imm32 r0, 0x01b2c3d4;
  89         imm32 r1, 0x10145618;
  90         imm32 r2, 0xa2016729;
  91         imm32 r3, 0xbb30183a;
  92         imm32 r4, 0xdec4014b;
  93         imm32 r5, 0x5f7d501c;
  94         imm32 r6, 0x3089eb01;
  95         imm32 r7, 0x719abf70;
  96         loadsym i0, DATA_ADDR_3, 0x20;
  97         loadsym i1, DATA_ADDR_4, 0x20;
  98         loadsym i2, DATA_ADDR_5, 0x20;
  99         loadsym i3, DATA_ADDR_6, 0x20;
 100
 101         W [ I0 -- ] = R0.L;
 102         W [ I1 -- ] = R1.L;
 103         W [ I2 -- ] = R2.L;
 104         W [ I3 -- ] = R3.L;
 105         W [ I0 -- ] = R1.L;
 106         W [ I1 -- ] = R2.L;
 107         W [ I2 -- ] = R3.L;
 108         W [ I3 -- ] = R4.L;
 109
 110         W [ I0 -- ] = R3.L;
 111         W [ I1 -- ] = R4.L;
 112         W [ I2 -- ] = R5.L;
 113         W [ I3 -- ] = R6.L;
 114         W [ I0 -- ] = R4.L;
 115         W [ I1 -- ] = R5.L;
 116         W [ I2 -- ] = R6.L;
 117         W [ I3 -- ] = R7.L;
 118         loadsym i0, DATA_ADDR_3, 0x20;
 119         loadsym i1, DATA_ADDR_4, 0x20;
 120         loadsym i2, DATA_ADDR_5, 0x20;
 121         loadsym i3, DATA_ADDR_6, 0x20;
 122         R0 = [ I0 -- ];
 123         R1 = [ I1 -- ];
 124         R2 = [ I2 -- ];
 125         R3 = [ I3 -- ];
 126         R4 = [ I0 -- ];
 127         R5 = [ I1 -- ];
 128         R6 = [ I2 -- ];
 129         R7 = [ I3 -- ];
 130         CHECKREG r0, 0x0000C3D4;
 131         CHECKREG r1, 0x00005618;
 132         CHECKREG r2, 0x00006729;
 133         CHECKREG r3, 0x0000183A;
 134         CHECKREG r4, 0x5618183A;
 135         CHECKREG r5, 0x6729014B;
 136         CHECKREG r6, 0x183A501C;
 137         CHECKREG r7, 0x014BEB01;
 138         R0 = [ I0 -- ];
 139         R1 = [ I1 -- ];
 140         R2 = [ I2 -- ];
 141         R3 = [ I3 -- ];
 142         R4 = [ I0 -- ];
 143         R5 = [ I1 -- ];
 144         R6 = [ I2 -- ];
 145         R7 = [ I3 -- ];
 146         CHECKREG r0, 0x014B1A1B;
 147         CHECKREG r1, 0x501C3A3B;
 148         CHECKREG r2, 0xEB015A5B;
 149         CHECKREG r3, 0xBF707A7B;
 150         CHECKREG r4, 0x14151617;
 151         CHECKREG r5, 0x34353637;
 152         CHECKREG r6, 0x54555657;
 153         CHECKREG r7, 0x74757677;
 154
 155         pass
 156
 157 // Pre-load memory with known data
 158 // More data is defined than will actually be used
 159
 160         .data
 161 DATA_ADDR_3:
 162         .dd 0x00010203
 163         .dd 0x04050607
 164         .dd 0x08090A0B
 165         .dd 0x0C0D0E0F
 166         .dd 0x10111213
 167         .dd 0x14151617
 168         .dd 0x18191A1B
 169         .dd 0x1C1D1E1F
 170         .dd 0x00000000
 171         .dd 0x00000000
 172         .dd 0x00000000
 173         .dd 0x00000000
 174         .dd 0x00000000
 175         .dd 0x00000000
 176         .dd 0x00000000
 177         .dd 0x00000000
 178         .dd 0x00000000
 179         .dd 0x00000000
 180         .dd 0x00000000
 181         .dd 0x00000000
 182         .dd 0x00000000
 183         .dd 0x00000000
 184         .dd 0x00000000
 185         .dd 0x00000000
 186         .dd 0x00000000
 187         .dd 0x00000000
 188         .dd 0x00000000
 189         .dd 0x00000000
 190         .dd 0x00000000
 191         .dd 0x00000000
 192         .dd 0x00000000
 193         .dd 0x00000000
 194         .dd 0x00000000
 195
 196 DATA_ADDR_4:
 197         .dd 0x20212223
 198         .dd 0x24252627
 199         .dd 0x28292A2B
 200         .dd 0x2C2D2E2F
 201         .dd 0x30313233
 202         .dd 0x34353637
 203         .dd 0x38393A3B
 204         .dd 0x3C3D3E3F
 205         .dd 0x00000000
 206         .dd 0x00000000
 207         .dd 0x00000000
 208         .dd 0x00000000
 209         .dd 0x00000000
 210         .dd 0x00000000
 211         .dd 0x00000000
 212         .dd 0x00000000
 213         .dd 0x00000000
 214         .dd 0x00000000
 215         .dd 0x00000000
 216         .dd 0x00000000
 217         .dd 0x00000000
 218         .dd 0x00000000
 219         .dd 0x00000000
 220         .dd 0x00000000
 221
 222 DATA_ADDR_5:
 223         .dd 0x40414243
 224         .dd 0x44454647
 225         .dd 0x48494A4B
 226         .dd 0x4C4D4E4F
 227         .dd 0x50515253
 228         .dd 0x54555657
 229         .dd 0x58595A5B
 230         .dd 0x5C5D5E5F
 231         .dd 0x00000000
 232         .dd 0x00000000
 233         .dd 0x00000000
 234         .dd 0x00000000
 235         .dd 0x00000000
 236         .dd 0x00000000
 237         .dd 0x00000000
 238         .dd 0x00000000
 239         .dd 0x00000000
 240         .dd 0x00000000
 241         .dd 0x00000000
 242         .dd 0x00000000
 243         .dd 0x00000000
 244         .dd 0x00000000
 245         .dd 0x00000000
 246         .dd 0x00000000
 247         .dd 0x00000000
 248         .dd 0x00000000
 249         .dd 0x00000000
 250         .dd 0x00000000
 251         .dd 0x00000000
 252         .dd 0x00000000
 253         .dd 0x00000000
 254         .dd 0x00000000
 255         .dd 0x00000000
 256
 257 DATA_ADDR_6:
 258         .dd 0x60616263
 259         .dd 0x64656667
 260         .dd 0x68696A6B
 261         .dd 0x6C6D6E6F
 262         .dd 0x70717273
 263         .dd 0x74757677
 264         .dd 0x78797A7B
 265         .dd 0x7C7D7E7F
 266         .dd 0x00000000
 267         .dd 0x00000000
 268         .dd 0x00000000
 269         .dd 0x00000000
 270         .dd 0x00000000
 271         .dd 0x00000000
 272         .dd 0x00000000
 273         .dd 0x00000000
 274         .dd 0x00000000
 275         .dd 0x00000000
 276         .dd 0x00000000
 277         .dd 0x00000000
 278         .dd 0x00000000
 279         .dd 0x00000000
 280         .dd 0x00000000
 281         .dd 0x00000000
 282         .dd 0x00000000
 283         .dd 0x00000000
 284         .dd 0x00000000
 285         .dd 0x00000000
 286         .dd 0x00000000
 287         .dd 0x00000000
 288         .dd 0x00000000
 289         .dd 0x00000000
 290         .dd 0x00000000
 291
 292 DATA_ADDR_7:
 293         .dd 0x80818283
 294         .dd 0x84858687
 295         .dd 0x88898A8B
 296         .dd 0x8C8D8E8F
 297         .dd 0x90919293
 298         .dd 0x94959697
 299         .dd 0x98999A9B
 300         .dd 0x9C9D9E9F
 301         .dd 0x00000000
 302         .dd 0x00000000
 303         .dd 0x00000000
 304         .dd 0x00000000
 305         .dd 0x00000000
 306         .dd 0x00000000
 307         .dd 0x00000000
 308         .dd 0x00000000
 309         .dd 0x00000000
 310         .dd 0x00000000
 311         .dd 0x00000000
 312         .dd 0x00000000
 313         .dd 0x00000000
 314         .dd 0x00000000
 315         .dd 0x00000000
 316         .dd 0x00000000
 317         .dd 0x00000000
 318         .dd 0x00000000
 319         .dd 0x00000000
 320         .dd 0x00000000
 321         .dd 0x00000000
 322         .dd 0x00000000
 323         .dd 0x00000000
 324         .dd 0x00000000
 325         .dd 0x00000000
 326
 327 DATA_ADDR_8:
 328         .dd 0xA0A1A2A3
 329         .dd 0xA4A5A6A7
 330         .dd 0xA8A9AAAB
 331         .dd 0xACADAEAF
 332         .dd 0xB0B1B2B3
 333         .dd 0xB4B5B6B7
 334         .dd 0xB8B9BABB
 335         .dd 0xBCBDBEBF
 336         .dd 0xC0C1C2C3
 337         .dd 0xC4C5C6C7
 338         .dd 0xC8C9CACB
 339         .dd 0xCCCDCECF
 340         .dd 0xD0D1D2D3
 341         .dd 0xD4D5D6D7
 342         .dd 0xD8D9DADB
 343         .dd 0xDCDDDEDF
 344         .dd 0xE0E1E2E3
 345         .dd 0xE4E5E6E7
 346         .dd 0xE8E9EAEB
 347         .dd 0xECEDEEEF
 348         .dd 0xF0F1F2F3
 349         .dd 0xF4F5F6F7
 350         .dd 0xF8F9FAFB
 351         .dd 0xFCFDFEFF