sim/testsuite/bfin/c_loopsetup_preg_div2_lc0.s

   1 //Original:/testcases/core/c_loopsetup_preg_div2_lc0/c_loopsetup_preg_div2_lc0.dsp
   2 // Spec Reference: loopsetup preg lc0 / 2
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8
   9 INIT_R_REGS 0;
  10
  11 ASTAT = r0;
  12
  13 P5 = 20;
  14 P1 = 30;
  15 P2 = 40;
  16 P3 = 50;
  17 P4 = 60;
  18 //p5 = 7;
  19 SP = 80 (X);
  20 FP = 90 (X);
  21
  22 R0 = 0x05;
  23 R1 = 0x10;
  24 R2 = 0x20;
  25 R3 = 0x30;
  26 R4 = 0x40 (X);
  27 R5 = 0x50 (X);
  28 R6 = 0x60 (X);
  29 R7 = 0x70 (X);
  30 LSETUP ( start1 , end1 ) LC0 = P1 >> 1;
  31 start1: R0 += 1;
  32  R1 += -2;
  33 end1: R2 += 3;
  34  R3 += 4;
  35 LSETUP ( start2 , end2 ) LC0 = P2 >> 1;
  36 start2: R4 += 4;
  37 end2: R5 += -5;
  38  R3 += 1;
  39 LSETUP ( start3 , end3 ) LC0 = P3 >> 1;
  40 start3: R6 += 6;
  41 end3: R7 += -7;
  42  R3 += 1;
  43 CHECKREG r0, 0x00000014;
  44 CHECKREG r1, 0xFFFFFFF2;
  45 CHECKREG r2, 0x0000004D;
  46 CHECKREG r3, 0x00000036;
  47 CHECKREG r4, 0x00000090;
  48 CHECKREG r5, 0xFFFFFFEC;
  49 CHECKREG r6, 0x000000F6;
  50 CHECKREG r7, 0xFFFFFFC1;
  51
  52 R0 = 0x05;
  53 R1 = 0x10;
  54 R2 = 0x20;
  55 R3 = 0x30;
  56 R4 = 0x40 (X);
  57 R5 = 0x50 (X);
  58 R6 = 0x60 (X);
  59 R7 = 0x70 (X);
  60 LSETUP ( start4 , end4 ) LC0 = P4 >> 1;
  61 start4: R0 += 1;
  62  R1 += -2;
  63 end4: R2 += 3;
  64  R3 += 4;
  65 LSETUP ( start5 , end5 ) LC0 = P5 >> 1;
  66 start5: R4 += 1;
  67 end5: R5 += -2;
  68  R3 += 3;
  69 LSETUP ( start6 , end6 ) LC0 = SP >> 1;
  70 start6: R6 += 4;
  71 end6: R7 += -5;
  72  R3 += 6;
  73 CHECKREG r0, 0x00000023;
  74 CHECKREG r1, 0xFFFFFFD4;
  75 CHECKREG r2, 0x0000007A;
  76 CHECKREG r3, 0x0000003D;
  77 CHECKREG r4, 0x0000004A;
  78 CHECKREG r5, 0x0000003C;
  79 CHECKREG r6, 0x00000100;
  80 CHECKREG r7, 0xFFFFFFA8;
  81 LSETUP ( start7 , end7 ) LC0 = FP >> 1;
  82 start7: R4 += 4;
  83 end7: R5 += -5;
  84  R3 += 6;
  85 CHECKREG r0, 0x00000023;
  86 CHECKREG r1, 0xFFFFFFD4;
  87 CHECKREG r2, 0x0000007A;
  88 CHECKREG r3, 0x00000043;
  89 CHECKREG r4, 0x000000FE;
  90 CHECKREG r5, 0xFFFFFF5B;
  91 CHECKREG r6, 0x00000100;
  92 CHECKREG r7, 0xFFFFFFA8;
  93
  94
  95 pass