sim/testsuite/bfin/c_regmv_acc_acc.s

   1 //Original:/testcases/core/c_regmv_acc_acc/c_regmv_acc_acc.dsp
   2 // Spec Reference: regmv acc-acc
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8         imm32 r0, 0xa9627911;
   9         imm32 r1, 0xd0158978;
  10         imm32 r2, 0xc1234567;
  11         imm32 r3, 0x10060007;
  12         imm32 r4, 0x02080009;
  13         imm32 r5, 0x003a000b;
  14         imm32 r6, 0x0004000d;
  15         imm32 r7, 0x000e500f;
  16         A0 = R0;
  17
  18         A1 = A0;
  19         R2 = A1.w;
  20         R3 = A1.x;
  21
  22         A1.x = A0.w;
  23         A1.w = A0.w;
  24         A0.x = A0.w;
  25         A0.w = A0.w;
  26         R4 = A0.w;
  27         R5 = A0.x;
  28         R6 = A1.w;
  29         R7 = A1.x;
  30
  31         CHECKREG r0, 0xA9627911;
  32         CHECKREG r1, 0xD0158978;
  33         CHECKREG r2, 0xA9627911;
  34         CHECKREG r3, 0xFFFFFFFF;
  35         CHECKREG r4, 0xA9627911;
  36         CHECKREG r5, 0x00000011;
  37         CHECKREG r6, 0xA9627911;
  38         CHECKREG r7, 0x00000011;
  39
  40         imm32 r0, 0x90ba7911;
  41         imm32 r1, 0xe3458978;
  42         imm32 r2, 0xc1234567;
  43         imm32 r3, 0x10060007;
  44         imm32 r4, 0x56080009;
  45         imm32 r5, 0x783a000b;
  46         imm32 r6, 0xf247890d;
  47         imm32 r7, 0x489e534f;
  48         A1 = R0;
  49
  50         A0 = A1;
  51         R2 = A0.w;
  52         R3 = A0.x;
  53
  54         A0.x = A1.w;
  55         A0.w = A1.w;
  56         A1.x = A1.w;
  57         A1.w = A1.w;
  58         R4 = A0.w;
  59         R5 = A0.x;
  60         R6 = A1.w;
  61         R7 = A1.x;
  62         CHECKREG r0, 0x90BA7911;
  63         CHECKREG r1, 0xE3458978;
  64         CHECKREG r2, 0x90BA7911;
  65         CHECKREG r3, 0xFFFFFFFF;
  66         CHECKREG r4, 0x90BA7911;
  67         CHECKREG r5, 0x00000011;
  68         CHECKREG r6, 0x90BA7911;
  69         CHECKREG r7, 0x00000011;
  70
  71         imm32 r0, 0xf9627911;
  72         imm32 r1, 0xd0158978;
  73         imm32 r2, 0xc1234567;
  74         imm32 r3, 0x10060007;
  75         imm32 r4, 0x02080009;
  76         imm32 r5, 0x003a000b;
  77         imm32 r6, 0xf247890d;
  78         imm32 r7, 0x789e534f;
  79         A0 = R0;
  80
  81         A0.x = A0.x;
  82         A0.w = A0.x;
  83         A1.w = A0.x;
  84         A1.x = A0.x;
  85         R4 = A0.w;
  86         R5 = A0.x;
  87         R6 = A1.w;
  88         R7 = A1.x;
  89         CHECKREG r0, 0xF9627911;
  90         CHECKREG r1, 0xD0158978;
  91         CHECKREG r2, 0xC1234567;
  92         CHECKREG r3, 0x10060007;
  93         CHECKREG r4, 0xFFFFFFFF;
  94         CHECKREG r5, 0xFFFFFFFF;
  95         CHECKREG r6, 0xFFFFFFFF;
  96         CHECKREG r7, 0xFFFFFFFF;
  97
  98         imm32 r0, 0x90ba7911;
  99         imm32 r1, 0xe3458978;
 100         imm32 r2, 0xc1234567;
 101         imm32 r3, 0x10060007;
 102         imm32 r4, 0x56080009;
 103         imm32 r5, 0x783a000b;
 104         imm32 r6, 0xf247890d;
 105         imm32 r7, 0x489e534f;
 106         A1 = R0;
 107
 108         A0.x = A1.x;
 109         A0.w = A1.x;
 110         A1.w = A1.x;
 111         A1.x = A1.x;
 112         R4 = A0.w;
 113         R5 = A0.x;
 114         R6 = A1.w;
 115         R7 = A1.x;
 116         CHECKREG r0, 0x90BA7911;
 117         CHECKREG r1, 0xE3458978;
 118         CHECKREG r2, 0xC1234567;
 119         CHECKREG r3, 0x10060007;
 120         CHECKREG r4, 0xFFFFFFFF;
 121         CHECKREG r5, 0xFFFFFFFF;
 122         CHECKREG r6, 0xFFFFFFFF;
 123         CHECKREG r7, 0xFFFFFFFF;
 124
 125         pass