sim/testsuite/bfin/c_regmv_dag_lz_dep.s

   1 //Original:/testcases/core/c_regmv_dag_lz_dep/c_regmv_dag_lz_dep.dsp
   2 // Spec Reference: regmv dag lz dep forward
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8
   9 INIT_R_REGS 0;
  10
  11 imm32 r0, 0x11111111;
  12 imm32 r1, 0x22223331;
  13 imm32 r2, 0x44445551;
  14 imm32 r3, 0x66667771;
  15 imm32 r4, 0x88889991;
  16 imm32 r5, 0xaaaabbb1;
  17 imm32 r6, 0xccccddd1;
  18 imm32 r7, 0xeeeefff1;
  19
  20 I0 = R0;
  21 I0 = 0x1122 (Z);
  22 R0 = I0;
  23
  24 I1 = R1;
  25 I1 = 0x3344 (Z);
  26 R1 = I1;
  27
  28 I2 = R2;
  29 I2 = 0x5566 (Z);
  30 R2 = I2;
  31
  32 I3 = R3;
  33 I3 = 0x7788 (Z);
  34 R3 = I3;
  35
  36
  37 B0 = R4;
  38 B0 = 0x99aa (Z);
  39 R4 = B0;
  40
  41 B1 = R5;
  42 B1 = 0xbbcc (Z);
  43 R5 = B1;
  44
  45 B2 = R6;
  46 B2 = 0xddee (Z);
  47 R6 = B2;
  48
  49 B3 = R7;
  50 B3 = 0xff01 (Z);
  51 R7 = B3;
  52
  53 CHECKREG r0, 0x00001122;
  54 CHECKREG r1, 0x00003344;
  55 CHECKREG r2, 0x00005566;
  56 CHECKREG r3, 0x00007788;
  57 CHECKREG r4, 0x000099AA;
  58 CHECKREG r5, 0x0000BBCC;
  59 CHECKREG r6, 0x0000DDEE;
  60 CHECKREG r7, 0x0000FF01;
  61
  62 imm32 r0, 0x11111112;
  63 imm32 r1, 0x22223332;
  64 imm32 r2, 0x44445552;
  65 imm32 r3, 0x66667772;
  66 imm32 r4, 0x88889992;
  67 imm32 r5, 0xaaaabbb2;
  68 imm32 r6, 0xccccddd2;
  69 imm32 r7, 0xeeeefff2;
  70 M0 = R0;
  71 M0 = 0xa1a2 (Z);
  72 R0 = M0;
  73
  74 M1 = R1;
  75 M1 = 0xb1b2 (Z);
  76 R1 = M1;
  77
  78 M2 = R2;
  79 M2 = 0xc1c2 (Z);
  80 R2 = M2;
  81
  82 M3 = R3;
  83 M3 = 0xd1d2 (Z);
  84 R3 = M3;
  85
  86
  87 L0 = R4;
  88 L0 = 0xe1e2 (Z);
  89 R4 = L0;
  90
  91 L1 = R5;
  92 L1 = 0xf1f2 (Z);
  93 R5 = L1;
  94
  95 L2 = R6;
  96 L2 = 0x1112 (Z);
  97 R6 = L2;
  98
  99 L3 = R7;
 100 L3 = 0x2122 (Z);
 101 R7 = L3;
 102
 103 CHECKREG r0, 0x0000A1A2;
 104 CHECKREG r1, 0x0000B1B2;
 105 CHECKREG r2, 0x0000C1C2;
 106 CHECKREG r3, 0x0000D1D2;
 107 CHECKREG r4, 0x0000E1E2;
 108 CHECKREG r5, 0x0000F1F2;
 109 CHECKREG r6, 0x00001112;
 110 CHECKREG r7, 0x00002122;
 111
 112 imm32 r0, 0x11111113;
 113 imm32 r1, 0x22223333;
 114 imm32 r2, 0x44445553;
 115 imm32 r3, 0x66667773;
 116 imm32 r4, 0x88889993;
 117 imm32 r5, 0xaaaabbb3;
 118 imm32 r6, 0xccccddd3;
 119 imm32 r7, 0xeeeefff3;
 120
 121 P1 = R1;
 122 P1 = 0x3A3B (Z);
 123 R1 = P1;
 124
 125
 126 P2 = R2;
 127 P2 = 0x4A4B (Z);
 128 R2 = P2;
 129
 130 P3 = R3;
 131 P3 = 0x5A5B (Z);
 132 R3 = P3;
 133
 134 P4 = R4;
 135 P4 = 0x6A6B (Z);
 136 R4 = P4;
 137
 138 P5 = R5;
 139 P5 = 0x7A7B (Z);
 140 R5 = P5;
 141
 142 CHECKREG r1, 0x00003A3B;
 143 CHECKREG r2, 0x00004A4B;
 144 CHECKREG r3, 0x00005A5B;
 145 CHECKREG r4, 0x00006A6B;
 146 CHECKREG r5, 0x00007A7B;
 147
 148 pass