ld: Move the .note.build-id section to near the start of the memory map.
[binutils-gdb.git] / sim / testsuite / bfin / dsp_a8.s
blob0383e20c3206e89b90d8c402980e13c91d90c10f
1 /* ALU test program.
2 * Test instructions
3 * (r7,r6) = +/- (r0,r1);
4 * (r7,r6) = +/- (r0,r1)s;
5 */
6 # mach: bfin
8 .include "testutils.inc"
9 start
12 // test positive overflow
13 R0.L = 0xffff;
14 R0.H = 0x7fff;
15 R1.L = 0x0001;
16 R1.H = 0x0000;
17 R7 = 0;
18 ASTAT = R7;
19 R6 = R0 + R1, R7 = R0 - R1 (NS);
20 DBGA ( R6.L , 0x0000 );
21 DBGA ( R6.H , 0x8000 );
22 DBGA ( R7.L , 0xfffe );
23 DBGA ( R7.H , 0x7fff );
24 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
25 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
26 CC = V; R7 = CC; DBGA ( R7.L , 0x1 );
27 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 );
29 // test positive overflow
30 R0.L = 0xffff;
31 R0.H = 0x7fff;
32 R1.L = 0x0001;
33 R1.H = 0x0000;
34 R7 = 0;
35 ASTAT = R7;
36 R7 = R0 + R1, R6 = R0 - R1 (NS);
37 DBGA ( R6.L , 0xfffe );
38 DBGA ( R6.H , 0x7fff );
39 DBGA ( R7.L , 0x0000 );
40 DBGA ( R7.H , 0x8000 );
41 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
42 CC = AN; R7 = CC; DBGA ( R7.L , 0x1 );
43 CC = V; R7 = CC; DBGA ( R7.L , 0x1 );
44 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 );
46 // test positive sat
47 R0.L = 0xffff;
48 R0.H = 0x7fff;
49 R1.L = 0x0001;
50 R1.H = 0x0000;
51 R7 = 0;
52 ASTAT = R7;
53 R6 = R0 + R1, R7 = R0 - R1 (S);
54 DBGA ( R6.L , 0xffff );
55 DBGA ( R6.H , 0x7fff );
56 DBGA ( R7.L , 0xfffe );
57 DBGA ( R7.H , 0x7fff );
58 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
59 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
60 CC = V; R7 = CC; DBGA ( R7.L , 0x1 );
61 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 );
63 // test positive sat
64 R0.L = 0xffff;
65 R0.H = 0x7fff;
66 R1.L = 0x0001;
67 R1.H = 0x0000;
68 R7 = 0;
69 ASTAT = R7;
70 R7 = R0 + R1, R6 = R0 - R1 (S);
71 DBGA ( R6.L , 0xfffe );
72 DBGA ( R6.H , 0x7fff );
73 DBGA ( R7.L , 0xffff );
74 DBGA ( R7.H , 0x7fff );
75 CC = AZ; R7 = CC; DBGA ( R7.L , 0x0 );
76 CC = AN; R7 = CC; DBGA ( R7.L , 0x0 );
77 CC = V; R7 = CC; DBGA ( R7.L , 0x1 );
78 CC = AC0; R7 = CC; DBGA ( R7.L , 0x1 );
80 pass