1 # Blackfin testcase for HW Loops and user->super transitions
3 # sim: --environment operating
6 .include "testutils.inc"
8 .macro check_hwloop_regs lc:req, lt:req, lb:req
37 loadsym R0, exception;
47 # Set the LC/LB/LT up with LSB set
48 # - Hardware clears LT LSB, but LB remains until we lower
64 check_hwloop_regs R6, R4, R7
69 # Make sure LSB has been cleared in LB
70 check_hwloop_regs R6, R4, R5
72 # Clear LSB in all LC/LT/LB
80 # Now move back up to supervisor
84 # Make sure LSB is set in LB
85 check_hwloop_regs R4, R4, R7
87 # Clear the LSB and move up another supervisor level
98 # Make sure LSB stayed clear
99 check_hwloop_regs R4, R4, R5