ld: Move the .note.build-id section to near the start of the memory map.
[binutils-gdb.git] / sim / testsuite / bfin / logic.s
blob9a41ccd7081bd4258f14e94b34dfcbc13af90259
1 // test program for microcontroller instructions
2 // Test instructions
3 // r4 = r2 & r3;
4 // r4 = r2 | r3;
5 // r4 = r2 ^ r3;
6 // r4 = ~ r2;
7 # mach: bfin
9 .include "testutils.inc"
10 start
12 loadsym P0, data0;
13 R0 = [ P0 ++ ];
14 R1 = [ P0 ++ ];
15 R2 = [ P0 ++ ];
16 R3 = [ P0 ++ ];
17 R4 = [ P0 ++ ];
19 R7 = R0 & R1;
20 DBGA ( R7.L , 0x1111 );
21 DBGA ( R7.H , 0x1111 );
23 R7 = R2 & R3;
24 DBGA ( R7.L , 0x0001 );
25 DBGA ( R7.H , 0x0000 );
27 R7 = R0 | R1;
28 DBGA ( R7.L , 0xffff );
29 DBGA ( R7.H , 0xffff );
31 R7 = R2 | R3;
32 DBGA ( R7.L , 0x000f );
33 DBGA ( R7.H , 0x0000 );
35 R7 = R0 ^ R1;
36 DBGA ( R7.L , 0xeeee );
37 DBGA ( R7.H , 0xeeee );
39 R7 = R2 ^ R3;
40 DBGA ( R7.L , 0x000e );
41 DBGA ( R7.H , 0x0000 );
43 R7 = ~ R0;
44 DBGA ( R7.L , 0xeeee );
45 DBGA ( R7.H , 0xeeee );
47 R7 = ~ R2;
48 DBGA ( R7.L , 0xfffe );
49 DBGA ( R7.H , 0xffff );
51 pass
53 .data
54 data0:
55 .dw 0x1111
56 .dw 0x1111
57 .dw 0xffff
58 .dw 0xffff
59 .dw 0x0001
60 .dw 0x0000
61 .dw 0x000f
62 .dw 0x0000
63 .dw 0x0000
64 .dw 0x0000