ld: Move the .note.build-id section to near the start of the memory map.
[binutils-gdb.git] / sim / testsuite / bfin / m16.s
blob9cbc57c2f6d9a4ea973be0a4d4a817234ca45d3c
1 // Test various moves to single register half
2 # mach: bfin
4 .include "testutils.inc"
5 start
8 // load r0=0x7fffffff
9 // load r1=0x00ffffff
10 // load r2=0xf0000000
11 // load r3=0x0000007f
12 // load r4=0x00000080
13 loadsym P0, data0;
14 R0 = [ P0 ++ ];
15 R1 = [ P0 ++ ];
16 R2 = [ P0 ++ ];
17 R3 = [ P0 ++ ];
18 R4 = [ P0 ++ ];
20 // extract only to high half
21 R5 = 0;
22 A1 = A0 = 0;
23 A1.w = R0;
24 A0.w = R0;
25 R5.H = A1;
26 DBGA ( R5.L , 0x0000 );
27 DBGA ( R5.H , 0x7fff );
29 // extract only to low half
30 R5 = 0;
31 A1 = A0 = 0;
32 A1.w = R0;
33 A0.w = R0;
34 R5.L = A0;
35 DBGA ( R5.L , 0x7fff );
36 DBGA ( R5.H , 0x0000 );
38 // extract only to high half
39 R5 = 0;
40 A1 = A0 = 0;
41 R5.H = ( A1 += R0.H * R0.H ), A0 += R0.H * R0.H;
42 DBGA ( R5.L , 0x0000 );
43 DBGA ( R5.H , 0x7ffe );
45 // extract only to low half
46 R5 = 0;
47 A1 = A0 = 0;
48 A1 += R0.H * R0.H, R5.L = ( A0 += R0.H * R0.H );
49 DBGA ( R5.L , 0x7ffe );
50 DBGA ( R5.H , 0x0000 );
52 pass
54 .data
55 data0:
56 .dw 0xffff
57 .dw 0x7fff
58 .dw 0xffff
59 .dw 0x00ff
60 .dw 0x0000
61 .dw 0xf000
62 .dw 0x007f
63 .dw 0x0000
64 .dw 0x0080
65 .dw 0x0000