ld: Move the .note.build-id section to near the start of the memory map.
[binutils-gdb.git] / sim / testsuite / bfin / mc_s2.s
blob024ee92371b12c3d3bf2541b2864f9737071d344
1 /* SHIFT test program.
2 * Test r0, r1, A0 <<= BITMUX;
3 */
4 # mach: bfin
6 .include "testutils.inc"
7 start
9 init_r_regs 0;
10 ASTAT = R0;
12 // load r0=0x90000001
13 // load r1=0x90000002
14 // load r2=0x00000000
15 // load r3=0x00000000
16 // load r4=0x20000002
17 // load r5=0x00000000
18 loadsym P1, data0;
20 // insert two bits, both equal to 1
21 // A0: 00 0000 0000 -> 00 0000 0003
22 // r0: 9000 0001 -> 2000 0002
23 // r1: 9000 0002 -> 2000 0004
24 R0 = [ P1 + 0 ];
25 R1 = [ P1 + 4 ];
26 A0.w = R2;
27 A0.x = R3.L;
28 BITMUX( R0 , R1, A0) (ASL);
29 R6 = A0.w;
30 R7.L = A0.x;
31 DBGA ( R6.L , 0x0003 );
32 DBGA ( R6.H , 0x0000 );
33 DBGA ( R7.L , 0x0000 );
34 DBGA ( R0.L , 0x0002 );
35 DBGA ( R0.H , 0x2000 );
36 DBGA ( R1.L , 0x0004 );
37 DBGA ( R1.H , 0x2000 );
39 // insert two bits, one equal to 1, other to 0
40 // A0: 00 0000 0000 -> 00 0000 0001
41 // r0: 9000 0001 -> 2000 0002
42 // r4: 2000 0002 -> 4000 0004
43 R0 = [ P1 + 0 ];
44 R4 = [ P1 + 16 ];
45 A0.w = R2;
46 A0.x = R3.L;
47 BITMUX( R0 , R4, A0) (ASL);
48 R6 = A0.w;
49 R7.L = A0.x;
50 DBGA ( R6.L , 0x0001 );
51 DBGA ( R6.H , 0x0000 );
52 DBGA ( R7.L , 0x0000 );
53 DBGA ( R0.L , 0x0002 );
54 DBGA ( R0.H , 0x2000 );
55 DBGA ( R4.L , 0x0004 );
56 DBGA ( R4.H , 0x4000 );
58 pass
60 .data
61 data0:
62 .dw 0x0001
63 .dw 0x9000
65 .dw 0x0002
66 .dw 0x9000
68 .dw 0x0000
69 .dw 0x0000
71 .dw 0x0000
72 .dw 0x0000
74 .dw 0x0002
75 .dw 0x2000
77 .dw 0x0000
78 .dw 0x0000