1 # test VIT_MAX behavior when high Acc bits are set
4 .include "testutils.inc"
8 dmm32 ASTAT, (0x5860c690 | _VS | _AV0S | _AC1 | _AQ | _CC | _AC0_COPY);
9 dmm32 A0.w, 0xd81562e8;
10 dmm32 A0.x, 0xffffffff;
13 R4.L = VIT_MAX (R5) (ASR);
14 checkreg R4, 0x15c23a6b;
15 checkreg A0.w, 0x6c0ab174;
16 checkreg A0.x, 0x0000007f;
17 checkreg ASTAT, (0x5860c690 | _VS | _AV0S | _AC1 | _AQ | _CC | _AC0_COPY);
19 dmm32 ASTAT, (0x48308090 | _AV1 | _AV0 | _AC0 | _AQ | _CC | _V_COPY | _AC0_COPY);
20 dmm32 A0.w, 0x715cf6e6;
21 dmm32 A0.x, 0xffffffb6;
24 R3.L = VIT_MAX (R4) (ASR);
25 checkreg R3, 0x3a89bbf9;
26 checkreg A0.w, 0x38ae7b73;
27 checkreg A0.x, 0x0000005b;
28 checkreg ASTAT, (0x48308090 | _AV1 | _AV0 | _AC0 | _AQ | _CC | _V_COPY | _AC0_COPY);
30 dmm32 ASTAT, (0x18104c10 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _CC | _AC0_COPY | _AZ);
31 dmm32 A0.w, 0xea06f130;
32 dmm32 A0.x, 0xffffffff;
35 R2.L = VIT_MAX (R5) (ASR);
36 checkreg R2, 0x62ce15f9;
37 checkreg A0.w, 0x75037898;
38 checkreg A0.x, 0x0000007f;
39 checkreg ASTAT, (0x18104c10 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _CC | _AC0_COPY | _AZ);
41 dmm32 ASTAT, (0x0090ce10 | _VS | _AV1S | _AV0S | _AV0 | _AC1 | _AQ | _CC | _AC0_COPY | _AN);
42 dmm32 A0.w, 0xffffffff;
43 dmm32 A0.x, 0xffffffff;
46 R6.L = VIT_MAX (R0) (ASR);
47 checkreg R6, 0x1d4bc964;
48 checkreg A0.w, 0xffffffff;
49 checkreg A0.x, 0x0000007f;
50 checkreg ASTAT, (0x0090ce10 | _VS | _AV1S | _AV0S | _AV0 | _AC1 | _AQ | _CC | _AC0_COPY | _AN);