1 # frv testcase for nfdmuls $FRi,$FRj,$FRk
2 # mach: fr500 fr550 frv
4 .include "testutils.inc"
18 test_spr_immed 0,fner1
19 test_spr_immed 0,fner0
25 test_spr_immed 0,fner1
26 test_spr_immed 0,fner0
32 test_spr_immed 0,fner1
33 test_spr_immed 0,fner0
39 test_spr_immed 0,fner1
40 test_spr_immed 0,fner0
46 test_spr_immed 0,fner1
47 test_spr_immed 0,fner0
53 test_spr_immed 0,fner1
54 test_spr_immed 0,fner0
60 test_spr_immed 0,fner1
61 test_spr_immed 0,fner0
67 test_spr_immed 0,fner1
68 test_spr_immed 0,fner0
74 test_spr_immed 0,fner1
75 test_spr_immed 0,fner0
81 test_spr_immed 0,fner1
82 test_spr_immed 0,fner0
88 test_spr_immed 0,fner1
89 test_spr_immed 0,fner0
95 test_spr_immed 0,fner1
96 test_spr_immed 0,fner0
103 test_spr_immed 0,fner1
104 test_spr_immed 0,fner0
110 test_spr_immed 0,fner1
111 test_spr_immed 0,fner0
112 nfdmuls fr20,fr12,fr2
117 test_spr_immed 0,fner1
118 test_spr_immed 0,fner0
119 nfdmuls fr20,fr16,fr2
124 test_spr_immed 0,fner1
125 test_spr_immed 0,fner0
126 nfdmuls fr20,fr20,fr2
131 test_spr_immed 0,fner1
132 test_spr_immed 0,fner0
133 nfdmuls fr20,fr24,fr2
138 test_spr_immed 0,fner1
139 test_spr_immed 0,fner0
140 nfdmuls fr20,fr28,fr2
145 test_spr_immed 0,fner1
146 test_spr_immed 0,fner0
147 nfdmuls fr20,fr32,fr2
152 test_spr_immed 0,fner1
153 test_spr_immed 0,fner0
154 nfdmuls fr20,fr36,fr2
159 test_spr_immed 0,fner1
160 test_spr_immed 0,fner0
161 nfdmuls fr20,fr40,fr2
166 test_spr_immed 0,fner1
167 test_spr_immed 0,fner0
168 nfdmuls fr20,fr44,fr2
173 test_spr_immed 0,fner1
174 test_spr_immed 0,fner0
175 nfdmuls fr20,fr48,fr2
180 test_spr_immed 0,fner1
181 test_spr_immed 0,fner0
186 test_spr_immed 0,fner1
187 test_spr_immed 0,fner0
191 test_spr_immed 0,fner1
192 test_spr_immed 0,fner0
196 test_spr_immed 0,fner1
197 test_spr_immed 0,fner0
198 nfdmuls fr28,fr12,fr2
201 test_spr_immed 0,fner1
202 test_spr_immed 0,fner0
203 nfdmuls fr28,fr16,fr2
208 test_spr_immed 0,fner1
209 test_spr_immed 0,fner0
210 nfdmuls fr28,fr20,fr2
215 test_spr_immed 0,fner1
216 test_spr_immed 0,fner0
217 nfdmuls fr28,fr24,fr2
220 test_spr_immed 0,fner1
221 test_spr_immed 0,fner0
222 nfdmuls fr28,fr28,fr2
225 test_spr_immed 0,fner1
226 test_spr_immed 0,fner0
227 nfdmuls fr28,fr32,fr2
230 test_spr_immed 0,fner1
231 test_spr_immed 0,fner0
232 nfdmuls fr28,fr36,fr2
235 test_spr_immed 0,fner1
236 test_spr_immed 0,fner0
237 nfdmuls fr28,fr40,fr2
240 test_spr_immed 0,fner1
241 test_spr_immed 0,fner0
242 nfdmuls fr28,fr44,fr2
245 test_spr_immed 0,fner1
246 test_spr_immed 0,fner0
247 nfdmuls fr28,fr48,fr2
250 test_spr_immed 0,fner1
251 test_spr_immed 0,fner0
252 nfdmuls fr28,fr52,fr2
255 test_spr_immed 0,fner1
256 test_spr_immed 0,fner0
261 test_spr_immed 0,fner1
262 test_spr_immed 0,fner0
266 test_spr_immed 0,fner1
267 test_spr_immed 0,fner0
269 nfdmuls fr32,fr36,fr2
272 test_spr_immed 0,fner1
273 test_spr_immed 0,fner0
275 ; try to cause exceptions
276 nfdmuls fr48,fr32,fr2
277 ; test_fr_fr fr2,fr44
278 ; test_fr_fr fr3,fr44
279 test_spr_immed 0,fner1
280 test_spr_immed 0,fner0
282 nfdmuls fr52,fr28,fr2
283 ; test_fr_fr fr2,fr44
284 ; test_fr_fr fr3,fr44
285 test_spr_immed 0,fner1
286 test_spr_immed 0,fner0
288 nfdmuls fr56,fr28,fr2
289 ; test_fr_fr fr2,fr44
290 ; test_fr_fr fr3,fr44
291 test_spr_immed 0,fner1
292 test_spr_immed 0,fner0
294 nfdmuls fr60,fr28,fr2
295 ; test_fr_fr fr2,fr44
296 ; test_fr_fr fr3,fr44
297 test_spr_immed 0xc,fner1
298 test_spr_immed 0,fner0