1 /* Target-dependent definitions for AMD64.
3 Copyright (C) 2001-2024 Free Software Foundation, Inc.
4 Contributed by Jiri Smid, SuSE Labs.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
28 #include "i386-tdep.h"
31 /* Register numbers of various important registers. */
35 AMD64_RAX_REGNUM
, /* %rax */
36 AMD64_RBX_REGNUM
, /* %rbx */
37 AMD64_RCX_REGNUM
, /* %rcx */
38 AMD64_RDX_REGNUM
, /* %rdx */
39 AMD64_RSI_REGNUM
, /* %rsi */
40 AMD64_RDI_REGNUM
, /* %rdi */
41 AMD64_RBP_REGNUM
, /* %rbp */
42 AMD64_RSP_REGNUM
, /* %rsp */
43 AMD64_R8_REGNUM
, /* %r8 */
44 AMD64_R9_REGNUM
, /* %r9 */
45 AMD64_R10_REGNUM
, /* %r10 */
46 AMD64_R11_REGNUM
, /* %r11 */
47 AMD64_R12_REGNUM
, /* %r12 */
48 AMD64_R13_REGNUM
, /* %r13 */
49 AMD64_R14_REGNUM
, /* %r14 */
50 AMD64_R15_REGNUM
, /* %r15 */
51 AMD64_RIP_REGNUM
, /* %rip */
52 AMD64_EFLAGS_REGNUM
, /* %eflags */
53 AMD64_CS_REGNUM
, /* %cs */
54 AMD64_SS_REGNUM
, /* %ss */
55 AMD64_DS_REGNUM
, /* %ds */
56 AMD64_ES_REGNUM
, /* %es */
57 AMD64_FS_REGNUM
, /* %fs */
58 AMD64_GS_REGNUM
, /* %gs */
59 AMD64_ST0_REGNUM
= 24, /* %st0 */
60 AMD64_ST1_REGNUM
, /* %st1 */
61 AMD64_FCTRL_REGNUM
= AMD64_ST0_REGNUM
+ 8,
62 AMD64_FSTAT_REGNUM
= AMD64_ST0_REGNUM
+ 9,
63 AMD64_FTAG_REGNUM
= AMD64_ST0_REGNUM
+ 10,
64 AMD64_XMM0_REGNUM
= 40, /* %xmm0 */
65 AMD64_XMM1_REGNUM
, /* %xmm1 */
66 AMD64_MXCSR_REGNUM
= AMD64_XMM0_REGNUM
+ 16,
67 AMD64_YMM0H_REGNUM
, /* %ymm0h */
68 AMD64_YMM15H_REGNUM
= AMD64_YMM0H_REGNUM
+ 15,
69 /* MPX is deprecated. Yet we keep this to not give the registers below
70 a new number. That could break older gdbservers. */
71 AMD64_BND0R_REGNUM
= AMD64_YMM15H_REGNUM
+ 1,
72 AMD64_BND3R_REGNUM
= AMD64_BND0R_REGNUM
+ 3,
74 AMD64_BNDSTATUS_REGNUM
,
76 AMD64_XMM31_REGNUM
= AMD64_XMM16_REGNUM
+ 15,
78 AMD64_YMM31H_REGNUM
= AMD64_YMM16H_REGNUM
+ 15,
80 AMD64_K7_REGNUM
= AMD64_K0_REGNUM
+ 7,
82 AMD64_ZMM31H_REGNUM
= AMD64_ZMM0H_REGNUM
+ 31,
88 /* Number of general purpose registers. */
89 #define AMD64_NUM_GREGS 24
91 #define AMD64_NUM_REGS (AMD64_GSBASE_REGNUM + 1)
93 extern displaced_step_copy_insn_closure_up amd64_displaced_step_copy_insn
94 (struct gdbarch
*gdbarch
, CORE_ADDR from
, CORE_ADDR to
,
95 struct regcache
*regs
);
96 extern void amd64_displaced_step_fixup
97 (struct gdbarch
*gdbarch
, displaced_step_copy_insn_closure
*closure
,
98 CORE_ADDR from
, CORE_ADDR to
, struct regcache
*regs
, bool completed_p
);
100 /* Initialize the ABI for amd64. Uses DEFAULT_TDESC as fallback
101 tdesc, if INFO does not specify one. */
102 extern void amd64_init_abi (struct gdbarch_info info
,
103 struct gdbarch
*gdbarch
,
104 const target_desc
*default_tdesc
);
106 /* Initialize the ABI for x32. Uses DEFAULT_TDESC as fallback tdesc,
107 if INFO does not specify one. */
108 extern void amd64_x32_init_abi (struct gdbarch_info info
,
109 struct gdbarch
*gdbarch
,
110 const target_desc
*default_tdesc
);
111 extern const struct target_desc
*amd64_target_description (uint64_t xcr0
,
114 /* Fill register REGNUM in REGCACHE with the appropriate
115 floating-point or SSE register value from *FXSAVE. If REGNUM is
116 -1, do this for all registers. This function masks off any of the
117 reserved bits in *FXSAVE. */
119 extern void amd64_supply_fxsave (struct regcache
*regcache
, int regnum
,
122 /* Similar to amd64_supply_fxsave, but use XSAVE extended state. */
123 extern void amd64_supply_xsave (struct regcache
*regcache
, int regnum
,
126 /* Fill register REGNUM (if it is a floating-point or SSE register) in
127 *FXSAVE with the value from REGCACHE. If REGNUM is -1, do this for
128 all registers. This function doesn't touch any of the reserved
131 extern void amd64_collect_fxsave (const struct regcache
*regcache
, int regnum
,
133 /* Similar to amd64_collect_fxsave, but use XSAVE extended state. */
134 extern void amd64_collect_xsave (const struct regcache
*regcache
,
135 int regnum
, void *xsave
, int gcore
);
137 /* Floating-point register set. */
138 extern const struct regset amd64_fpregset
;
140 /* Variables exported from amd64-linux-tdep.c. */
141 extern int amd64_linux_gregset_reg_offset
[];
143 /* Variables exported from amd64-netbsd-tdep.c. */
144 extern int amd64nbsd_r_reg_offset
[];
146 /* Variables exported from amd64-obsd-tdep.c. */
147 extern int amd64obsd_r_reg_offset
[];
149 #endif /* amd64-tdep.h */