1 /* Target-dependent code for s390.
3 Copyright (C) 2001-2024 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "arch-utils.h"
23 #include "dwarf2/frame.h"
26 #include "extract-store-integer.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
32 #include "linux-tdep.h"
35 #include "record-full.h"
37 #include "reggroups.h"
38 #include "s390-tdep.h"
39 #include "target-descriptions.h"
40 #include "trad-frame.h"
43 #include "dwarf2/loc.h"
45 #include "features/s390-linux32.c"
46 #include "features/s390x-linux64.c"
48 /* Holds the current set of options to be passed to the disassembler. */
49 static std::string s390_disassembler_options
;
53 constexpr gdb_byte s390_break_insn
[] = { 0x0, 0x1 };
55 typedef BP_MANIPULATION (s390_break_insn
) s390_breakpoint
;
59 /* Implement the gdbarch type alignment method. */
62 s390_type_align (gdbarch
*gdbarch
, struct type
*t
)
64 t
= check_typedef (t
);
76 case TYPE_CODE_DECFLOAT
:
88 /* Decoding S/390 instructions. */
90 /* Read a single instruction from address AT. */
93 s390_readinstruction (bfd_byte instr
[], CORE_ADDR at
)
95 static int s390_instrlen
[] = { 2, 4, 4, 6 };
98 if (target_read_memory (at
, &instr
[0], 2))
100 instrlen
= s390_instrlen
[instr
[0] >> 6];
103 if (target_read_memory (at
+ 2, &instr
[2], instrlen
- 2))
109 /* The functions below are for recognizing and decoding S/390
110 instructions of various formats. Each of them checks whether INSN
111 is an instruction of the given format, with the specified opcodes.
112 If it is, it sets the remaining arguments to the values of the
113 instruction's fields, and returns a non-zero value; otherwise, it
116 These functions' arguments appear in the order they appear in the
117 instruction, not in the machine-language form. So, opcodes always
118 come first, even though they're sometimes scattered around the
119 instructions. And displacements appear before base and extension
120 registers, as they do in the assembly syntax, not at the end, as
121 they do in the machine language.
123 Test for RI instruction format. */
126 is_ri (bfd_byte
*insn
, int op1
, int op2
, unsigned int *r1
, int *i2
)
128 if (insn
[0] == op1
&& (insn
[1] & 0xf) == op2
)
130 *r1
= (insn
[1] >> 4) & 0xf;
131 /* i2 is a 16-bit signed quantity. */
132 *i2
= (((insn
[2] << 8) | insn
[3]) ^ 0x8000) - 0x8000;
139 /* Test for RIL instruction format. See comment on is_ri for details. */
142 is_ril (bfd_byte
*insn
, int op1
, int op2
,
143 unsigned int *r1
, int *i2
)
145 if (insn
[0] == op1
&& (insn
[1] & 0xf) == op2
)
147 *r1
= (insn
[1] >> 4) & 0xf;
148 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
149 no sign extension is necessary, but we don't want to assume
151 *i2
= (((insn
[2] << 24)
154 | (insn
[5])) ^ 0x80000000) - 0x80000000;
161 /* Test for RR instruction format. See comment on is_ri for details. */
164 is_rr (bfd_byte
*insn
, int op
, unsigned int *r1
, unsigned int *r2
)
168 *r1
= (insn
[1] >> 4) & 0xf;
176 /* Test for RRE instruction format. See comment on is_ri for details. */
179 is_rre (bfd_byte
*insn
, int op
, unsigned int *r1
, unsigned int *r2
)
181 if (((insn
[0] << 8) | insn
[1]) == op
)
183 /* Yes, insn[3]. insn[2] is unused in RRE format. */
184 *r1
= (insn
[3] >> 4) & 0xf;
192 /* Test for RS instruction format. See comment on is_ri for details. */
195 is_rs (bfd_byte
*insn
, int op
,
196 unsigned int *r1
, unsigned int *r3
, int *d2
, unsigned int *b2
)
200 *r1
= (insn
[1] >> 4) & 0xf;
202 *b2
= (insn
[2] >> 4) & 0xf;
203 *d2
= ((insn
[2] & 0xf) << 8) | insn
[3];
210 /* Test for RSY instruction format. See comment on is_ri for details. */
213 is_rsy (bfd_byte
*insn
, int op1
, int op2
,
214 unsigned int *r1
, unsigned int *r3
, int *d2
, unsigned int *b2
)
219 *r1
= (insn
[1] >> 4) & 0xf;
221 *b2
= (insn
[2] >> 4) & 0xf;
222 /* The 'long displacement' is a 20-bit signed integer. */
223 *d2
= ((((insn
[2] & 0xf) << 8) | insn
[3] | (insn
[4] << 12))
224 ^ 0x80000) - 0x80000;
231 /* Test for RX instruction format. See comment on is_ri for details. */
234 is_rx (bfd_byte
*insn
, int op
,
235 unsigned int *r1
, int *d2
, unsigned int *x2
, unsigned int *b2
)
239 *r1
= (insn
[1] >> 4) & 0xf;
241 *b2
= (insn
[2] >> 4) & 0xf;
242 *d2
= ((insn
[2] & 0xf) << 8) | insn
[3];
249 /* Test for RXY instruction format. See comment on is_ri for details. */
252 is_rxy (bfd_byte
*insn
, int op1
, int op2
,
253 unsigned int *r1
, int *d2
, unsigned int *x2
, unsigned int *b2
)
258 *r1
= (insn
[1] >> 4) & 0xf;
260 *b2
= (insn
[2] >> 4) & 0xf;
261 /* The 'long displacement' is a 20-bit signed integer. */
262 *d2
= ((((insn
[2] & 0xf) << 8) | insn
[3] | (insn
[4] << 12))
263 ^ 0x80000) - 0x80000;
270 /* A helper for s390_software_single_step, decides if an instruction
271 is a partial-execution instruction that needs to be executed until
272 completion when in record mode. If it is, returns 1 and writes
273 instruction length to a pointer. */
276 s390_is_partial_instruction (struct gdbarch
*gdbarch
, CORE_ADDR loc
, int *len
)
278 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
281 insn
= read_memory_integer (loc
, 2, byte_order
);
285 case 0xa8: /* MVCLE */
291 insn
= read_memory_integer (loc
+ 4, 2, byte_order
);
292 if ((insn
& 0xff) == 0x8e)
304 case 0xb255: /* MVST */
305 case 0xb263: /* CMPSC */
306 case 0xb2a5: /* TRE */
307 case 0xb2a6: /* CU21 */
308 case 0xb2a7: /* CU12 */
309 case 0xb9b0: /* CU14 */
310 case 0xb9b1: /* CU24 */
311 case 0xb9b2: /* CU41 */
312 case 0xb9b3: /* CU42 */
313 case 0xb92a: /* KMF */
314 case 0xb92b: /* KMO */
315 case 0xb92f: /* KMC */
316 case 0xb92d: /* KMCTR */
317 case 0xb92e: /* KM */
318 case 0xb93c: /* PPNO */
319 case 0xb990: /* TRTT */
320 case 0xb991: /* TRTO */
321 case 0xb992: /* TROT */
322 case 0xb993: /* TROO */
330 /* Implement the "software_single_step" gdbarch method, needed to single step
331 through instructions like MVCLE in record mode, to make sure they are
332 executed to completion. Without that, record will save the full length
333 of destination buffer on every iteration, even though the CPU will only
334 process about 4kiB of it each time, leading to O(n**2) memory and time
337 static std::vector
<CORE_ADDR
>
338 s390_software_single_step (struct regcache
*regcache
)
340 struct gdbarch
*gdbarch
= regcache
->arch ();
341 CORE_ADDR loc
= regcache_read_pc (regcache
);
342 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
346 /* Special handling only if recording. */
347 if (!record_full_is_used ())
350 /* First, match a partial instruction. */
351 if (!s390_is_partial_instruction (gdbarch
, loc
, &len
))
356 /* Second, look for a branch back to it. */
357 insn
= read_memory_integer (loc
, 2, byte_order
);
358 if (insn
!= 0xa714) /* BRC with mask 1 */
361 insn
= read_memory_integer (loc
+ 2, 2, byte_order
);
362 if (insn
!= (uint16_t) -(len
/ 2))
367 /* Found it, step past the whole thing. */
371 /* Displaced stepping. */
373 /* Return true if INSN is a non-branch RIL-b or RIL-c format
377 is_non_branch_ril (gdb_byte
*insn
)
379 gdb_byte op1
= insn
[0];
383 gdb_byte op2
= insn
[1] & 0x0f;
387 case 0x02: /* llhrl */
388 case 0x04: /* lghrl */
389 case 0x05: /* lhrl */
390 case 0x06: /* llghrl */
391 case 0x07: /* sthrl */
392 case 0x08: /* lgrl */
393 case 0x0b: /* stgrl */
394 case 0x0c: /* lgfrl */
396 case 0x0e: /* llgfrl */
397 case 0x0f: /* strl */
401 else if (op1
== 0xc6)
403 gdb_byte op2
= insn
[1] & 0x0f;
407 case 0x00: /* exrl */
408 case 0x02: /* pfdrl */
409 case 0x04: /* cghrl */
410 case 0x05: /* chrl */
411 case 0x06: /* clghrl */
412 case 0x07: /* clhrl */
413 case 0x08: /* cgrl */
414 case 0x0a: /* clgrl */
415 case 0x0c: /* cgfrl */
417 case 0x0e: /* clgfrl */
418 case 0x0f: /* clrl */
426 typedef buf_displaced_step_copy_insn_closure
427 s390_displaced_step_copy_insn_closure
;
429 /* Implementation of gdbarch_displaced_step_copy_insn. */
431 static displaced_step_copy_insn_closure_up
432 s390_displaced_step_copy_insn (struct gdbarch
*gdbarch
,
433 CORE_ADDR from
, CORE_ADDR to
,
434 struct regcache
*regs
)
436 size_t len
= gdbarch_max_insn_length (gdbarch
);
437 std::unique_ptr
<s390_displaced_step_copy_insn_closure
> closure
438 (new s390_displaced_step_copy_insn_closure (len
));
439 gdb_byte
*buf
= closure
->buf
.data ();
441 read_memory (from
, buf
, len
);
443 /* Adjust the displacement field of PC-relative RIL instructions,
444 except branches. The latter are handled in the fixup hook. */
445 if (is_non_branch_ril (buf
))
449 offset
= extract_signed_integer (buf
+ 2, 4, BFD_ENDIAN_BIG
);
450 offset
= (from
- to
+ offset
* 2) / 2;
452 /* If the instruction is too far from the jump pad, punt. This
453 will usually happen with instructions in shared libraries.
454 We could probably support these by rewriting them to be
455 absolute or fully emulating them. */
456 if (offset
< INT32_MIN
|| offset
> INT32_MAX
)
458 /* Let the core fall back to stepping over the breakpoint
460 displaced_debug_printf ("can't displaced step RIL instruction: offset "
461 "%s out of range", plongest (offset
));
466 store_signed_integer (buf
+ 2, 4, BFD_ENDIAN_BIG
, offset
);
469 write_memory (to
, buf
, len
);
471 displaced_debug_printf ("copy %s->%s: %s",
472 paddress (gdbarch
, from
), paddress (gdbarch
, to
),
473 bytes_to_string (buf
, len
).c_str ());
475 /* This is a work around for a problem with g++ 4.8. */
476 return displaced_step_copy_insn_closure_up (closure
.release ());
479 /* Fix up the state of registers and memory after having single-stepped
480 a displaced instruction. */
483 s390_displaced_step_fixup (struct gdbarch
*gdbarch
,
484 displaced_step_copy_insn_closure
*closure_
,
485 CORE_ADDR from
, CORE_ADDR to
,
486 struct regcache
*regs
, bool completed_p
)
488 CORE_ADDR pc
= regcache_read_pc (regs
);
490 /* If the displaced instruction didn't complete successfully then all we
491 need to do is restore the program counter. */
494 pc
= from
+ (pc
- to
);
495 regcache_write_pc (regs
, pc
);
499 /* Our closure is a copy of the instruction. */
500 s390_displaced_step_copy_insn_closure
*closure
501 = (s390_displaced_step_copy_insn_closure
*) closure_
;
502 gdb_byte
*insn
= closure
->buf
.data ();
503 static int s390_instrlen
[] = { 2, 4, 4, 6 };
504 int insnlen
= s390_instrlen
[insn
[0] >> 6];
506 /* Fields for various kinds of instructions. */
507 unsigned int b2
, r1
, r2
, x2
, r3
;
510 /* Get addressing mode bit. */
512 if (register_size (gdbarch
, S390_PSWA_REGNUM
) == 4)
514 regcache_cooked_read_unsigned (regs
, S390_PSWA_REGNUM
, &amode
);
518 displaced_debug_printf ("(s390) fixup (%s, %s) pc %s len %d amode 0x%x",
519 paddress (gdbarch
, from
), paddress (gdbarch
, to
),
520 paddress (gdbarch
, pc
), insnlen
, (int) amode
);
522 /* Handle absolute branch and save instructions. */
523 int op_basr_p
= is_rr (insn
, op_basr
, &r1
, &r2
);
525 || is_rx (insn
, op_bas
, &r1
, &d2
, &x2
, &b2
))
527 /* Recompute saved return address in R1. */
528 regcache_cooked_write_unsigned (regs
, S390_R0_REGNUM
+ r1
,
529 amode
| (from
+ insnlen
));
530 /* Update PC iff the instruction doesn't actually branch. */
531 if (op_basr_p
&& r2
== 0)
532 regcache_write_pc (regs
, from
+ insnlen
);
535 /* Handle absolute branch instructions. */
536 else if (is_rr (insn
, op_bcr
, &r1
, &r2
)
537 || is_rx (insn
, op_bc
, &r1
, &d2
, &x2
, &b2
)
538 || is_rr (insn
, op_bctr
, &r1
, &r2
)
539 || is_rre (insn
, op_bctgr
, &r1
, &r2
)
540 || is_rx (insn
, op_bct
, &r1
, &d2
, &x2
, &b2
)
541 || is_rxy (insn
, op1_bctg
, op2_brctg
, &r1
, &d2
, &x2
, &b2
)
542 || is_rs (insn
, op_bxh
, &r1
, &r3
, &d2
, &b2
)
543 || is_rsy (insn
, op1_bxhg
, op2_bxhg
, &r1
, &r3
, &d2
, &b2
)
544 || is_rs (insn
, op_bxle
, &r1
, &r3
, &d2
, &b2
)
545 || is_rsy (insn
, op1_bxleg
, op2_bxleg
, &r1
, &r3
, &d2
, &b2
))
547 /* Update PC iff branch was *not* taken. */
548 if (pc
== to
+ insnlen
)
549 regcache_write_pc (regs
, from
+ insnlen
);
552 /* Handle PC-relative branch and save instructions. */
553 else if (is_ri (insn
, op1_bras
, op2_bras
, &r1
, &i2
)
554 || is_ril (insn
, op1_brasl
, op2_brasl
, &r1
, &i2
))
557 regcache_write_pc (regs
, pc
- to
+ from
);
558 /* Recompute saved return address in R1. */
559 regcache_cooked_write_unsigned (regs
, S390_R0_REGNUM
+ r1
,
560 amode
| (from
+ insnlen
));
563 /* Handle LOAD ADDRESS RELATIVE LONG. */
564 else if (is_ril (insn
, op1_larl
, op2_larl
, &r1
, &i2
))
567 regcache_write_pc (regs
, from
+ insnlen
);
568 /* Recompute output address in R1. */
569 regcache_cooked_write_unsigned (regs
, S390_R0_REGNUM
+ r1
,
573 /* If we executed a breakpoint instruction, point PC right back at it. */
574 else if (insn
[0] == 0x0 && insn
[1] == 0x1)
575 regcache_write_pc (regs
, from
);
577 /* For any other insn, adjust PC by negated displacement. PC then
578 points right after the original instruction, except for PC-relative
579 branches, where it points to the adjusted branch target. */
581 regcache_write_pc (regs
, pc
- to
+ from
);
583 displaced_debug_printf ("(s390) pc is now %s",
584 paddress (gdbarch
, regcache_read_pc (regs
)));
587 /* Implement displaced_step_hw_singlestep gdbarch method. */
590 s390_displaced_step_hw_singlestep (struct gdbarch
*gdbarch
)
595 /* Prologue analysis. */
597 struct s390_prologue_data
{
600 struct pv_area
*stack
;
602 /* The size and byte-order of a GPR or FPR. */
605 enum bfd_endian byte_order
;
607 /* The general-purpose registers. */
608 pv_t gpr
[S390_NUM_GPRS
];
610 /* The floating-point registers. */
611 pv_t fpr
[S390_NUM_FPRS
];
613 /* The offset relative to the CFA where the incoming GPR N was saved
614 by the function prologue. 0 if not saved or unknown. */
615 int gpr_slot
[S390_NUM_GPRS
];
617 /* Likewise for FPRs. */
618 int fpr_slot
[S390_NUM_FPRS
];
620 /* Nonzero if the backchain was saved. This is assumed to be the
621 case when the incoming SP is saved at the current SP location. */
622 int back_chain_saved_p
;
625 /* Return the effective address for an X-style instruction, like:
629 Here, X2 and B2 are registers, and D2 is a signed 20-bit
630 constant; the effective address is the sum of all three. If either
631 X2 or B2 are zero, then it doesn't contribute to the sum --- this
632 means that r0 can't be used as either X2 or B2. */
635 s390_addr (struct s390_prologue_data
*data
,
636 int d2
, unsigned int x2
, unsigned int b2
)
640 result
= pv_constant (d2
);
642 result
= pv_add (result
, data
->gpr
[x2
]);
644 result
= pv_add (result
, data
->gpr
[b2
]);
649 /* Do a SIZE-byte store of VALUE to D2(X2,B2). */
652 s390_store (struct s390_prologue_data
*data
,
653 int d2
, unsigned int x2
, unsigned int b2
, CORE_ADDR size
,
656 pv_t addr
= s390_addr (data
, d2
, x2
, b2
);
659 /* Check whether we are storing the backchain. */
660 offset
= pv_subtract (data
->gpr
[S390_SP_REGNUM
- S390_R0_REGNUM
], addr
);
662 if (pv_is_constant (offset
) && offset
.k
== 0)
663 if (size
== data
->gpr_size
664 && pv_is_register_k (value
, S390_SP_REGNUM
, 0))
666 data
->back_chain_saved_p
= 1;
670 /* Check whether we are storing a register into the stack. */
671 if (!data
->stack
->store_would_trash (addr
))
672 data
->stack
->store (addr
, size
, value
);
674 /* Note: If this is some store we cannot identify, you might think we
675 should forget our cached values, as any of those might have been hit.
677 However, we make the assumption that the register save areas are only
678 ever stored to once in any given function, and we do recognize these
679 stores. Thus every store we cannot recognize does not hit our data. */
682 /* Do a SIZE-byte load from D2(X2,B2). */
685 s390_load (struct s390_prologue_data
*data
,
686 int d2
, unsigned int x2
, unsigned int b2
, CORE_ADDR size
)
689 pv_t addr
= s390_addr (data
, d2
, x2
, b2
);
691 /* If it's a load from an in-line constant pool, then we can
692 simulate that, under the assumption that the code isn't
693 going to change between the time the processor actually
694 executed it creating the current frame, and the time when
695 we're analyzing the code to unwind past that frame. */
696 if (pv_is_constant (addr
))
698 const struct target_section
*secp
699 = target_section_by_addr (current_inferior ()->top_target (), addr
.k
);
701 && (bfd_section_flags (secp
->the_bfd_section
) & SEC_READONLY
))
702 return pv_constant (read_memory_integer (addr
.k
, size
,
706 /* Check whether we are accessing one of our save slots. */
707 return data
->stack
->fetch (addr
, size
);
710 /* Function for finding saved registers in a 'struct pv_area'; we pass
711 this to pv_area::scan.
713 If VALUE is a saved register, ADDR says it was saved at a constant
714 offset from the frame base, and SIZE indicates that the whole
715 register was saved, record its offset in the reg_offset table in
719 s390_check_for_saved (void *data_untyped
, pv_t addr
,
720 CORE_ADDR size
, pv_t value
)
722 struct s390_prologue_data
*data
= (struct s390_prologue_data
*) data_untyped
;
725 if (!pv_is_register (addr
, S390_SP_REGNUM
))
728 offset
= 16 * data
->gpr_size
+ 32 - addr
.k
;
730 /* If we are storing the original value of a register, we want to
731 record the CFA offset. If the same register is stored multiple
732 times, the stack slot with the highest address counts. */
734 for (i
= 0; i
< S390_NUM_GPRS
; i
++)
735 if (size
== data
->gpr_size
736 && pv_is_register_k (value
, S390_R0_REGNUM
+ i
, 0))
737 if (data
->gpr_slot
[i
] == 0
738 || data
->gpr_slot
[i
] > offset
)
740 data
->gpr_slot
[i
] = offset
;
744 for (i
= 0; i
< S390_NUM_FPRS
; i
++)
745 if (size
== data
->fpr_size
746 && pv_is_register_k (value
, S390_F0_REGNUM
+ i
, 0))
747 if (data
->fpr_slot
[i
] == 0
748 || data
->fpr_slot
[i
] > offset
)
750 data
->fpr_slot
[i
] = offset
;
755 /* Analyze the prologue of the function starting at START_PC, continuing at
756 most until CURRENT_PC. Initialize DATA to hold all information we find
757 out about the state of the registers and stack slots. Return the address
758 of the instruction after the last one that changed the SP, FP, or back
759 chain; or zero on error. */
762 s390_analyze_prologue (struct gdbarch
*gdbarch
,
764 CORE_ADDR current_pc
,
765 struct s390_prologue_data
*data
)
767 int word_size
= gdbarch_ptr_bit (gdbarch
) / 8;
770 The address of the instruction after the last one that changed
771 the SP, FP, or back chain; zero if we got an error trying to
773 CORE_ADDR result
= start_pc
;
775 /* The current PC for our abstract interpretation. */
778 /* The address of the next instruction after that. */
781 pv_area
stack (S390_SP_REGNUM
, gdbarch_addr_bit (gdbarch
));
782 scoped_restore restore_stack
= make_scoped_restore (&data
->stack
, &stack
);
784 /* Set up everything's initial value. */
788 /* For the purpose of prologue tracking, we consider the GPR size to
789 be equal to the ABI word size, even if it is actually larger
790 (i.e. when running a 32-bit binary under a 64-bit kernel). */
791 data
->gpr_size
= word_size
;
793 data
->byte_order
= gdbarch_byte_order (gdbarch
);
795 for (i
= 0; i
< S390_NUM_GPRS
; i
++)
796 data
->gpr
[i
] = pv_register (S390_R0_REGNUM
+ i
, 0);
798 for (i
= 0; i
< S390_NUM_FPRS
; i
++)
799 data
->fpr
[i
] = pv_register (S390_F0_REGNUM
+ i
, 0);
801 for (i
= 0; i
< S390_NUM_GPRS
; i
++)
802 data
->gpr_slot
[i
] = 0;
804 for (i
= 0; i
< S390_NUM_FPRS
; i
++)
805 data
->fpr_slot
[i
] = 0;
807 data
->back_chain_saved_p
= 0;
810 /* Start interpreting instructions, until we hit the frame's
811 current PC or the first branch instruction. */
812 for (pc
= start_pc
; pc
> 0 && pc
< current_pc
; pc
= next_pc
)
814 bfd_byte insn
[S390_MAX_INSTR_SIZE
];
815 int insn_len
= s390_readinstruction (insn
, pc
);
817 bfd_byte dummy
[S390_MAX_INSTR_SIZE
] = { 0 };
818 bfd_byte
*insn32
= word_size
== 4 ? insn
: dummy
;
819 bfd_byte
*insn64
= word_size
== 8 ? insn
: dummy
;
821 /* Fields for various kinds of instructions. */
822 unsigned int b2
, r1
, r2
, x2
, r3
;
825 /* The values of SP and FP before this instruction,
826 for detecting instructions that change them. */
827 pv_t pre_insn_sp
, pre_insn_fp
;
828 /* Likewise for the flag whether the back chain was saved. */
829 int pre_insn_back_chain_saved_p
;
831 /* If we got an error trying to read the instruction, report it. */
838 next_pc
= pc
+ insn_len
;
840 pre_insn_sp
= data
->gpr
[S390_SP_REGNUM
- S390_R0_REGNUM
];
841 pre_insn_fp
= data
->gpr
[S390_FRAME_REGNUM
- S390_R0_REGNUM
];
842 pre_insn_back_chain_saved_p
= data
->back_chain_saved_p
;
844 /* LHI r1, i2 --- load halfword immediate. */
845 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
846 /* LGFI r1, i2 --- load fullword immediate. */
847 if (is_ri (insn32
, op1_lhi
, op2_lhi
, &r1
, &i2
)
848 || is_ri (insn64
, op1_lghi
, op2_lghi
, &r1
, &i2
)
849 || is_ril (insn
, op1_lgfi
, op2_lgfi
, &r1
, &i2
))
850 data
->gpr
[r1
] = pv_constant (i2
);
852 /* LR r1, r2 --- load from register. */
853 /* LGR r1, r2 --- load from register (64-bit version). */
854 else if (is_rr (insn32
, op_lr
, &r1
, &r2
)
855 || is_rre (insn64
, op_lgr
, &r1
, &r2
))
856 data
->gpr
[r1
] = data
->gpr
[r2
];
858 /* LDGR r1, r2 --- load from register to floating-point register
860 else if (is_rre (insn64
, op_ldgr
, &r1
, &r2
))
861 data
->fpr
[r1
] = data
->gpr
[r2
];
863 /* L r1, d2(x2, b2) --- load. */
864 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
865 /* LG r1, d2(x2, b2) --- load (64-bit version). */
866 else if (is_rx (insn32
, op_l
, &r1
, &d2
, &x2
, &b2
)
867 || is_rxy (insn32
, op1_ly
, op2_ly
, &r1
, &d2
, &x2
, &b2
)
868 || is_rxy (insn64
, op1_lg
, op2_lg
, &r1
, &d2
, &x2
, &b2
))
869 data
->gpr
[r1
] = s390_load (data
, d2
, x2
, b2
, data
->gpr_size
);
871 /* ST r1, d2(x2, b2) --- store. */
872 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
873 /* STG r1, d2(x2, b2) --- store (64-bit version). */
874 else if (is_rx (insn32
, op_st
, &r1
, &d2
, &x2
, &b2
)
875 || is_rxy (insn32
, op1_sty
, op2_sty
, &r1
, &d2
, &x2
, &b2
)
876 || is_rxy (insn64
, op1_stg
, op2_stg
, &r1
, &d2
, &x2
, &b2
))
877 s390_store (data
, d2
, x2
, b2
, data
->gpr_size
, data
->gpr
[r1
]);
879 /* STD r1, d2(x2,b2) --- store floating-point register. */
880 else if (is_rx (insn
, op_std
, &r1
, &d2
, &x2
, &b2
))
881 s390_store (data
, d2
, x2
, b2
, data
->fpr_size
, data
->fpr
[r1
]);
883 /* STM r1, r3, d2(b2) --- store multiple. */
884 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
886 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
887 else if (is_rs (insn32
, op_stm
, &r1
, &r3
, &d2
, &b2
)
888 || is_rsy (insn32
, op1_stmy
, op2_stmy
, &r1
, &r3
, &d2
, &b2
)
889 || is_rsy (insn64
, op1_stmg
, op2_stmg
, &r1
, &r3
, &d2
, &b2
))
891 for (; r1
<= r3
; r1
++, d2
+= data
->gpr_size
)
892 s390_store (data
, d2
, 0, b2
, data
->gpr_size
, data
->gpr
[r1
]);
895 /* AHI r1, i2 --- add halfword immediate. */
896 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
897 /* AFI r1, i2 --- add fullword immediate. */
898 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
899 else if (is_ri (insn32
, op1_ahi
, op2_ahi
, &r1
, &i2
)
900 || is_ri (insn64
, op1_aghi
, op2_aghi
, &r1
, &i2
)
901 || is_ril (insn32
, op1_afi
, op2_afi
, &r1
, &i2
)
902 || is_ril (insn64
, op1_agfi
, op2_agfi
, &r1
, &i2
))
903 data
->gpr
[r1
] = pv_add_constant (data
->gpr
[r1
], i2
);
905 /* ALFI r1, i2 --- add logical immediate. */
906 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
907 else if (is_ril (insn32
, op1_alfi
, op2_alfi
, &r1
, &i2
)
908 || is_ril (insn64
, op1_algfi
, op2_algfi
, &r1
, &i2
))
909 data
->gpr
[r1
] = pv_add_constant (data
->gpr
[r1
],
910 (CORE_ADDR
)i2
& 0xffffffff);
912 /* AR r1, r2 -- add register. */
913 /* AGR r1, r2 -- add register (64-bit version). */
914 else if (is_rr (insn32
, op_ar
, &r1
, &r2
)
915 || is_rre (insn64
, op_agr
, &r1
, &r2
))
916 data
->gpr
[r1
] = pv_add (data
->gpr
[r1
], data
->gpr
[r2
]);
918 /* A r1, d2(x2, b2) -- add. */
919 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
920 /* AG r1, d2(x2, b2) -- add (64-bit version). */
921 else if (is_rx (insn32
, op_a
, &r1
, &d2
, &x2
, &b2
)
922 || is_rxy (insn32
, op1_ay
, op2_ay
, &r1
, &d2
, &x2
, &b2
)
923 || is_rxy (insn64
, op1_ag
, op2_ag
, &r1
, &d2
, &x2
, &b2
))
924 data
->gpr
[r1
] = pv_add (data
->gpr
[r1
],
925 s390_load (data
, d2
, x2
, b2
, data
->gpr_size
));
927 /* SLFI r1, i2 --- subtract logical immediate. */
928 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
929 else if (is_ril (insn32
, op1_slfi
, op2_slfi
, &r1
, &i2
)
930 || is_ril (insn64
, op1_slgfi
, op2_slgfi
, &r1
, &i2
))
931 data
->gpr
[r1
] = pv_add_constant (data
->gpr
[r1
],
932 -((CORE_ADDR
)i2
& 0xffffffff));
934 /* SR r1, r2 -- subtract register. */
935 /* SGR r1, r2 -- subtract register (64-bit version). */
936 else if (is_rr (insn32
, op_sr
, &r1
, &r2
)
937 || is_rre (insn64
, op_sgr
, &r1
, &r2
))
938 data
->gpr
[r1
] = pv_subtract (data
->gpr
[r1
], data
->gpr
[r2
]);
940 /* S r1, d2(x2, b2) -- subtract. */
941 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
942 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
943 else if (is_rx (insn32
, op_s
, &r1
, &d2
, &x2
, &b2
)
944 || is_rxy (insn32
, op1_sy
, op2_sy
, &r1
, &d2
, &x2
, &b2
)
945 || is_rxy (insn64
, op1_sg
, op2_sg
, &r1
, &d2
, &x2
, &b2
))
946 data
->gpr
[r1
] = pv_subtract (data
->gpr
[r1
],
947 s390_load (data
, d2
, x2
, b2
, data
->gpr_size
));
949 /* LA r1, d2(x2, b2) --- load address. */
950 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
951 else if (is_rx (insn
, op_la
, &r1
, &d2
, &x2
, &b2
)
952 || is_rxy (insn
, op1_lay
, op2_lay
, &r1
, &d2
, &x2
, &b2
))
953 data
->gpr
[r1
] = s390_addr (data
, d2
, x2
, b2
);
955 /* LARL r1, i2 --- load address relative long. */
956 else if (is_ril (insn
, op1_larl
, op2_larl
, &r1
, &i2
))
957 data
->gpr
[r1
] = pv_constant (pc
+ i2
* 2);
959 /* BASR r1, 0 --- branch and save.
960 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
961 else if (is_rr (insn
, op_basr
, &r1
, &r2
)
963 data
->gpr
[r1
] = pv_constant (next_pc
);
965 /* BRAS r1, i2 --- branch relative and save. */
966 else if (is_ri (insn
, op1_bras
, op2_bras
, &r1
, &i2
))
968 data
->gpr
[r1
] = pv_constant (next_pc
);
969 next_pc
= pc
+ i2
* 2;
971 /* We'd better not interpret any backward branches. We'll
977 /* BRC/BRCL -- branch relative on condition. Ignore "branch
978 never", branch to following instruction, and "conditional
979 trap" (BRC +2). Otherwise terminate search. */
980 else if (is_ri (insn
, op1_brc
, op2_brc
, &r1
, &i2
))
982 if (r1
!= 0 && i2
!= 1 && i2
!= 2)
985 else if (is_ril (insn
, op1_brcl
, op2_brcl
, &r1
, &i2
))
987 if (r1
!= 0 && i2
!= 3)
991 /* Terminate search when hitting any other branch instruction. */
992 else if (is_rr (insn
, op_basr
, &r1
, &r2
)
993 || is_rx (insn
, op_bas
, &r1
, &d2
, &x2
, &b2
)
994 || is_rr (insn
, op_bcr
, &r1
, &r2
)
995 || is_rx (insn
, op_bc
, &r1
, &d2
, &x2
, &b2
)
996 || is_ril (insn
, op1_brasl
, op2_brasl
, &r2
, &i2
))
1001 /* An instruction we don't know how to simulate. The only
1002 safe thing to do would be to set every value we're tracking
1003 to 'unknown'. Instead, we'll be optimistic: we assume that
1004 we *can* interpret every instruction that the compiler uses
1005 to manipulate any of the data we're interested in here --
1006 then we can just ignore anything else. */
1009 /* Record the address after the last instruction that changed
1010 the FP, SP, or backlink. Ignore instructions that changed
1011 them back to their original values --- those are probably
1012 restore instructions. (The back chain is never restored,
1015 pv_t sp
= data
->gpr
[S390_SP_REGNUM
- S390_R0_REGNUM
];
1016 pv_t fp
= data
->gpr
[S390_FRAME_REGNUM
- S390_R0_REGNUM
];
1018 if ((! pv_is_identical (pre_insn_sp
, sp
)
1019 && ! pv_is_register_k (sp
, S390_SP_REGNUM
, 0)
1020 && sp
.kind
!= pvk_unknown
)
1021 || (! pv_is_identical (pre_insn_fp
, fp
)
1022 && ! pv_is_register_k (fp
, S390_FRAME_REGNUM
, 0)
1023 && fp
.kind
!= pvk_unknown
)
1024 || pre_insn_back_chain_saved_p
!= data
->back_chain_saved_p
)
1029 /* Record where all the registers were saved. */
1030 data
->stack
->scan (s390_check_for_saved
, data
);
1035 /* Advance PC across any function entry prologue instructions to reach
1036 some "real" code. */
1039 s390_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1041 struct s390_prologue_data data
;
1042 CORE_ADDR skip_pc
, func_addr
;
1044 if (find_pc_partial_function (pc
, NULL
, &func_addr
, NULL
))
1046 CORE_ADDR post_prologue_pc
1047 = skip_prologue_using_sal (gdbarch
, func_addr
);
1048 if (post_prologue_pc
!= 0)
1049 return std::max (pc
, post_prologue_pc
);
1052 skip_pc
= s390_analyze_prologue (gdbarch
, pc
, (CORE_ADDR
)-1, &data
);
1053 return skip_pc
? skip_pc
: pc
;
1056 /* Register handling. */
1058 /* ABI call-saved register information. */
1061 s390_register_call_saved (struct gdbarch
*gdbarch
, int regnum
)
1063 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
1067 case ABI_LINUX_S390
:
1068 if ((regnum
>= S390_R6_REGNUM
&& regnum
<= S390_R15_REGNUM
)
1069 || regnum
== S390_F4_REGNUM
|| regnum
== S390_F6_REGNUM
1070 || regnum
== S390_A0_REGNUM
)
1075 case ABI_LINUX_ZSERIES
:
1076 if ((regnum
>= S390_R6_REGNUM
&& regnum
<= S390_R15_REGNUM
)
1077 || (regnum
>= S390_F8_REGNUM
&& regnum
<= S390_F15_REGNUM
)
1078 || (regnum
>= S390_A0_REGNUM
&& regnum
<= S390_A1_REGNUM
))
1087 /* The "guess_tracepoint_registers" gdbarch method. */
1090 s390_guess_tracepoint_registers (struct gdbarch
*gdbarch
,
1091 struct regcache
*regcache
,
1094 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
1095 int sz
= register_size (gdbarch
, S390_PSWA_REGNUM
);
1096 gdb_byte
*reg
= (gdb_byte
*) alloca (sz
);
1097 ULONGEST pswm
, pswa
;
1099 /* Set PSWA from the location and a default PSWM (the only part we're
1100 unlikely to get right is the CC). */
1101 if (tdep
->abi
== ABI_LINUX_S390
)
1103 /* 31-bit PSWA needs high bit set (it's very unlikely the target
1104 was in 24-bit mode). */
1105 pswa
= addr
| 0x80000000UL
;
1106 pswm
= 0x070d0000UL
;
1111 pswm
= 0x0705000180000000ULL
;
1114 store_unsigned_integer (reg
, sz
, gdbarch_byte_order (gdbarch
), pswa
);
1115 regcache
->raw_supply (S390_PSWA_REGNUM
, reg
);
1117 store_unsigned_integer (reg
, sz
, gdbarch_byte_order (gdbarch
), pswm
);
1118 regcache
->raw_supply (S390_PSWM_REGNUM
, reg
);
1121 /* Return the name of register REGNO. Return the empty string for
1122 registers that shouldn't be visible. */
1125 s390_register_name (struct gdbarch
*gdbarch
, int regnum
)
1127 if (regnum
>= S390_V0_LOWER_REGNUM
1128 && regnum
<= S390_V15_LOWER_REGNUM
)
1130 return tdesc_register_name (gdbarch
, regnum
);
1133 /* DWARF Register Mapping. */
1135 static const short s390_dwarf_regmap
[] =
1137 /* 0-15: General Purpose Registers. */
1138 S390_R0_REGNUM
, S390_R1_REGNUM
, S390_R2_REGNUM
, S390_R3_REGNUM
,
1139 S390_R4_REGNUM
, S390_R5_REGNUM
, S390_R6_REGNUM
, S390_R7_REGNUM
,
1140 S390_R8_REGNUM
, S390_R9_REGNUM
, S390_R10_REGNUM
, S390_R11_REGNUM
,
1141 S390_R12_REGNUM
, S390_R13_REGNUM
, S390_R14_REGNUM
, S390_R15_REGNUM
,
1143 /* 16-31: Floating Point Registers / Vector Registers 0-15. */
1144 S390_F0_REGNUM
, S390_F2_REGNUM
, S390_F4_REGNUM
, S390_F6_REGNUM
,
1145 S390_F1_REGNUM
, S390_F3_REGNUM
, S390_F5_REGNUM
, S390_F7_REGNUM
,
1146 S390_F8_REGNUM
, S390_F10_REGNUM
, S390_F12_REGNUM
, S390_F14_REGNUM
,
1147 S390_F9_REGNUM
, S390_F11_REGNUM
, S390_F13_REGNUM
, S390_F15_REGNUM
,
1149 /* 32-47: Control Registers (not mapped). */
1150 -1, -1, -1, -1, -1, -1, -1, -1,
1151 -1, -1, -1, -1, -1, -1, -1, -1,
1153 /* 48-63: Access Registers. */
1154 S390_A0_REGNUM
, S390_A1_REGNUM
, S390_A2_REGNUM
, S390_A3_REGNUM
,
1155 S390_A4_REGNUM
, S390_A5_REGNUM
, S390_A6_REGNUM
, S390_A7_REGNUM
,
1156 S390_A8_REGNUM
, S390_A9_REGNUM
, S390_A10_REGNUM
, S390_A11_REGNUM
,
1157 S390_A12_REGNUM
, S390_A13_REGNUM
, S390_A14_REGNUM
, S390_A15_REGNUM
,
1159 /* 64-65: Program Status Word. */
1163 /* 66-67: Reserved. */
1166 /* 68-83: Vector Registers 16-31. */
1167 S390_V16_REGNUM
, S390_V18_REGNUM
, S390_V20_REGNUM
, S390_V22_REGNUM
,
1168 S390_V17_REGNUM
, S390_V19_REGNUM
, S390_V21_REGNUM
, S390_V23_REGNUM
,
1169 S390_V24_REGNUM
, S390_V26_REGNUM
, S390_V28_REGNUM
, S390_V30_REGNUM
,
1170 S390_V25_REGNUM
, S390_V27_REGNUM
, S390_V29_REGNUM
, S390_V31_REGNUM
,
1172 /* End of "official" DWARF registers. The remainder of the map is
1173 for GDB internal use only. */
1175 /* GPR Lower Half Access. */
1176 S390_R0_REGNUM
, S390_R1_REGNUM
, S390_R2_REGNUM
, S390_R3_REGNUM
,
1177 S390_R4_REGNUM
, S390_R5_REGNUM
, S390_R6_REGNUM
, S390_R7_REGNUM
,
1178 S390_R8_REGNUM
, S390_R9_REGNUM
, S390_R10_REGNUM
, S390_R11_REGNUM
,
1179 S390_R12_REGNUM
, S390_R13_REGNUM
, S390_R14_REGNUM
, S390_R15_REGNUM
,
1182 enum { s390_dwarf_reg_r0l
= ARRAY_SIZE (s390_dwarf_regmap
) - 16 };
1184 /* Convert DWARF register number REG to the appropriate register
1185 number used by GDB. */
1188 s390_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
1190 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
1193 /* In a 32-on-64 debug scenario, debug info refers to the full
1194 64-bit GPRs. Note that call frame information still refers to
1195 the 32-bit lower halves, because s390_adjust_frame_regnum uses
1196 special register numbers to access GPRs. */
1197 if (tdep
->gpr_full_regnum
!= -1 && reg
>= 0 && reg
< 16)
1198 return tdep
->gpr_full_regnum
+ reg
;
1200 if (reg
>= 0 && reg
< ARRAY_SIZE (s390_dwarf_regmap
))
1201 gdb_reg
= s390_dwarf_regmap
[reg
];
1203 if (tdep
->v0_full_regnum
== -1)
1205 if (gdb_reg
>= S390_V16_REGNUM
&& gdb_reg
<= S390_V31_REGNUM
)
1210 if (gdb_reg
>= S390_F0_REGNUM
&& gdb_reg
<= S390_F15_REGNUM
)
1211 gdb_reg
= gdb_reg
- S390_F0_REGNUM
+ tdep
->v0_full_regnum
;
1217 /* Pseudo registers. */
1219 /* Check whether REGNUM indicates a coupled general purpose register.
1220 These pseudo-registers are composed of two adjacent gprs. */
1223 regnum_is_gpr_full (s390_gdbarch_tdep
*tdep
, int regnum
)
1225 return (tdep
->gpr_full_regnum
!= -1
1226 && regnum
>= tdep
->gpr_full_regnum
1227 && regnum
<= tdep
->gpr_full_regnum
+ 15);
1230 /* Check whether REGNUM indicates a full vector register (v0-v15).
1231 These pseudo-registers are composed of f0-f15 and v0l-v15l. */
1234 regnum_is_vxr_full (s390_gdbarch_tdep
*tdep
, int regnum
)
1236 return (tdep
->v0_full_regnum
!= -1
1237 && regnum
>= tdep
->v0_full_regnum
1238 && regnum
<= tdep
->v0_full_regnum
+ 15);
1241 /* 'float' values are stored in the upper half of floating-point
1242 registers, even though we are otherwise a big-endian platform. The
1243 same applies to a 'float' value within a vector. */
1246 s390_value_from_register (gdbarch
*gdbarch
, type
*type
, int regnum
,
1247 const frame_info_ptr
&this_frame
)
1249 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
1251 = default_value_from_register (gdbarch
, type
, regnum
, this_frame
);
1252 check_typedef (type
);
1254 if ((regnum
>= S390_F0_REGNUM
&& regnum
<= S390_F15_REGNUM
1255 && type
->length () < 8)
1256 || regnum_is_vxr_full (tdep
, regnum
)
1257 || (regnum
>= S390_V16_REGNUM
&& regnum
<= S390_V31_REGNUM
))
1258 value
->set_offset (0);
1263 /* Implementation of the gdbarch_dwarf2_reg_piece_offset hook. */
1266 s390_dwarf2_reg_piece_offset (gdbarch
*gdbarch
, int gdb_regnum
, ULONGEST size
)
1268 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
1270 /* Floating point register. */
1271 if (gdb_regnum
>= S390_F0_REGNUM
&& gdb_regnum
<= S390_F15_REGNUM
)
1274 /* Vector register, v0 - v15. */
1275 if (regnum_is_vxr_full (tdep
, gdb_regnum
))
1278 /* Vector register, v16 - v31. */
1279 if (gdb_regnum
>= S390_V16_REGNUM
&& gdb_regnum
<= S390_V31_REGNUM
)
1282 return default_dwarf2_reg_piece_offset (gdbarch
, gdb_regnum
, size
);
1285 /* Implement pseudo_register_name tdesc method. */
1288 s390_pseudo_register_name (struct gdbarch
*gdbarch
, int regnum
)
1290 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
1292 if (regnum
== tdep
->pc_regnum
)
1295 if (regnum
== tdep
->cc_regnum
)
1298 if (regnum_is_gpr_full (tdep
, regnum
))
1300 static const char *full_name
[] = {
1301 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1302 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1304 return full_name
[regnum
- tdep
->gpr_full_regnum
];
1307 if (regnum_is_vxr_full (tdep
, regnum
))
1309 static const char *full_name
[] = {
1310 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
1311 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15"
1313 return full_name
[regnum
- tdep
->v0_full_regnum
];
1316 internal_error (_("invalid regnum"));
1319 /* Implement pseudo_register_type tdesc method. */
1321 static struct type
*
1322 s390_pseudo_register_type (struct gdbarch
*gdbarch
, int regnum
)
1324 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
1326 if (regnum
== tdep
->pc_regnum
)
1327 return builtin_type (gdbarch
)->builtin_func_ptr
;
1329 if (regnum
== tdep
->cc_regnum
)
1330 return builtin_type (gdbarch
)->builtin_int
;
1332 if (regnum_is_gpr_full (tdep
, regnum
))
1333 return builtin_type (gdbarch
)->builtin_uint64
;
1335 /* For the "concatenated" vector registers use the same type as v16. */
1336 if (regnum_is_vxr_full (tdep
, regnum
))
1337 return tdesc_register_type (gdbarch
, S390_V16_REGNUM
);
1339 internal_error (_("invalid regnum"));
1342 /* Implement pseudo_register_read gdbarch method. */
1344 static enum register_status
1345 s390_pseudo_register_read (struct gdbarch
*gdbarch
, readable_regcache
*regcache
,
1346 int regnum
, gdb_byte
*buf
)
1348 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
1349 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1350 int regsize
= register_size (gdbarch
, regnum
);
1353 if (regnum
== tdep
->pc_regnum
)
1355 enum register_status status
;
1357 status
= regcache
->raw_read (S390_PSWA_REGNUM
, &val
);
1358 if (status
== REG_VALID
)
1360 if (register_size (gdbarch
, S390_PSWA_REGNUM
) == 4)
1362 store_unsigned_integer (buf
, regsize
, byte_order
, val
);
1367 if (regnum
== tdep
->cc_regnum
)
1369 enum register_status status
;
1371 status
= regcache
->raw_read (S390_PSWM_REGNUM
, &val
);
1372 if (status
== REG_VALID
)
1374 if (register_size (gdbarch
, S390_PSWA_REGNUM
) == 4)
1375 val
= (val
>> 12) & 3;
1377 val
= (val
>> 44) & 3;
1378 store_unsigned_integer (buf
, regsize
, byte_order
, val
);
1383 if (regnum_is_gpr_full (tdep
, regnum
))
1385 enum register_status status
;
1388 regnum
-= tdep
->gpr_full_regnum
;
1390 status
= regcache
->raw_read (S390_R0_REGNUM
+ regnum
, &val
);
1391 if (status
== REG_VALID
)
1392 status
= regcache
->raw_read (S390_R0_UPPER_REGNUM
+ regnum
,
1394 if (status
== REG_VALID
)
1396 val
|= val_upper
<< 32;
1397 store_unsigned_integer (buf
, regsize
, byte_order
, val
);
1402 if (regnum_is_vxr_full (tdep
, regnum
))
1404 enum register_status status
;
1406 regnum
-= tdep
->v0_full_regnum
;
1408 status
= regcache
->raw_read (S390_F0_REGNUM
+ regnum
, buf
);
1409 if (status
== REG_VALID
)
1410 status
= regcache
->raw_read (S390_V0_LOWER_REGNUM
+ regnum
, buf
+ 8);
1414 internal_error (_("invalid regnum"));
1417 /* Implement pseudo_register_write gdbarch method. */
1420 s390_pseudo_register_write (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
1421 int regnum
, const gdb_byte
*buf
)
1423 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
1424 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1425 int regsize
= register_size (gdbarch
, regnum
);
1428 if (regnum
== tdep
->pc_regnum
)
1430 val
= extract_unsigned_integer (buf
, regsize
, byte_order
);
1431 if (register_size (gdbarch
, S390_PSWA_REGNUM
) == 4)
1433 regcache_raw_read_unsigned (regcache
, S390_PSWA_REGNUM
, &psw
);
1434 val
= (psw
& 0x80000000) | (val
& 0x7fffffff);
1436 regcache_raw_write_unsigned (regcache
, S390_PSWA_REGNUM
, val
);
1440 if (regnum
== tdep
->cc_regnum
)
1442 val
= extract_unsigned_integer (buf
, regsize
, byte_order
);
1443 regcache_raw_read_unsigned (regcache
, S390_PSWM_REGNUM
, &psw
);
1444 if (register_size (gdbarch
, S390_PSWA_REGNUM
) == 4)
1445 val
= (psw
& ~((ULONGEST
)3 << 12)) | ((val
& 3) << 12);
1447 val
= (psw
& ~((ULONGEST
)3 << 44)) | ((val
& 3) << 44);
1448 regcache_raw_write_unsigned (regcache
, S390_PSWM_REGNUM
, val
);
1452 if (regnum_is_gpr_full (tdep
, regnum
))
1454 regnum
-= tdep
->gpr_full_regnum
;
1455 val
= extract_unsigned_integer (buf
, regsize
, byte_order
);
1456 regcache_raw_write_unsigned (regcache
, S390_R0_REGNUM
+ regnum
,
1458 regcache_raw_write_unsigned (regcache
, S390_R0_UPPER_REGNUM
+ regnum
,
1463 if (regnum_is_vxr_full (tdep
, regnum
))
1465 regnum
-= tdep
->v0_full_regnum
;
1466 regcache
->raw_write (S390_F0_REGNUM
+ regnum
, buf
);
1467 regcache
->raw_write (S390_V0_LOWER_REGNUM
+ regnum
, buf
+ 8);
1471 internal_error (_("invalid regnum"));
1474 /* Register groups. */
1476 /* Implement pseudo_register_reggroup_p tdesc method. */
1479 s390_pseudo_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1480 const struct reggroup
*group
)
1482 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
1484 /* We usually save/restore the whole PSW, which includes PC and CC.
1485 However, some older gdbservers may not support saving/restoring
1486 the whole PSW yet, and will return an XML register description
1487 excluding those from the save/restore register groups. In those
1488 cases, we still need to explicitly save/restore PC and CC in order
1489 to push or pop frames. Since this doesn't hurt anything if we
1490 already save/restore the whole PSW (it's just redundant), we add
1491 PC and CC at this point unconditionally. */
1492 if (group
== save_reggroup
|| group
== restore_reggroup
)
1493 return regnum
== tdep
->pc_regnum
|| regnum
== tdep
->cc_regnum
;
1495 if (group
== vector_reggroup
)
1496 return regnum_is_vxr_full (tdep
, regnum
);
1498 if (group
== general_reggroup
&& regnum_is_vxr_full (tdep
, regnum
))
1501 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1504 /* The "ax_pseudo_register_collect" gdbarch method. */
1507 s390_ax_pseudo_register_collect (struct gdbarch
*gdbarch
,
1508 struct agent_expr
*ax
, int regnum
)
1510 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
1511 if (regnum
== tdep
->pc_regnum
)
1513 ax_reg_mask (ax
, S390_PSWA_REGNUM
);
1515 else if (regnum
== tdep
->cc_regnum
)
1517 ax_reg_mask (ax
, S390_PSWM_REGNUM
);
1519 else if (regnum_is_gpr_full (tdep
, regnum
))
1521 regnum
-= tdep
->gpr_full_regnum
;
1522 ax_reg_mask (ax
, S390_R0_REGNUM
+ regnum
);
1523 ax_reg_mask (ax
, S390_R0_UPPER_REGNUM
+ regnum
);
1525 else if (regnum_is_vxr_full (tdep
, regnum
))
1527 regnum
-= tdep
->v0_full_regnum
;
1528 ax_reg_mask (ax
, S390_F0_REGNUM
+ regnum
);
1529 ax_reg_mask (ax
, S390_V0_LOWER_REGNUM
+ regnum
);
1533 internal_error (_("invalid regnum"));
1538 /* The "ax_pseudo_register_push_stack" gdbarch method. */
1541 s390_ax_pseudo_register_push_stack (struct gdbarch
*gdbarch
,
1542 struct agent_expr
*ax
, int regnum
)
1544 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
1545 if (regnum
== tdep
->pc_regnum
)
1547 ax_reg (ax
, S390_PSWA_REGNUM
);
1548 if (register_size (gdbarch
, S390_PSWA_REGNUM
) == 4)
1550 ax_zero_ext (ax
, 31);
1553 else if (regnum
== tdep
->cc_regnum
)
1555 ax_reg (ax
, S390_PSWM_REGNUM
);
1556 if (register_size (gdbarch
, S390_PSWA_REGNUM
) == 4)
1557 ax_const_l (ax
, 12);
1559 ax_const_l (ax
, 44);
1560 ax_simple (ax
, aop_rsh_unsigned
);
1561 ax_zero_ext (ax
, 2);
1563 else if (regnum_is_gpr_full (tdep
, regnum
))
1565 regnum
-= tdep
->gpr_full_regnum
;
1566 ax_reg (ax
, S390_R0_REGNUM
+ regnum
);
1567 ax_reg (ax
, S390_R0_UPPER_REGNUM
+ regnum
);
1568 ax_const_l (ax
, 32);
1569 ax_simple (ax
, aop_lsh
);
1570 ax_simple (ax
, aop_bit_or
);
1572 else if (regnum_is_vxr_full (tdep
, regnum
))
1574 /* Too large to stuff on the stack. */
1579 internal_error (_("invalid regnum"));
1584 /* The "gen_return_address" gdbarch method. Since this is supposed to be
1585 just a best-effort method, and we don't really have the means to run
1586 the full unwinder here, just collect the link register. */
1589 s390_gen_return_address (struct gdbarch
*gdbarch
,
1590 struct agent_expr
*ax
, struct axs_value
*value
,
1593 value
->type
= register_type (gdbarch
, S390_R14_REGNUM
);
1594 value
->kind
= axs_lvalue_register
;
1595 value
->u
.reg
= S390_R14_REGNUM
;
1598 /* Address handling. */
1600 /* Implement addr_bits_remove gdbarch method.
1601 Only used for ABI_LINUX_S390. */
1604 s390_addr_bits_remove (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
1606 return addr
& 0x7fffffff;
1609 /* Implement addr_class_type_flags gdbarch method.
1610 Only used for ABI_LINUX_ZSERIES. */
1612 static type_instance_flags
1613 s390_address_class_type_flags (int byte_size
, int dwarf2_addr_class
)
1616 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
1621 /* Implement addr_class_type_flags_to_name gdbarch method.
1622 Only used for ABI_LINUX_ZSERIES. */
1625 s390_address_class_type_flags_to_name (struct gdbarch
*gdbarch
,
1626 type_instance_flags type_flags
)
1628 if (type_flags
& TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
)
1634 /* Implement addr_class_name_to_type_flags gdbarch method.
1635 Only used for ABI_LINUX_ZSERIES. */
1638 s390_address_class_name_to_type_flags (struct gdbarch
*gdbarch
,
1640 type_instance_flags
*type_flags_ptr
)
1642 if (strcmp (name
, "mode32") == 0)
1644 *type_flags_ptr
= TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1
;
1651 /* Inferior function calls. */
1653 /* Dummy function calls. */
1655 /* Unwrap any single-field structs in TYPE and return the effective
1656 "inner" type. E.g., yield "float" for all these cases:
1660 struct { struct { float x; } x; };
1661 struct { struct { struct { float x; } x; } x; };
1663 However, if an inner type is smaller than MIN_SIZE, abort the
1666 static struct type
*
1667 s390_effective_inner_type (struct type
*type
, unsigned int min_size
)
1669 while (type
->code () == TYPE_CODE_STRUCT
)
1671 struct type
*inner
= NULL
;
1673 /* Find a non-static field, if any. Unless there's exactly one,
1674 abort the unwrapping. */
1675 for (int i
= 0; i
< type
->num_fields (); i
++)
1677 struct field f
= type
->field (i
);
1688 inner
= check_typedef (inner
);
1689 if (inner
->length () < min_size
)
1697 /* Return non-zero if TYPE should be passed like "float" or
1701 s390_function_arg_float (struct type
*type
)
1703 /* Note that long double as well as complex types are intentionally
1705 if (type
->length () > 8)
1708 /* A struct containing just a float or double is passed like a float
1710 type
= s390_effective_inner_type (type
, 0);
1712 return (type
->code () == TYPE_CODE_FLT
1713 || type
->code () == TYPE_CODE_DECFLOAT
);
1716 /* Return non-zero if TYPE should be passed like a vector. */
1719 s390_function_arg_vector (struct type
*type
)
1721 if (type
->length () > 16)
1724 /* Structs containing just a vector are passed like a vector. */
1725 type
= s390_effective_inner_type (type
, type
->length ());
1727 return type
->code () == TYPE_CODE_ARRAY
&& type
->is_vector ();
1730 /* Determine whether N is a power of two. */
1733 is_power_of_two (unsigned int n
)
1735 return n
&& ((n
& (n
- 1)) == 0);
1738 /* For an argument whose type is TYPE and which is not passed like a
1739 float or vector, return non-zero if it should be passed like "int"
1743 s390_function_arg_integer (struct type
*type
)
1745 enum type_code code
= type
->code ();
1747 if (type
->length () > 8)
1750 if (code
== TYPE_CODE_INT
1751 || code
== TYPE_CODE_ENUM
1752 || code
== TYPE_CODE_RANGE
1753 || code
== TYPE_CODE_CHAR
1754 || code
== TYPE_CODE_BOOL
1755 || code
== TYPE_CODE_PTR
1756 || TYPE_IS_REFERENCE (type
))
1759 return ((code
== TYPE_CODE_UNION
|| code
== TYPE_CODE_STRUCT
)
1760 && is_power_of_two (type
->length ()));
1763 /* Argument passing state: Internal data structure passed to helper
1764 routines of s390_push_dummy_call. */
1766 struct s390_arg_state
1768 /* Register cache, or NULL, if we are in "preparation mode". */
1769 struct regcache
*regcache
;
1770 /* Next available general/floating-point/vector register for
1771 argument passing. */
1773 /* Current pointer to copy area (grows downwards). */
1775 /* Current pointer to parameter area (grows upwards). */
1779 /* Prepare one argument ARG for a dummy call and update the argument
1780 passing state AS accordingly. If the regcache field in AS is set,
1781 operate in "write mode" and write ARG into the inferior. Otherwise
1782 run "preparation mode" and skip all updates to the inferior. */
1785 s390_handle_arg (struct s390_arg_state
*as
, struct value
*arg
,
1786 s390_gdbarch_tdep
*tdep
, int word_size
,
1787 enum bfd_endian byte_order
, int is_unnamed
)
1789 struct type
*type
= check_typedef (arg
->type ());
1790 unsigned int length
= type
->length ();
1791 int write_mode
= as
->regcache
!= NULL
;
1793 if (s390_function_arg_float (type
))
1795 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass
1796 arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and
1798 if (as
->fr
<= (tdep
->abi
== ABI_LINUX_S390
? 2 : 6))
1800 /* When we store a single-precision value in an FP register,
1801 it occupies the leftmost bits. */
1803 as
->regcache
->cooked_write_part (S390_F0_REGNUM
+ as
->fr
, 0, length
,
1804 arg
->contents ().data ());
1809 /* When we store a single-precision value in a stack slot,
1810 it occupies the rightmost bits. */
1811 as
->argp
= align_up (as
->argp
+ length
, word_size
);
1813 write_memory (as
->argp
- length
, arg
->contents ().data (),
1817 else if (tdep
->vector_abi
== S390_VECTOR_ABI_128
1818 && s390_function_arg_vector (type
))
1820 static const char use_vr
[] = {24, 26, 28, 30, 25, 27, 29, 31};
1822 if (!is_unnamed
&& as
->vr
< ARRAY_SIZE (use_vr
))
1824 int regnum
= S390_V24_REGNUM
+ use_vr
[as
->vr
] - 24;
1827 as
->regcache
->cooked_write_part (regnum
, 0, length
,
1828 arg
->contents ().data ());
1834 write_memory (as
->argp
, arg
->contents ().data (), length
);
1835 as
->argp
= align_up (as
->argp
+ length
, word_size
);
1838 else if (s390_function_arg_integer (type
) && length
<= word_size
)
1840 /* Initialize it just to avoid a GCC false warning. */
1845 /* Place value in least significant bits of the register or
1846 memory word and sign- or zero-extend to full word size.
1847 This also applies to a struct or union. */
1848 val
= type
->is_unsigned ()
1849 ? extract_unsigned_integer (arg
->contents ().data (),
1851 : extract_signed_integer (arg
->contents ().data (),
1852 length
, byte_order
);
1858 regcache_cooked_write_unsigned (as
->regcache
,
1859 S390_R0_REGNUM
+ as
->gr
,
1866 write_memory_unsigned_integer (as
->argp
, word_size
,
1868 as
->argp
+= word_size
;
1871 else if (s390_function_arg_integer (type
) && length
== 8)
1877 as
->regcache
->cooked_write (S390_R0_REGNUM
+ as
->gr
,
1878 arg
->contents ().data ());
1879 as
->regcache
->cooked_write
1880 (S390_R0_REGNUM
+ as
->gr
+ 1,
1881 arg
->contents ().data () + word_size
);
1887 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
1888 in it, then don't go back and use it again later. */
1892 write_memory (as
->argp
, arg
->contents ().data (), length
);
1898 /* This argument type is never passed in registers. Place the
1899 value in the copy area and pass a pointer to it. Use 8-byte
1900 alignment as a conservative assumption. */
1901 as
->copy
= align_down (as
->copy
- length
, 8);
1903 write_memory (as
->copy
, arg
->contents ().data (), length
);
1908 regcache_cooked_write_unsigned (as
->regcache
,
1909 S390_R0_REGNUM
+ as
->gr
,
1916 write_memory_unsigned_integer (as
->argp
, word_size
,
1917 byte_order
, as
->copy
);
1918 as
->argp
+= word_size
;
1923 /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
1924 place to be passed to a function, as specified by the "GNU/Linux
1925 for S/390 ELF Application Binary Interface Supplement".
1927 SP is the current stack pointer. We must put arguments, links,
1928 padding, etc. wherever they belong, and return the new stack
1931 If STRUCT_RETURN is non-zero, then the function we're calling is
1932 going to return a structure by value; STRUCT_ADDR is the address of
1933 a block we've allocated for it on the stack.
1935 Our caller has taken care of any type promotions needed to satisfy
1936 prototypes or the old K&R argument-passing rules. */
1939 s390_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
1940 struct regcache
*regcache
, CORE_ADDR bp_addr
,
1941 int nargs
, struct value
**args
, CORE_ADDR sp
,
1942 function_call_return_method return_method
,
1943 CORE_ADDR struct_addr
)
1945 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
1946 int word_size
= gdbarch_ptr_bit (gdbarch
) / 8;
1947 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1949 struct s390_arg_state arg_state
, arg_prep
;
1950 CORE_ADDR param_area_start
, new_sp
;
1951 struct type
*ftype
= check_typedef (function
->type ());
1953 if (ftype
->code () == TYPE_CODE_PTR
)
1954 ftype
= check_typedef (ftype
->target_type ());
1957 arg_prep
.gr
= (return_method
== return_method_struct
) ? 3 : 2;
1961 arg_prep
.regcache
= NULL
;
1963 /* Initialize arg_state for "preparation mode". */
1964 arg_state
= arg_prep
;
1966 /* Update arg_state.copy with the start of the reference-to-copy area
1967 and arg_state.argp with the size of the parameter area. */
1968 for (i
= 0; i
< nargs
; i
++)
1969 s390_handle_arg (&arg_state
, args
[i
], tdep
, word_size
, byte_order
,
1970 ftype
->has_varargs () && i
>= ftype
->num_fields ());
1972 param_area_start
= align_down (arg_state
.copy
- arg_state
.argp
, 8);
1974 /* Allocate the standard frame areas: the register save area, the
1975 word reserved for the compiler, and the back chain pointer. */
1976 new_sp
= param_area_start
- (16 * word_size
+ 32);
1978 /* Now we have the final stack pointer. Make sure we didn't
1979 underflow; on 31-bit, this would result in addresses with the
1980 high bit set, which causes confusion elsewhere. Note that if we
1981 error out here, stack and registers remain untouched. */
1982 if (gdbarch_addr_bits_remove (gdbarch
, new_sp
) != new_sp
)
1983 error (_("Stack overflow"));
1985 /* Pass the structure return address in general register 2. */
1986 if (return_method
== return_method_struct
)
1987 regcache_cooked_write_unsigned (regcache
, S390_R2_REGNUM
, struct_addr
);
1989 /* Initialize arg_state for "write mode". */
1990 arg_state
= arg_prep
;
1991 arg_state
.argp
= param_area_start
;
1992 arg_state
.regcache
= regcache
;
1994 /* Write all parameters. */
1995 for (i
= 0; i
< nargs
; i
++)
1996 s390_handle_arg (&arg_state
, args
[i
], tdep
, word_size
, byte_order
,
1997 ftype
->has_varargs () && i
>= ftype
->num_fields ());
1999 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
2003 regcache_cooked_read_unsigned (regcache
, S390_PSWA_REGNUM
, &pswa
);
2004 bp_addr
= (bp_addr
& 0x7fffffff) | (pswa
& 0x80000000);
2006 regcache_cooked_write_unsigned (regcache
, S390_RETADDR_REGNUM
, bp_addr
);
2008 /* Store updated stack pointer. */
2009 regcache_cooked_write_unsigned (regcache
, S390_SP_REGNUM
, new_sp
);
2011 /* We need to return the 'stack part' of the frame ID,
2012 which is actually the top of the register save area. */
2013 return param_area_start
;
2016 /* Assuming THIS_FRAME is a dummy, return the frame ID of that
2017 dummy frame. The frame ID's base needs to match the TOS value
2018 returned by push_dummy_call, and the PC match the dummy frame's
2021 static struct frame_id
2022 s390_dummy_id (struct gdbarch
*gdbarch
, const frame_info_ptr
&this_frame
)
2024 int word_size
= gdbarch_ptr_bit (gdbarch
) / 8;
2025 CORE_ADDR sp
= get_frame_register_unsigned (this_frame
, S390_SP_REGNUM
);
2026 sp
= gdbarch_addr_bits_remove (gdbarch
, sp
);
2028 return frame_id_build (sp
+ 16*word_size
+ 32,
2029 get_frame_pc (this_frame
));
2032 /* Implement frame_align gdbarch method. */
2035 s390_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
2037 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2038 always be aligned on an eight-byte boundary. */
2042 /* Helper for s390_return_value: Set or retrieve a function return
2043 value if it resides in a register. */
2046 s390_register_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2047 struct regcache
*regcache
,
2048 gdb_byte
*out
, const gdb_byte
*in
)
2050 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2051 int word_size
= gdbarch_ptr_bit (gdbarch
) / 8;
2052 int length
= type
->length ();
2053 int code
= type
->code ();
2055 if (code
== TYPE_CODE_FLT
|| code
== TYPE_CODE_DECFLOAT
)
2057 /* Float-like value: left-aligned in f0. */
2059 regcache
->cooked_write_part (S390_F0_REGNUM
, 0, length
, in
);
2061 regcache
->cooked_read_part (S390_F0_REGNUM
, 0, length
, out
);
2063 else if (code
== TYPE_CODE_ARRAY
)
2065 /* Vector: left-aligned in v24. */
2067 regcache
->cooked_write_part (S390_V24_REGNUM
, 0, length
, in
);
2069 regcache
->cooked_read_part (S390_V24_REGNUM
, 0, length
, out
);
2071 else if (length
<= word_size
)
2073 /* Integer: zero- or sign-extended in r2. */
2075 regcache
->cooked_read_part (S390_R2_REGNUM
, word_size
- length
, length
,
2077 else if (type
->is_unsigned ())
2078 regcache_cooked_write_unsigned
2079 (regcache
, S390_R2_REGNUM
,
2080 extract_unsigned_integer (in
, length
, byte_order
));
2082 regcache_cooked_write_signed
2083 (regcache
, S390_R2_REGNUM
,
2084 extract_signed_integer (in
, length
, byte_order
));
2086 else if (length
== 2 * word_size
)
2088 /* Double word: in r2 and r3. */
2091 regcache
->cooked_write (S390_R2_REGNUM
, in
);
2092 regcache
->cooked_write (S390_R3_REGNUM
, in
+ word_size
);
2096 regcache
->cooked_read (S390_R2_REGNUM
, out
);
2097 regcache
->cooked_read (S390_R3_REGNUM
, out
+ word_size
);
2101 internal_error (_("invalid return type"));
2104 /* Implement the 'return_value' gdbarch method. */
2106 static enum return_value_convention
2107 s390_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
2108 struct type
*type
, struct regcache
*regcache
,
2109 gdb_byte
*out
, const gdb_byte
*in
)
2111 enum return_value_convention rvc
;
2113 type
= check_typedef (type
);
2115 switch (type
->code ())
2117 case TYPE_CODE_STRUCT
:
2118 case TYPE_CODE_UNION
:
2119 case TYPE_CODE_COMPLEX
:
2120 rvc
= RETURN_VALUE_STRUCT_CONVENTION
;
2122 case TYPE_CODE_ARRAY
:
2124 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
2125 rvc
= (tdep
->vector_abi
== S390_VECTOR_ABI_128
2126 && type
->length () <= 16 && type
->is_vector ())
2127 ? RETURN_VALUE_REGISTER_CONVENTION
2128 : RETURN_VALUE_STRUCT_CONVENTION
;
2132 rvc
= type
->length () <= 8
2133 ? RETURN_VALUE_REGISTER_CONVENTION
2134 : RETURN_VALUE_STRUCT_CONVENTION
;
2137 if (in
!= NULL
|| out
!= NULL
)
2139 if (rvc
== RETURN_VALUE_REGISTER_CONVENTION
)
2140 s390_register_return_value (gdbarch
, type
, regcache
, out
, in
);
2141 else if (in
!= NULL
)
2142 error (_("Cannot set function return value."));
2144 error (_("Function return value unknown."));
2150 /* Try to get the value of DWARF_REG in FRAME at function entry. If successful,
2151 return it as value of type VAL_TYPE. */
2153 static struct value
*
2154 dwarf_reg_on_entry (int dwarf_reg
, struct type
*val_type
,
2155 const frame_info_ptr
&frame
)
2157 enum call_site_parameter_kind kind
= CALL_SITE_PARAMETER_DWARF_REG
;
2158 union call_site_parameter_u kind_u
= { .dwarf_reg
= dwarf_reg
};
2162 return value_of_dwarf_reg_entry (val_type
, frame
, kind
, kind_u
);
2164 catch (const gdb_exception_error
&e
)
2166 if (e
.error
== NO_ENTRY_VALUE_ERROR
)
2173 /* Both the 32-bit and 64-bit ABIs specify that values of some types are
2174 returned in a storage buffer provided by the caller. Return the address of
2175 that storage buffer, if possible. Implements the
2176 gdbarch_get_return_buf_addr hook. */
2179 s390_get_return_buf_addr (struct type
*val_type
,
2180 const frame_info_ptr
&cur_frame
)
2182 /* The address of the storage buffer is provided as a hidden argument in
2186 /* The ABI does not guarantee that the register will not be changed while
2187 executing the function. Hence, it cannot be assumed that it will still
2188 contain the address of the storage buffer when execution reaches the end
2191 Attempt to determine the value on entry using the DW_OP_entry_value DWARF
2192 entries. This requires compiling the user program with -fvar-tracking. */
2193 struct value
*val_on_entry
2194 = dwarf_reg_on_entry (dwarf_reg
, lookup_pointer_type (val_type
), cur_frame
);
2196 if (val_on_entry
== nullptr)
2198 warning ("Cannot determine the function return value.\n"
2199 "Try compiling with -fvar-tracking.");
2203 return value_as_address (val_on_entry
);
2206 /* Frame unwinding. */
2208 /* Implement the stack_frame_destroyed_p gdbarch method. */
2211 s390_stack_frame_destroyed_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
2213 int word_size
= gdbarch_ptr_bit (gdbarch
) / 8;
2215 /* In frameless functions, there's no frame to destroy and thus
2216 we don't care about the epilogue.
2218 In functions with frame, the epilogue sequence is a pair of
2219 a LM-type instruction that restores (amongst others) the
2220 return register %r14 and the stack pointer %r15, followed
2221 by a branch 'br %r14' --or equivalent-- that effects the
2224 In that situation, this function needs to return 'true' in
2225 exactly one case: when pc points to that branch instruction.
2227 Thus we try to disassemble the one instructions immediately
2228 preceding pc and check whether it is an LM-type instruction
2229 modifying the stack pointer.
2231 Note that disassembling backwards is not reliable, so there
2232 is a slight chance of false positives here ... */
2235 unsigned int r1
, r3
, b2
;
2239 && !target_read_memory (pc
- 4, insn
, 4)
2240 && is_rs (insn
, op_lm
, &r1
, &r3
, &d2
, &b2
)
2241 && r3
== S390_SP_REGNUM
- S390_R0_REGNUM
)
2245 && !target_read_memory (pc
- 6, insn
, 6)
2246 && is_rsy (insn
, op1_lmy
, op2_lmy
, &r1
, &r3
, &d2
, &b2
)
2247 && r3
== S390_SP_REGNUM
- S390_R0_REGNUM
)
2251 && !target_read_memory (pc
- 6, insn
, 6)
2252 && is_rsy (insn
, op1_lmg
, op2_lmg
, &r1
, &r3
, &d2
, &b2
)
2253 && r3
== S390_SP_REGNUM
- S390_R0_REGNUM
)
2259 /* Implement unwind_pc gdbarch method. */
2262 s390_unwind_pc (struct gdbarch
*gdbarch
, const frame_info_ptr
&next_frame
)
2264 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
2266 pc
= frame_unwind_register_unsigned (next_frame
, tdep
->pc_regnum
);
2267 return gdbarch_addr_bits_remove (gdbarch
, pc
);
2270 /* Implement unwind_sp gdbarch method. */
2273 s390_unwind_sp (struct gdbarch
*gdbarch
, const frame_info_ptr
&next_frame
)
2276 sp
= frame_unwind_register_unsigned (next_frame
, S390_SP_REGNUM
);
2277 return gdbarch_addr_bits_remove (gdbarch
, sp
);
2280 /* Helper routine to unwind pseudo registers. */
2282 static struct value
*
2283 s390_unwind_pseudo_register (const frame_info_ptr
&this_frame
, int regnum
)
2285 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2286 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
2287 struct type
*type
= register_type (gdbarch
, regnum
);
2289 /* Unwind PC via PSW address. */
2290 if (regnum
== tdep
->pc_regnum
)
2294 val
= frame_unwind_register_value (this_frame
, S390_PSWA_REGNUM
);
2295 if (!val
->optimized_out ())
2297 LONGEST pswa
= value_as_long (val
);
2299 if (type
->length () == 4)
2300 return value_from_pointer (type
, pswa
& 0x7fffffff);
2302 return value_from_pointer (type
, pswa
);
2306 /* Unwind CC via PSW mask. */
2307 if (regnum
== tdep
->cc_regnum
)
2311 val
= frame_unwind_register_value (this_frame
, S390_PSWM_REGNUM
);
2312 if (!val
->optimized_out ())
2314 LONGEST pswm
= value_as_long (val
);
2316 if (type
->length () == 4)
2317 return value_from_longest (type
, (pswm
>> 12) & 3);
2319 return value_from_longest (type
, (pswm
>> 44) & 3);
2323 /* Unwind full GPRs to show at least the lower halves (as the
2324 upper halves are undefined). */
2325 if (regnum_is_gpr_full (tdep
, regnum
))
2327 int reg
= regnum
- tdep
->gpr_full_regnum
;
2330 val
= frame_unwind_register_value (this_frame
, S390_R0_REGNUM
+ reg
);
2331 if (!val
->optimized_out ())
2332 return value_cast (type
, val
);
2335 if (regnum_is_vxr_full (tdep
, regnum
))
2337 struct value
*val
= value::allocate_register (this_frame
, regnum
);
2339 int reg
= regnum
- tdep
->v0_full_regnum
;
2341 = frame_unwind_register_value (this_frame
, S390_F0_REGNUM
+ reg
);
2343 = frame_unwind_register_value (this_frame
, S390_V0_LOWER_REGNUM
+ reg
);
2345 val1
->contents_copy (val
, 0, 0, 8);
2346 val2
->contents_copy (val
, 8, 0, 8);
2348 return value_cast (type
, val
);
2351 return value::allocate_optimized_out (type
);
2354 /* Translate a .eh_frame register to DWARF register, or adjust a
2355 .debug_frame register. */
2358 s390_adjust_frame_regnum (struct gdbarch
*gdbarch
, int num
, int eh_frame_p
)
2360 /* See s390_dwarf_reg_to_regnum for comments. */
2361 return (num
>= 0 && num
< 16) ? num
+ s390_dwarf_reg_r0l
: num
;
2364 /* DWARF-2 frame unwinding. */
2366 /* Function to unwind a pseudo-register in dwarf2_frame unwinder. Used by
2367 s390_dwarf2_frame_init_reg. */
2369 static struct value
*
2370 s390_dwarf2_prev_register (const frame_info_ptr
&this_frame
, void **this_cache
,
2373 return s390_unwind_pseudo_register (this_frame
, regnum
);
2376 /* Implement init_reg dwarf2_frame method. */
2379 s390_dwarf2_frame_init_reg (struct gdbarch
*gdbarch
, int regnum
,
2380 struct dwarf2_frame_state_reg
*reg
,
2381 const frame_info_ptr
&this_frame
)
2383 /* The condition code (and thus PSW mask) is call-clobbered. */
2384 if (regnum
== S390_PSWM_REGNUM
)
2385 reg
->how
= DWARF2_FRAME_REG_UNDEFINED
;
2387 /* The PSW address unwinds to the return address. */
2388 else if (regnum
== S390_PSWA_REGNUM
)
2389 reg
->how
= DWARF2_FRAME_REG_RA
;
2391 /* Fixed registers are call-saved or call-clobbered
2392 depending on the ABI in use. */
2393 else if (regnum
< S390_NUM_REGS
)
2395 if (s390_register_call_saved (gdbarch
, regnum
))
2396 reg
->how
= DWARF2_FRAME_REG_SAME_VALUE
;
2398 reg
->how
= DWARF2_FRAME_REG_UNDEFINED
;
2401 /* We install a special function to unwind pseudos. */
2404 reg
->how
= DWARF2_FRAME_REG_FN
;
2405 reg
->loc
.fn
= s390_dwarf2_prev_register
;
2409 /* Frame unwinding. */
2411 /* Wrapper for trad_frame_get_prev_register to allow for s390 pseudo
2412 register translation. */
2415 s390_trad_frame_prev_register (const frame_info_ptr
&this_frame
,
2416 trad_frame_saved_reg saved_regs
[],
2419 if (regnum
< S390_NUM_REGS
)
2420 return trad_frame_get_prev_register (this_frame
, saved_regs
, regnum
);
2422 return s390_unwind_pseudo_register (this_frame
, regnum
);
2425 /* Normal stack frames. */
2427 struct s390_unwind_cache
{
2430 CORE_ADDR frame_base
;
2431 CORE_ADDR local_base
;
2433 trad_frame_saved_reg
*saved_regs
;
2436 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2437 prologue analysis. Helper for s390_frame_unwind_cache. */
2440 s390_prologue_frame_unwind_cache (const frame_info_ptr
&this_frame
,
2441 struct s390_unwind_cache
*info
)
2443 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2444 int word_size
= gdbarch_ptr_bit (gdbarch
) / 8;
2445 struct s390_prologue_data data
;
2446 pv_t
*fp
= &data
.gpr
[S390_FRAME_REGNUM
- S390_R0_REGNUM
];
2447 pv_t
*sp
= &data
.gpr
[S390_SP_REGNUM
- S390_R0_REGNUM
];
2456 frame_info_ptr next_frame
;
2458 /* Try to find the function start address. If we can't find it, we don't
2459 bother searching for it -- with modern compilers this would be mostly
2460 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
2461 or else a valid backchain ... */
2462 if (!get_frame_func_if_available (this_frame
, &info
->func
))
2469 /* Try to analyze the prologue. */
2470 result
= s390_analyze_prologue (gdbarch
, func
,
2471 get_frame_pc (this_frame
), &data
);
2475 /* If this was successful, we should have found the instruction that
2476 sets the stack pointer register to the previous value of the stack
2477 pointer minus the frame size. */
2478 if (!pv_is_register (*sp
, S390_SP_REGNUM
))
2481 /* A frame size of zero at this point can mean either a real
2482 frameless function, or else a failure to find the prologue.
2483 Perform some sanity checks to verify we really have a
2484 frameless function. */
2487 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
2488 size zero. This is only possible if the next frame is a sentinel
2489 frame, a dummy frame, or a signal trampoline frame. */
2490 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
2491 needed, instead the code should simpliy rely on its
2493 next_frame
= get_next_frame (this_frame
);
2494 while (next_frame
&& get_frame_type (next_frame
) == INLINE_FRAME
)
2495 next_frame
= get_next_frame (next_frame
);
2497 && get_frame_type (get_next_frame (this_frame
)) == NORMAL_FRAME
)
2500 /* If we really have a frameless function, %r14 must be valid
2501 -- in particular, it must point to a different function. */
2502 reg
= get_frame_register_unsigned (this_frame
, S390_RETADDR_REGNUM
);
2503 reg
= gdbarch_addr_bits_remove (gdbarch
, reg
) - 1;
2504 if (get_pc_function_start (reg
) == func
)
2506 /* However, there is one case where it *is* valid for %r14
2507 to point to the same function -- if this is a recursive
2508 call, and we have stopped in the prologue *before* the
2509 stack frame was allocated.
2511 Recognize this case by looking ahead a bit ... */
2513 struct s390_prologue_data data2
;
2514 pv_t
*sp2
= &data2
.gpr
[S390_SP_REGNUM
- S390_R0_REGNUM
];
2516 if (!(s390_analyze_prologue (gdbarch
, func
, (CORE_ADDR
)-1, &data2
)
2517 && pv_is_register (*sp2
, S390_SP_REGNUM
)
2523 /* OK, we've found valid prologue data. */
2526 /* If the frame pointer originally also holds the same value
2527 as the stack pointer, we're probably using it. If it holds
2528 some other value -- even a constant offset -- it is most
2529 likely used as temp register. */
2530 if (pv_is_identical (*sp
, *fp
))
2531 frame_pointer
= S390_FRAME_REGNUM
;
2533 frame_pointer
= S390_SP_REGNUM
;
2535 /* If we've detected a function with stack frame, we'll still have to
2536 treat it as frameless if we're currently within the function epilog
2537 code at a point where the frame pointer has already been restored.
2538 This can only happen in an innermost frame. */
2539 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
2540 instead the code should simpliy rely on its analysis. */
2541 next_frame
= get_next_frame (this_frame
);
2542 while (next_frame
&& get_frame_type (next_frame
) == INLINE_FRAME
)
2543 next_frame
= get_next_frame (next_frame
);
2545 && (next_frame
== NULL
2546 || get_frame_type (get_next_frame (this_frame
)) != NORMAL_FRAME
))
2548 /* See the comment in s390_stack_frame_destroyed_p on why this is
2549 not completely reliable ... */
2550 if (s390_stack_frame_destroyed_p (gdbarch
, get_frame_pc (this_frame
)))
2552 memset (&data
, 0, sizeof (data
));
2554 frame_pointer
= S390_SP_REGNUM
;
2558 /* Once we know the frame register and the frame size, we can unwind
2559 the current value of the frame register from the next frame, and
2560 add back the frame size to arrive that the previous frame's
2561 stack pointer value. */
2562 prev_sp
= get_frame_register_unsigned (this_frame
, frame_pointer
) + size
;
2563 cfa
= prev_sp
+ 16*word_size
+ 32;
2565 /* Set up ABI call-saved/call-clobbered registers. */
2566 for (i
= 0; i
< S390_NUM_REGS
; i
++)
2567 if (!s390_register_call_saved (gdbarch
, i
))
2568 info
->saved_regs
[i
].set_unknown ();
2570 /* CC is always call-clobbered. */
2571 info
->saved_regs
[S390_PSWM_REGNUM
].set_unknown ();
2573 /* Record the addresses of all register spill slots the prologue parser
2574 has recognized. Consider only registers defined as call-saved by the
2575 ABI; for call-clobbered registers the parser may have recognized
2578 for (i
= 0; i
< S390_NUM_GPRS
; i
++)
2579 if (s390_register_call_saved (gdbarch
, S390_R0_REGNUM
+ i
)
2580 && data
.gpr_slot
[i
] != 0)
2581 info
->saved_regs
[S390_R0_REGNUM
+ i
].set_addr (cfa
- data
.gpr_slot
[i
]);
2583 for (i
= 0; i
< S390_NUM_FPRS
; i
++)
2584 if (s390_register_call_saved (gdbarch
, S390_F0_REGNUM
+ i
)
2585 && data
.fpr_slot
[i
] != 0)
2586 info
->saved_regs
[S390_F0_REGNUM
+ i
].set_addr (cfa
- data
.fpr_slot
[i
]);
2588 /* Handle this type of prologue:
2591 where call-clobbered floating point registers are used as register save
2593 for (i
= 0; i
< S390_NUM_FPRS
; i
++)
2595 int fpr
= S390_F0_REGNUM
+ i
;
2597 /* Check that fpr is a call-clobbered register. */
2598 if (s390_register_call_saved (gdbarch
, fpr
))
2601 /* Check that fpr contains the value of a register at function
2603 if (data
.fpr
[i
].kind
!= pvk_register
)
2606 int entry_val_reg
= data
.fpr
[i
].reg
;
2608 /* Check that entry_val_reg is a call-saved register. */
2609 if (!s390_register_call_saved (gdbarch
, entry_val_reg
))
2612 /* In the prologue, we've copied:
2613 - the value of a call-saved register (entry_val_reg) at function
2615 - a call-clobbered floating point register (fpr).
2617 Heuristic: assume that makes the floating point register a register
2618 save slot, leaving the value constant throughout the function. */
2619 info
->saved_regs
[entry_val_reg
].set_realreg (fpr
);
2622 /* Function return will set PC to %r14. */
2623 info
->saved_regs
[S390_PSWA_REGNUM
] = info
->saved_regs
[S390_RETADDR_REGNUM
];
2625 /* In frameless functions, we unwind simply by moving the return
2626 address to the PC. However, if we actually stored to the
2627 save area, use that -- we might only think the function frameless
2628 because we're in the middle of the prologue ... */
2630 && !info
->saved_regs
[S390_PSWA_REGNUM
].is_addr ())
2632 info
->saved_regs
[S390_PSWA_REGNUM
].set_realreg (S390_RETADDR_REGNUM
);
2635 /* Another sanity check: unless this is a frameless function,
2636 we should have found spill slots for SP and PC.
2637 If not, we cannot unwind further -- this happens e.g. in
2638 libc's thread_start routine. */
2641 if (!info
->saved_regs
[S390_SP_REGNUM
].is_addr ()
2642 || !info
->saved_regs
[S390_PSWA_REGNUM
].is_addr ())
2646 /* We use the current value of the frame register as local_base,
2647 and the top of the register save area as frame_base. */
2650 info
->frame_base
= prev_sp
+ 16*word_size
+ 32;
2651 info
->local_base
= prev_sp
- size
;
2657 /* Unwind THIS_FRAME and write the information into unwind cache INFO using
2658 back chain unwinding. Helper for s390_frame_unwind_cache. */
2661 s390_backchain_frame_unwind_cache (const frame_info_ptr
&this_frame
,
2662 struct s390_unwind_cache
*info
)
2664 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2665 int word_size
= gdbarch_ptr_bit (gdbarch
) / 8;
2666 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2667 CORE_ADDR backchain
;
2672 /* Set up ABI call-saved/call-clobbered registers. */
2673 for (i
= 0; i
< S390_NUM_REGS
; i
++)
2674 if (!s390_register_call_saved (gdbarch
, i
))
2675 info
->saved_regs
[i
].set_unknown ();
2677 /* CC is always call-clobbered. */
2678 info
->saved_regs
[S390_PSWM_REGNUM
].set_unknown ();
2680 /* Get the backchain. */
2681 reg
= get_frame_register_unsigned (this_frame
, S390_SP_REGNUM
);
2682 if (!safe_read_memory_integer (reg
, word_size
, byte_order
, &tmp
))
2684 backchain
= (CORE_ADDR
) tmp
;
2686 /* A zero backchain terminates the frame chain. As additional
2687 sanity check, let's verify that the spill slot for SP in the
2688 save area pointed to by the backchain in fact links back to
2691 && safe_read_memory_integer (backchain
+ 15*word_size
,
2692 word_size
, byte_order
, &sp
)
2693 && (CORE_ADDR
)sp
== backchain
)
2695 /* We don't know which registers were saved, but it will have
2696 to be at least %r14 and %r15. This will allow us to continue
2697 unwinding, but other prev-frame registers may be incorrect ... */
2698 info
->saved_regs
[S390_SP_REGNUM
].set_addr (backchain
+ 15*word_size
);
2699 info
->saved_regs
[S390_RETADDR_REGNUM
].set_addr (backchain
+ 14*word_size
);
2701 /* Function return will set PC to %r14. */
2702 info
->saved_regs
[S390_PSWA_REGNUM
]
2703 = info
->saved_regs
[S390_RETADDR_REGNUM
];
2705 /* We use the current value of the frame register as local_base,
2706 and the top of the register save area as frame_base. */
2707 info
->frame_base
= backchain
+ 16*word_size
+ 32;
2708 info
->local_base
= reg
;
2711 info
->func
= get_frame_pc (this_frame
);
2714 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2715 s390_frame_unwind and s390_frame_base. */
2717 static struct s390_unwind_cache
*
2718 s390_frame_unwind_cache (const frame_info_ptr
&this_frame
,
2719 void **this_prologue_cache
)
2721 struct s390_unwind_cache
*info
;
2723 if (*this_prologue_cache
)
2724 return (struct s390_unwind_cache
*) *this_prologue_cache
;
2726 info
= FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache
);
2727 *this_prologue_cache
= info
;
2728 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
2730 info
->frame_base
= -1;
2731 info
->local_base
= -1;
2735 /* Try to use prologue analysis to fill the unwind cache.
2736 If this fails, fall back to reading the stack backchain. */
2737 if (!s390_prologue_frame_unwind_cache (this_frame
, info
))
2738 s390_backchain_frame_unwind_cache (this_frame
, info
);
2740 catch (const gdb_exception_error
&ex
)
2742 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2749 /* Implement this_id frame_unwind method for s390_frame_unwind. */
2752 s390_frame_this_id (const frame_info_ptr
&this_frame
,
2753 void **this_prologue_cache
,
2754 struct frame_id
*this_id
)
2756 struct s390_unwind_cache
*info
2757 = s390_frame_unwind_cache (this_frame
, this_prologue_cache
);
2759 if (info
->frame_base
== -1)
2761 if (info
->func
!= -1)
2762 *this_id
= frame_id_build_unavailable_stack (info
->func
);
2766 *this_id
= frame_id_build (info
->frame_base
, info
->func
);
2769 /* Implement prev_register frame_unwind method for s390_frame_unwind. */
2771 static struct value
*
2772 s390_frame_prev_register (const frame_info_ptr
&this_frame
,
2773 void **this_prologue_cache
, int regnum
)
2775 struct s390_unwind_cache
*info
2776 = s390_frame_unwind_cache (this_frame
, this_prologue_cache
);
2778 return s390_trad_frame_prev_register (this_frame
, info
->saved_regs
, regnum
);
2781 /* Default S390 frame unwinder. */
2783 static const struct frame_unwind_legacy
s390_frame_unwind (
2787 default_frame_unwind_stop_reason
,
2789 s390_frame_prev_register
,
2791 default_frame_sniffer
2794 /* Code stubs and their stack frames. For things like PLTs and NULL
2795 function calls (where there is no true frame and the return address
2796 is in the RETADDR register). */
2798 struct s390_stub_unwind_cache
2800 CORE_ADDR frame_base
;
2801 trad_frame_saved_reg
*saved_regs
;
2804 /* Unwind THIS_FRAME and return the corresponding unwind cache for
2805 s390_stub_frame_unwind. */
2807 static struct s390_stub_unwind_cache
*
2808 s390_stub_frame_unwind_cache (const frame_info_ptr
&this_frame
,
2809 void **this_prologue_cache
)
2811 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2812 int word_size
= gdbarch_ptr_bit (gdbarch
) / 8;
2813 struct s390_stub_unwind_cache
*info
;
2816 if (*this_prologue_cache
)
2817 return (struct s390_stub_unwind_cache
*) *this_prologue_cache
;
2819 info
= FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache
);
2820 *this_prologue_cache
= info
;
2821 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
2823 /* The return address is in register %r14. */
2824 info
->saved_regs
[S390_PSWA_REGNUM
].set_realreg (S390_RETADDR_REGNUM
);
2826 /* Retrieve stack pointer and determine our frame base. */
2827 reg
= get_frame_register_unsigned (this_frame
, S390_SP_REGNUM
);
2828 info
->frame_base
= reg
+ 16*word_size
+ 32;
2833 /* Implement this_id frame_unwind method for s390_stub_frame_unwind. */
2836 s390_stub_frame_this_id (const frame_info_ptr
&this_frame
,
2837 void **this_prologue_cache
,
2838 struct frame_id
*this_id
)
2840 struct s390_stub_unwind_cache
*info
2841 = s390_stub_frame_unwind_cache (this_frame
, this_prologue_cache
);
2842 *this_id
= frame_id_build (info
->frame_base
, get_frame_pc (this_frame
));
2845 /* Implement prev_register frame_unwind method for s390_stub_frame_unwind. */
2847 static struct value
*
2848 s390_stub_frame_prev_register (const frame_info_ptr
&this_frame
,
2849 void **this_prologue_cache
, int regnum
)
2851 struct s390_stub_unwind_cache
*info
2852 = s390_stub_frame_unwind_cache (this_frame
, this_prologue_cache
);
2853 return s390_trad_frame_prev_register (this_frame
, info
->saved_regs
, regnum
);
2856 /* Implement sniffer frame_unwind method for s390_stub_frame_unwind. */
2859 s390_stub_frame_sniffer (const struct frame_unwind
*self
,
2860 const frame_info_ptr
&this_frame
,
2861 void **this_prologue_cache
)
2863 CORE_ADDR addr_in_block
;
2864 bfd_byte insn
[S390_MAX_INSTR_SIZE
];
2866 /* If the current PC points to non-readable memory, we assume we
2867 have trapped due to an invalid function pointer call. We handle
2868 the non-existing current function like a PLT stub. */
2869 addr_in_block
= get_frame_address_in_block (this_frame
);
2870 if (in_plt_section (addr_in_block
)
2871 || s390_readinstruction (insn
, get_frame_pc (this_frame
)) < 0)
2876 /* S390 stub frame unwinder. */
2878 static const struct frame_unwind_legacy
s390_stub_frame_unwind (
2882 default_frame_unwind_stop_reason
,
2883 s390_stub_frame_this_id
,
2884 s390_stub_frame_prev_register
,
2886 s390_stub_frame_sniffer
2889 /* Frame base handling. */
2892 s390_frame_base_address (const frame_info_ptr
&this_frame
, void **this_cache
)
2894 struct s390_unwind_cache
*info
2895 = s390_frame_unwind_cache (this_frame
, this_cache
);
2896 return info
->frame_base
;
2900 s390_local_base_address (const frame_info_ptr
&this_frame
, void **this_cache
)
2902 struct s390_unwind_cache
*info
2903 = s390_frame_unwind_cache (this_frame
, this_cache
);
2904 return info
->local_base
;
2907 static const struct frame_base s390_frame_base
= {
2909 s390_frame_base_address
,
2910 s390_local_base_address
,
2911 s390_local_base_address
2914 /* Process record-replay */
2916 /* Takes the intermediate sum of address calculations and masks off upper
2917 bits according to current addressing mode. */
2920 s390_record_address_mask (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
2923 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
2924 ULONGEST pswm
, pswa
;
2926 if (tdep
->abi
== ABI_LINUX_S390
)
2928 regcache_raw_read_unsigned (regcache
, S390_PSWA_REGNUM
, &pswa
);
2929 am
= pswa
>> 31 & 1;
2933 regcache_raw_read_unsigned (regcache
, S390_PSWM_REGNUM
, &pswm
);
2934 am
= pswm
>> 31 & 3;
2939 return val
& 0xffffff;
2941 return val
& 0x7fffffff;
2945 gdb_printf (gdb_stdlog
, "Warning: Addressing mode %d used.", am
);
2950 /* Calculates memory address using pre-calculated index, raw instruction word
2951 with b and d/dl fields, and raw instruction byte with dh field. Index and
2952 dh should be set to 0 if unused. */
2955 s390_record_calc_disp_common (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
2956 ULONGEST x
, uint16_t bd
, int8_t dh
)
2958 uint8_t rb
= bd
>> 12 & 0xf;
2959 int32_t d
= (bd
& 0xfff) | ((int32_t)dh
<< 12);
2961 CORE_ADDR res
= d
+ x
;
2964 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ rb
, &b
);
2967 return s390_record_address_mask (gdbarch
, regcache
, res
);
2970 /* Calculates memory address using raw x, b + d/dl, dh fields from
2971 instruction. rx and dh should be set to 0 if unused. */
2974 s390_record_calc_disp (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
2975 uint8_t rx
, uint16_t bd
, int8_t dh
)
2979 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ rx
, &x
);
2980 return s390_record_calc_disp_common (gdbarch
, regcache
, x
, bd
, dh
);
2983 /* Calculates memory address for VSCE[GF] instructions. */
2986 s390_record_calc_disp_vsce (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
2987 uint8_t vx
, uint8_t el
, uint8_t es
, uint16_t bd
,
2988 int8_t dh
, CORE_ADDR
*res
)
2990 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
2991 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2994 if (tdep
->v0_full_regnum
== -1 || el
* es
>= 16)
2997 regcache
->cooked_read (tdep
->v0_full_regnum
+ vx
, buf
);
2999 regcache
->raw_read (S390_V16_REGNUM
+ vx
- 16, buf
);
3000 x
= extract_unsigned_integer (buf
+ el
* es
, es
, byte_order
);
3001 *res
= s390_record_calc_disp_common (gdbarch
, regcache
, x
, bd
, dh
);
3005 /* Calculates memory address for instructions with relative long addressing. */
3008 s390_record_calc_rl (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3009 CORE_ADDR addr
, uint16_t i1
, uint16_t i2
)
3011 int32_t ri
= i1
<< 16 | i2
;
3012 return s390_record_address_mask (gdbarch
, regcache
, addr
+ (LONGEST
)ri
* 2);
3015 /* Population count helper. */
3017 static int s390_popcnt (unsigned int x
) {
3028 /* Record 64-bit register. */
3031 s390_record_gpr_g (struct gdbarch
*gdbarch
, struct regcache
*regcache
, int i
)
3033 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
3034 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ i
))
3036 if (tdep
->abi
== ABI_LINUX_S390
)
3037 if (record_full_arch_list_add_reg (regcache
, S390_R0_UPPER_REGNUM
+ i
))
3042 /* Record high 32 bits of a register. */
3045 s390_record_gpr_h (struct gdbarch
*gdbarch
, struct regcache
*regcache
, int i
)
3047 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
3048 if (tdep
->abi
== ABI_LINUX_S390
)
3050 if (record_full_arch_list_add_reg (regcache
, S390_R0_UPPER_REGNUM
+ i
))
3055 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ i
))
3061 /* Record vector register. */
3064 s390_record_vr (struct gdbarch
*gdbarch
, struct regcache
*regcache
, int i
)
3068 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ i
))
3070 if (record_full_arch_list_add_reg (regcache
, S390_V0_LOWER_REGNUM
+ i
))
3075 if (record_full_arch_list_add_reg (regcache
, S390_V16_REGNUM
+ i
- 16))
3081 /* Implement process_record gdbarch method. */
3084 s390_process_record (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
3087 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
3088 uint16_t insn
[3] = {0};
3089 /* Instruction as bytes. */
3091 /* Instruction as nibbles. */
3093 /* Instruction vector registers. */
3095 CORE_ADDR oaddr
, oaddr2
, oaddr3
;
3098 /* if EX/EXRL instruction used, here's the reg parameter */
3100 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3102 /* Attempting to use EX or EXRL jumps back here */
3105 /* Read instruction. */
3106 insn
[0] = read_memory_unsigned_integer (addr
, 2, byte_order
);
3107 /* If execute was involved, do the adjustment. */
3109 insn
[0] |= ex
& 0xff;
3110 /* Two highest bits determine instruction size. */
3111 if (insn
[0] >= 0x4000)
3112 insn
[1] = read_memory_unsigned_integer (addr
+2, 2, byte_order
);
3114 /* Not necessary, but avoids uninitialized variable warnings. */
3116 if (insn
[0] >= 0xc000)
3117 insn
[2] = read_memory_unsigned_integer (addr
+4, 2, byte_order
);
3120 /* Split instruction into bytes and nibbles. */
3121 for (i
= 0; i
< 3; i
++)
3123 ibyte
[i
*2] = insn
[i
] >> 8 & 0xff;
3124 ibyte
[i
*2+1] = insn
[i
] & 0xff;
3126 for (i
= 0; i
< 6; i
++)
3128 inib
[i
*2] = ibyte
[i
] >> 4 & 0xf;
3129 inib
[i
*2+1] = ibyte
[i
] & 0xf;
3131 /* Compute vector registers, if applicable. */
3132 ivec
[0] = (inib
[9] >> 3 & 1) << 4 | inib
[2];
3133 ivec
[1] = (inib
[9] >> 2 & 1) << 4 | inib
[3];
3134 ivec
[2] = (inib
[9] >> 1 & 1) << 4 | inib
[4];
3135 ivec
[3] = (inib
[9] >> 0 & 1) << 4 | inib
[8];
3139 /* 0x00 undefined */
3142 /* E-format instruction */
3145 /* 0x00 undefined */
3146 /* 0x01 unsupported: PR - program return */
3147 /* 0x02 unsupported: UPT */
3148 /* 0x03 undefined */
3149 /* 0x04 privileged: PTFF - perform timing facility function */
3150 /* 0x05-0x06 undefined */
3151 /* 0x07 privileged: SCKPF - set clock programmable field */
3152 /* 0x08-0x09 undefined */
3154 case 0x0a: /* PFPO - perform floating point operation */
3155 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
, &tmp
);
3156 if (!(tmp
& 0x80000000u
))
3158 uint8_t ofc
= tmp
>> 16 & 0xff;
3161 case 0x00: /* HFP32 */
3162 case 0x01: /* HFP64 */
3163 case 0x05: /* BFP32 */
3164 case 0x06: /* BFP64 */
3165 case 0x08: /* DFP32 */
3166 case 0x09: /* DFP64 */
3167 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
))
3170 case 0x02: /* HFP128 */
3171 case 0x07: /* BFP128 */
3172 case 0x0a: /* DFP128 */
3173 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
))
3175 if (record_full_arch_list_add_reg (regcache
, S390_F2_REGNUM
))
3179 gdb_printf (gdb_stdlog
, "Warning: Unknown PFPO OFC %02x at %s.\n",
3180 ofc
, paddress (gdbarch
, addr
));
3184 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
3187 if (record_full_arch_list_add_reg (regcache
, S390_R1_REGNUM
))
3189 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3193 case 0x0b: /* TAM - test address mode */
3194 case 0x0c: /* SAM24 - set address mode 24 */
3195 case 0x0d: /* SAM31 - set address mode 31 */
3196 case 0x0e: /* SAM64 - set address mode 64 */
3197 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3201 /* 0x0f-0xfe undefined */
3203 /* 0xff unsupported: TRAP */
3210 /* 0x02 undefined */
3211 /* 0x03 undefined */
3213 case 0x04: /* SPM - set program mask */
3214 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3218 case 0x05: /* BALR - branch and link */
3219 case 0x45: /* BAL - branch and link */
3220 case 0x06: /* BCTR - branch on count */
3221 case 0x46: /* BCT - branch on count */
3222 case 0x0d: /* BASR - branch and save */
3223 case 0x4d: /* BAS - branch and save */
3224 case 0x84: /* BRXH - branch relative on index high */
3225 case 0x85: /* BRXLE - branch relative on index low or equal */
3226 case 0x86: /* BXH - branch on index high */
3227 case 0x87: /* BXLE - branch on index low or equal */
3228 /* BA[SL]* use native-size destination for linkage info, BCT*, BRX*, BX*
3229 use 32-bit destination as counter. */
3230 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
3234 case 0x07: /* BCR - branch on condition */
3235 case 0x47: /* BC - branch on condition */
3236 /* No effect other than PC transfer. */
3239 /* 0x08 undefined */
3240 /* 0x09 undefined */
3243 /* SVC - supervisor call */
3244 if (tdep
->s390_syscall_record
!= NULL
)
3246 if (tdep
->s390_syscall_record (regcache
, ibyte
[1]))
3251 gdb_printf (gdb_stderr
, _("no syscall record support\n"));
3256 case 0x0b: /* BSM - branch and set mode */
3258 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
3260 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3264 case 0x0c: /* BASSM - branch and save and set mode */
3265 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
3267 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3271 case 0x0e: /* MVCL - move long [interruptible] */
3272 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[2], &tmp
);
3273 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
3274 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ (inib
[2] | 1), &tmp
);
3276 if (record_full_arch_list_add_mem (oaddr
, tmp
))
3278 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
3280 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[2] | 1)))
3282 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[3]))
3284 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[3] | 1)))
3286 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3290 case 0x0f: /* CLCL - compare logical long [interruptible] */
3291 case 0xa9: /* CLCLE - compare logical long extended [partial] */
3292 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
3294 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[2] | 1)))
3296 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[3]))
3298 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[3] | 1)))
3300 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3304 case 0x10: /* LPR - load positive */
3305 case 0x11: /* LNR - load negative */
3306 case 0x12: /* LTR - load and test */
3307 case 0x13: /* LCR - load complement */
3308 case 0x14: /* NR - and */
3309 case 0x16: /* OR - or */
3310 case 0x17: /* XR - xor */
3311 case 0x1a: /* AR - add */
3312 case 0x1b: /* SR - subtract */
3313 case 0x1e: /* ALR - add logical */
3314 case 0x1f: /* SLR - subtract logical */
3315 case 0x54: /* N - and */
3316 case 0x56: /* O - or */
3317 case 0x57: /* X - xor */
3318 case 0x5a: /* A - add */
3319 case 0x5b: /* S - subtract */
3320 case 0x5e: /* AL - add logical */
3321 case 0x5f: /* SL - subtract logical */
3322 case 0x4a: /* AH - add halfword */
3323 case 0x4b: /* SH - subtract halfword */
3324 case 0x8a: /* SRA - shift right single */
3325 case 0x8b: /* SLA - shift left single */
3326 case 0xbf: /* ICM - insert characters under mask */
3327 /* 32-bit destination + flags */
3328 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
3330 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3334 case 0x15: /* CLR - compare logical */
3335 case 0x55: /* CL - compare logical */
3336 case 0x19: /* CR - compare */
3337 case 0x29: /* CDR - compare */
3338 case 0x39: /* CER - compare */
3339 case 0x49: /* CH - compare halfword */
3340 case 0x59: /* C - compare */
3341 case 0x69: /* CD - compare */
3342 case 0x79: /* CE - compare */
3343 case 0x91: /* TM - test under mask */
3344 case 0x95: /* CLI - compare logical */
3345 case 0xbd: /* CLM - compare logical under mask */
3346 case 0xd5: /* CLC - compare logical */
3347 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3351 case 0x18: /* LR - load */
3352 case 0x48: /* LH - load halfword */
3353 case 0x58: /* L - load */
3354 case 0x41: /* LA - load address */
3355 case 0x43: /* IC - insert character */
3356 case 0x4c: /* MH - multiply halfword */
3357 case 0x71: /* MS - multiply single */
3358 case 0x88: /* SRL - shift right single logical */
3359 case 0x89: /* SLL - shift left single logical */
3360 /* 32-bit, 8-bit (IC), or native width (LA) destination, no flags */
3361 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
3365 case 0x1c: /* MR - multiply */
3366 case 0x5c: /* M - multiply */
3367 case 0x1d: /* DR - divide */
3368 case 0x5d: /* D - divide */
3369 case 0x8c: /* SRDL - shift right double logical */
3370 case 0x8d: /* SLDL - shift left double logical */
3371 /* 32-bit pair destination, no flags */
3372 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
3374 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[2] | 1)))
3378 case 0x20: /* LPDR - load positive */
3379 case 0x30: /* LPER - load positive */
3380 case 0x21: /* LNDR - load negative */
3381 case 0x31: /* LNER - load negative */
3382 case 0x22: /* LTDR - load and test */
3383 case 0x32: /* LTER - load and test */
3384 case 0x23: /* LCDR - load complement */
3385 case 0x33: /* LCER - load complement */
3386 case 0x2a: /* ADR - add */
3387 case 0x3a: /* AER - add */
3388 case 0x6a: /* AD - add */
3389 case 0x7a: /* AE - add */
3390 case 0x2b: /* SDR - subtract */
3391 case 0x3b: /* SER - subtract */
3392 case 0x6b: /* SD - subtract */
3393 case 0x7b: /* SE - subtract */
3394 case 0x2e: /* AWR - add unnormalized */
3395 case 0x3e: /* AUR - add unnormalized */
3396 case 0x6e: /* AW - add unnormalized */
3397 case 0x7e: /* AU - add unnormalized */
3398 case 0x2f: /* SWR - subtract unnormalized */
3399 case 0x3f: /* SUR - subtract unnormalized */
3400 case 0x6f: /* SW - subtract unnormalized */
3401 case 0x7f: /* SU - subtract unnormalized */
3402 /* float destination + flags */
3403 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[2]))
3405 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3409 case 0x24: /* HDR - halve */
3410 case 0x34: /* HER - halve */
3411 case 0x25: /* LDXR - load rounded */
3412 case 0x35: /* LEDR - load rounded */
3413 case 0x28: /* LDR - load */
3414 case 0x38: /* LER - load */
3415 case 0x68: /* LD - load */
3416 case 0x78: /* LE - load */
3417 case 0x2c: /* MDR - multiply */
3418 case 0x3c: /* MDER - multiply */
3419 case 0x6c: /* MD - multiply */
3420 case 0x7c: /* MDE - multiply */
3421 case 0x2d: /* DDR - divide */
3422 case 0x3d: /* DER - divide */
3423 case 0x6d: /* DD - divide */
3424 case 0x7d: /* DE - divide */
3425 /* float destination, no flags */
3426 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[2]))
3430 case 0x26: /* MXR - multiply */
3431 case 0x27: /* MXDR - multiply */
3432 case 0x67: /* MXD - multiply */
3433 /* float pair destination, no flags */
3434 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[2]))
3436 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[2] | 2)))
3440 case 0x36: /* AXR - add */
3441 case 0x37: /* SXR - subtract */
3442 /* float pair destination + flags */
3443 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[2]))
3445 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[2] | 2)))
3447 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3451 case 0x40: /* STH - store halfword */
3452 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], 0);
3453 if (record_full_arch_list_add_mem (oaddr
, 2))
3457 case 0x42: /* STC - store character */
3458 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], 0);
3459 if (record_full_arch_list_add_mem (oaddr
, 1))
3463 case 0x44: /* EX - execute */
3466 gdb_printf (gdb_stdlog
, "Warning: Double execute at %s.\n",
3467 paddress (gdbarch
, addr
));
3470 addr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], 0);
3473 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[2], &tmp
);
3482 case 0x4e: /* CVD - convert to decimal */
3483 case 0x60: /* STD - store */
3484 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], 0);
3485 if (record_full_arch_list_add_mem (oaddr
, 8))
3489 case 0x4f: /* CVB - convert to binary */
3490 /* 32-bit gpr destination + FPC (DXC write) */
3491 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
3493 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
3497 case 0x50: /* ST - store */
3498 case 0x70: /* STE - store */
3499 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], 0);
3500 if (record_full_arch_list_add_mem (oaddr
, 4))
3504 case 0x51: /* LAE - load address extended */
3505 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
3507 if (record_full_arch_list_add_reg (regcache
, S390_A0_REGNUM
+ inib
[2]))
3511 /* 0x52 undefined */
3512 /* 0x53 undefined */
3514 /* 0x61-0x66 undefined */
3516 /* 0x72-0x77 undefined */
3518 /* 0x80 privileged: SSM - set system mask */
3519 /* 0x81 undefined */
3520 /* 0x82 privileged: LPSW - load PSW */
3521 /* 0x83 privileged: diagnose */
3523 case 0x8e: /* SRDA - shift right double */
3524 case 0x8f: /* SLDA - shift left double */
3525 /* 32-bit pair destination + flags */
3526 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
3528 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[2] | 1)))
3530 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3534 case 0x90: /* STM - store multiple */
3535 case 0x9b: /* STAM - store access multiple */
3536 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
3537 if (inib
[2] <= inib
[3])
3538 n
= inib
[3] - inib
[2] + 1;
3540 n
= inib
[3] + 0x10 - inib
[2] + 1;
3541 if (record_full_arch_list_add_mem (oaddr
, n
* 4))
3545 case 0x92: /* MVI - move */
3546 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
3547 if (record_full_arch_list_add_mem (oaddr
, 1))
3551 case 0x93: /* TS - test and set */
3552 case 0x94: /* NI - and */
3553 case 0x96: /* OI - or */
3554 case 0x97: /* XI - xor */
3555 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
3556 if (record_full_arch_list_add_mem (oaddr
, 1))
3558 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3562 case 0x98: /* LM - load multiple */
3563 for (i
= inib
[2]; i
!= inib
[3]; i
++, i
&= 0xf)
3564 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ i
))
3566 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[3]))
3570 /* 0x99 privileged: TRACE */
3572 case 0x9a: /* LAM - load access multiple */
3573 for (i
= inib
[2]; i
!= inib
[3]; i
++, i
&= 0xf)
3574 if (record_full_arch_list_add_reg (regcache
, S390_A0_REGNUM
+ i
))
3576 if (record_full_arch_list_add_reg (regcache
, S390_A0_REGNUM
+ inib
[3]))
3580 /* 0x9c-0x9f privileged and obsolete (old I/O) */
3581 /* 0xa0-0xa4 undefined */
3585 /* RI-format instruction */
3586 switch (ibyte
[0] << 4 | inib
[3])
3588 case 0xa50: /* IIHH - insert immediate */
3589 case 0xa51: /* IIHL - insert immediate */
3590 /* high 32-bit destination */
3591 if (s390_record_gpr_h (gdbarch
, regcache
, inib
[2]))
3595 case 0xa52: /* IILH - insert immediate */
3596 case 0xa53: /* IILL - insert immediate */
3597 case 0xa75: /* BRAS - branch relative and save */
3598 case 0xa76: /* BRCT - branch relative on count */
3599 case 0xa78: /* LHI - load halfword immediate */
3600 case 0xa7c: /* MHI - multiply halfword immediate */
3601 /* 32-bit or native destination */
3602 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
3606 case 0xa54: /* NIHH - and immediate */
3607 case 0xa55: /* NIHL - and immediate */
3608 case 0xa58: /* OIHH - or immediate */
3609 case 0xa59: /* OIHL - or immediate */
3610 /* high 32-bit destination + flags */
3611 if (s390_record_gpr_h (gdbarch
, regcache
, inib
[2]))
3613 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3617 case 0xa56: /* NILH - and immediate */
3618 case 0xa57: /* NILL - and immediate */
3619 case 0xa5a: /* OILH - or immediate */
3620 case 0xa5b: /* OILL - or immediate */
3621 case 0xa7a: /* AHI - add halfword immediate */
3622 /* 32-bit destination + flags */
3623 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
3625 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3629 case 0xa5c: /* LLIHH - load logical immediate */
3630 case 0xa5d: /* LLIHL - load logical immediate */
3631 case 0xa5e: /* LLILH - load logical immediate */
3632 case 0xa5f: /* LLILL - load logical immediate */
3633 case 0xa77: /* BRCTG - branch relative on count */
3634 case 0xa79: /* LGHI - load halfword immediate */
3635 case 0xa7d: /* MGHI - multiply halfword immediate */
3636 /* 64-bit destination */
3637 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
3641 case 0xa70: /* TMLH - test under mask */
3642 case 0xa71: /* TMLL - test under mask */
3643 case 0xa72: /* TMHH - test under mask */
3644 case 0xa73: /* TMHL - test under mask */
3645 case 0xa7e: /* CHI - compare halfword immediate */
3646 case 0xa7f: /* CGHI - compare halfword immediate */
3648 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3652 case 0xa74: /* BRC - branch relative on condition */
3653 /* no register change */
3656 case 0xa7b: /* AGHI - add halfword immediate */
3657 /* 64-bit destination + flags */
3658 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
3660 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3669 /* 0xa6 undefined */
3671 case 0xa8: /* MVCLE - move long extended [partial] */
3672 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[2], &tmp
);
3673 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
3674 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ (inib
[2] | 1), &tmp
);
3675 if (record_full_arch_list_add_mem (oaddr
, tmp
))
3677 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
3679 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[2] | 1)))
3681 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[3]))
3683 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[3] | 1)))
3685 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3689 /* 0xaa-0xab undefined */
3690 /* 0xac privileged: STNSM - store then and system mask */
3691 /* 0xad privileged: STOSM - store then or system mask */
3692 /* 0xae privileged: SIGP - signal processor */
3693 /* 0xaf unsupported: MC - monitor call */
3694 /* 0xb0 undefined */
3695 /* 0xb1 privileged: LRA - load real address */
3700 /* S/RRD/RRE/RRF/IE-format instruction */
3703 /* 0xb200-0xb204 undefined or privileged */
3705 case 0xb205: /* STCK - store clock */
3706 case 0xb27c: /* STCKF - store clock fast */
3707 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
3708 if (record_full_arch_list_add_mem (oaddr
, 8))
3710 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3714 /* 0xb206-0xb219 undefined, privileged, or unsupported */
3715 /* 0xb21a unsupported: CFC */
3716 /* 0xb21b-0xb221 undefined or privileged */
3718 case 0xb222: /* IPM - insert program mask */
3719 case 0xb24f: /* EAR - extract access */
3720 case 0xb252: /* MSR - multiply single */
3721 case 0xb2ec: /* ETND - extract transaction nesting depth */
3722 case 0xb38c: /* EFPC - extract fpc */
3723 case 0xb91f: /* LRVR - load reversed */
3724 case 0xb926: /* LBR - load byte */
3725 case 0xb927: /* LHR - load halfword */
3726 case 0xb994: /* LLCR - load logical character */
3727 case 0xb995: /* LLHR - load logical halfword */
3728 case 0xb9f2: /* LOCR - load on condition */
3729 /* 32-bit gpr destination */
3730 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
3734 /* 0xb223-0xb22c privileged or unsupported */
3736 case 0xb22d: /* DXR - divide */
3737 case 0xb325: /* LXDR - load lengthened */
3738 case 0xb326: /* LXER - load lengthened */
3739 case 0xb336: /* SQXR - square root */
3740 case 0xb365: /* LXR - load */
3741 case 0xb367: /* FIXR - load fp integer */
3742 case 0xb376: /* LZXR - load zero */
3743 case 0xb3b6: /* CXFR - convert from fixed */
3744 case 0xb3c6: /* CXGR - convert from fixed */
3745 case 0xb3fe: /* IEXTR - insert biased exponent */
3746 /* float pair destination */
3747 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[6]))
3749 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[6] | 2)))
3753 /* 0xb22e-0xb240 undefined, privileged, or unsupported */
3755 case 0xb241: /* CKSM - checksum [partial] */
3756 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
3758 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
3760 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[7] | 1)))
3762 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3766 /* 0xb242-0xb243 undefined */
3768 case 0xb244: /* SQDR - square root */
3769 case 0xb245: /* SQER - square root */
3770 case 0xb324: /* LDER - load lengthened */
3771 case 0xb337: /* MEER - multiply */
3772 case 0xb366: /* LEXR - load rounded */
3773 case 0xb370: /* LPDFR - load positive */
3774 case 0xb371: /* LNDFR - load negative */
3775 case 0xb372: /* CSDFR - copy sign */
3776 case 0xb373: /* LCDFR - load complement */
3777 case 0xb374: /* LZER - load zero */
3778 case 0xb375: /* LZDR - load zero */
3779 case 0xb377: /* FIER - load fp integer */
3780 case 0xb37f: /* FIDR - load fp integer */
3781 case 0xb3b4: /* CEFR - convert from fixed */
3782 case 0xb3b5: /* CDFR - convert from fixed */
3783 case 0xb3c1: /* LDGR - load fpr from gr */
3784 case 0xb3c4: /* CEGR - convert from fixed */
3785 case 0xb3c5: /* CDGR - convert from fixed */
3786 case 0xb3f6: /* IEDTR - insert biased exponent */
3787 /* float destination */
3788 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[6]))
3792 /* 0xb246-0xb24c: privileged or unsupported */
3794 case 0xb24d: /* CPYA - copy access */
3795 case 0xb24e: /* SAR - set access */
3796 if (record_full_arch_list_add_reg (regcache
, S390_A0_REGNUM
+ inib
[6]))
3800 /* 0xb250-0xb251 undefined or privileged */
3801 /* 0xb253-0xb254 undefined or privileged */
3803 case 0xb255: /* MVST - move string [partial] */
3808 /* Read ending byte. */
3809 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
, &tmp
);
3811 /* Get address of second operand. */
3812 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[7], &tmp
);
3813 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
3814 /* Search for ending byte and compute length. */
3817 if (target_read_memory (oaddr
, &cur
, 1))
3820 } while (cur
!= end
);
3821 /* Get address of first operand and record it. */
3822 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[6], &tmp
);
3823 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
3824 if (record_full_arch_list_add_mem (oaddr
, num
))
3826 /* Record the registers. */
3827 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
3829 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
3831 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3836 /* 0xb256 undefined */
3838 case 0xb257: /* CUSE - compare until substring equal [interruptible] */
3839 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
3841 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[6] | 1)))
3843 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
3845 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[7] | 1)))
3847 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3851 /* 0xb258-0xb25c undefined, privileged, or unsupported */
3853 case 0xb25d: /* CLST - compare logical string [partial] */
3854 case 0xb25e: /* SRST - search string [partial] */
3855 case 0xb9be: /* SRSTU - search string unicode [partial] */
3856 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
3858 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
3860 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3864 /* 0xb25f-0xb262 undefined */
3866 case 0xb263: /* CMPSC - compression call [interruptible] */
3867 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[6], &tmp
);
3868 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
3869 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ (inib
[6] | 1), &tmp
);
3870 if (record_full_arch_list_add_mem (oaddr
, tmp
))
3872 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
3874 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[6] | 1)))
3876 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
3878 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[7] | 1)))
3880 if (record_full_arch_list_add_reg (regcache
, S390_R1_REGNUM
))
3882 /* DXC may be written */
3883 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
3885 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3889 /* 0xb264-0xb277 undefined, privileged, or unsupported */
3891 case 0xb278: /* STCKE - store clock extended */
3892 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
3893 if (record_full_arch_list_add_mem (oaddr
, 16))
3895 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3899 /* 0xb279-0xb27b undefined or unsupported */
3900 /* 0xb27d-0xb298 undefined or privileged */
3902 case 0xb299: /* SRNM - set rounding mode */
3903 case 0xb2b8: /* SRNMB - set bfp rounding mode */
3904 case 0xb2b9: /* SRNMT - set dfp rounding mode */
3905 case 0xb29d: /* LFPC - load fpc */
3906 case 0xb2bd: /* LFAS - load fpc and signal */
3907 case 0xb384: /* SFPC - set fpc */
3908 case 0xb385: /* SFASR - set fpc and signal */
3909 case 0xb960: /* CGRT - compare and trap */
3910 case 0xb961: /* CLGRT - compare logical and trap */
3911 case 0xb972: /* CRT - compare and trap */
3912 case 0xb973: /* CLRT - compare logical and trap */
3913 /* fpc only - including possible DXC write for trapping insns */
3914 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
3918 /* 0xb29a-0xb29b undefined */
3920 case 0xb29c: /* STFPC - store fpc */
3921 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
3922 if (record_full_arch_list_add_mem (oaddr
, 4))
3926 /* 0xb29e-0xb2a4 undefined */
3928 case 0xb2a5: /* TRE - translate extended [partial] */
3929 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[6], &tmp
);
3930 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
3931 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ (inib
[6] | 1), &tmp
);
3932 if (record_full_arch_list_add_mem (oaddr
, tmp
))
3934 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
3936 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[6] | 1)))
3938 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3942 case 0xb2a6: /* CU21 - convert UTF-16 to UTF-8 [partial] */
3943 case 0xb2a7: /* CU12 - convert UTF-8 to UTF-16 [partial] */
3944 case 0xb9b0: /* CU14 - convert UTF-8 to UTF-32 [partial] */
3945 case 0xb9b1: /* CU24 - convert UTF-16 to UTF-32 [partial] */
3946 case 0xb9b2: /* CU41 - convert UTF-32 to UTF-8 [partial] */
3947 case 0xb9b3: /* CU42 - convert UTF-32 to UTF-16 [partial] */
3948 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[6], &tmp
);
3949 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
3950 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ (inib
[6] | 1), &tmp
);
3951 if (record_full_arch_list_add_mem (oaddr
, tmp
))
3953 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
3955 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[6] | 1)))
3957 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
3959 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[7] | 1)))
3961 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3965 /* 0xb2a8-0xb2af undefined */
3967 case 0xb2b0: /* STFLE - store facility list extended */
3968 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
3969 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
, &tmp
);
3971 if (record_full_arch_list_add_mem (oaddr
, 8 * (tmp
+ 1)))
3973 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
))
3975 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
3979 /* 0xb2b1-0xb2b7 undefined or privileged */
3980 /* 0xb2ba-0xb2bc undefined */
3981 /* 0xb2be-0xb2e7 undefined */
3982 /* 0xb2e9-0xb2eb undefined */
3983 /* 0xb2ed-0xb2f7 undefined */
3984 /* 0xb2f8 unsupported: TEND */
3985 /* 0xb2f9 undefined */
3987 case 0xb2e8: /* PPA - perform processor assist */
3988 case 0xb2fa: /* NIAI - next instruction access intent */
3989 /* no visible effects */
3992 /* 0xb2fb undefined */
3993 /* 0xb2fc unsupported: TABORT */
3994 /* 0xb2fd-0xb2fe undefined */
3995 /* 0xb2ff unsupported: TRAP */
3997 case 0xb300: /* LPEBR - load positive */
3998 case 0xb301: /* LNEBR - load negative */
3999 case 0xb303: /* LCEBR - load complement */
4000 case 0xb310: /* LPDBR - load positive */
4001 case 0xb311: /* LNDBR - load negative */
4002 case 0xb313: /* LCDBR - load complement */
4003 case 0xb350: /* TBEDR - convert hfp to bfp */
4004 case 0xb351: /* TBDR - convert hfp to bfp */
4005 case 0xb358: /* THDER - convert bfp to hfp */
4006 case 0xb359: /* THDR - convert bfp to hfp */
4007 /* float destination + flags */
4008 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[6]))
4010 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4014 case 0xb304: /* LDEBR - load lengthened */
4015 case 0xb30c: /* MDEBR - multiply */
4016 case 0xb30d: /* DEBR - divide */
4017 case 0xb314: /* SQEBR - square root */
4018 case 0xb315: /* SQDBR - square root */
4019 case 0xb317: /* MEEBR - multiply */
4020 case 0xb31c: /* MDBR - multiply */
4021 case 0xb31d: /* DDBR - divide */
4022 case 0xb344: /* LEDBRA - load rounded */
4023 case 0xb345: /* LDXBRA - load rounded */
4024 case 0xb346: /* LEXBRA - load rounded */
4025 case 0xb357: /* FIEBRA - load fp integer */
4026 case 0xb35f: /* FIDBRA - load fp integer */
4027 case 0xb390: /* CELFBR - convert from logical */
4028 case 0xb391: /* CDLFBR - convert from logical */
4029 case 0xb394: /* CEFBR - convert from fixed */
4030 case 0xb395: /* CDFBR - convert from fixed */
4031 case 0xb3a0: /* CELGBR - convert from logical */
4032 case 0xb3a1: /* CDLGBR - convert from logical */
4033 case 0xb3a4: /* CEGBR - convert from fixed */
4034 case 0xb3a5: /* CDGBR - convert from fixed */
4035 case 0xb3d0: /* MDTR - multiply */
4036 case 0xb3d1: /* DDTR - divide */
4037 case 0xb3d4: /* LDETR - load lengthened */
4038 case 0xb3d5: /* LEDTR - load lengthened */
4039 case 0xb3d7: /* FIDTR - load fp integer */
4040 case 0xb3dd: /* LDXTR - load lengthened */
4041 case 0xb3f1: /* CDGTR - convert from fixed */
4042 case 0xb3f2: /* CDUTR - convert from unsigned packed */
4043 case 0xb3f3: /* CDSTR - convert from signed packed */
4044 case 0xb3f5: /* QADTR - quantize */
4045 case 0xb3f7: /* RRDTR - reround */
4046 case 0xb951: /* CDFTR - convert from fixed */
4047 case 0xb952: /* CDLGTR - convert from logical */
4048 case 0xb953: /* CDLFTR - convert from logical */
4049 /* float destination + fpc */
4050 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[6]))
4052 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
4056 case 0xb305: /* LXDBR - load lengthened */
4057 case 0xb306: /* LXEBR - load lengthened */
4058 case 0xb307: /* MXDBR - multiply */
4059 case 0xb316: /* SQXBR - square root */
4060 case 0xb34c: /* MXBR - multiply */
4061 case 0xb34d: /* DXBR - divide */
4062 case 0xb347: /* FIXBRA - load fp integer */
4063 case 0xb392: /* CXLFBR - convert from logical */
4064 case 0xb396: /* CXFBR - convert from fixed */
4065 case 0xb3a2: /* CXLGBR - convert from logical */
4066 case 0xb3a6: /* CXGBR - convert from fixed */
4067 case 0xb3d8: /* MXTR - multiply */
4068 case 0xb3d9: /* DXTR - divide */
4069 case 0xb3dc: /* LXDTR - load lengthened */
4070 case 0xb3df: /* FIXTR - load fp integer */
4071 case 0xb3f9: /* CXGTR - convert from fixed */
4072 case 0xb3fa: /* CXUTR - convert from unsigned packed */
4073 case 0xb3fb: /* CXSTR - convert from signed packed */
4074 case 0xb3fd: /* QAXTR - quantize */
4075 case 0xb3ff: /* RRXTR - reround */
4076 case 0xb959: /* CXFTR - convert from fixed */
4077 case 0xb95a: /* CXLGTR - convert from logical */
4078 case 0xb95b: /* CXLFTR - convert from logical */
4079 /* float pair destination + fpc */
4080 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[6]))
4082 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[6] | 2)))
4084 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
4088 case 0xb308: /* KEBR - compare and signal */
4089 case 0xb309: /* CEBR - compare */
4090 case 0xb318: /* KDBR - compare and signal */
4091 case 0xb319: /* CDBR - compare */
4092 case 0xb348: /* KXBR - compare and signal */
4093 case 0xb349: /* CXBR - compare */
4094 case 0xb3e0: /* KDTR - compare and signal */
4095 case 0xb3e4: /* CDTR - compare */
4096 case 0xb3e8: /* KXTR - compare and signal */
4097 case 0xb3ec: /* CXTR - compare */
4098 /* flags + fpc only */
4099 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4101 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
4105 case 0xb302: /* LTEBR - load and test */
4106 case 0xb312: /* LTDBR - load and test */
4107 case 0xb30a: /* AEBR - add */
4108 case 0xb30b: /* SEBR - subtract */
4109 case 0xb31a: /* ADBR - add */
4110 case 0xb31b: /* SDBR - subtract */
4111 case 0xb3d2: /* ADTR - add */
4112 case 0xb3d3: /* SDTR - subtract */
4113 case 0xb3d6: /* LTDTR - load and test */
4114 /* float destination + flags + fpc */
4115 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[6]))
4117 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4119 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
4123 case 0xb30e: /* MAEBR - multiply and add */
4124 case 0xb30f: /* MSEBR - multiply and subtract */
4125 case 0xb31e: /* MADBR - multiply and add */
4126 case 0xb31f: /* MSDBR - multiply and subtract */
4127 /* float destination [RRD] + fpc */
4128 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[4]))
4130 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
4134 /* 0xb320-0xb323 undefined */
4135 /* 0xb327-0xb32d undefined */
4137 case 0xb32e: /* MAER - multiply and add */
4138 case 0xb32f: /* MSER - multiply and subtract */
4139 case 0xb338: /* MAYLR - multiply and add unnormalized */
4140 case 0xb339: /* MYLR - multiply unnormalized */
4141 case 0xb33c: /* MAYHR - multiply and add unnormalized */
4142 case 0xb33d: /* MYHR - multiply unnormalized */
4143 case 0xb33e: /* MADR - multiply and add */
4144 case 0xb33f: /* MSDR - multiply and subtract */
4145 /* float destination [RRD] */
4146 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[4]))
4150 /* 0xb330-0xb335 undefined */
4152 case 0xb33a: /* MAYR - multiply and add unnormalized */
4153 /* float pair destination [RRD]; R1 may designate lower- or
4154 higher-numbered register of pair */
4155 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[4] & 13)))
4157 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[4] | 2)))
4160 case 0xb33b: /* MYR - multiply unnormalized */
4161 /* float pair destination [RRD] */
4162 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[4]))
4164 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[4] | 2)))
4168 case 0xb340: /* LPXBR - load positive */
4169 case 0xb341: /* LNXBR - load negative */
4170 case 0xb343: /* LCXBR - load complement */
4171 case 0xb360: /* LPXR - load positive */
4172 case 0xb361: /* LNXR - load negative */
4173 case 0xb362: /* LTXR - load and test */
4174 case 0xb363: /* LCXR - load complement */
4175 /* float pair destination + flags */
4176 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[6]))
4178 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[6] | 2)))
4180 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4184 case 0xb342: /* LTXBR - load and test */
4185 case 0xb34a: /* AXBR - add */
4186 case 0xb34b: /* SXBR - subtract */
4187 case 0xb3da: /* AXTR - add */
4188 case 0xb3db: /* SXTR - subtract */
4189 case 0xb3de: /* LTXTR - load and test */
4190 /* float pair destination + flags + fpc */
4191 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[6]))
4193 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[6] | 2)))
4195 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4197 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
4201 /* 0xb34e-0xb34f undefined */
4202 /* 0xb352 undefined */
4204 case 0xb353: /* DIEBR - divide to integer */
4205 case 0xb35b: /* DIDBR - divide to integer */
4206 /* two float destinations + flags + fpc */
4207 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[4]))
4209 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[6]))
4211 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4213 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
4217 /* 0xb354-0xb356 undefined */
4218 /* 0xb35a undefined */
4220 /* 0xb35c-0xb35e undefined */
4221 /* 0xb364 undefined */
4222 /* 0xb368 undefined */
4224 case 0xb369: /* CXR - compare */
4225 case 0xb3f4: /* CEDTR - compare biased exponent */
4226 case 0xb3fc: /* CEXTR - compare biased exponent */
4227 case 0xb920: /* CGR - compare */
4228 case 0xb921: /* CLGR - compare logical */
4229 case 0xb930: /* CGFR - compare */
4230 case 0xb931: /* CLGFR - compare logical */
4231 case 0xb9cd: /* CHHR - compare high */
4232 case 0xb9cf: /* CLHHR - compare logical high */
4233 case 0xb9dd: /* CHLR - compare high */
4234 case 0xb9df: /* CLHLR - compare logical high */
4236 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4240 /* 0xb36a-0xb36f undefined */
4241 /* 0xb377-0xb37e undefined */
4242 /* 0xb380-0xb383 undefined */
4243 /* 0xb386-0xb38b undefined */
4244 /* 0xb38d-0xb38f undefined */
4245 /* 0xb393 undefined */
4246 /* 0xb397 undefined */
4248 case 0xb398: /* CFEBR - convert to fixed */
4249 case 0xb399: /* CFDBR - convert to fixed */
4250 case 0xb39a: /* CFXBR - convert to fixed */
4251 case 0xb39c: /* CLFEBR - convert to logical */
4252 case 0xb39d: /* CLFDBR - convert to logical */
4253 case 0xb39e: /* CLFXBR - convert to logical */
4254 case 0xb941: /* CFDTR - convert to fixed */
4255 case 0xb949: /* CFXTR - convert to fixed */
4256 case 0xb943: /* CLFDTR - convert to logical */
4257 case 0xb94b: /* CLFXTR - convert to logical */
4258 /* 32-bit gpr destination + flags + fpc */
4259 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
4261 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4263 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
4267 /* 0xb39b undefined */
4268 /* 0xb39f undefined */
4270 /* 0xb3a3 undefined */
4271 /* 0xb3a7 undefined */
4273 case 0xb3a8: /* CGEBR - convert to fixed */
4274 case 0xb3a9: /* CGDBR - convert to fixed */
4275 case 0xb3aa: /* CGXBR - convert to fixed */
4276 case 0xb3ac: /* CLGEBR - convert to logical */
4277 case 0xb3ad: /* CLGDBR - convert to logical */
4278 case 0xb3ae: /* CLGXBR - convert to logical */
4279 case 0xb3e1: /* CGDTR - convert to fixed */
4280 case 0xb3e9: /* CGXTR - convert to fixed */
4281 case 0xb942: /* CLGDTR - convert to logical */
4282 case 0xb94a: /* CLGXTR - convert to logical */
4283 /* 64-bit gpr destination + flags + fpc */
4284 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[6]))
4286 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4288 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
4292 /* 0xb3ab undefined */
4293 /* 0xb3af-0xb3b3 undefined */
4294 /* 0xb3b7 undefined */
4296 case 0xb3b8: /* CFER - convert to fixed */
4297 case 0xb3b9: /* CFDR - convert to fixed */
4298 case 0xb3ba: /* CFXR - convert to fixed */
4299 case 0xb998: /* ALCR - add logical with carry */
4300 case 0xb999: /* SLBR - subtract logical with borrow */
4301 case 0xb9f4: /* NRK - and */
4302 case 0xb9f5: /* NCRK - and with complement */
4303 case 0xb9f6: /* ORK - or */
4304 case 0xb9f7: /* XRK - xor */
4305 case 0xb9f8: /* ARK - add */
4306 case 0xb9f9: /* SRK - subtract */
4307 case 0xb9fa: /* ALRK - add logical */
4308 case 0xb9fb: /* SLRK - subtract logical */
4309 /* 32-bit gpr destination + flags */
4310 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
4312 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4316 case 0xb3c8: /* CGER - convert to fixed */
4317 case 0xb3c9: /* CGDR - convert to fixed */
4318 case 0xb3ca: /* CGXR - convert to fixed */
4319 case 0xb900: /* LPGR - load positive */
4320 case 0xb901: /* LNGR - load negative */
4321 case 0xb902: /* LTGR - load and test */
4322 case 0xb903: /* LCGR - load complement */
4323 case 0xb908: /* AGR - add */
4324 case 0xb909: /* SGR - subtract */
4325 case 0xb90a: /* ALGR - add logical */
4326 case 0xb90b: /* SLGR - subtract logical */
4327 case 0xb910: /* LPGFR - load positive */
4328 case 0xb911: /* LNGFR - load negative */
4329 case 0xb912: /* LTGFR - load and test */
4330 case 0xb913: /* LCGFR - load complement */
4331 case 0xb918: /* AGFR - add */
4332 case 0xb919: /* SGFR - subtract */
4333 case 0xb91a: /* ALGFR - add logical */
4334 case 0xb91b: /* SLGFR - subtract logical */
4335 case 0xb964: /* NNGRK - and 64 bit */
4336 case 0xb965: /* OCGRK - or with complement 64 bit */
4337 case 0xb966: /* NOGRK - or 64 bit */
4338 case 0xb967: /* NXGRK - not exclusive or 64 bit */
4339 case 0xb974: /* NNRK - and 32 bit */
4340 case 0xb975: /* OCRK - or with complement 32 bit */
4341 case 0xb976: /* NORK - or 32 bit */
4342 case 0xb977: /* NXRK - not exclusive or 32 bit */
4343 case 0xb980: /* NGR - and */
4344 case 0xb981: /* OGR - or */
4345 case 0xb982: /* XGR - xor */
4346 case 0xb988: /* ALCGR - add logical with carry */
4347 case 0xb989: /* SLBGR - subtract logical with borrow */
4348 case 0xb9c0: /* SELFHR - select high */
4349 case 0xb9e1: /* POPCNT - population count */
4350 case 0xb9e4: /* NGRK - and */
4351 case 0xb9e5: /* NCGRK - and with complement */
4352 case 0xb9e6: /* OGRK - or */
4353 case 0xb9e7: /* XGRK - xor */
4354 case 0xb9e8: /* AGRK - add */
4355 case 0xb9e9: /* SGRK - subtract */
4356 case 0xb9ea: /* ALGRK - add logical */
4357 case 0xb9e3: /* SELGR - select 64 bit */
4358 case 0xb9eb: /* SLGRK - subtract logical */
4359 case 0xb9ed: /* MSGRKC - multiply single 64x64 -> 64 */
4360 case 0xb9f0: /* SELR - select 32 bit */
4361 case 0xb9fd: /* MSRKC - multiply single 32x32 -> 32 */
4362 /* 64-bit gpr destination + flags */
4363 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[6]))
4365 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4369 /* 0xb3bb-0xb3c0 undefined */
4370 /* 0xb3c2-0xb3c3 undefined */
4371 /* 0xb3c7 undefined */
4372 /* 0xb3cb-0xb3cc undefined */
4374 case 0xb3cd: /* LGDR - load gr from fpr */
4375 case 0xb3e2: /* CUDTR - convert to unsigned packed */
4376 case 0xb3e3: /* CSDTR - convert to signed packed */
4377 case 0xb3e5: /* EEDTR - extract biased exponent */
4378 case 0xb3e7: /* ESDTR - extract significance */
4379 case 0xb3ed: /* EEXTR - extract biased exponent */
4380 case 0xb3ef: /* ESXTR - extract significance */
4381 case 0xb904: /* LGR - load */
4382 case 0xb906: /* LGBR - load byte */
4383 case 0xb907: /* LGHR - load halfword */
4384 case 0xb90c: /* MSGR - multiply single */
4385 case 0xb90f: /* LRVGR - load reversed */
4386 case 0xb914: /* LGFR - load */
4387 case 0xb916: /* LLGFR - load logical */
4388 case 0xb917: /* LLGTR - load logical thirty one bits */
4389 case 0xb91c: /* MSGFR - multiply single 64<32 */
4390 case 0xb946: /* BCTGR - branch on count */
4391 case 0xb968: /* CLZG - count leading zeros */
4392 case 0xb969: /* CTZG - count trailing zeros */
4393 case 0xb96c: /* BEXTG - bit extract */
4394 case 0xb96d: /* BDEPG - bit deposit */
4395 case 0xb984: /* LLGCR - load logical character */
4396 case 0xb985: /* LLGHR - load logical halfword */
4397 case 0xb9e2: /* LOCGR - load on condition */
4398 /* 64-bit gpr destination */
4399 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[6]))
4403 /* 0xb3ce-0xb3cf undefined */
4404 /* 0xb3e6 undefined */
4406 case 0xb3ea: /* CUXTR - convert to unsigned packed */
4407 case 0xb3eb: /* CSXTR - convert to signed packed */
4408 case 0xb90d: /* DSGR - divide single */
4409 case 0xb91d: /* DSGFR - divide single */
4410 case 0xb986: /* MLGR - multiply logical */
4411 case 0xb987: /* DLGR - divide logical */
4412 case 0xb9ec: /* MGRK - multiply 64x64 -> 128 */
4413 /* 64-bit gpr pair destination */
4414 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[6]))
4416 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[6] | 1))
4420 /* 0xb3ee undefined */
4421 /* 0xb3f0 undefined */
4422 /* 0xb3f8 undefined */
4424 /* 0xb905 privileged */
4426 /* 0xb90e unsupported: EREGG */
4428 /* 0xb915 undefined */
4430 case 0xb91e: /* KMAC - compute message authentication code [partial] */
4431 regcache_raw_read_unsigned (regcache
, S390_R1_REGNUM
, &tmp
);
4432 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
4433 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
, &tmp
);
4437 case 0x00: /* KMAC-Query */
4438 if (record_full_arch_list_add_mem (oaddr
, 16))
4442 case 0x01: /* KMAC-DEA */
4443 case 0x02: /* KMAC-TDEA-128 */
4444 case 0x03: /* KMAC-TDEA-192 */
4445 case 0x09: /* KMAC-Encrypted-DEA */
4446 case 0x0a: /* KMAC-Encrypted-TDEA-128 */
4447 case 0x0b: /* KMAC-Encrypted-TDEA-192 */
4448 if (record_full_arch_list_add_mem (oaddr
, 8))
4452 case 0x12: /* KMAC-AES-128 */
4453 case 0x13: /* KMAC-AES-192 */
4454 case 0x14: /* KMAC-AES-256 */
4455 case 0x1a: /* KMAC-Encrypted-AES-128 */
4456 case 0x1b: /* KMAC-Encrypted-AES-192 */
4457 case 0x1c: /* KMAC-Encrypted-AES-256 */
4458 if (record_full_arch_list_add_mem (oaddr
, 16))
4463 gdb_printf (gdb_stdlog
, "Warning: Unknown KMAC function %02x at %s.\n",
4464 (int)tmp
, paddress (gdbarch
, addr
));
4469 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
4471 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[7] | 1)))
4474 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4478 /* 0xb922-0xb924 undefined */
4479 /* 0xb925 privileged */
4480 /* 0xb928 privileged */
4482 case 0xb929: /* KMA - cipher message with authentication */
4483 case 0xb92a: /* KMF - cipher message with cipher feedback [partial] */
4484 case 0xb92b: /* KMO - cipher message with output feedback [partial] */
4485 case 0xb92f: /* KMC - cipher message with chaining [partial] */
4486 regcache_raw_read_unsigned (regcache
, S390_R1_REGNUM
, &tmp
);
4487 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
4488 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
, &tmp
);
4492 case 0x00: /* KM*-Query */
4493 if (record_full_arch_list_add_mem (oaddr
, 16))
4497 case 0x01: /* KM*-DEA */
4498 case 0x02: /* KM*-TDEA-128 */
4499 case 0x03: /* KM*-TDEA-192 */
4500 case 0x09: /* KM*-Encrypted-DEA */
4501 case 0x0a: /* KM*-Encrypted-TDEA-128 */
4502 case 0x0b: /* KM*-Encrypted-TDEA-192 */
4503 if (record_full_arch_list_add_mem (oaddr
, 8))
4507 case 0x12: /* KM*-AES-128 */
4508 case 0x13: /* KM*-AES-192 */
4509 case 0x14: /* KM*-AES-256 */
4510 case 0x1a: /* KM*-Encrypted-AES-128 */
4511 case 0x1b: /* KM*-Encrypted-AES-192 */
4512 case 0x1c: /* KM*-Encrypted-AES-256 */
4513 if (record_full_arch_list_add_mem (oaddr
, 16))
4517 case 0x43: /* KMC-PRNG */
4518 /* Only valid for KMC. */
4519 if (insn
[0] == 0xb92f)
4521 if (record_full_arch_list_add_mem (oaddr
, 8))
4525 /* For other instructions... */
4528 gdb_printf (gdb_stdlog
, "Warning: Unknown KM* function %02x at %s.\n",
4529 (int)tmp
, paddress (gdbarch
, addr
));
4534 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[6], &tmp
);
4535 oaddr2
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
4536 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ (inib
[7] | 1), &tmp
);
4537 if (record_full_arch_list_add_mem (oaddr2
, tmp
))
4539 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
4541 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
4543 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[7] | 1)))
4546 if (tmp
!= 0 && insn
[0] == 0xb929)
4548 if (record_full_arch_list_add_reg (regcache
,
4549 S390_R0_REGNUM
+ inib
[4]))
4551 if (record_full_arch_list_add_reg (regcache
,
4552 S390_R0_REGNUM
+ (inib
[4] | 1)))
4555 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4559 case 0xb92c: /* PCC - perform cryptographic computation [partial] */
4560 regcache_raw_read_unsigned (regcache
, S390_R1_REGNUM
, &tmp
);
4561 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
4562 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
, &tmp
);
4566 case 0x00: /* PCC-Query */
4567 if (record_full_arch_list_add_mem (oaddr
, 16))
4571 case 0x01: /* PCC-Compute-Last-Block-CMAC-Using-DEA */
4572 case 0x02: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-128 */
4573 case 0x03: /* PCC-Compute-Last-Block-CMAC-Using-TDEA-192 */
4574 case 0x09: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-DEA */
4575 case 0x0a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-128 */
4576 case 0x0b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-TDEA-192 */
4577 if (record_full_arch_list_add_mem (oaddr
+ 0x10, 8))
4581 case 0x12: /* PCC-Compute-Last-Block-CMAC-Using-AES-128 */
4582 case 0x13: /* PCC-Compute-Last-Block-CMAC-Using-AES-192 */
4583 case 0x14: /* PCC-Compute-Last-Block-CMAC-Using-AES-256 */
4584 case 0x1a: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-128 */
4585 case 0x1b: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-192 */
4586 case 0x1c: /* PCC-Compute-Last-Block-CMAC-Using-Encrypted-AES-256 */
4587 if (record_full_arch_list_add_mem (oaddr
+ 0x18, 16))
4591 case 0x32: /* PCC-Compute-XTS-Parameter-Using-AES-128 */
4592 if (record_full_arch_list_add_mem (oaddr
+ 0x30, 32))
4596 case 0x34: /* PCC-Compute-XTS-Parameter-Using-AES-256 */
4597 if (record_full_arch_list_add_mem (oaddr
+ 0x40, 32))
4601 case 0x3a: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-128 */
4602 if (record_full_arch_list_add_mem (oaddr
+ 0x50, 32))
4606 case 0x3c: /* PCC-Compute-XTS-Parameter-Using-Encrypted-AES-256 */
4607 if (record_full_arch_list_add_mem (oaddr
+ 0x60, 32))
4612 gdb_printf (gdb_stdlog
, "Warning: Unknown PCC function %02x at %s.\n",
4613 (int)tmp
, paddress (gdbarch
, addr
));
4616 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4620 case 0xb92d: /* KMCTR - cipher message with counter [partial] */
4621 regcache_raw_read_unsigned (regcache
, S390_R1_REGNUM
, &tmp
);
4622 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
4623 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
, &tmp
);
4627 case 0x00: /* KMCTR-Query */
4628 if (record_full_arch_list_add_mem (oaddr
, 16))
4632 case 0x01: /* KMCTR-DEA */
4633 case 0x02: /* KMCTR-TDEA-128 */
4634 case 0x03: /* KMCTR-TDEA-192 */
4635 case 0x09: /* KMCTR-Encrypted-DEA */
4636 case 0x0a: /* KMCTR-Encrypted-TDEA-128 */
4637 case 0x0b: /* KMCTR-Encrypted-TDEA-192 */
4638 case 0x12: /* KMCTR-AES-128 */
4639 case 0x13: /* KMCTR-AES-192 */
4640 case 0x14: /* KMCTR-AES-256 */
4641 case 0x1a: /* KMCTR-Encrypted-AES-128 */
4642 case 0x1b: /* KMCTR-Encrypted-AES-192 */
4643 case 0x1c: /* KMCTR-Encrypted-AES-256 */
4647 gdb_printf (gdb_stdlog
, "Warning: Unknown KMCTR function %02x at %s.\n",
4648 (int)tmp
, paddress (gdbarch
, addr
));
4653 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[6], &tmp
);
4654 oaddr2
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
4655 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ (inib
[7] | 1), &tmp
);
4656 if (record_full_arch_list_add_mem (oaddr2
, tmp
))
4658 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
4660 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
4662 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[7] | 1)))
4664 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[4]))
4667 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4671 case 0xb92e: /* KM - cipher message [partial] */
4672 regcache_raw_read_unsigned (regcache
, S390_R1_REGNUM
, &tmp
);
4673 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
4674 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
, &tmp
);
4678 case 0x00: /* KM-Query */
4679 if (record_full_arch_list_add_mem (oaddr
, 16))
4683 case 0x01: /* KM-DEA */
4684 case 0x02: /* KM-TDEA-128 */
4685 case 0x03: /* KM-TDEA-192 */
4686 case 0x09: /* KM-Encrypted-DEA */
4687 case 0x0a: /* KM-Encrypted-TDEA-128 */
4688 case 0x0b: /* KM-Encrypted-TDEA-192 */
4689 case 0x12: /* KM-AES-128 */
4690 case 0x13: /* KM-AES-192 */
4691 case 0x14: /* KM-AES-256 */
4692 case 0x1a: /* KM-Encrypted-AES-128 */
4693 case 0x1b: /* KM-Encrypted-AES-192 */
4694 case 0x1c: /* KM-Encrypted-AES-256 */
4697 case 0x32: /* KM-XTS-AES-128 */
4698 if (record_full_arch_list_add_mem (oaddr
+ 0x10, 16))
4702 case 0x34: /* KM-XTS-AES-256 */
4703 if (record_full_arch_list_add_mem (oaddr
+ 0x20, 16))
4707 case 0x3a: /* KM-XTS-Encrypted-AES-128 */
4708 if (record_full_arch_list_add_mem (oaddr
+ 0x30, 16))
4712 case 0x3c: /* KM-XTS-Encrypted-AES-256 */
4713 if (record_full_arch_list_add_mem (oaddr
+ 0x40, 16))
4718 gdb_printf (gdb_stdlog
, "Warning: Unknown KM function %02x at %s.\n",
4719 (int)tmp
, paddress (gdbarch
, addr
));
4724 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[6], &tmp
);
4725 oaddr2
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
4726 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ (inib
[7] | 1), &tmp
);
4727 if (record_full_arch_list_add_mem (oaddr2
, tmp
))
4729 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
4731 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
4733 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[7] | 1)))
4736 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4740 /* 0xb932-0xb937 undefined */
4742 /* 0xb938 unsupported: SORTL - sort lists */
4743 /* 0xb939 unsupported: DFLTCC - deflate conversion call */
4744 /* 0xb93a unsupported: KDSA - compute dig. signature auth. */
4746 /* 0xb93b undefined */
4748 case 0xb93c: /* PPNO - perform pseudorandom number operation [partial] */
4749 regcache_raw_read_unsigned (regcache
, S390_R1_REGNUM
, &tmp
);
4750 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
4751 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
, &tmp
);
4755 case 0x00: /* PPNO-Query */
4756 case 0x80: /* PPNO-Query */
4757 if (record_full_arch_list_add_mem (oaddr
, 16))
4761 case 0x03: /* PPNO-SHA-512-DRNG - generate */
4762 if (record_full_arch_list_add_mem (oaddr
, 240))
4764 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[6], &tmp
);
4765 oaddr2
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
4766 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ (inib
[6] | 1), &tmp
);
4767 if (record_full_arch_list_add_mem (oaddr2
, tmp
))
4769 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
4771 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[6] | 1)))
4775 case 0x83: /* PPNO-SHA-512-DRNG - seed */
4776 if (record_full_arch_list_add_mem (oaddr
, 240))
4778 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
4780 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[7] | 1)))
4785 gdb_printf (gdb_stdlog
, "Warning: Unknown PPNO function %02x at %s.\n",
4786 (int)tmp
, paddress (gdbarch
, addr
));
4789 /* DXC may be written */
4790 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
4792 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4796 /* 0xb93d undefined */
4798 case 0xb93e: /* KIMD - compute intermediate message digest [partial] */
4799 case 0xb93f: /* KLMD - compute last message digest [partial] */
4800 regcache_raw_read_unsigned (regcache
, S390_R1_REGNUM
, &tmp
);
4801 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
4802 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
, &tmp
);
4806 case 0x00: /* K*MD-Query */
4807 if (record_full_arch_list_add_mem (oaddr
, 16))
4811 case 0x01: /* K*MD-SHA-1 */
4812 if (record_full_arch_list_add_mem (oaddr
, 20))
4816 case 0x02: /* K*MD-SHA-256 */
4817 if (record_full_arch_list_add_mem (oaddr
, 32))
4821 case 0x03: /* K*MD-SHA-512 */
4822 if (record_full_arch_list_add_mem (oaddr
, 64))
4826 case 0x41: /* KIMD-GHASH */
4827 /* Only valid for KIMD. */
4828 if (insn
[0] == 0xb93e)
4830 if (record_full_arch_list_add_mem (oaddr
, 16))
4837 gdb_printf (gdb_stdlog
, "Warning: Unknown KMAC function %02x at %s.\n",
4838 (int)tmp
, paddress (gdbarch
, addr
));
4843 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
4845 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[7] | 1)))
4848 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4852 /* 0xb940 undefined */
4853 /* 0xb944-0xb945 undefined */
4854 /* 0xb947-0xb948 undefined */
4855 /* 0xb94c-0xb950 undefined */
4856 /* 0xb954-0xb958 undefined */
4857 /* 0xb95c-0xb95f undefined */
4858 /* 0xb962-0xb971 undefined */
4859 /* 0xb974-0xb97f undefined */
4861 case 0xb983: /* FLOGR - find leftmost one */
4862 /* 64-bit gpr pair destination + flags */
4863 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[6]))
4865 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[6] | 1))
4867 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4871 /* 0xb98a privileged */
4872 /* 0xb98b-0xb98c undefined */
4874 case 0xb98d: /* EPSW - extract psw */
4875 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
4878 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
4882 /* 0xb98e-0xb98f privileged */
4884 case 0xb990: /* TRTT - translate two to two [partial] */
4885 case 0xb991: /* TRTO - translate two to one [partial] */
4886 case 0xb992: /* TROT - translate one to two [partial] */
4887 case 0xb993: /* TROO - translate one to one [partial] */
4888 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[6], &tmp
);
4889 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
4890 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ (inib
[6] | 1), &tmp
);
4891 /* tmp is source length, we want destination length. Adjust. */
4892 if (insn
[0] == 0xb991)
4894 if (insn
[0] == 0xb992)
4896 if (record_full_arch_list_add_mem (oaddr
, tmp
))
4898 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
4900 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[6] | 1)))
4902 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
4904 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4908 case 0xb996: /* MLR - multiply logical */
4909 case 0xb997: /* DLR - divide logical */
4910 /* 32-bit gpr pair destination */
4911 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
4913 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[6] | 1)))
4917 /* 0xb99a-0xb9af unsupported, privileged, or undefined */
4918 /* 0xb9b4-0xb9bc undefined */
4920 case 0xb9bd: /* TRTRE - translate and test reverse extended [partial] */
4921 case 0xb9bf: /* TRTE - translate and test extended [partial] */
4922 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[6]))
4924 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[6] | 1)))
4926 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[7]))
4928 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4932 /* 0xb9c0-0xb9c7 undefined */
4934 case 0xb9c8: /* AHHHR - add high */
4935 case 0xb9c9: /* SHHHR - subtract high */
4936 case 0xb9ca: /* ALHHHR - add logical high */
4937 case 0xb9cb: /* SLHHHR - subtract logical high */
4938 case 0xb9d8: /* AHHLR - add high */
4939 case 0xb9d9: /* SHHLR - subtract high */
4940 case 0xb9da: /* ALHHLR - add logical high */
4941 case 0xb9db: /* SLHHLR - subtract logical high */
4942 /* 32-bit high gpr destination + flags */
4943 if (s390_record_gpr_h (gdbarch
, regcache
, inib
[6]))
4945 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4949 /* 0xb9cc undefined */
4950 /* 0xb9ce undefined */
4951 /* 0xb9d0-0xb9d7 undefined */
4952 /* 0xb9dc undefined */
4953 /* 0xb9de undefined */
4955 case 0xb9e0: /* LOCFHR - load high on condition */
4956 /* 32-bit high gpr destination */
4957 if (s390_record_gpr_h (gdbarch
, regcache
, inib
[6]))
4961 /* 0xb9e3 undefined */
4962 /* 0xb9e5 undefined */
4963 /* 0xb9ee-0xb9f1 undefined */
4964 /* 0xb9f3 undefined */
4965 /* 0xb9f5 undefined */
4966 /* 0xb9fc undefined */
4967 /* 0xb9fe -0xb9ff undefined */
4974 /* 0xb4-0xb5 undefined */
4975 /* 0xb6 privileged: STCTL - store control */
4976 /* 0xb7 privileged: LCTL - load control */
4977 /* 0xb8 undefined */
4979 case 0xba: /* CS - compare and swap */
4980 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
4981 if (record_full_arch_list_add_mem (oaddr
, 4))
4983 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
4985 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
4989 case 0xbb: /* CDS - compare double and swap */
4990 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
4991 if (record_full_arch_list_add_mem (oaddr
, 8))
4993 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
4995 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[2] | 1)))
4997 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5001 /* 0xbc undefined */
5003 case 0xbe: /* STCM - store characters under mask */
5004 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
5005 if (record_full_arch_list_add_mem (oaddr
, s390_popcnt (inib
[3])))
5014 /* RIL-format instruction */
5015 switch (ibyte
[0] << 4 | inib
[3])
5017 case 0xc00: /* LARL - load address relative long */
5018 case 0xc05: /* BRASL - branch relative and save long */
5019 case 0xc09: /* IILF - insert immediate */
5020 case 0xc21: /* MSFI - multiply single immediate */
5021 case 0xc42: /* LLHRL - load logical halfword relative long */
5022 case 0xc45: /* LHRL - load halfword relative long */
5023 case 0xc4d: /* LRL - load relative long */
5024 /* 32-bit or native gpr destination */
5025 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
5029 case 0xc01: /* LGFI - load immediate */
5030 case 0xc0e: /* LLIHF - load logical immediate */
5031 case 0xc0f: /* LLILF - load logical immediate */
5032 case 0xc20: /* MSGFI - multiply single immediate */
5033 case 0xc44: /* LGHRL - load halfword relative long */
5034 case 0xc46: /* LLGHRL - load logical halfword relative long */
5035 case 0xc48: /* LGRL - load relative long */
5036 case 0xc4c: /* LGFRL - load relative long */
5037 case 0xc4e: /* LLGFRL - load logical relative long */
5038 /* 64-bit gpr destination */
5039 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
5043 /* 0xc02-0xc03 undefined */
5045 case 0xc04: /* BRCL - branch relative on condition long */
5046 case 0xc62: /* PFDRL - prefetch data relative long */
5049 case 0xc06: /* XIHF - xor immediate */
5050 case 0xc0a: /* NIHF - and immediate */
5051 case 0xc0c: /* OIHF - or immediate */
5052 case 0xcc8: /* AIH - add immediate high */
5053 case 0xcca: /* ALSIH - add logical with signed immediate high */
5054 /* 32-bit high gpr destination + flags */
5055 if (s390_record_gpr_h (gdbarch
, regcache
, inib
[2]))
5057 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5061 case 0xc07: /* XILF - xor immediate */
5062 case 0xc0b: /* NILF - and immediate */
5063 case 0xc0d: /* OILF - or immediate */
5064 case 0xc25: /* SLFI - subtract logical immediate */
5065 case 0xc29: /* AFI - add immediate */
5066 case 0xc2b: /* ALFI - add logical immediate */
5067 /* 32-bit gpr destination + flags */
5068 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
5070 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5074 case 0xc08: /* IIHF - insert immediate */
5075 case 0xcc6: /* BRCTH - branch relative on count high */
5076 case 0xccb: /* ALSIHN - add logical with signed immediate high */
5077 /* 32-bit high gpr destination */
5078 if (s390_record_gpr_h (gdbarch
, regcache
, inib
[2]))
5082 /* 0xc22-0xc23 undefined */
5084 case 0xc24: /* SLGFI - subtract logical immediate */
5085 case 0xc28: /* AGFI - add immediate */
5086 case 0xc2a: /* ALGFI - add logical immediate */
5087 /* 64-bit gpr destination + flags */
5088 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
5090 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5094 /* 0xc26-0xc27 undefined */
5096 case 0xc2c: /* CGFI - compare immediate */
5097 case 0xc2d: /* CFI - compare immediate */
5098 case 0xc2e: /* CLGFI - compare logical immediate */
5099 case 0xc2f: /* CLFI - compare logical immediate */
5100 case 0xc64: /* CGHRL - compare halfword relative long */
5101 case 0xc65: /* CHRL - compare halfword relative long */
5102 case 0xc66: /* CLGHRL - compare logical halfword relative long */
5103 case 0xc67: /* CLHRL - compare logical halfword relative long */
5104 case 0xc68: /* CGRL - compare relative long */
5105 case 0xc6a: /* CLGRL - compare logical relative long */
5106 case 0xc6c: /* CGFRL - compare relative long */
5107 case 0xc6d: /* CRL - compare relative long */
5108 case 0xc6e: /* CLGFRL - compare logical relative long */
5109 case 0xc6f: /* CLRL - compare logical relative long */
5110 case 0xccd: /* CIH - compare immediate high */
5111 case 0xccf: /* CLIH - compare logical immediate high */
5113 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5117 /* 0xc40-0xc41 undefined */
5118 /* 0xc43 undefined */
5120 case 0xc47: /* STHRL - store halfword relative long */
5121 oaddr
= s390_record_calc_rl (gdbarch
, regcache
, addr
, insn
[1], insn
[2]);
5122 if (record_full_arch_list_add_mem (oaddr
, 2))
5126 /* 0xc49-0xc4a undefined */
5128 case 0xc4b: /* STGRL - store relative long */
5129 oaddr
= s390_record_calc_rl (gdbarch
, regcache
, addr
, insn
[1], insn
[2]);
5130 if (record_full_arch_list_add_mem (oaddr
, 8))
5134 case 0xc4f: /* STRL - store relative long */
5135 oaddr
= s390_record_calc_rl (gdbarch
, regcache
, addr
, insn
[1], insn
[2]);
5136 if (record_full_arch_list_add_mem (oaddr
, 4))
5140 case 0xc60: /* EXRL - execute relative long */
5143 gdb_printf (gdb_stdlog
, "Warning: Double execute at %s.\n",
5144 paddress (gdbarch
, addr
));
5147 addr
= s390_record_calc_rl (gdbarch
, regcache
, addr
, insn
[1], insn
[2]);
5150 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[2], &tmp
);
5159 /* 0xc61 undefined */
5160 /* 0xc63 undefined */
5161 /* 0xc69 undefined */
5162 /* 0xc6b undefined */
5163 /* 0xcc0-0xcc5 undefined */
5164 /* 0xcc7 undefined */
5165 /* 0xcc9 undefined */
5166 /* 0xccc undefined */
5167 /* 0xcce undefined */
5174 /* 0xc1 undefined */
5175 /* 0xc3 undefined */
5177 case 0xc5: /* BPRP - branch prediction relative preload */
5178 case 0xc7: /* BPP - branch prediction preload */
5179 /* no visible effect */
5183 /* SSF-format instruction */
5184 switch (ibyte
[0] << 4 | inib
[3])
5186 /* 0xc80 unsupported */
5188 case 0xc81: /* ECTG - extract cpu time */
5189 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
5191 if (s390_record_gpr_g (gdbarch
, regcache
, 0))
5193 if (s390_record_gpr_g (gdbarch
, regcache
, 1))
5197 case 0xc82: /* CSST - compare and swap and store */
5200 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
, &tmp
);
5202 sc
= tmp
>> 8 & 0xff;
5204 /* First and third operands. */
5205 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
5208 case 0x00: /* 32-bit */
5209 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
5211 if (record_full_arch_list_add_mem (oaddr
, 4))
5215 case 0x01: /* 64-bit */
5216 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
5218 if (record_full_arch_list_add_mem (oaddr
, 8))
5222 case 0x02: /* 128-bit */
5223 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
5225 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2] | 1))
5227 if (record_full_arch_list_add_mem (oaddr
, 16))
5232 gdb_printf (gdb_stdlog
, "Warning: Unknown CSST FC %02x at %s.\n",
5233 fc
, paddress (gdbarch
, addr
));
5237 /* Second operand. */
5238 oaddr2
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[2], 0);
5241 gdb_printf (gdb_stdlog
, "Warning: Unknown CSST FC %02x at %s.\n",
5242 sc
, paddress (gdbarch
, addr
));
5246 if (record_full_arch_list_add_mem (oaddr2
, 1 << sc
))
5250 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5255 /* 0xc83 undefined */
5257 case 0xc84: /* LPD - load pair disjoint */
5258 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
5260 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[2] | 1)))
5262 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5266 case 0xc85: /* LPDG - load pair disjoint */
5267 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
5269 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2] | 1))
5271 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5275 case 0xc86: /* CAL - compare and load 32 */
5276 case 0xc87: /* CALG - compare and load 64 */
5277 case 0xc8f: /* CALGF - compare and load 64<32 */
5278 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
5280 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5289 /* 0xc9-0xcb undefined */
5290 /* 0xcd-0xcf undefined */
5292 case 0xd0: /* TRTR - translate and test reversed */
5293 case 0xdd: /* TRT - translate and test */
5294 if (record_full_arch_list_add_reg (regcache
, S390_R1_REGNUM
))
5296 if (record_full_arch_list_add_reg (regcache
, S390_R2_REGNUM
))
5298 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5302 case 0xd1: /* MVN - move numbers */
5303 case 0xd2: /* MVC - move */
5304 case 0xd3: /* MVZ - move zones */
5305 case 0xdc: /* TR - translate */
5306 case 0xe8: /* MVCIN - move inverse */
5307 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
5308 if (record_full_arch_list_add_mem (oaddr
, ibyte
[1] + 1))
5312 case 0xd4: /* NC - and */
5313 case 0xd6: /* OC - or*/
5314 case 0xd7: /* XC - xor */
5315 case 0xe2: /* UNPKU - unpack unicode */
5316 case 0xea: /* UNPKA - unpack ASCII */
5317 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
5318 if (record_full_arch_list_add_mem (oaddr
, ibyte
[1] + 1))
5320 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5324 case 0xde: /* ED - edit */
5325 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
5326 if (record_full_arch_list_add_mem (oaddr
, ibyte
[1] + 1))
5328 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5330 /* DXC may be written */
5331 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5335 case 0xdf: /* EDMK - edit and mark */
5336 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
5337 if (record_full_arch_list_add_mem (oaddr
, ibyte
[1] + 1))
5339 if (record_full_arch_list_add_reg (regcache
, S390_R1_REGNUM
))
5341 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5343 /* DXC may be written */
5344 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5348 /* 0xd8 undefined */
5349 /* 0xd9 unsupported: MVCK - move with key */
5350 /* 0xda unsupported: MVCP - move to primary */
5351 /* 0xdb unsupported: MVCS - move to secondary */
5352 /* 0xe0 undefined */
5354 case 0xe1: /* PKU - pack unicode */
5355 case 0xe9: /* PKA - pack ASCII */
5356 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
5357 if (record_full_arch_list_add_mem (oaddr
, 16))
5366 /* RXY/RXE/RXF/RSL/RSY/SIY/V*-format instruction */
5367 switch (ibyte
[0] << 8 | ibyte
[5])
5369 /* 0xe300-0xe301 undefined */
5371 case 0xe302: /* LTG - load and test */
5372 case 0xe308: /* AG - add */
5373 case 0xe309: /* SG - subtract */
5374 case 0xe30a: /* ALG - add logical */
5375 case 0xe30b: /* SLG - subtract logical */
5376 case 0xe318: /* AGF - add */
5377 case 0xe319: /* SGF - subtract */
5378 case 0xe31a: /* ALGF - add logical */
5379 case 0xe31b: /* SLGF - subtract logical */
5380 case 0xe332: /* LTGF - load and test */
5381 case 0xe380: /* NG - and */
5382 case 0xe381: /* OG - or */
5383 case 0xe382: /* XG - xor */
5384 case 0xe388: /* ALCG - add logical with carry */
5385 case 0xe389: /* SLBG - subtract logical with borrow */
5386 case 0xeb0a: /* SRAG - shift right single */
5387 case 0xeb0b: /* SLAG - shift left single */
5388 /* 64-bit gpr destination + flags */
5389 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
5391 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5395 /* 0xe303 privileged */
5397 case 0xe304: /* LG - load */
5398 case 0xe30c: /* MSG - multiply single */
5399 case 0xe30f: /* LRVG - load reversed */
5400 case 0xe314: /* LGF - load */
5401 case 0xe315: /* LGH - load halfword */
5402 case 0xe316: /* LLGF - load logical */
5403 case 0xe317: /* LLGT - load logical thirty one bits */
5404 case 0xe31c: /* MSGF - multiply single */
5405 case 0xe32a: /* LZRG - load and zero rightmost byte */
5406 case 0xe33a: /* LLZRGF - load logical and zero rightmost byte */
5407 case 0xe33c: /* MGH - multiply halfword 64x16mem -> 64 */
5408 case 0xe346: /* BCTG - branch on count */
5409 case 0xe377: /* LGB - load byte */
5410 case 0xe390: /* LLGC - load logical character */
5411 case 0xe391: /* LLGH - load logical halfword */
5412 case 0xeb0c: /* SRLG - shift right single logical */
5413 case 0xeb0d: /* SLLG - shift left single logical */
5414 case 0xeb1c: /* RLLG - rotate left single logical */
5415 case 0xeb44: /* BXHG - branch on index high */
5416 case 0xeb45: /* BXLEG - branch on index low or equal */
5417 case 0xeb4c: /* ECAG - extract cpu attribute */
5418 case 0xebe2: /* LOCG - load on condition */
5419 /* 64-bit gpr destination */
5420 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
5424 /* 0xe305 undefined */
5426 case 0xe306: /* CVBY - convert to binary */
5427 /* 32-bit or native gpr destination + FPC (DXC write) */
5428 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
5430 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5434 /* 0xe307 undefined */
5436 case 0xe30d: /* DSG - divide single */
5437 case 0xe31d: /* DSGF - divide single */
5438 case 0xe384: /* MG - multiply 64x64mem -> 128 */
5439 case 0xe386: /* MLG - multiply logical */
5440 case 0xe387: /* DLG - divide logical */
5441 case 0xe38f: /* LPQ - load pair from quadword */
5442 /* 64-bit gpr pair destination */
5443 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
5445 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2] | 1))
5449 case 0xe30e: /* CVBG - convert to binary */
5450 /* 64-bit gpr destination + FPC (DXC write) */
5451 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
5453 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5457 /* 0xe310-0xe311 undefined */
5459 case 0xe312: /* LT - load and test */
5460 case 0xe338: /* AGH - add halfword to 64 bit value */
5461 case 0xe339: /* SGH - subtract halfword from 64 bit value */
5462 case 0xe353: /* MSC - multiply single 32x32mem -> 32 */
5463 case 0xe354: /* NY - and */
5464 case 0xe356: /* OY - or */
5465 case 0xe357: /* XY - xor */
5466 case 0xe35a: /* AY - add */
5467 case 0xe35b: /* SY - subtract */
5468 case 0xe35e: /* ALY - add logical */
5469 case 0xe35f: /* SLY - subtract logical */
5470 case 0xe37a: /* AHY - add halfword */
5471 case 0xe37b: /* SHY - subtract halfword */
5472 case 0xe383: /* MSGC - multiply single 64x64mem -> 64 */
5473 case 0xe398: /* ALC - add logical with carry */
5474 case 0xe399: /* SLB - subtract logical with borrow */
5475 case 0xe727: /* LCBB - load count to block boundary */
5476 case 0xeb81: /* ICMY - insert characters under mask */
5477 case 0xebdc: /* SRAK - shift left single */
5478 case 0xebdd: /* SLAK - shift left single */
5479 /* 32/64-bit gpr destination + flags */
5480 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
5482 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5486 /* 0xe313 privileged */
5488 case 0xe31e: /* LRV - load reversed */
5489 case 0xe31f: /* LRVH - load reversed */
5490 case 0xe33b: /* LZRF - load and zero rightmost byte */
5491 case 0xe351: /* MSY - multiply single */
5492 case 0xe358: /* LY - load */
5493 case 0xe360: /* LXAB - load indexed address (shift 0) */
5494 case 0xe361: /* LLXAB - load logical indexed address (shift 0) */
5495 case 0xe362: /* LXAH - load indexed address (shift 1) */
5496 case 0xe363: /* LLXAH - load logical indexed address (shift 1) */
5497 case 0xe364: /* LXAF - load indexed address (shift 2) */
5498 case 0xe365: /* LLXAF - load logical indexed address (shift 2) */
5499 case 0xe366: /* LXAG - load indexed address (shift 3) */
5500 case 0xe367: /* LLXAG - load logical indexed address (shift 3) */
5501 case 0xe368: /* LXAQ - load indexed address (shift 4) */
5502 case 0xe369: /* LLXAQ - load logical indexed address (shift 4) */
5503 case 0xe371: /* LAY - load address */
5504 case 0xe373: /* ICY - insert character */
5505 case 0xe376: /* LB - load byte */
5506 case 0xe378: /* LHY - load */
5507 case 0xe37c: /* MHY - multiply halfword */
5508 case 0xe394: /* LLC - load logical character */
5509 case 0xe395: /* LLH - load logical halfword */
5510 case 0xeb1d: /* RLL - rotate left single logical */
5511 case 0xebde: /* SRLK - shift left single logical */
5512 case 0xebdf: /* SLLK - shift left single logical */
5513 case 0xebf2: /* LOC - load on condition */
5514 /* 32-bit or native gpr destination */
5515 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
5519 case 0xe320: /* CG - compare */
5520 case 0xe321: /* CLG - compare logical */
5521 case 0xe330: /* CGF - compare */
5522 case 0xe331: /* CLGF - compare logical */
5523 case 0xe334: /* CGH - compare halfword */
5524 case 0xe355: /* CLY - compare logical */
5525 case 0xe359: /* CY - compare */
5526 case 0xe379: /* CHY - compare halfword */
5527 case 0xe3cd: /* CHF - compare high */
5528 case 0xe3cf: /* CLHF - compare logical high */
5529 case 0xeb20: /* CLMH - compare logical under mask high */
5530 case 0xeb21: /* CLMY - compare logical under mask */
5531 case 0xeb51: /* TMY - test under mask */
5532 case 0xeb55: /* CLIY - compare logical */
5533 case 0xebc0: /* TP - test decimal */
5534 case 0xed10: /* TCEB - test data class */
5535 case 0xed11: /* TCDB - test data class */
5536 case 0xed12: /* TCXB - test data class */
5537 case 0xed50: /* TDCET - test data class */
5538 case 0xed51: /* TDGET - test data group */
5539 case 0xed54: /* TDCDT - test data class */
5540 case 0xed55: /* TDGDT - test data group */
5541 case 0xed58: /* TDCXT - test data class */
5542 case 0xed59: /* TDGXT - test data group */
5544 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5548 /* 0xe322-0xe323 undefined */
5550 case 0xe324: /* STG - store */
5551 case 0xe325: /* NTSTG - nontransactional store */
5552 case 0xe326: /* CVDY - convert to decimal */
5553 case 0xe32f: /* STRVG - store reversed */
5554 case 0xed67: /* STDY - store */
5555 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], ibyte
[4]);
5556 if (record_full_arch_list_add_mem (oaddr
, 8))
5560 /* 0xe327-0xe329 undefined */
5561 /* 0xe32b-0xe32d undefined */
5563 case 0xe32e: /* CVDG - convert to decimal */
5564 case 0xe38e: /* STPQ - store pair to quadword */
5565 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], ibyte
[4]);
5566 if (record_full_arch_list_add_mem (oaddr
, 16))
5570 /* 0xe333 undefined */
5571 /* 0xe335 undefined */
5573 case 0xe336: /* PFD - prefetch data */
5576 /* 0xe337 undefined */
5577 /* 0xe33c-0xe33d undefined */
5579 case 0xe33e: /* STRV - store reversed */
5580 case 0xe350: /* STY - store */
5581 case 0xe3cb: /* STFH - store high */
5582 case 0xed66: /* STEY - store */
5583 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], ibyte
[4]);
5584 if (record_full_arch_list_add_mem (oaddr
, 4))
5588 case 0xe33f: /* STRVH - store reversed */
5589 case 0xe370: /* STHY - store halfword */
5590 case 0xe3c7: /* STHH - store halfword high */
5591 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], ibyte
[4]);
5592 if (record_full_arch_list_add_mem (oaddr
, 2))
5596 /* 0xe340-0xe345 undefined */
5598 case 0xe347: /* BIC - branch indirect on condition */
5601 /* 0xe348-0xe34f undefined */
5602 /* 0xe352 undefined */
5604 case 0xe35c: /* MFY - multiply */
5605 case 0xe396: /* ML - multiply logical */
5606 case 0xe397: /* DL - divide logical */
5607 /* 32-bit gpr pair destination */
5608 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
5610 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[2] | 1)))
5614 /* 0xe35d undefined */
5615 /* 0xe36a-0xe36f undefined */
5617 case 0xe372: /* STCY - store character */
5618 case 0xe3c3: /* STCH - store character high */
5619 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], ibyte
[4]);
5620 if (record_full_arch_list_add_mem (oaddr
, 1))
5624 /* 0xe374 undefined */
5626 case 0xe375: /* LAEY - load address extended */
5627 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
5629 if (record_full_arch_list_add_reg (regcache
, S390_A0_REGNUM
+ inib
[2]))
5633 /* 0xe37d-0xe37f undefined */
5635 case 0xe385: /* LGAT - load and trap */
5636 case 0xe39c: /* LLGTAT - load logical thirty one bits and trap */
5637 case 0xe39d: /* LLGFAT - load logical and trap */
5638 case 0xe650: /* VCVB - vector convert to binary 32 bit*/
5639 case 0xe652: /* VCVBG - vector convert to binary 64 bit*/
5640 case 0xe721: /* VLGV - vector load gr from vr element */
5641 /* 64-bit gpr destination + fpc for possible DXC write */
5642 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
5644 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5648 /* 0xe38a-0xe38d undefined */
5649 /* 0xe392-0xe393 undefined */
5650 /* 0xe39a-0xe39b undefined */
5651 /* 0xe39e undefined */
5653 case 0xe39f: /* LAT - load and trap */
5654 /* 32-bit gpr destination + fpc for possible DXC write */
5655 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
5657 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5661 /* 0xe3a0-0xe3bf undefined */
5663 case 0xe3c0: /* LBH - load byte high */
5664 case 0xe3c2: /* LLCH - load logical character high */
5665 case 0xe3c4: /* LHH - load halfword high */
5666 case 0xe3c6: /* LLHH - load logical halfword high */
5667 case 0xe3ca: /* LFH - load high */
5668 case 0xebe0: /* LOCFH - load high on condition */
5669 /* 32-bit high gpr destination */
5670 if (s390_record_gpr_h (gdbarch
, regcache
, inib
[2]))
5674 /* 0xe3c1 undefined */
5675 /* 0xe3c5 undefined */
5677 case 0xe3c8: /* LFHAT - load high and trap */
5678 /* 32-bit high gpr destination + fpc for possible DXC write */
5679 if (s390_record_gpr_h (gdbarch
, regcache
, inib
[2]))
5681 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5685 /* 0xe3c9 undefined */
5686 /* 0xe3cc undefined */
5687 /* 0xe3ce undefined */
5688 /* 0xe3d0-0xe3ff undefined */
5690 case 0xe601: /* VLEBRH - vector load byte reversed element */
5691 case 0xe602: /* VLEBRG - vector load byte reversed element */
5692 case 0xe603: /* VLEBRF - vector load byte reversed element */
5693 case 0xe604: /* VLLEBRZ - vector load byte rev. el. and zero */
5694 case 0xe605: /* VLBRREP - vector load byte rev. el. and replicate */
5695 case 0xe606: /* VLBR - vector load byte reversed elements */
5696 case 0xe607: /* VLER - vector load elements reversed */
5697 case 0xe634: /* VPKZ - vector pack zoned */
5698 case 0xe635: /* VLRL - vector load rightmost with immed. length */
5699 case 0xe637: /* VLRLR - vector load rightmost with length */
5700 case 0xe649: /* VLIP - vector load immediate decimal */
5701 case 0xe656: /* VCLFNH - vector fp convert and lengthen from NNP high */
5702 case 0xe65e: /* VCLFNL - vector fp convert and lengthen from NNP low */
5703 case 0xe655: /* VCNF - vector fp convert to NNP */
5704 case 0xe65d: /* VCFN - vector fp convert from NNP */
5705 case 0xe674: /* VSCHP - decimal scale and convert to HFP */
5706 case 0xe675: /* VCRNF - vector fp convert and round to NNP */
5707 case 0xe67c: /* VSCSHP - decimal scale and convert and split to HFP */
5708 case 0xe67d: /* VCSPH - vector convert HFP to scaled decimal */
5709 case 0xe700: /* VLEB - vector load element */
5710 case 0xe701: /* VLEH - vector load element */
5711 case 0xe702: /* VLEG - vector load element */
5712 case 0xe703: /* VLEF - vector load element */
5713 case 0xe704: /* VLLEZ - vector load logical element and zero */
5714 case 0xe705: /* VLREP - vector load and replicate */
5715 case 0xe706: /* VL - vector load */
5716 case 0xe707: /* VLBB - vector load to block boundary */
5717 case 0xe712: /* VGEG - vector gather element */
5718 case 0xe713: /* VGEF - vector gather element */
5719 case 0xe722: /* VLVG - vector load vr element from gr */
5720 case 0xe730: /* VESL - vector element shift left */
5721 case 0xe733: /* VERLL - vector element rotate left logical */
5722 case 0xe737: /* VLL - vector load with length */
5723 case 0xe738: /* VESRL - vector element shift right logical */
5724 case 0xe73a: /* VESRA - vector element shift right arithmetic */
5725 case 0xe740: /* VLEIB - vector load element immediate */
5726 case 0xe741: /* VLEIH - vector load element immediate */
5727 case 0xe742: /* VLEIG - vector load element immediate */
5728 case 0xe743: /* VLEIF - vector load element immediate */
5729 case 0xe744: /* VGBM - vector generate byte mask */
5730 case 0xe745: /* VREPI - vector replicate immediate */
5731 case 0xe746: /* VGM - vector generate mask */
5732 case 0xe74d: /* VREP - vector replicate */
5733 case 0xe750: /* VPOPCT - vector population count */
5734 case 0xe752: /* VCTZ - vector count trailing zeros */
5735 case 0xe753: /* VCLZ - vector count leading zeros */
5736 case 0xe754: /* VGEM - vector generate element masks */
5737 case 0xe756: /* VLR - vector load */
5738 case 0xe75f: /* VSEG -vector sign extend to doubleword */
5739 case 0xe760: /* VMRL - vector merge low */
5740 case 0xe761: /* VMRH - vector merge high */
5741 case 0xe762: /* VLVGP - vector load vr from grs disjoint */
5742 case 0xe764: /* VSUM - vector sum across word */
5743 case 0xe765: /* VSUMG - vector sum across doubleword */
5744 case 0xe766: /* VCKSM - vector checksum */
5745 case 0xe767: /* VSUMQ - vector sum across quadword */
5746 case 0xe768: /* VN - vector and */
5747 case 0xe769: /* VNC - vector and with complement */
5748 case 0xe76a: /* VO - vector or */
5749 case 0xe76b: /* VNO - vector nor */
5750 case 0xe76c: /* VNX - vector not exclusive or */
5751 case 0xe76d: /* VX - vector xor */
5752 case 0xe76e: /* VNN - vector nand */
5753 case 0xe76f: /* VOC - vector or with complement */
5754 case 0xe770: /* VESLV - vector element shift left */
5755 case 0xe772: /* VERIM - vector element rotate and insert under mask */
5756 case 0xe773: /* VERLLV - vector element rotate left logical */
5757 case 0xe774: /* VSL - vector shift left */
5758 case 0xe775: /* VSLB - vector shift left by byte */
5759 case 0xe777: /* VSLDB - vector shift left double by byte */
5760 case 0xe778: /* VESRLV - vector element shift right logical */
5761 case 0xe77a: /* VESRAV - vector element shift right arithmetic */
5762 case 0xe77c: /* VSRL - vector shift right logical */
5763 case 0xe77d: /* VSRLB - vector shift right logical by byte */
5764 case 0xe77e: /* VSRA - vector shift right arithmetic */
5765 case 0xe77f: /* VSRAB - vector shift right arithmetic by byte */
5766 case 0xe784: /* VPDI - vector permute doubleword immediate */
5767 case 0xe785: /* VBPERM - vector bit permute */
5768 case 0xe786: /* VSLD - vector shift left double by bit */
5769 case 0xe787: /* VSRD - vector shift right double by bit */
5770 case 0xe788: /* VEVAL - vector evaluate */
5771 case 0xe789: /* VBLEND - vector blend */
5772 case 0xe78b: /* VSTRS - vector string search */
5773 case 0xe78c: /* VPERM - vector permute */
5774 case 0xe78d: /* VSEL - vector select */
5775 case 0xe78e: /* VFMS - vector fp multiply and subtract */
5776 case 0xe78f: /* VFMA - vector fp multiply and add */
5777 case 0xe794: /* VPK - vector pack */
5778 case 0xe79e: /* VFNMS - vector fp negative multiply and subtract */
5779 case 0xe79f: /* VFNMA - vector fp negative multiply and add */
5780 case 0xe7a1: /* VMLH - vector multiply logical high */
5781 case 0xe7a2: /* VML - vector multiply low */
5782 case 0xe7a3: /* VMH - vector multiply high */
5783 case 0xe7a4: /* VMLE - vector multiply logical even */
5784 case 0xe7a5: /* VMLO - vector multiply logical odd */
5785 case 0xe7a6: /* VME - vector multiply even */
5786 case 0xe7a7: /* VMO - vector multiply odd */
5787 case 0xe7a9: /* VMALH - vector multiply and add logical high */
5788 case 0xe7aa: /* VMAL - vector multiply and add low */
5789 case 0xe7ab: /* VMAH - vector multiply and add high */
5790 case 0xe7ac: /* VMALE - vector multiply and add logical even */
5791 case 0xe7ad: /* VMALO - vector multiply and add logical odd */
5792 case 0xe7ae: /* VMAE - vector multiply and add even */
5793 case 0xe7af: /* VMAO - vector multiply and add odd */
5794 case 0xe7b0: /* VDL - vector divide logical */
5795 case 0xe7b1: /* VRL - vector remainder logical */
5796 case 0xe7b2: /* VD - vector divide */
5797 case 0xe7b3: /* VR - vector remainder */
5798 case 0xe7b4: /* VGFM - vector Galois field multiply sum */
5799 case 0xe7b8: /* VMSL - vector multiply sum logical */
5800 case 0xe7b9: /* VACCC - vector add with carry compute carry */
5801 case 0xe7bb: /* VAC - vector add with carry */
5802 case 0xe7bc: /* VGFMA - vector Galois field multiply sum and accumulate */
5803 case 0xe7bd: /* VSBCBI - vector subtract with borrow compute borrow indication */
5804 case 0xe7bf: /* VSBI - vector subtract with borrow indication */
5805 case 0xe7c0: /* VCLFP - vector fp convert to logical */
5806 case 0xe7c1: /* VCFPL - vector fp convert from logical */
5807 case 0xe7c2: /* VCSFP - vector fp convert to fixed */
5808 case 0xe7c3: /* VCFPS - vector fp convert from fixed */
5809 case 0xe7c4: /* VLDE/VFLL - vector fp load lengthened */
5810 case 0xe7c5: /* VLED/VFLR - vector fp load rounded */
5811 case 0xe7c7: /* VFI - vector load fp integer */
5812 case 0xe7cc: /* VFPSO - vector fp perform sign operation */
5813 case 0xe7ce: /* VFSQ - vector fp square root */
5814 case 0xe7d4: /* VUPLL - vector unpack logical low */
5815 case 0xe7d6: /* VUPL - vector unpack low */
5816 case 0xe7d5: /* VUPLH - vector unpack logical high */
5817 case 0xe7d7: /* VUPH - vector unpack high */
5818 case 0xe7de: /* VLC - vector load complement */
5819 case 0xe7df: /* VLP - vector load positive */
5820 case 0xe7e2: /* VFA - vector fp subtract */
5821 case 0xe7e3: /* VFA - vector fp add */
5822 case 0xe7e5: /* VFD - vector fp divide */
5823 case 0xe7e7: /* VFM - vector fp multiply */
5824 case 0xe7ee: /* VFMIN - vector fp minimum */
5825 case 0xe7ef: /* VFMAX - vector fp maximum */
5826 case 0xe7f0: /* VAVGL - vector average logical */
5827 case 0xe7f1: /* VACC - vector add and compute carry */
5828 case 0xe7f2: /* VAVG - vector average */
5829 case 0xe7f3: /* VA - vector add */
5830 case 0xe7f5: /* VSCBI - vector subtract compute borrow indication */
5831 case 0xe7f7: /* VS - vector subtract */
5832 case 0xe7fc: /* VMNL - vector minimum logical */
5833 case 0xe7fd: /* VMXL - vector maximum logical */
5834 case 0xe7fe: /* VMN - vector minimum */
5835 case 0xe7ff: /* VMX - vector maximum */
5836 /* vector destination + FPC */
5837 if (s390_record_vr (gdbarch
, regcache
, ivec
[0]))
5839 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5843 case 0xe63d: /* VSTRL - vector store rightmost with immed. length */
5844 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
5845 if (record_full_arch_list_add_mem (oaddr
, inib
[3] + 1))
5847 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5851 case 0xe708: /* VSTEB - vector store element */
5852 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], 0);
5853 if (record_full_arch_list_add_mem (oaddr
, 1))
5855 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5859 case 0xe609: /* VSTEBRH - vector store byte reversed element */
5860 case 0xe709: /* VSTEH - vector store element */
5861 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], 0);
5862 if (record_full_arch_list_add_mem (oaddr
, 2))
5864 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5868 case 0xe60a: /* VSTEBRG - vector store byte reversed element */
5869 case 0xe70a: /* VSTEG - vector store element */
5870 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], 0);
5871 if (record_full_arch_list_add_mem (oaddr
, 8))
5873 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5877 case 0xe60b: /* VSTEBRF - vector store byte reversed element */
5878 case 0xe70b: /* VSTEF - vector store element */
5879 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], 0);
5880 if (record_full_arch_list_add_mem (oaddr
, 4))
5882 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5886 /* 0xe70c-0xe70d undefined */
5888 case 0xe60e: /* VSTBR - vector store byte reversed elements */
5889 case 0xe60f: /* VSTER - vector store elements reversed */
5890 case 0xe70e: /* VST - vector store */
5891 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, inib
[3], insn
[1], 0);
5892 if (record_full_arch_list_add_mem (oaddr
, 16))
5894 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5898 /* 0xe70f-0xe711 undefined */
5899 /* 0xe714-0xe719 undefined */
5901 case 0xe71a: /* VSCEG - vector scatter element */
5902 if (s390_record_calc_disp_vsce (gdbarch
, regcache
, ivec
[1], inib
[8], 8, insn
[1], 0, &oaddr
))
5904 if (record_full_arch_list_add_mem (oaddr
, 8))
5906 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5910 case 0xe71b: /* VSCEF - vector scatter element */
5911 if (s390_record_calc_disp_vsce (gdbarch
, regcache
, ivec
[1], inib
[8], 4, insn
[1], 0, &oaddr
))
5913 if (record_full_arch_list_add_mem (oaddr
, 4))
5915 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5919 /* 0xe71c-0xe720 undefined */
5920 /* 0xe723-0xe726 undefined */
5921 /* 0xe728-0xe72f undefined */
5922 /* 0xe731-0xe732 undefined */
5923 /* 0xe734-0xe735 undefined */
5925 case 0xe736: /* VLM - vector load multiple */
5926 for (i
= ivec
[0]; i
!= ivec
[1]; i
++, i
&= 0x1f)
5927 if (s390_record_vr (gdbarch
, regcache
, i
))
5929 if (s390_record_vr (gdbarch
, regcache
, ivec
[1]))
5931 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5935 /* 0xe739 undefined */
5936 /* 0xe73b-0xe73d undefined */
5938 case 0xe73e: /* VSTM - vector store multiple */
5939 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
5940 if (ivec
[0] <= ivec
[1])
5941 n
= ivec
[1] - ivec
[0] + 1;
5943 n
= ivec
[1] + 0x20 - ivec
[0] + 1;
5944 if (record_full_arch_list_add_mem (oaddr
, n
* 16))
5946 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5950 case 0xe63c: /* VUPKZ - vector unpack zoned */
5951 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
5952 if (record_full_arch_list_add_mem (oaddr
, (ibyte
[1] + 1) & 31))
5954 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
5958 case 0xe63f: /* VSTRLR - vector store rightmost with length */
5959 case 0xe73f: /* VSTL - vector store with length */
5960 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
5961 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[3], &tmp
);
5965 if (record_full_arch_list_add_mem (oaddr
, tmp
+ 1))
5967 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
5971 /* 0xe747-0xe749 undefined */
5973 case 0xe64a: /* VCVDQ - vector convert to decimal 128 bits */
5974 case 0xe64e: /* VCVBQ - vector convert to binary 128 bits */
5975 case 0xe651: /* VCLZDP - vector count leading zero digits */
5976 case 0xe654: /* VUPKZH - vector unpack zoned high */
5977 case 0xe658: /* VCVD - vector convert to decimal 32 bit */
5978 case 0xe659: /* VSRP - vector shift and round decimal */
5979 case 0xe65a: /* VCVDG - vector convert to decimal 64 bit*/
5980 case 0xe65b: /* VPSOP - vector perform sign operation decimal */
5981 case 0xe65c: /* VUPKZL - vector unpack zoned low */
5982 case 0xe670: /* VPKZR - vector pack zoned register */
5983 case 0xe671: /* VAP - vector add decimal */
5984 case 0xe672: /* VSRPR - vector shift and round decimal register */
5985 case 0xe673: /* VSP - vector subtract decimal */
5986 case 0xe678: /* VMP - vector multiply decimal */
5987 case 0xe679: /* VMSP - vector multiply decimal */
5988 case 0xe67a: /* VDP - vector divide decimal */
5989 case 0xe67b: /* VRP - vector remainder decimal */
5990 case 0xe67e: /* VSDP - vector shift and divide decimal */
5991 case 0xe74a: /* VFTCI - vector fp test data class immediate */
5992 case 0xe75c: /* VISTR - vector isolate string */
5993 case 0xe780: /* VFEE - vector find element equal */
5994 case 0xe781: /* VFENE - vector find element not equal */
5995 case 0xe782: /* VFA - vector find any element equal */
5996 case 0xe78a: /* VSTRC - vector string range compare */
5997 case 0xe795: /* VPKLS - vector pack logical saturate */
5998 case 0xe797: /* VPKS - vector pack saturate */
5999 case 0xe7e8: /* VFCE - vector fp compare equal */
6000 case 0xe7ea: /* VFCHE - vector fp compare high or equal */
6001 case 0xe7eb: /* VFCH - vector fp compare high */
6002 case 0xe7f8: /* VCEQ - vector compare equal */
6003 case 0xe7f9: /* VCHL - vector compare high logical */
6004 case 0xe7fb: /* VCH - vector compare high */
6005 /* vector destination + flags + FPC */
6006 if (s390_record_vr (gdbarch
, regcache
, ivec
[0]))
6008 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6010 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
6014 case 0xe65f: /* VTP - vector test decimal */
6015 case 0xe67f: /* VTZ - vector test zoned */
6017 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6019 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
6023 /* 0xe74b-0xe74c undefined */
6024 /* 0xe74e-0xe74f undefined */
6025 /* 0xe751 undefined */
6026 /* 0xe754-0xe755 undefined */
6027 /* 0xe757-0xe75b undefined */
6028 /* 0xe75d-0xe75e undefined */
6029 /* 0xe763 undefined */
6030 /* 0xe771 undefined */
6031 /* 0xe776 undefined */
6032 /* 0xe779 undefined */
6033 /* 0xe77b undefined */
6034 /* 0xe783 undefined */
6035 /* 0xe786-0xe789 undefined */
6036 /* 0xe78b undefined */
6037 /* 0xe790-0xe793 undefined */
6038 /* 0xe796 undefined */
6039 /* 0xe798-0xe79d undefined */
6040 /* 0xe7a0 undefined */
6041 /* 0xe7a8 undefined */
6042 /* 0xe7b0-0xe7b3 undefined */
6043 /* 0xe7b5-0xe7b7 undefined */
6044 /* 0xe7ba undefined */
6045 /* 0xe7be undefined */
6046 /* 0xe7c6 undefined */
6047 /* 0xe7c8-0xe7c9 undefined */
6049 case 0xe677: /* VCP - vector compare decimal */
6050 case 0xe7ca: /* WFK - vector fp compare and signal scalar */
6051 case 0xe7cb: /* WFC - vector fp compare scalar */
6052 case 0xe7d8: /* VTM - vector test under mask */
6053 case 0xe7d9: /* VECL - vector element compare logical */
6054 case 0xe7db: /* VEC - vector element compare */
6055 case 0xed08: /* KEB - compare and signal */
6056 case 0xed09: /* CEB - compare */
6057 case 0xed18: /* KDB - compare and signal */
6058 case 0xed19: /* CDB - compare */
6059 /* flags + fpc only */
6060 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6062 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
6066 /* 0xe7cd undefined */
6067 /* 0xe7cf-0xe7d3 undefined */
6068 /* 0xe7da undefined */
6069 /* 0xe7dc-0xe7dd undefined */
6070 /* 0xe7e0-0xe7e1 undefined */
6071 /* 0xe7e4 undefined */
6072 /* 0xe7e6 undefined */
6073 /* 0xe7e9 undefined */
6074 /* 0xe7ec-0xe7ed undefined */
6075 /* 0xe7f4 undefined */
6076 /* 0xe7f6 undefined */
6077 /* 0xe7fa undefined */
6079 /* 0xeb00-0xeb03 undefined */
6081 case 0xeb04: /* LMG - load multiple */
6082 for (i
= inib
[2]; i
!= inib
[3]; i
++, i
&= 0xf)
6083 if (s390_record_gpr_g (gdbarch
, regcache
, i
))
6085 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[3]))
6089 /* 0xeb05-0xeb09 undefined */
6090 /* 0xeb0e undefined */
6091 /* 0xeb0f privileged: TRACG */
6092 /* 0xeb10-0xeb13 undefined */
6094 case 0xeb14: /* CSY - compare and swap */
6095 case 0xebf4: /* LAN - load and and */
6096 case 0xebf6: /* LAO - load and or */
6097 case 0xebf7: /* LAX - load and xor */
6098 case 0xebf8: /* LAA - load and add */
6099 case 0xebfa: /* LAAL - load and add logical */
6100 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], ibyte
[4]);
6101 if (record_full_arch_list_add_mem (oaddr
, 4))
6103 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
6105 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6109 case 0xeb16: /* PFCR - perform functions with concurrent results */
6110 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6112 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
, &tmp
);
6113 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1],
6116 uint8_t fc
= tmp
& 0xff;
6117 if (fc
== 0) /* PFCR-QAF */
6119 if (record_full_arch_list_add_mem (oaddr
, 16))
6122 else if (fc
>= 1 && fc
<= 4)
6124 /* Compare and swap and double/triple store. */
6125 int bytesize
= fc
& 1 ? 4 : 8;
6126 int startbit
= fc
>= 3 ? 16 : 32;
6127 if (record_full_arch_list_add_reg (regcache
,
6128 S390_R0_REGNUM
+ inib
[2]))
6130 regcache_raw_read_unsigned (regcache
,
6131 S390_R0_REGNUM
+ inib
[3], &tmp
);
6132 for (i
= startbit
; i
< 64; i
+= 16)
6134 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0,
6135 (tmp
>> i
) & 0xffff, 0);
6136 if (record_full_arch_list_add_mem (oaddr
, bytesize
))
6142 gdb_printf (gdb_stdlog
,
6143 "Warning: Unknown PFCR FC %02x at %s.\n",
6144 fc
, paddress (gdbarch
, addr
));
6150 /* 0xeb17-0xeb1b undefined */
6151 /* 0xeb1e-0xeb1f undefined */
6152 /* 0xeb22 undefined */
6154 case 0xeb23: /* CLT - compare logical and trap */
6155 case 0xeb2b: /* CLGT - compare logical and trap */
6156 /* fpc only - including possible DXC write for trapping insns */
6157 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
6161 case 0xeb24: /* STMG - store multiple */
6162 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], ibyte
[4]);
6163 if (inib
[2] <= inib
[3])
6164 n
= inib
[3] - inib
[2] + 1;
6166 n
= inib
[3] + 0x10 - inib
[2] + 1;
6167 if (record_full_arch_list_add_mem (oaddr
, n
* 8))
6171 /* 0xeb25 privileged */
6173 case 0xeb26: /* STMH - store multiple high */
6174 case 0xeb90: /* STMY - store multiple */
6175 case 0xeb9b: /* STAMY - store access multiple */
6176 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], ibyte
[4]);
6177 if (inib
[2] <= inib
[3])
6178 n
= inib
[3] - inib
[2] + 1;
6180 n
= inib
[3] + 0x10 - inib
[2] + 1;
6181 if (record_full_arch_list_add_mem (oaddr
, n
* 4))
6185 /* 0xeb27-0xeb2a undefined */
6187 case 0xeb2c: /* STCMH - store characters under mask */
6188 case 0xeb2d: /* STCMY - store characters under mask */
6189 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], ibyte
[4]);
6190 if (record_full_arch_list_add_mem (oaddr
, s390_popcnt (inib
[3])))
6194 /* 0xeb2e undefined */
6195 /* 0xeb2f privileged */
6197 case 0xeb30: /* CSG - compare and swap */
6198 case 0xebe4: /* LANG - load and and */
6199 case 0xebe6: /* LAOG - load and or */
6200 case 0xebe7: /* LAXG - load and xor */
6201 case 0xebe8: /* LAAG - load and add */
6202 case 0xebea: /* LAALG - load and add logical */
6203 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], ibyte
[4]);
6204 if (record_full_arch_list_add_mem (oaddr
, 8))
6206 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
6208 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6212 case 0xeb31: /* CDSY - compare double and swap */
6213 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], ibyte
[4]);
6214 if (record_full_arch_list_add_mem (oaddr
, 8))
6216 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
6218 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[2] | 1)))
6220 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6224 /* 0xeb32-0xeb3d undefined */
6226 case 0xeb3e: /* CDSG - compare double and swap */
6227 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], ibyte
[4]);
6228 if (record_full_arch_list_add_mem (oaddr
, 16))
6230 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
6232 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2] | 1))
6234 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6238 /* 0xeb3f-0xeb43 undefined */
6239 /* 0xeb46-0xeb4b undefined */
6240 /* 0xeb4d-0xeb50 undefined */
6242 case 0xeb52: /* MVIY - move */
6243 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], ibyte
[4]);
6244 if (record_full_arch_list_add_mem (oaddr
, 1))
6248 case 0xeb54: /* NIY - and */
6249 case 0xeb56: /* OIY - or */
6250 case 0xeb57: /* XIY - xor */
6251 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], ibyte
[4]);
6252 if (record_full_arch_list_add_mem (oaddr
, 1))
6254 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6258 /* 0xeb53 undefined */
6259 /* 0xeb58-0xeb69 undefined */
6261 case 0xeb6a: /* ASI - add immediate */
6262 case 0xeb6e: /* ALSI - add immediate */
6263 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], ibyte
[4]);
6264 if (record_full_arch_list_add_mem (oaddr
, 4))
6266 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6270 /* 0xeb6b-0xeb6d undefined */
6271 /* 0xeb6f-0xeb79 undefined */
6273 case 0xeb7a: /* AGSI - add immediate */
6274 case 0xeb7e: /* ALGSI - add immediate */
6275 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], ibyte
[4]);
6276 if (record_full_arch_list_add_mem (oaddr
, 8))
6278 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6282 /* 0xeb7b-0xeb7d undefined */
6283 /* 0xeb7f undefined */
6285 case 0xeb80: /* ICMH - insert characters under mask */
6286 /* 32-bit high gpr destination + flags */
6287 if (s390_record_gpr_h (gdbarch
, regcache
, inib
[2]))
6289 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6293 /* 0xeb82-0xeb8d undefined */
6295 case 0xeb8e: /* MVCLU - move long unicode [partial] */
6296 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ inib
[2], &tmp
);
6297 oaddr
= s390_record_address_mask (gdbarch
, regcache
, tmp
);
6298 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
+ (inib
[2] | 1), &tmp
);
6299 if (record_full_arch_list_add_mem (oaddr
, tmp
))
6301 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
6303 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[2] | 1)))
6305 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[3]))
6307 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[3] | 1)))
6309 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6313 case 0xeb8f: /* CLCLU - compare logical long unicode [partial] */
6314 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
6316 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[2] | 1)))
6318 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[3]))
6320 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ (inib
[3] | 1)))
6322 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6326 /* 0xeb91-0xeb95 undefined */
6328 case 0xeb96: /* LMH - load multiple high */
6329 for (i
= inib
[2]; i
!= inib
[3]; i
++, i
&= 0xf)
6330 if (s390_record_gpr_h (gdbarch
, regcache
, i
))
6332 if (s390_record_gpr_h (gdbarch
, regcache
, inib
[3]))
6336 /* 0xeb97 undefined */
6338 case 0xeb98: /* LMY - load multiple */
6339 for (i
= inib
[2]; i
!= inib
[3]; i
++, i
&= 0xf)
6340 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ i
))
6342 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[3]))
6346 /* 0xeb99 undefined */
6348 case 0xeb9a: /* LAMY - load access multiple */
6349 for (i
= inib
[2]; i
!= inib
[3]; i
++, i
&= 0xf)
6350 if (record_full_arch_list_add_reg (regcache
, S390_A0_REGNUM
+ i
))
6352 if (record_full_arch_list_add_reg (regcache
, S390_A0_REGNUM
+ inib
[3]))
6356 /* 0xeb9c-0xebbf undefined */
6357 /* 0xebc1-0xebdb undefined */
6359 case 0xebe1: /* STOCFH - store high on condition */
6360 case 0xebf3: /* STOC - store on condition */
6361 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], ibyte
[4]);
6362 if (record_full_arch_list_add_mem (oaddr
, 4))
6366 case 0xebe3: /* STOCG - store on condition */
6367 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], ibyte
[4]);
6368 if (record_full_arch_list_add_mem (oaddr
, 8))
6372 /* 0xebe5 undefined */
6373 /* 0xebe9 undefined */
6374 /* 0xebeb-0xebf1 undefined */
6375 /* 0xebf5 undefined */
6376 /* 0xebf9 undefined */
6377 /* 0xebfb-0xebff undefined */
6379 /* 0xed00-0xed03 undefined */
6381 case 0xed04: /* LDEB - load lengthened */
6382 case 0xed0c: /* MDEB - multiply */
6383 case 0xed0d: /* DEB - divide */
6384 case 0xed14: /* SQEB - square root */
6385 case 0xed15: /* SQDB - square root */
6386 case 0xed17: /* MEEB - multiply */
6387 case 0xed1c: /* MDB - multiply */
6388 case 0xed1d: /* DDB - divide */
6389 /* float destination + fpc */
6390 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[2]))
6392 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
6396 case 0xed05: /* LXDB - load lengthened */
6397 case 0xed06: /* LXEB - load lengthened */
6398 case 0xed07: /* MXDB - multiply */
6399 /* float pair destination + fpc */
6400 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[2]))
6402 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[2] | 2)))
6404 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
6408 case 0xed0a: /* AEB - add */
6409 case 0xed0b: /* SEB - subtract */
6410 case 0xed1a: /* ADB - add */
6411 case 0xed1b: /* SDB - subtract */
6412 /* float destination + flags + fpc */
6413 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[2]))
6415 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6417 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
6421 case 0xed0e: /* MAEB - multiply and add */
6422 case 0xed0f: /* MSEB - multiply and subtract */
6423 case 0xed1e: /* MADB - multiply and add */
6424 case 0xed1f: /* MSDB - multiply and subtract */
6425 case 0xed40: /* SLDT - shift significand left */
6426 case 0xed41: /* SRDT - shift significand right */
6427 case 0xedaa: /* CDZT - convert from zoned */
6428 case 0xedae: /* CDPT - convert from packed */
6429 /* float destination [RXF] + fpc */
6430 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[8]))
6432 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
6436 /* 0xed13 undefined */
6437 /* 0xed16 undefined */
6438 /* 0xed20-0xed23 undefined */
6440 case 0xed24: /* LDE - load lengthened */
6441 case 0xed34: /* SQE - square root */
6442 case 0xed35: /* SQD - square root */
6443 case 0xed37: /* MEE - multiply */
6444 case 0xed64: /* LEY - load */
6445 case 0xed65: /* LDY - load */
6446 /* float destination */
6447 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[2]))
6451 case 0xed25: /* LXD - load lengthened */
6452 case 0xed26: /* LXE - load lengthened */
6453 /* float pair destination */
6454 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[2]))
6456 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[2] | 2)))
6460 /* 0xed27-0xed2d undefined */
6462 case 0xed2e: /* MAE - multiply and add */
6463 case 0xed2f: /* MSE - multiply and subtract */
6464 case 0xed38: /* MAYL - multiply and add unnormalized */
6465 case 0xed39: /* MYL - multiply unnormalized */
6466 case 0xed3c: /* MAYH - multiply and add unnormalized */
6467 case 0xed3d: /* MYH - multiply unnormalized */
6468 case 0xed3e: /* MAD - multiply and add */
6469 case 0xed3f: /* MSD - multiply and subtract */
6470 /* float destination [RXF] */
6471 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[8]))
6475 /* 0xed30-0xed33 undefined */
6476 /* 0xed36 undefined */
6478 case 0xed3a: /* MAY - multiply and add unnormalized */
6479 /* float pair destination [RXF]; R1 may designate lower- or
6480 higher-numbered register of pair */
6481 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[8] & 13)))
6483 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[8] | 2)))
6486 case 0xed3b: /* MY - multiply unnormalized */
6487 /* float pair destination [RXF] */
6488 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[8]))
6490 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[8] | 2)))
6494 /* 0xed42-0xed47 undefined */
6496 case 0xed48: /* SLXT - shift significand left */
6497 case 0xed49: /* SRXT - shift significand right */
6498 case 0xedab: /* CXZT - convert from zoned */
6499 case 0xedaf: /* CXPT - convert from packed */
6500 /* float pair destination [RXF] + fpc */
6501 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ inib
[8]))
6503 if (record_full_arch_list_add_reg (regcache
, S390_F0_REGNUM
+ (inib
[8] | 2)))
6505 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
6509 /* 0xed4a-0xed4f undefined */
6510 /* 0xed52-0xed53 undefined */
6511 /* 0xed56-0xed57 undefined */
6512 /* 0xed5a-0xed63 undefined */
6513 /* 0xed68-0xeda7 undefined */
6515 case 0xeda8: /* CZDT - convert to zoned */
6516 case 0xeda9: /* CZXT - convert to zoned */
6517 case 0xedac: /* CPDT - convert to packed */
6518 case 0xedad: /* CPXT - convert to packed */
6519 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
6520 if (record_full_arch_list_add_mem (oaddr
, ibyte
[1] + 1))
6522 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6526 /* 0xedb0-0xedff undefined */
6533 /* 0xe4 undefined */
6536 /* SSE/SIL-format instruction */
6539 /* 0xe500-0xe509 undefined, privileged, or unsupported */
6541 case 0xe50a: /* MVCRL - move right to left */
6542 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
, &tmp
);
6543 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
6544 if (record_full_arch_list_add_mem (oaddr
, (tmp
& 0xff) + 1))
6548 /* 0xe50b-0xe543 undefined, privileged, or unsupported */
6550 case 0xe544: /* MVHHI - move */
6551 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
6552 if (record_full_arch_list_add_mem (oaddr
, 2))
6556 /* 0xe545-0xe547 undefined */
6558 case 0xe548: /* MVGHI - move */
6559 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
6560 if (record_full_arch_list_add_mem (oaddr
, 8))
6564 /* 0xe549-0xe54b undefined */
6566 case 0xe54c: /* MVHI - move */
6567 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
6568 if (record_full_arch_list_add_mem (oaddr
, 4))
6572 /* 0xe54d-0xe553 undefined */
6574 case 0xe554: /* CHHSI - compare halfword immediate */
6575 case 0xe555: /* CLHHSI - compare logical immediate */
6576 case 0xe558: /* CGHSI - compare halfword immediate */
6577 case 0xe559: /* CLGHSI - compare logical immediate */
6578 case 0xe55c: /* CHSI - compare halfword immediate */
6579 case 0xe55d: /* CLFHSI - compare logical immediate */
6580 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6584 /* 0xe556-0xe557 undefined */
6585 /* 0xe55a-0xe55b undefined */
6586 /* 0xe55e-0xe55f undefined */
6588 case 0xe560: /* TBEGIN - transaction begin */
6589 /* The transaction will be immediately aborted after this
6590 instruction, due to single-stepping. This instruction is
6591 only supported so that the program can fail a few times
6592 and go to the non-transactional fallback. */
6595 /* Transaction diagnostic block - user. */
6596 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
6597 if (record_full_arch_list_add_mem (oaddr
, 256))
6600 /* Transaction diagnostic block - supervisor. */
6601 if (record_full_arch_list_add_reg (regcache
, S390_TDB_DWORD0_REGNUM
))
6603 if (record_full_arch_list_add_reg (regcache
, S390_TDB_ABORT_CODE_REGNUM
))
6605 if (record_full_arch_list_add_reg (regcache
, S390_TDB_CONFLICT_TOKEN_REGNUM
))
6607 if (record_full_arch_list_add_reg (regcache
, S390_TDB_ATIA_REGNUM
))
6609 for (i
= 0; i
< 16; i
++)
6610 if (record_full_arch_list_add_reg (regcache
, S390_TDB_R0_REGNUM
+ i
))
6613 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6617 /* 0xe561 unsupported: TBEGINC */
6618 /* 0xe562-0xe5ff undefined */
6626 /* RIE/RIS/RRS-format instruction */
6627 switch (ibyte
[0] << 8 | ibyte
[5])
6629 /* 0xec00-0xec41 undefined */
6631 case 0xec42: /* LOCHI - load halfword immediate on condition */
6632 case 0xec51: /* RISBLG - rotate then insert selected bits low */
6633 /* 32-bit or native gpr destination */
6634 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
6638 /* 0xec43 undefined */
6640 case 0xec44: /* BRXHG - branch relative on index high */
6641 case 0xec45: /* BRXLG - branch relative on index low or equal */
6642 case 0xec46: /* LOCGHI - load halfword immediate on condition */
6643 case 0xec59: /* RISBGN - rotate then insert selected bits */
6644 /* 64-bit gpr destination */
6645 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
6649 /* 0xec47-0xec4d undefined */
6651 case 0xec4e: /* LOCHHI - load halfword immediate on condition */
6652 case 0xec5d: /* RISBHG - rotate then insert selected bits high */
6653 /* 32-bit high gpr destination */
6654 if (s390_record_gpr_h (gdbarch
, regcache
, inib
[2]))
6658 /* 0xec4f-0xec50 undefined */
6659 /* 0xec52-0xec53 undefined */
6661 case 0xec54: /* RNSBG - rotate then and selected bits */
6662 case 0xec55: /* RISBG - rotate then insert selected bits */
6663 case 0xec56: /* ROSBG - rotate then or selected bits */
6664 case 0xec57: /* RXSBG - rotate then xor selected bits */
6665 case 0xecd9: /* AGHIK - add immediate */
6666 case 0xecdb: /* ALGHSIK - add logical immediate */
6667 /* 64-bit gpr destination + flags */
6668 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
6670 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6674 /* 0xec58 undefined */
6675 /* 0xec5a-0xec5c undefined */
6676 /* 0xec5e-0xec63 undefined */
6678 case 0xec64: /* CGRJ - compare and branch relative */
6679 case 0xec65: /* CLGRJ - compare logical and branch relative */
6680 case 0xec76: /* CRJ - compare and branch relative */
6681 case 0xec77: /* CLRJ - compare logical and branch relative */
6682 case 0xec7c: /* CGIJ - compare immediate and branch relative */
6683 case 0xec7d: /* CLGIJ - compare logical immediate and branch relative */
6684 case 0xec7e: /* CIJ - compare immediate and branch relative */
6685 case 0xec7f: /* CLIJ - compare logical immediate and branch relative */
6686 case 0xece4: /* CGRB - compare and branch */
6687 case 0xece5: /* CLGRB - compare logical and branch */
6688 case 0xecf6: /* CRB - compare and branch */
6689 case 0xecf7: /* CLRB - compare logical and branch */
6690 case 0xecfc: /* CGIB - compare immediate and branch */
6691 case 0xecfd: /* CLGIB - compare logical immediate and branch */
6692 case 0xecfe: /* CIB - compare immediate and branch */
6693 case 0xecff: /* CLIB - compare logical immediate and branch */
6696 /* 0xec66-0xec6f undefined */
6698 case 0xec70: /* CGIT - compare immediate and trap */
6699 case 0xec71: /* CLGIT - compare logical immediate and trap */
6700 case 0xec72: /* CIT - compare immediate and trap */
6701 case 0xec73: /* CLFIT - compare logical immediate and trap */
6702 /* fpc only - including possible DXC write for trapping insns */
6703 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
6707 /* 0xec74-0xec75 undefined */
6708 /* 0xec78-0xec7b undefined */
6710 /* 0xec80-0xecd7 undefined */
6712 case 0xecd8: /* AHIK - add immediate */
6713 case 0xecda: /* ALHSIK - add logical immediate */
6714 /* 32-bit gpr destination + flags */
6715 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
6717 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6721 /* 0xecdc-0xece3 undefined */
6722 /* 0xece6-0xecf5 undefined */
6723 /* 0xecf8-0xecfb undefined */
6730 case 0xee: /* PLO - perform locked operation */
6731 regcache_raw_read_unsigned (regcache
, S390_R0_REGNUM
, &tmp
);
6732 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
6733 oaddr2
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[2], 0);
6736 uint8_t fc
= tmp
& 0xff;
6742 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
6745 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[3]))
6749 case 0x01: /* CLG */
6751 if (record_full_arch_list_add_mem (oaddr2
+ 0x08, 8))
6754 if (record_full_arch_list_add_mem (oaddr2
+ 0x28, 8))
6758 case 0x02: /* CLGR */
6760 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
6763 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[3]))
6767 case 0x03: /* CLX */
6769 if (record_full_arch_list_add_mem (oaddr2
+ 0x00, 16))
6772 if (record_full_arch_list_add_mem (oaddr2
+ 0x20, 16))
6776 case 0x08: /* DCS */
6778 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[3]))
6781 case 0x0c: /* CSST */
6783 if (record_full_arch_list_add_mem (oaddr2
, 4))
6787 case 0x14: /* CSTST */
6789 if (target_read_memory (oaddr2
+ 0x88, buf
, 8))
6791 oaddr3
= extract_unsigned_integer (buf
, 8, byte_order
);
6792 oaddr3
= s390_record_address_mask (gdbarch
, regcache
, oaddr3
);
6793 if (record_full_arch_list_add_mem (oaddr3
, 4))
6796 case 0x10: /* CSDST */
6798 if (target_read_memory (oaddr2
+ 0x68, buf
, 8))
6800 oaddr3
= extract_unsigned_integer (buf
, 8, byte_order
);
6801 oaddr3
= s390_record_address_mask (gdbarch
, regcache
, oaddr3
);
6802 if (record_full_arch_list_add_mem (oaddr3
, 4))
6805 if (target_read_memory (oaddr2
+ 0x48, buf
, 8))
6807 oaddr3
= extract_unsigned_integer (buf
, 8, byte_order
);
6808 oaddr3
= s390_record_address_mask (gdbarch
, regcache
, oaddr3
);
6809 if (record_full_arch_list_add_mem (oaddr3
, 4))
6815 if (record_full_arch_list_add_reg (regcache
, S390_R0_REGNUM
+ inib
[2]))
6818 if (record_full_arch_list_add_mem (oaddr
, 4))
6822 case 0x09: /* DCSG */
6824 if (record_full_arch_list_add_mem (oaddr2
+ 0x28, 8))
6828 case 0x15: /* CSTSTG */
6830 if (target_read_memory (oaddr2
+ 0x88, buf
, 8))
6832 oaddr3
= extract_unsigned_integer (buf
, 8, byte_order
);
6833 oaddr3
= s390_record_address_mask (gdbarch
, regcache
, oaddr3
);
6834 if (record_full_arch_list_add_mem (oaddr3
, 8))
6837 case 0x11: /* CSDSTG */
6839 if (target_read_memory (oaddr2
+ 0x68, buf
, 8))
6841 oaddr3
= extract_unsigned_integer (buf
, 8, byte_order
);
6842 oaddr3
= s390_record_address_mask (gdbarch
, regcache
, oaddr3
);
6843 if (record_full_arch_list_add_mem (oaddr3
, 8))
6846 case 0x0d: /* CSSTG */
6849 if (target_read_memory (oaddr2
+ 0x48, buf
, 8))
6851 oaddr3
= extract_unsigned_integer (buf
, 8, byte_order
);
6852 oaddr3
= s390_record_address_mask (gdbarch
, regcache
, oaddr3
);
6853 if (record_full_arch_list_add_mem (oaddr3
, 8))
6856 case 0x05: /* CSG */
6858 if (record_full_arch_list_add_mem (oaddr2
+ 0x08, 8))
6861 if (record_full_arch_list_add_mem (oaddr
, 8))
6865 case 0x0a: /* DCSGR */
6867 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[3]))
6870 case 0x0e: /* CSSTGR */
6872 if (record_full_arch_list_add_mem (oaddr2
, 8))
6876 case 0x16: /* CSTSTGR */
6878 if (target_read_memory (oaddr2
+ 0x88, buf
, 8))
6880 oaddr3
= extract_unsigned_integer (buf
, 8, byte_order
);
6881 oaddr3
= s390_record_address_mask (gdbarch
, regcache
, oaddr3
);
6882 if (record_full_arch_list_add_mem (oaddr3
, 8))
6885 case 0x12: /* CSDSTGR */
6887 if (target_read_memory (oaddr2
+ 0x68, buf
, 8))
6889 oaddr3
= extract_unsigned_integer (buf
, 8, byte_order
);
6890 oaddr3
= s390_record_address_mask (gdbarch
, regcache
, oaddr3
);
6891 if (record_full_arch_list_add_mem (oaddr3
, 8))
6894 if (target_read_memory (oaddr2
+ 0x48, buf
, 8))
6896 oaddr3
= extract_unsigned_integer (buf
, 8, byte_order
);
6897 oaddr3
= s390_record_address_mask (gdbarch
, regcache
, oaddr3
);
6898 if (record_full_arch_list_add_mem (oaddr3
, 8))
6901 case 0x06: /* CSGR */
6904 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[2]))
6907 if (record_full_arch_list_add_mem (oaddr
, 8))
6911 case 0x0b: /* DCSX */
6913 if (record_full_arch_list_add_mem (oaddr2
+ 0x20, 16))
6917 case 0x17: /* CSTSTX */
6919 if (target_read_memory (oaddr2
+ 0x88, buf
, 8))
6921 oaddr3
= extract_unsigned_integer (buf
, 8, byte_order
);
6922 oaddr3
= s390_record_address_mask (gdbarch
, regcache
, oaddr3
);
6923 if (record_full_arch_list_add_mem (oaddr3
, 16))
6926 case 0x13: /* CSDSTX */
6928 if (target_read_memory (oaddr2
+ 0x68, buf
, 8))
6930 oaddr3
= extract_unsigned_integer (buf
, 8, byte_order
);
6931 oaddr3
= s390_record_address_mask (gdbarch
, regcache
, oaddr3
);
6932 if (record_full_arch_list_add_mem (oaddr3
, 16))
6935 case 0x0f: /* CSSTX */
6938 if (target_read_memory (oaddr2
+ 0x48, buf
, 8))
6940 oaddr3
= extract_unsigned_integer (buf
, 8, byte_order
);
6941 oaddr3
= s390_record_address_mask (gdbarch
, regcache
, oaddr3
);
6942 if (record_full_arch_list_add_mem (oaddr3
, 16))
6945 case 0x07: /* CSX */
6947 if (record_full_arch_list_add_mem (oaddr2
+ 0x00, 16))
6950 if (record_full_arch_list_add_mem (oaddr
, 16))
6955 gdb_printf (gdb_stdlog
, "Warning: Unknown PLO FC %02x at %s.\n",
6956 fc
, paddress (gdbarch
, addr
));
6960 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6964 case 0xef: /* LMD - load multiple disjoint */
6965 for (i
= inib
[2]; i
!= inib
[3]; i
++, i
&= 0xf)
6966 if (s390_record_gpr_g (gdbarch
, regcache
, i
))
6968 if (s390_record_gpr_g (gdbarch
, regcache
, inib
[3]))
6972 case 0xf0: /* SRP - shift and round decimal */
6973 case 0xf8: /* ZAP - zero and add */
6974 case 0xfa: /* AP - add decimal */
6975 case 0xfb: /* SP - subtract decimal */
6976 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
6977 if (record_full_arch_list_add_mem (oaddr
, inib
[2] + 1))
6979 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6981 /* DXC may be written */
6982 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
6986 case 0xf1: /* MVO - move with offset */
6987 case 0xf2: /* PACK - pack */
6988 case 0xf3: /* UNPK - unpack */
6989 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
6990 if (record_full_arch_list_add_mem (oaddr
, inib
[2] + 1))
6994 /* 0xf4-0xf7 undefined */
6996 case 0xf9: /* CP - compare decimal */
6997 if (record_full_arch_list_add_reg (regcache
, S390_PSWM_REGNUM
))
6999 /* DXC may be written */
7000 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
7004 case 0xfc: /* MP - multiply decimal */
7005 case 0xfd: /* DP - divide decimal */
7006 oaddr
= s390_record_calc_disp (gdbarch
, regcache
, 0, insn
[1], 0);
7007 if (record_full_arch_list_add_mem (oaddr
, inib
[2] + 1))
7009 /* DXC may be written */
7010 if (record_full_arch_list_add_reg (regcache
, S390_FPC_REGNUM
))
7014 /* 0xfe-0xff undefined */
7018 gdb_printf (gdb_stdlog
, "Warning: Don't know how to record %04x "
7019 "at %s.\n", insn
[0], paddress (gdbarch
, addr
));
7023 if (record_full_arch_list_add_reg (regcache
, S390_PSWA_REGNUM
))
7025 if (record_full_arch_list_add_end ())
7030 /* Miscellaneous. */
7032 /* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
7033 "-mcmodel=large". */
7036 s390_gcc_target_options (struct gdbarch
*gdbarch
)
7038 return gdbarch_ptr_bit (gdbarch
) == 64 ? "-m64" : "-m31";
7041 /* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
7042 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
7043 always "s390". Note that an s390x compiler supports "-m31" as
7047 s390_gnu_triplet_regexp (struct gdbarch
*gdbarch
)
7052 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
7056 s390_stap_is_single_operand (struct gdbarch
*gdbarch
, const char *s
)
7058 return ((isdigit (*s
) && s
[1] == '(' && s
[2] == '%') /* Displacement
7060 || *s
== '%' /* Register access. */
7061 || isdigit (*s
)); /* Literal number. */
7066 /* Validate the range of registers. NAMES must be known at compile time. */
7068 #define s390_validate_reg_range(feature, tdesc_data, start, names) \
7071 for (int i = 0; i < ARRAY_SIZE (names); i++) \
7072 if (!tdesc_numbered_register (feature, tdesc_data, start + i, names[i])) \
7077 /* Validate the target description. Also numbers registers contained in
7081 s390_tdesc_valid (s390_gdbarch_tdep
*tdep
,
7082 struct tdesc_arch_data
*tdesc_data
)
7084 static const char *const psw
[] = {
7087 static const char *const gprs
[] = {
7088 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
7089 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
7091 static const char *const fprs
[] = {
7092 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
7093 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
7095 static const char *const acrs
[] = {
7096 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
7097 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
7099 static const char *const gprs_lower
[] = {
7100 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
7101 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
7103 static const char *const gprs_upper
[] = {
7104 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
7105 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
7107 static const char *const tdb_regs
[] = {
7108 "tdb0", "tac", "tct", "atia",
7109 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
7110 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
7112 static const char *const vxrs_low
[] = {
7113 "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l",
7114 "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l",
7116 static const char *const vxrs_high
[] = {
7117 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24",
7118 "v25", "v26", "v27", "v28", "v29", "v30", "v31",
7120 static const char *const gs_cb
[] = {
7121 "gsd", "gssm", "gsepla",
7123 static const char *const gs_bc
[] = {
7124 "bc_gsd", "bc_gssm", "bc_gsepla",
7127 const struct target_desc
*tdesc
= tdep
->tdesc
;
7128 const struct tdesc_feature
*feature
;
7130 if (!tdesc_has_registers (tdesc
))
7133 /* Core registers, i.e. general purpose and PSW. */
7134 feature
= tdesc_find_feature (tdesc
, "org.gnu.gdb.s390.core");
7135 if (feature
== NULL
)
7138 s390_validate_reg_range (feature
, tdesc_data
, S390_PSWM_REGNUM
, psw
);
7140 if (tdesc_unnumbered_register (feature
, "r0"))
7142 s390_validate_reg_range (feature
, tdesc_data
, S390_R0_REGNUM
, gprs
);
7146 tdep
->have_upper
= true;
7147 s390_validate_reg_range (feature
, tdesc_data
, S390_R0_REGNUM
,
7149 s390_validate_reg_range (feature
, tdesc_data
, S390_R0_UPPER_REGNUM
,
7153 /* Floating point registers. */
7154 feature
= tdesc_find_feature (tdesc
, "org.gnu.gdb.s390.fpr");
7155 if (feature
== NULL
)
7158 if (!tdesc_numbered_register (feature
, tdesc_data
, S390_FPC_REGNUM
, "fpc"))
7161 s390_validate_reg_range (feature
, tdesc_data
, S390_F0_REGNUM
, fprs
);
7163 /* Access control registers. */
7164 feature
= tdesc_find_feature (tdesc
, "org.gnu.gdb.s390.acr");
7165 if (feature
== NULL
)
7168 s390_validate_reg_range (feature
, tdesc_data
, S390_A0_REGNUM
, acrs
);
7170 /* Optional GNU/Linux-specific "registers". */
7171 feature
= tdesc_find_feature (tdesc
, "org.gnu.gdb.s390.linux");
7174 tdesc_numbered_register (feature
, tdesc_data
,
7175 S390_ORIG_R2_REGNUM
, "orig_r2");
7177 if (tdesc_numbered_register (feature
, tdesc_data
,
7178 S390_LAST_BREAK_REGNUM
, "last_break"))
7179 tdep
->have_linux_v1
= true;
7181 if (tdesc_numbered_register (feature
, tdesc_data
,
7182 S390_SYSTEM_CALL_REGNUM
, "system_call"))
7183 tdep
->have_linux_v2
= true;
7185 if (tdep
->have_linux_v2
&& !tdep
->have_linux_v1
)
7189 /* Transaction diagnostic block. */
7190 feature
= tdesc_find_feature (tdesc
, "org.gnu.gdb.s390.tdb");
7193 s390_validate_reg_range (feature
, tdesc_data
, S390_TDB_DWORD0_REGNUM
,
7195 tdep
->have_tdb
= true;
7198 /* Vector registers. */
7199 feature
= tdesc_find_feature (tdesc
, "org.gnu.gdb.s390.vx");
7202 s390_validate_reg_range (feature
, tdesc_data
, S390_V0_LOWER_REGNUM
,
7204 s390_validate_reg_range (feature
, tdesc_data
, S390_V16_REGNUM
,
7206 tdep
->have_vx
= true;
7209 /* Guarded-storage registers. */
7210 feature
= tdesc_find_feature (tdesc
, "org.gnu.gdb.s390.gs");
7213 s390_validate_reg_range (feature
, tdesc_data
, S390_GSD_REGNUM
, gs_cb
);
7214 tdep
->have_gs
= true;
7217 /* Guarded-storage broadcast control. */
7218 feature
= tdesc_find_feature (tdesc
, "org.gnu.gdb.s390.gsbc");
7223 s390_validate_reg_range (feature
, tdesc_data
, S390_BC_GSD_REGNUM
,
7230 /* Allocate and initialize new gdbarch_tdep. */
7232 static s390_gdbarch_tdep_up
7233 s390_gdbarch_tdep_alloc ()
7235 s390_gdbarch_tdep_up
tdep (new s390_gdbarch_tdep
);
7239 tdep
->abi
= ABI_NONE
;
7240 tdep
->vector_abi
= S390_VECTOR_ABI_NONE
;
7242 tdep
->gpr_full_regnum
= -1;
7243 tdep
->v0_full_regnum
= -1;
7244 tdep
->pc_regnum
= -1;
7245 tdep
->cc_regnum
= -1;
7247 tdep
->have_upper
= false;
7248 tdep
->have_linux_v1
= false;
7249 tdep
->have_linux_v2
= false;
7250 tdep
->have_tdb
= false;
7251 tdep
->have_vx
= false;
7252 tdep
->have_gs
= false;
7254 tdep
->s390_syscall_record
= NULL
;
7259 /* Set up gdbarch struct. */
7261 static struct gdbarch
*
7262 s390_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
7264 const struct target_desc
*tdesc
= info
.target_desc
;
7265 int first_pseudo_reg
, last_pseudo_reg
;
7266 static const char *const stap_register_prefixes
[] = { "%", NULL
};
7267 static const char *const stap_register_indirection_prefixes
[] = { "(",
7269 static const char *const stap_register_indirection_suffixes
[] = { ")",
7272 gdbarch
*gdbarch
= gdbarch_alloc (&info
, s390_gdbarch_tdep_alloc ());
7273 s390_gdbarch_tdep
*tdep
= gdbarch_tdep
<s390_gdbarch_tdep
> (gdbarch
);
7274 tdesc_arch_data_up tdesc_data
= tdesc_data_alloc ();
7275 info
.tdesc_data
= tdesc_data
.get ();
7277 set_gdbarch_believe_pcc_promotion (gdbarch
, 0);
7278 set_gdbarch_char_signed (gdbarch
, 0);
7280 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
7281 We can safely let them default to 128-bit, since the debug info
7282 will give the size of type actually used in each case. */
7283 set_gdbarch_long_double_bit (gdbarch
, 128);
7284 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_quad
);
7286 set_gdbarch_type_align (gdbarch
, s390_type_align
);
7289 /* Amount PC must be decremented by after a breakpoint. This is
7290 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
7292 set_gdbarch_decr_pc_after_break (gdbarch
, 2);
7293 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, s390_breakpoint::kind_from_pc
);
7294 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, s390_breakpoint::bp_from_kind
);
7296 /* Displaced stepping. */
7297 set_gdbarch_displaced_step_copy_insn (gdbarch
,
7298 s390_displaced_step_copy_insn
);
7299 set_gdbarch_displaced_step_fixup (gdbarch
, s390_displaced_step_fixup
);
7300 set_gdbarch_displaced_step_hw_singlestep (gdbarch
, s390_displaced_step_hw_singlestep
);
7301 set_gdbarch_software_single_step (gdbarch
, s390_software_single_step
);
7302 set_gdbarch_max_insn_length (gdbarch
, S390_MAX_INSTR_SIZE
);
7304 /* Prologue analysis. */
7305 set_gdbarch_skip_prologue (gdbarch
, s390_skip_prologue
);
7307 /* Register handling. */
7308 set_gdbarch_num_regs (gdbarch
, S390_NUM_REGS
);
7309 set_gdbarch_sp_regnum (gdbarch
, S390_SP_REGNUM
);
7310 set_gdbarch_fp0_regnum (gdbarch
, S390_F0_REGNUM
);
7311 set_gdbarch_guess_tracepoint_registers (gdbarch
,
7312 s390_guess_tracepoint_registers
);
7313 set_gdbarch_stab_reg_to_regnum (gdbarch
, s390_dwarf_reg_to_regnum
);
7314 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, s390_dwarf_reg_to_regnum
);
7315 set_gdbarch_value_from_register (gdbarch
, s390_value_from_register
);
7316 set_gdbarch_dwarf2_reg_piece_offset (gdbarch
, s390_dwarf2_reg_piece_offset
);
7318 /* Pseudo registers. */
7319 set_gdbarch_pseudo_register_read (gdbarch
, s390_pseudo_register_read
);
7320 set_gdbarch_deprecated_pseudo_register_write (gdbarch
,
7321 s390_pseudo_register_write
);
7322 set_tdesc_pseudo_register_name (gdbarch
, s390_pseudo_register_name
);
7323 set_tdesc_pseudo_register_type (gdbarch
, s390_pseudo_register_type
);
7324 set_tdesc_pseudo_register_reggroup_p (gdbarch
,
7325 s390_pseudo_register_reggroup_p
);
7326 set_gdbarch_ax_pseudo_register_collect (gdbarch
,
7327 s390_ax_pseudo_register_collect
);
7328 set_gdbarch_ax_pseudo_register_push_stack
7329 (gdbarch
, s390_ax_pseudo_register_push_stack
);
7330 set_gdbarch_gen_return_address (gdbarch
, s390_gen_return_address
);
7332 /* Inferior function calls. */
7333 set_gdbarch_push_dummy_call (gdbarch
, s390_push_dummy_call
);
7334 set_gdbarch_dummy_id (gdbarch
, s390_dummy_id
);
7335 set_gdbarch_frame_align (gdbarch
, s390_frame_align
);
7336 set_gdbarch_return_value (gdbarch
, s390_return_value
);
7337 set_gdbarch_get_return_buf_addr (gdbarch
, s390_get_return_buf_addr
);
7339 /* Frame handling. */
7340 /* Stack grows downward. */
7341 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
7342 set_gdbarch_stack_frame_destroyed_p (gdbarch
, s390_stack_frame_destroyed_p
);
7343 dwarf2_frame_set_init_reg (gdbarch
, s390_dwarf2_frame_init_reg
);
7344 dwarf2_frame_set_adjust_regnum (gdbarch
, s390_adjust_frame_regnum
);
7345 dwarf2_append_unwinders (gdbarch
);
7346 set_gdbarch_unwind_pc (gdbarch
, s390_unwind_pc
);
7347 set_gdbarch_unwind_sp (gdbarch
, s390_unwind_sp
);
7349 switch (info
.bfd_arch_info
->mach
)
7351 case bfd_mach_s390_31
:
7352 set_gdbarch_addr_bits_remove (gdbarch
, s390_addr_bits_remove
);
7355 case bfd_mach_s390_64
:
7356 set_gdbarch_long_bit (gdbarch
, 64);
7357 set_gdbarch_long_long_bit (gdbarch
, 64);
7358 set_gdbarch_ptr_bit (gdbarch
, 64);
7359 set_gdbarch_address_class_type_flags (gdbarch
,
7360 s390_address_class_type_flags
);
7361 set_gdbarch_address_class_type_flags_to_name (gdbarch
,
7362 s390_address_class_type_flags_to_name
);
7363 set_gdbarch_address_class_name_to_type_flags (gdbarch
,
7364 s390_address_class_name_to_type_flags
);
7368 /* SystemTap functions. */
7369 set_gdbarch_stap_register_prefixes (gdbarch
, stap_register_prefixes
);
7370 set_gdbarch_stap_register_indirection_prefixes (gdbarch
,
7371 stap_register_indirection_prefixes
);
7372 set_gdbarch_stap_register_indirection_suffixes (gdbarch
,
7373 stap_register_indirection_suffixes
);
7375 set_gdbarch_disassembler_options (gdbarch
, &s390_disassembler_options
);
7376 set_gdbarch_valid_disassembler_options (gdbarch
,
7377 disassembler_options_s390 ());
7379 /* Process record-replay */
7380 set_gdbarch_process_record (gdbarch
, s390_process_record
);
7382 /* Miscellaneous. */
7383 set_gdbarch_stap_is_single_operand (gdbarch
, s390_stap_is_single_operand
);
7384 set_gdbarch_gcc_target_options (gdbarch
, s390_gcc_target_options
);
7385 set_gdbarch_gnu_triplet_regexp (gdbarch
, s390_gnu_triplet_regexp
);
7387 /* Initialize the OSABI. */
7388 gdbarch_init_osabi (info
, gdbarch
);
7390 /* Always create a default tdesc. Otherwise commands like 'set osabi'
7391 cause GDB to crash with an internal error when the user tries to set
7392 an unsupported OSABI. */
7393 if (!tdesc_has_registers (tdesc
))
7395 if (info
.bfd_arch_info
->mach
== bfd_mach_s390_31
)
7396 tdesc
= tdesc_s390_linux32
;
7398 tdesc
= tdesc_s390x_linux64
;
7400 tdep
->tdesc
= tdesc
;
7402 /* Check any target description for validity. */
7403 if (!s390_tdesc_valid (tdep
, tdesc_data
.get ()))
7405 gdbarch_free (gdbarch
);
7409 /* Determine vector ABI. */
7412 && info
.abfd
!= NULL
7413 && info
.abfd
->format
== bfd_object
7414 && bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
7415 && bfd_elf_get_obj_attr_int (info
.abfd
, OBJ_ATTR_GNU
,
7416 Tag_GNU_S390_ABI_Vector
) == 2)
7417 tdep
->vector_abi
= S390_VECTOR_ABI_128
;
7420 /* Find a candidate among extant architectures. */
7421 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
7423 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
7425 s390_gdbarch_tdep
*tmp
7426 = gdbarch_tdep
<s390_gdbarch_tdep
> (arches
->gdbarch
);
7431 /* A program can 'choose' not to use the vector registers when they
7432 are present. Leading to the same tdesc but different tdep and
7433 thereby a different gdbarch. */
7434 if (tmp
->vector_abi
!= tdep
->vector_abi
)
7437 gdbarch_free (gdbarch
);
7438 return arches
->gdbarch
;
7441 tdesc_use_registers (gdbarch
, tdep
->tdesc
, std::move (tdesc_data
));
7442 set_gdbarch_register_name (gdbarch
, s390_register_name
);
7444 /* Assign pseudo register numbers. */
7445 first_pseudo_reg
= gdbarch_num_regs (gdbarch
);
7446 last_pseudo_reg
= first_pseudo_reg
;
7447 if (tdep
->have_upper
)
7449 tdep
->gpr_full_regnum
= last_pseudo_reg
;
7450 last_pseudo_reg
+= 16;
7454 tdep
->v0_full_regnum
= last_pseudo_reg
;
7455 last_pseudo_reg
+= 16;
7457 tdep
->pc_regnum
= last_pseudo_reg
++;
7458 tdep
->cc_regnum
= last_pseudo_reg
++;
7459 set_gdbarch_pc_regnum (gdbarch
, tdep
->pc_regnum
);
7460 set_gdbarch_num_pseudo_regs (gdbarch
, last_pseudo_reg
- first_pseudo_reg
);
7462 /* Frame handling. */
7463 frame_base_append_sniffer (gdbarch
, dwarf2_frame_base_sniffer
);
7464 frame_unwind_append_unwinder (gdbarch
, &s390_stub_frame_unwind
);
7465 frame_unwind_append_unwinder (gdbarch
, &s390_frame_unwind
);
7466 frame_base_set_default (gdbarch
, &s390_frame_base
);
7471 void _initialize_s390_tdep ();
7473 _initialize_s390_tdep ()
7475 /* Hook us into the gdbarch mechanism. */
7476 gdbarch_register (bfd_arch_s390
, s390_gdbarch_init
);
7478 initialize_tdesc_s390_linux32 ();
7479 initialize_tdesc_s390x_linux64 ();