include/elf/aarch64.h

   1 /* AArch64 ELF support for BFD.
   2
   3    Copyright (C) 2009-2025 Free Software Foundation, Inc.
   4    Contributed by ARM Ltd.
   5
   6    This file is part of GNU Binutils.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the license, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; see the file COPYING3. If not,
  20    see <http://www.gnu.org/licenses/>.  */
  21
  22 #ifndef _ELF_AARCH64_H
  23 #define _ELF_AARCH64_H
  24
  25 #include "elf/reloc-macros.h"
  26
  27 /* Processor specific program header types.  */
  28 #define PT_AARCH64_ARCHEXT      (PT_LOPROC + 0)
  29
  30 /* MTE memory tag segment type.  */
  31 #define PT_AARCH64_MEMTAG_MTE     (PT_LOPROC + 0x2)
  32
  33 /* Additional section types.  */
  34 /* Section holds attributes.  */
  35 #define SHT_AARCH64_ATTRIBUTES  (SHT_LOPROC + 3)
  36 /* Special aarch64-specific section for MTE support, as described in:
  37    https://github.com/ARM-software/abi-aa/blob/main/pauthabielf64/pauthabielf64.rst#section-types  */
  38 #define SHT_AARCH64_AUTH_RELR   (SHT_LOPROC + 4)
  39 /* Special aarch64-specific sections for MTE support, as described in:
  40    https://github.com/ARM-software/abi-aa/blob/main/memtagabielf64/memtagabielf64.rst#7section-types  */
  41 #define SHT_AARCH64_MEMTAG_GLOBALS_STATIC  (SHT_LOPROC + 7)
  42 #define SHT_AARCH64_MEMTAG_GLOBALS_DYNAMIC (SHT_LOPROC + 8)
  43
  44 /* AArch64-specific values for sh_flags.  */
  45 #define SHF_ENTRYSECT           0x10000000   /* Section contains an
  46                                                 entry point.  */
  47 #define SHF_COMDEF              0x80000000   /* Section may be multiply defined
  48                                                 in the input to a link step.  */
  49 /* Processor specific dynamic array tags.  */
  50 #define DT_AARCH64_BTI_PLT      (DT_LOPROC + 1)
  51 #define DT_AARCH64_PAC_PLT      (DT_LOPROC + 3)
  52 #define DT_AARCH64_VARIANT_PCS  (DT_LOPROC + 5)
  53
  54 /* AArch64-specific values for st_other.  */
  55 #define STO_AARCH64_VARIANT_PCS 0x80  /* Symbol may follow different call
  56                                          convention from the base PCS.  */
  57
  58 /* Relocation types.  */
  59
  60 START_RELOC_NUMBERS (elf_aarch64_reloc_type)
  61
  62 /* Null relocations.  */
  63 RELOC_NUMBER (R_AARCH64_NONE, 0) /* No reloc */
  64
  65 /* Basic data relocations.  */
  66
  67 /* .word:  (S+A) */
  68 RELOC_NUMBER (R_AARCH64_P32_ABS32, 1)
  69
  70 /* .half: (S+A) */
  71 RELOC_NUMBER (R_AARCH64_P32_ABS16, 2)
  72
  73 /* .word: (S+A-P) */
  74 RELOC_NUMBER (R_AARCH64_P32_PREL32, 3)
  75
  76 /* .half:  (S+A-P) */
  77 RELOC_NUMBER (R_AARCH64_P32_PREL16, 4)
  78
  79 /* Group relocations to create a 16, 32, 48 or 64 bit
  80    unsigned data or abs address inline.  */
  81
  82 /* MOV[ZK]:   ((S+A) >>  0) & 0xffff */
  83 RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0, 5)
  84
  85 /* MOV[ZK]:   ((S+A) >>  0) & 0xffff */
  86 RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0_NC, 6)
  87
  88 /* MOV[ZK]:   ((S+A) >> 16) & 0xffff */
  89 RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G1, 7)
  90
  91 /* Group relocations to create high part of a 16, 32, 48 or 64 bit
  92    signed data or abs address inline. Will change instruction
  93    to MOVN or MOVZ depending on sign of calculated value.  */
  94
  95 /* MOV[ZN]:   ((S+A) >>  0) & 0xffff */
  96 RELOC_NUMBER (R_AARCH64_P32_MOVW_SABS_G0, 8)
  97
  98 /* Relocations to generate 19, 21 and 33 bit PC-relative load/store
  99    addresses: PG(x) is (x & ~0xfff).  */
 100
 101 /* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
 102 RELOC_NUMBER (R_AARCH64_P32_LD_PREL_LO19, 9)
 103
 104 /* ADR:    (S+A-P) & 0x1fffff */
 105 RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_LO21, 10)
 106
 107 /* ADRH:   ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
 108 RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_PG_HI21, 11)
 109
 110 /* ADD:    (S+A) & 0xfff */
 111 RELOC_NUMBER (R_AARCH64_P32_ADD_ABS_LO12_NC, 12)
 112
 113 /* LD/ST8: (S+A) & 0xfff */
 114 RELOC_NUMBER (R_AARCH64_P32_LDST8_ABS_LO12_NC, 13)
 115
 116 /* LD/ST16: (S+A) & 0xffe */
 117 RELOC_NUMBER (R_AARCH64_P32_LDST16_ABS_LO12_NC, 14)
 118
 119 /* LD/ST32: (S+A) & 0xffc */
 120 RELOC_NUMBER (R_AARCH64_P32_LDST32_ABS_LO12_NC, 15)
 121
 122 /* LD/ST64: (S+A) & 0xff8 */
 123 RELOC_NUMBER (R_AARCH64_P32_LDST64_ABS_LO12_NC, 16)
 124
 125 /* LD/ST128: (S+A) & 0xff0 */
 126 RELOC_NUMBER (R_AARCH64_P32_LDST128_ABS_LO12_NC, 17)
 127
 128 /* Relocations for control-flow instructions.  */
 129
 130 /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff.  */
 131 RELOC_NUMBER (R_AARCH64_P32_TSTBR14, 18)
 132
 133 /* B.cond: ((S+A-P) >> 2) & 0x7ffff.  */
 134 RELOC_NUMBER (R_AARCH64_P32_CONDBR19, 19)
 135
 136 /* B:      ((S+A-P) >> 2) & 0x3ffffff.  */
 137 RELOC_NUMBER (R_AARCH64_P32_JUMP26, 20)
 138
 139 /* BL:     ((S+A-P) >> 2) & 0x3ffffff.  */
 140 RELOC_NUMBER (R_AARCH64_P32_CALL26, 21)
 141
 142 /* Group relocations to create a 16 or 32 bit PC-relative offset inline.  */
 143 RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0, 22)
 144 RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0_NC, 23)
 145 RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G1, 24)
 146
 147 RELOC_NUMBER (R_AARCH64_P32_GOT_LD_PREL19, 25)
 148 RELOC_NUMBER (R_AARCH64_P32_ADR_GOT_PAGE, 26)
 149 RELOC_NUMBER (R_AARCH64_P32_LD32_GOT_LO12_NC, 27)
 150 RELOC_NUMBER (R_AARCH64_P32_LD32_GOTPAGE_LO14, 28)
 151
 152 RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PREL21, 80)
 153 RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PAGE21, 81)
 154 RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82)
 155 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PREL21, 83)
 156 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PAGE21, 84)
 157 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_LO12_NC, 85)
 158 RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1, 87)
 159 RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0, 88)
 160 RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC, 89)
 161 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12, 90)
 162 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 91)
 163 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC, 92)
 164 RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103)
 165 RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104)
 166 RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105)
 167 RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G1, 106)
 168 RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0, 107)
 169 RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0_NC, 108)
 170 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_HI12, 109)
 171 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12, 110)
 172 RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC, 111)
 173 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12, 112)
 174 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC, 113)
 175 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12, 114)
 176 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC, 115)
 177 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12, 116)
 178 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC, 117)
 179 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12, 118)
 180 RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC, 119)
 181
 182 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD_PREL19, 122)
 183 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PREL21, 123)
 184 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PAGE21, 124)
 185 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD32_LO12_NC, 125)
 186 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADD_LO12_NC, 126)
 187 RELOC_NUMBER (R_AARCH64_P32_TLSDESC_CALL, 127)
 188
 189 /* Dynamic relocations */
 190
 191 /* Copy symbol at runtime.  */
 192 RELOC_NUMBER (R_AARCH64_P32_COPY, 180)
 193
 194 /* Create GOT entry.  */
 195 RELOC_NUMBER (R_AARCH64_P32_GLOB_DAT, 181)
 196
 197  /* Create PLT entry.  */
 198 RELOC_NUMBER (R_AARCH64_P32_JUMP_SLOT, 182)
 199
 200 /* Adjust by program base.  */
 201 RELOC_NUMBER (R_AARCH64_P32_RELATIVE, 183)
 202 RELOC_NUMBER (R_AARCH64_P32_TLS_DTPMOD, 184)
 203 RELOC_NUMBER (R_AARCH64_P32_TLS_DTPREL, 185)
 204 RELOC_NUMBER (R_AARCH64_P32_TLS_TPREL, 186)
 205 RELOC_NUMBER (R_AARCH64_P32_TLSDESC, 187)
 206 RELOC_NUMBER (R_AARCH64_P32_IRELATIVE, 188)
 207
 208 RELOC_NUMBER (R_AARCH64_NULL, 256) /* No reloc */
 209
 210 /* Basic data relocations.  */
 211
 212 /* .xword: (S+A) */
 213 RELOC_NUMBER (R_AARCH64_ABS64, 257)
 214
 215 /* .word:  (S+A) */
 216 RELOC_NUMBER (R_AARCH64_ABS32, 258)
 217
 218 /* .half: (S+A) */
 219 RELOC_NUMBER (R_AARCH64_ABS16, 259)
 220
 221 /* .xword: (S+A-P) */
 222 RELOC_NUMBER (R_AARCH64_PREL64, 260)
 223
 224 /* .word: (S+A-P) */
 225 RELOC_NUMBER (R_AARCH64_PREL32, 261)
 226
 227 /* .half:  (S+A-P) */
 228 RELOC_NUMBER (R_AARCH64_PREL16, 262)
 229
 230 /* Group relocations to create a 16, 32, 48 or 64 bit
 231    unsigned data or abs address inline.  */
 232
 233 /* MOV[ZK]:   ((S+A) >>  0) & 0xffff */
 234 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0,           263)
 235
 236 /* MOV[ZK]:   ((S+A) >>  0) & 0xffff */
 237 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0_NC, 264)
 238
 239 /* MOV[ZK]:   ((S+A) >> 16) & 0xffff */
 240 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1, 265)
 241
 242 /* MOV[ZK]:   ((S+A) >> 16) & 0xffff */
 243 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1_NC, 266)
 244
 245 /* MOV[ZK]:   ((S+A) >> 32) & 0xffff */
 246 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2, 267)
 247
 248 /* MOV[ZK]:   ((S+A) >> 32) & 0xffff */
 249 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2_NC, 268)
 250
 251 /* MOV[ZK]:   ((S+A) >> 48) & 0xffff */
 252 RELOC_NUMBER (R_AARCH64_MOVW_UABS_G3, 269)
 253
 254 /* Group relocations to create high part of a 16, 32, 48 or 64 bit
 255    signed data or abs address inline. Will change instruction
 256    to MOVN or MOVZ depending on sign of calculated value.  */
 257
 258 /* MOV[ZN]:   ((S+A) >>  0) & 0xffff */
 259 RELOC_NUMBER (R_AARCH64_MOVW_SABS_G0, 270)
 260
 261 /* MOV[ZN]:   ((S+A) >> 16) & 0xffff */
 262 RELOC_NUMBER (R_AARCH64_MOVW_SABS_G1, 271)
 263
 264 /* MOV[ZN]:   ((S+A) >> 32) & 0xffff */
 265 RELOC_NUMBER (R_AARCH64_MOVW_SABS_G2, 272)
 266
 267 /* Relocations to generate 19, 21 and 33 bit PC-relative load/store
 268    addresses: PG(x) is (x & ~0xfff).  */
 269
 270 /* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
 271 RELOC_NUMBER (R_AARCH64_LD_PREL_LO19, 273)
 272
 273 /* ADR:    (S+A-P) & 0x1fffff */
 274 RELOC_NUMBER (R_AARCH64_ADR_PREL_LO21, 274)
 275
 276 /* ADRH:   ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
 277 RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21, 275)
 278
 279 /* ADRH:   ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
 280 RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21_NC, 276)
 281
 282 /* ADD:    (S+A) & 0xfff */
 283 RELOC_NUMBER (R_AARCH64_ADD_ABS_LO12_NC, 277)
 284
 285 /* LD/ST8: (S+A) & 0xfff */
 286 RELOC_NUMBER (R_AARCH64_LDST8_ABS_LO12_NC, 278)
 287
 288 /* Relocations for control-flow instructions.  */
 289
 290 /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff.  */
 291 RELOC_NUMBER (R_AARCH64_TSTBR14, 279)
 292
 293 /* B.cond: ((S+A-P) >> 2) & 0x7ffff.  */
 294 RELOC_NUMBER (R_AARCH64_CONDBR19, 280)
 295
 296 /* 281 unused */
 297
 298 /* B:      ((S+A-P) >> 2) & 0x3ffffff.  */
 299 RELOC_NUMBER (R_AARCH64_JUMP26, 282)
 300
 301 /* BL:     ((S+A-P) >> 2) & 0x3ffffff.  */
 302 RELOC_NUMBER (R_AARCH64_CALL26, 283)
 303
 304 /* LD/ST16: (S+A) & 0xffe */
 305 RELOC_NUMBER (R_AARCH64_LDST16_ABS_LO12_NC, 284)
 306
 307 /* LD/ST32: (S+A) & 0xffc */
 308 RELOC_NUMBER (R_AARCH64_LDST32_ABS_LO12_NC, 285)
 309
 310 /* LD/ST64: (S+A) & 0xff8 */
 311 RELOC_NUMBER (R_AARCH64_LDST64_ABS_LO12_NC, 286)
 312
 313 /* Group relocations to create a 16, 32, 48, or 64 bit PC-relative
 314    offset inline.  */
 315
 316 RELOC_NUMBER (R_AARCH64_MOVW_PREL_G0, 287)
 317 RELOC_NUMBER (R_AARCH64_MOVW_PREL_G0_NC, 288)
 318 RELOC_NUMBER (R_AARCH64_MOVW_PREL_G1, 289)
 319 RELOC_NUMBER (R_AARCH64_MOVW_PREL_G1_NC, 290)
 320 RELOC_NUMBER (R_AARCH64_MOVW_PREL_G2, 291)
 321 RELOC_NUMBER (R_AARCH64_MOVW_PREL_G2_NC, 292)
 322 RELOC_NUMBER (R_AARCH64_MOVW_PREL_G3, 293)
 323
 324 /* LD/ST128: (S+A) & 0xff0 */
 325 RELOC_NUMBER (R_AARCH64_LDST128_ABS_LO12_NC, 299)
 326
 327 /* Group relocations to create a 16, 32, 48, or 64 bit GOT-relative
 328    offset inline.  */
 329
 330 RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G0, 300)
 331 RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G0_NC, 301)
 332 RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G1, 302)
 333 RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G1_NC, 303)
 334 RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G2, 304)
 335 RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G2_NC, 305)
 336 RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G3, 306)
 337
 338 /* GOT-relative data relocations.  */
 339
 340 RELOC_NUMBER (R_AARCH64_GOTREL64, 307)
 341 RELOC_NUMBER (R_AARCH64_GOTREL32, 308)
 342
 343 /* GOT-relative instruction relocations.  */
 344
 345 RELOC_NUMBER (R_AARCH64_GOT_LD_PREL19, 309)
 346 RELOC_NUMBER (R_AARCH64_LD64_GOTOFF_LO15, 310)
 347 RELOC_NUMBER (R_AARCH64_ADR_GOT_PAGE, 311)
 348 RELOC_NUMBER (R_AARCH64_LD64_GOT_LO12_NC, 312)
 349 RELOC_NUMBER (R_AARCH64_LD64_GOTPAGE_LO15, 313)
 350
 351 /* General Dynamic TLS relocations.  */
 352
 353 RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PREL21, 512)
 354 RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PAGE21, 513)
 355 RELOC_NUMBER (R_AARCH64_TLSGD_ADD_LO12_NC, 514)
 356 RELOC_NUMBER (R_AARCH64_TLSGD_MOVW_G1, 515)
 357 RELOC_NUMBER (R_AARCH64_TLSGD_MOVW_G0_NC, 516)
 358
 359 /* Local Dynamic TLS relocations.  */
 360
 361 RELOC_NUMBER (R_AARCH64_TLSLD_ADR_PREL21, 517)
 362 RELOC_NUMBER (R_AARCH64_TLSLD_ADR_PAGE21, 518)
 363 RELOC_NUMBER (R_AARCH64_TLSLD_ADD_LO12_NC, 519)
 364 RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_G1, 520)
 365 RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_G0_NC, 521)
 366 RELOC_NUMBER (R_AARCH64_TLSLD_LD_PREL19, 522)
 367 RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G2, 523)
 368 RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G1, 524)
 369 RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, 525)
 370 RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G0, 526)
 371 RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, 527)
 372 RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_HI12, 528)
 373 RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_LO12, 529)
 374 RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC, 530)
 375 RELOC_NUMBER (R_AARCH64_TLSLD_LDST8_DTPREL_LO12, 531)
 376 RELOC_NUMBER (R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC, 532)
 377 RELOC_NUMBER (R_AARCH64_TLSLD_LDST16_DTPREL_LO12, 533)
 378 RELOC_NUMBER (R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, 534)
 379 RELOC_NUMBER (R_AARCH64_TLSLD_LDST32_DTPREL_LO12, 535)
 380 RELOC_NUMBER (R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, 536)
 381 RELOC_NUMBER (R_AARCH64_TLSLD_LDST64_DTPREL_LO12, 537)
 382 RELOC_NUMBER (R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, 538)
 383
 384 /* Initial Exec TLS relocations.  */
 385
 386 RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G1, 539)
 387 RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC, 540)
 388 RELOC_NUMBER (R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21, 541)
 389 RELOC_NUMBER (R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC, 542)
 390 RELOC_NUMBER (R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, 543)
 391
 392 /* Local Exec TLS relocations.  */
 393
 394 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G2, 544)
 395 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1, 545)
 396 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, 546)
 397 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0, 547)
 398 RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0_NC, 548)
 399 RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_HI12, 549)
 400 RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12, 550)
 401 RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12_NC, 551)
 402 RELOC_NUMBER (R_AARCH64_TLSLE_LDST8_TPREL_LO12, 552)
 403 RELOC_NUMBER (R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC, 553)
 404 RELOC_NUMBER (R_AARCH64_TLSLE_LDST16_TPREL_LO12, 554)
 405 RELOC_NUMBER (R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC, 555)
 406 RELOC_NUMBER (R_AARCH64_TLSLE_LDST32_TPREL_LO12, 556)
 407 RELOC_NUMBER (R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, 557)
 408 RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12, 558)
 409 RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, 559)
 410
 411 /* TLS descriptor relocations.  */
 412
 413 RELOC_NUMBER (R_AARCH64_TLSDESC_LD_PREL19, 560)
 414 RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PREL21, 561)
 415 RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PAGE21, 562)
 416 RELOC_NUMBER (R_AARCH64_TLSDESC_LD64_LO12, 563)
 417 RELOC_NUMBER (R_AARCH64_TLSDESC_ADD_LO12, 564)
 418 RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G1, 565)
 419 RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G0_NC, 566)
 420 RELOC_NUMBER (R_AARCH64_TLSDESC_LDR, 567)
 421 RELOC_NUMBER (R_AARCH64_TLSDESC_ADD, 568)
 422 RELOC_NUMBER (R_AARCH64_TLSDESC_CALL, 569)
 423
 424 RELOC_NUMBER (R_AARCH64_TLSLE_LDST128_TPREL_LO12, 570)
 425 RELOC_NUMBER (R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC, 571)
 426 RELOC_NUMBER (R_AARCH64_TLSLD_LDST128_DTPREL_LO12, 572)
 427 RELOC_NUMBER (R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC, 573)
 428
 429 /* Dynamic relocations */
 430
 431 /* Copy symbol at runtime.  */
 432 RELOC_NUMBER (R_AARCH64_COPY, 1024)
 433
 434 /* Create GOT entry.  */
 435 RELOC_NUMBER (R_AARCH64_GLOB_DAT, 1025)
 436
 437  /* Create PLT entry.  */
 438 RELOC_NUMBER (R_AARCH64_JUMP_SLOT, 1026)
 439
 440 /* Adjust by program base.  */
 441 RELOC_NUMBER (R_AARCH64_RELATIVE, 1027)
 442 RELOC_NUMBER (R_AARCH64_TLS_DTPMOD64, 1028)
 443 RELOC_NUMBER (R_AARCH64_TLS_DTPREL64, 1029)
 444 RELOC_NUMBER (R_AARCH64_TLS_TPREL64, 1030)
 445 /* Aliasing relocs are guarded by RELOC_MACROS_GEN_FUNC
 446    so that readelf.c won't generate duplicated case
 447    statements.  */
 448 #ifndef RELOC_MACROS_GEN_FUNC
 449 RELOC_NUMBER (R_AARCH64_TLS_DTPMOD, 1028)
 450 RELOC_NUMBER (R_AARCH64_TLS_DTPREL, 1029)
 451 RELOC_NUMBER (R_AARCH64_TLS_TPREL, 1030)
 452 #endif
 453 RELOC_NUMBER (R_AARCH64_TLSDESC, 1031)
 454 RELOC_NUMBER (R_AARCH64_IRELATIVE, 1032)
 455
 456 END_RELOC_NUMBERS (R_AARCH64_end)
 457
 458 #endif /* _ELF_AARCH64_H */