include/opcode/s390.h

   1 /* s390.h -- Header file for S390 opcode table
   2    Copyright (C) 2000-2025 Free Software Foundation, Inc.
   3    Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
   4
   5    This file is part of BFD, the Binary File Descriptor library.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
  20    02110-1301, USA.  */
  21
  22 #ifndef S390_H
  23 #define S390_H
  24
  25 /* List of instruction sets variations. */
  26
  27 enum s390_opcode_mode_val
  28   {
  29     S390_OPCODE_ESA = 0,
  30     S390_OPCODE_ZARCH
  31   };
  32
  33 enum s390_opcode_cpu_val
  34   {
  35     S390_OPCODE_G5 = 0,
  36     S390_OPCODE_G6,
  37     S390_OPCODE_Z900,
  38     S390_OPCODE_Z990,
  39     S390_OPCODE_Z9_109,
  40     S390_OPCODE_Z9_EC,
  41     S390_OPCODE_Z10,
  42     S390_OPCODE_Z196,
  43     S390_OPCODE_ZEC12,
  44     S390_OPCODE_Z13,
  45     S390_OPCODE_ARCH12,
  46     S390_OPCODE_ARCH13,
  47     S390_OPCODE_ARCH14,
  48     S390_OPCODE_ARCH15,
  49     S390_OPCODE_MAXCPU
  50   };
  51
  52 /* Values defined for the flags field of a struct s390_opcode.  */
  53
  54 /* Last one or two instruction operands are optional.  */
  55 #define S390_INSTR_FLAG_OPTPARM 0x1
  56 #define S390_INSTR_FLAG_OPTPARM2 0x2
  57
  58 /* Instruction requires a specific facility.  */
  59 #define S390_INSTR_FLAG_HTM 0x4
  60 #define S390_INSTR_FLAG_VX 0x8
  61 #define S390_INSTR_FLAG_FACILITY_MASK 0xc
  62
  63 /* Instruction annotations for jump visualization.  */
  64 #define S390_INSTR_FLAG_CLASS_BRANCH 0x10
  65 #define S390_INSTR_FLAG_CLASS_RELATIVE 0x20
  66 #define S390_INSTR_FLAG_CLASS_CONDITIONAL 0x40
  67 #define S390_INSTR_FLAG_CLASS_SUBROUTINE 0x80
  68 #define S390_INSTR_FLAG_CLASS_MASK 0xf0
  69
  70 #define S390_INSTR_FLAGS_CLASS_JUMP \
  71   (S390_INSTR_FLAG_CLASS_BRANCH | S390_INSTR_FLAG_CLASS_RELATIVE)
  72
  73 #define S390_INSTR_FLAGS_CLASS_CONDJUMP \
  74   (S390_INSTR_FLAG_CLASS_BRANCH | S390_INSTR_FLAG_CLASS_RELATIVE \
  75    | S390_INSTR_FLAG_CLASS_CONDITIONAL)
  76
  77 #define S390_INSTR_FLAGS_CLASS_JUMPSR \
  78   (S390_INSTR_FLAG_CLASS_BRANCH | S390_INSTR_FLAG_CLASS_RELATIVE \
  79    | S390_INSTR_FLAG_CLASS_SUBROUTINE)
  80
  81 /* Instruction is an .insn pseudo-mnemonic.  */
  82 #define S390_INSTR_FLAG_PSEUDO_MNEMONIC 0x100
  83
  84 /* The opcode table is an array of struct s390_opcode.  */
  85
  86 struct s390_opcode
  87   {
  88     /* The opcode name (mnemonic).  */
  89     const char * name;
  90
  91     /* The opcode itself.  Those bits which will be filled in with
  92        operands are zeroes.  */
  93     unsigned char opcode[6];
  94
  95     /* The opcode mask.  This is used by the disassembler.  This is a
  96        mask containing ones indicating those bits which must match the
  97        opcode field, and zeroes indicating those bits which need not
  98        match (and are presumably filled in by operands).  */
  99     unsigned char mask[6];
 100
 101     /* The opcode length in bytes. */
 102     int oplen;
 103
 104     /* An array of operand codes.  Each code is an index into the
 105        operand table.  They appear in the order which the operands must
 106        appear in assembly code, and are terminated by a zero.  */
 107     unsigned char operands[6];
 108
 109     /* Bitmask of execution modes this opcode is available for.  */
 110     unsigned int modes;
 111
 112     /* First cpu this opcode is available for.  */
 113     enum s390_opcode_cpu_val min_cpu;
 114
 115     /* Instruction specific flags.  */
 116     unsigned int flags;
 117
 118     /* Instruction description.  */
 119     const char * description;
 120   };
 121
 122 /* The table itself is sorted by major opcode number, and is otherwise
 123    in the order in which the disassembler should consider
 124    instructions.  */
 125 extern const struct s390_opcode s390_opcodes[];
 126 extern const int                s390_num_opcodes;
 127
 128 /* A opcode format table for the .insn pseudo mnemonic.  */
 129 extern const struct s390_opcode s390_opformats[];
 130 extern const int                s390_num_opformats;
 131
 132 /* The operands table is an array of struct s390_operand.  */
 133
 134 struct s390_operand
 135   {
 136     /* The number of bits in the operand.  */
 137     int bits;
 138
 139     /* How far the operand is left shifted in the instruction.  */
 140     int shift;
 141
 142     /* One bit syntax flags.  */
 143     unsigned long flags;
 144   };
 145
 146 /* Elements in the table are retrieved by indexing with values from
 147    the operands field of the s390_opcodes table.  */
 148
 149 extern const struct s390_operand s390_operands[];
 150
 151 /* Values defined for the flags field of a struct s390_operand.  */
 152
 153 /* This operand names a register.  The disassembler uses this to print
 154    register names with a leading 'r'.  */
 155 #define S390_OPERAND_GPR 0x1
 156
 157 /* This operand names a floating point register.  The disassembler
 158    prints these with a leading 'f'. */
 159 #define S390_OPERAND_FPR 0x2
 160
 161 /* This operand names an access register.  The disassembler
 162    prints these with a leading 'a'.  */
 163 #define S390_OPERAND_AR 0x4
 164
 165 /* This operand names a control register.  The disassembler
 166    prints these with a leading 'c'.  */
 167 #define S390_OPERAND_CR 0x8
 168
 169 /* This operand is a displacement.  */
 170 #define S390_OPERAND_DISP 0x10
 171
 172 /* This operand names a base register.  */
 173 #define S390_OPERAND_BASE 0x20
 174
 175 /* This operand names an index register, it can be skipped.  */
 176 #define S390_OPERAND_INDEX 0x40
 177
 178 /* This operand is a relative branch displacement.  The disassembler
 179    prints these symbolically if possible.  */
 180 #define S390_OPERAND_PCREL 0x80
 181
 182 /* This operand takes signed values.  */
 183 #define S390_OPERAND_SIGNED 0x100
 184
 185 /* This operand is a length.  */
 186 #define S390_OPERAND_LENGTH 0x200
 187
 188 /* The operand needs to be a valid GP or FP register pair.  */
 189 #define S390_OPERAND_REG_PAIR 0x400
 190
 191 /* This operand names a vector register.  The disassembler uses this
 192    to print register names with a leading 'v'.  */
 193 #define S390_OPERAND_VR 0x800
 194
 195 #define S390_OPERAND_CP16 0x1000
 196
 197 #endif /* S390_H */