sim/ppc/std-config.h

   1 /*  This file is part of the program psim.
   2
   3     Copyright 1994, 1995, 2002 Andrew Cagney <cagney@highland.com.au>
   4
   5     This program is free software; you can redistribute it and/or modify
   6     it under the terms of the GNU General Public License as published by
   7     the Free Software Foundation; either version 3 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14
  15     You should have received a copy of the GNU General Public License
  16     along with this program; if not, see <http://www.gnu.org/licenses/>.
  17
  18     */
  19
  20
  21 #ifndef _PSIM_CONFIG_H_
  22 #define _PSIM_CONFIG_H_
  23
  24 #include "bfd.h"
  25
  26 /* endianness of the host/target:
  27
  28    If the build process is aware (at compile time) of the endianness
  29    of the host/target it is able to eliminate slower generic endian
  30    handling code.
  31
  32    Possible values are BFD_ENDIAN_UNKNOWN, BFD_ENDIAN_LITTLE,
  33    BFD_ENDIAN_BIG.  */
  34
  35 #ifdef WORDS_BIGENDIAN
  36 # define HOST_BYTE_ORDER BFD_ENDIAN_BIG
  37 #else
  38 # define HOST_BYTE_ORDER BFD_ENDIAN_LITTLE
  39 #endif
  40
  41 #ifndef WITH_TARGET_BYTE_ORDER
  42 #define WITH_TARGET_BYTE_ORDER          BFD_ENDIAN_UNKNOWN
  43 #endif
  44
  45 extern enum bfd_endian current_target_byte_order;
  46 #define CURRENT_TARGET_BYTE_ORDER \
  47   (WITH_TARGET_BYTE_ORDER != BFD_ENDIAN_UNKNOWN \
  48    ? WITH_TARGET_BYTE_ORDER : current_target_byte_order)
  49
  50
  51 /* PowerPC XOR endian.
  52
  53    In addition to the above, the simulator can support the PowerPC's
  54    horrible XOR endian mode.  This feature makes it possible to
  55    control the endian mode of a processor using the MSR. */
  56
  57 #ifndef WITH_XOR_ENDIAN
  58 #define WITH_XOR_ENDIAN         8
  59 #endif
  60
  61
  62 /* SMP support:
  63
  64    Sets a limit on the number of processors that can be simulated.  If
  65    WITH_SMP is set to zero (0), the simulator is restricted to
  66    suporting only on processor (and as a consequence leaves the SMP
  67    code out of the build process).
  68
  69    The actual number of processors is taken from the device
  70    /options/smp@<nr-cpu> */
  71
  72 #ifndef WITH_SMP
  73 #define WITH_SMP                        5
  74 #endif
  75 #if WITH_SMP
  76 #define MAX_NR_PROCESSORS               WITH_SMP
  77 #else
  78 #define MAX_NR_PROCESSORS               1
  79 #endif
  80
  81
  82 /* Word size of target:
  83
  84    Set these according to your target requirements.  At this
  85    point in time, I've only compiled (not run) for a 64bit and never
  86    built for a 64bit host.  This will always remain a compile time
  87    option */
  88
  89 #ifndef WITH_TARGET_WORD_BITSIZE
  90 #define WITH_TARGET_WORD_BITSIZE        32 /* compiled only */
  91 #endif
  92
  93 #ifndef WITH_TARGET_ADDRESS_BITSIZE
  94 #define WITH_TARGET_ADDRESS_BITSIZE     WITH_TARGET_WORD_BITSIZE
  95 #endif
  96
  97 #ifndef WITH_TARGET_CELL_BITSIZE
  98 #define WITH_TARGET_CELL_BITSIZE        WITH_TARGET_WORD_BITSIZE
  99 #endif
 100
 101
 102 /* Program environment:
 103
 104    Three environments are available - UEA (user), VEA (virtual) and
 105    OEA (perating).  The former two are environment that users would
 106    expect to see (VEA includes things like coherency and the time
 107    base) while OEA is what an operating system expects to see.  By
 108    setting these to specific values, the build process is able to
 109    eliminate non relevant environment code
 110
 111    CURRENT_ENVIRONMENT specifies which of vea or oea is required for
 112    the current runtime. */
 113
 114 #define ALL_ENVIRONMENT                 0
 115 #define USER_ENVIRONMENT                1
 116 #define VIRTUAL_ENVIRONMENT             2
 117 #define OPERATING_ENVIRONMENT           3
 118
 119 extern int current_environment;
 120 #define CURRENT_ENVIRONMENT (WITH_ENVIRONMENT \
 121                              ? WITH_ENVIRONMENT \
 122                              : current_environment)
 123
 124
 125 /* Optional VEA/OEA code:
 126
 127    The below, required for the OEA model may also be included in the
 128    VEA model however, as far as I can tell only make things
 129    slower... */
 130
 131
 132 /* Events.  Devices modeling real H/W need to be able to efficiently
 133    schedule things to do at known times in the future.  The event
 134    queue implements this.  Unfortunately this adds the need to check
 135    for any events once each full instruction cycle. */
 136
 137 #define WITH_EVENTS                     (WITH_ENVIRONMENT != USER_ENVIRONMENT)
 138
 139
 140 /* Time base:
 141
 142    The PowerPC architecture includes the addition of both a time base
 143    register and a decrement timer.  Like events adds to the overhead
 144    of of some instruction cycles. */
 145
 146 #ifndef WITH_TIME_BASE
 147 #define WITH_TIME_BASE                  (WITH_ENVIRONMENT != USER_ENVIRONMENT)
 148 #endif
 149
 150
 151 /* Callback/Default Memory.
 152
 153    Core includes a builtin memory type (raw_memory) that is
 154    implemented using an array.  raw_memory does not require any
 155    additional functions etc.
 156
 157    Callback memory is where the core calls a core device for the data
 158    it requires.
 159
 160    Default memory is an extenstion of this where for addresses that do
 161    not map into either a callback or core memory range a default map
 162    can be used.
 163
 164    The OEA model uses callback memory for devices and default memory
 165    for buses.
 166
 167    The VEA model uses callback memory to capture `page faults'.
 168
 169    While it may be possible to eliminate callback/default memory (and
 170    hence also eliminate an additional test per memory fetch) it
 171    probably is not worth the effort.
 172
 173    BTW, while raw_memory could have been implemented as a callback,
 174    profiling has shown that there is a biger win (at least for the
 175    x86) in eliminating a function call for the most common
 176    (raw_memory) case. */
 177
 178 #define WITH_CALLBACK_MEMORY            1
 179
 180
 181 /* Alignment:
 182
 183    The PowerPC may or may not handle miss aligned transfers.  An
 184    implementation normally handles miss aligned transfers in big
 185    endian mode but generates an exception in little endian mode.
 186
 187    This model.  Instead allows both little and big endian modes to
 188    either take exceptions or handle miss aligned transfers.
 189
 190    If 0 is specified then for big-endian mode miss aligned accesses
 191    are permitted (NONSTRICT_ALIGNMENT) while in little-endian mode the
 192    processor will fault on them (STRICT_ALIGNMENT). */
 193
 194 #define NONSTRICT_ALIGNMENT             1
 195 #define STRICT_ALIGNMENT                2
 196
 197 #ifndef WITH_ALIGNMENT
 198 #define WITH_ALIGNMENT                  0
 199 #endif
 200
 201 extern int current_alignment;
 202 #define CURRENT_ALIGNMENT (WITH_ALIGNMENT \
 203                            ? WITH_ALIGNMENT \
 204                            : current_alignment)
 205
 206
 207 /* Floating point suport:
 208
 209    Still under development. */
 210
 211 #define SOFT_FLOATING_POINT             1
 212 #define HARD_FLOATING_POINT             2
 213
 214 #ifndef WITH_FLOATING_POINT
 215 #define WITH_FLOATING_POINT             HARD_FLOATING_POINT
 216 #endif
 217 extern int current_floating_point;
 218 #define CURRENT_FLOATING_POINT (WITH_FLOATING_POINT \
 219                                 ? WITH_FLOATING_POINT \
 220                                 : current_floating_point)
 221
 222
 223 /* Debugging:
 224
 225    Control the inclusion of debugging code. */
 226
 227 /* include monitoring code */
 228
 229 #define MONITOR_INSTRUCTION_ISSUE       1
 230 #define MONITOR_LOAD_STORE_UNIT         2
 231 #ifndef WITH_MON
 232 #define WITH_MON                        (MONITOR_LOAD_STORE_UNIT \
 233                                          | MONITOR_INSTRUCTION_ISSUE)
 234 #endif
 235
 236 /* Current CPU model (models are in the generated models.h include file)  */
 237 #ifndef WITH_MODEL
 238 #define WITH_MODEL                      0
 239 #endif
 240
 241 #define CURRENT_MODEL (WITH_MODEL       \
 242                        ? WITH_MODEL     \
 243                        : current_model)
 244
 245 #ifndef WITH_DEFAULT_MODEL
 246 #define WITH_DEFAULT_MODEL              DEFAULT_MODEL
 247 #endif
 248
 249 #define MODEL_ISSUE_IGNORE              (-1)
 250 #define MODEL_ISSUE_PROCESS             1
 251
 252 #ifndef WITH_MODEL_ISSUE
 253 #define WITH_MODEL_ISSUE                0
 254 #endif
 255
 256 extern int current_model_issue;
 257 #define CURRENT_MODEL_ISSUE (WITH_MODEL_ISSUE   \
 258                              ? WITH_MODEL_ISSUE \
 259                              : current_model_issue)
 260
 261 /* Whether or not input/output just uses stdio, or uses printf_filtered for
 262    output, and polling input for input.  */
 263
 264 #define DONT_USE_STDIO                  2
 265 #define DO_USE_STDIO                    1
 266
 267 extern int current_stdio;
 268 #define CURRENT_STDIO (WITH_STDIO       \
 269                        ? WITH_STDIO     \
 270                        : current_stdio)
 271
 272
 273
 274 /* INLINE CODE SELECTION:
 275
 276    GCC -O3 attempts to inline any function or procedure in scope.  The
 277    options below facilitate fine grained control over what is and what
 278    isn't made inline.  For instance it can control things down to a
 279    specific modules static routines.  Doing this allows the compiler
 280    to both eliminate the overhead of function calls and (as a
 281    consequence) also eliminate further dead code.
 282
 283    On a CISC (x86) I've found that I can achieve an order of magnitude
 284    speed improvement (x3-x5).  In the case of RISC (sparc) while the
 285    performance gain isn't as great it is still significant.
 286
 287    Each module is controlled by the macro <module>_INLINE which can
 288    have the values described below
 289
 290        0  Do not inline any thing for the given module
 291
 292    The following additional values are `bit fields' and can be
 293    combined.
 294
 295       REVEAL_MODULE:
 296
 297          Include the C file for the module into the file being compiled
 298          but do not make the functions within the module inline.
 299
 300          While of no apparent benefit, this makes it possible for the
 301          included module, when compiled to inline its calls to what
 302          would otherwize be external functions.
 303
 304       INLINE_MODULE:
 305
 306          Make external functions within the module `inline'.  Thus if
 307          the module is included into a file being compiled, calls to
 308          its funtions can be eliminated. 2 implies 1.
 309
 310       INLINE_LOCALS:
 311
 312          Make internal (static) functions within the module `inline'.
 313
 314    The following abreviations are available:
 315
 316       INCLUDE_MODULE == (REVEAL_MODULE | INLINE_MODULE)
 317
 318       ALL_C_INLINE == (REVEAL_MODULE | INLINE_MODULE | INLINE_LOCALS)
 319
 320    In addition to this, modules have been put into two categories.
 321
 322          Simple modules - eg sim-endian.h bits.h
 323
 324          Because these modules are small and simple and do not have
 325          any complex interpendencies they are configured, if
 326          <module>_INLINE is so enabled, to inline themselves in all
 327          modules that include those files.
 328
 329          For the default build, this is a real win as all byte
 330          conversion and bit manipulation functions are inlined.
 331
 332          Complex modules - the rest
 333
 334          These are all handled using the files inline.h and inline.c.
 335          psim.c includes the above which in turn include any remaining
 336          code.
 337
 338    IMPLEMENTATION:
 339
 340    The inline ability is enabled by prefixing every data / function
 341    declaration and definition with one of the following:
 342
 343
 344        INLINE_<module>
 345
 346        Prefix to any global function that is a candidate for being
 347        inline.
 348
 349        values - `', `static', `static INLINE'
 350
 351
 352        EXTERN_<module>
 353
 354        Prefix to any global data structures for the module.  Global
 355        functions that are not to be inlined shall also be prefixed
 356        with this.
 357
 358        values - `', `static', `static'
 359
 360
 361        STATIC_INLINE_<module>
 362
 363        Prefix to any local (static) function that is a candidate for
 364        being made inline.
 365
 366        values - `static', `static INLINE'
 367
 368
 369        static
 370
 371        Prefix all local data structures.  Local functions that are not
 372        to be inlined shall also be prefixed with this.
 373
 374        values - `static', `static'
 375
 376        nb: will not work for modules that are being inlined for every
 377        use (white lie).
 378
 379
 380        extern
 381        #ifndef _INLINE_C_
 382        #endif
 383
 384        Prefix to any declaration of a global object (function or
 385        variable) that should not be inlined and should have only one
 386        definition.  The #ifndef wrapper goes around the definition
 387        proper to ensure that only one copy is generated.
 388
 389        nb: this will not work when a module is being inlined for every
 390        use.
 391
 392
 393        STATIC_<module>
 394
 395        Replaced by either `static' or `EXTERN_MODULE'.
 396
 397
 398    REALITY CHECK:
 399
 400    This is not for the faint hearted.  I've seen GCC get up to 500mb
 401    trying to compile what this can create.
 402
 403    Some of the modules do not yet implement the WITH_INLINE_STATIC
 404    option.  Instead they use the macro STATIC_INLINE to control their
 405    local function.
 406
 407    Because of the way that GCC parses __attribute__(), the macro's
 408    need to be adjacent to the function name rather than at the start
 409    of the line vis:
 410
 411         int STATIC_INLINE_MODULE f(void);
 412         void INLINE_MODULE *g(void);
 413
 414    */
 415
 416 #include "../common/sim-inline.h"
 417 #define REVEAL_MODULE                   H_REVEALS_MODULE
 418 #define INLINE_MODULE                   C_REVEALS_MODULE
 419 #define INCLUDE_MODULE                  (INLINE_MODULE | REVEAL_MODULE)
 420
 421 /* Your compilers inline reserved word */
 422
 423 #ifndef INLINE
 424 #if defined(__GNUC__) && defined(__OPTIMIZE__)
 425 #define INLINE __inline__
 426 #else
 427 #define INLINE /*inline*/
 428 #endif
 429 #endif
 430
 431
 432 /* Default prefix for static functions */
 433
 434 #ifndef STATIC_INLINE
 435 #define STATIC_INLINE static INLINE
 436 #endif
 437
 438 /* Default macro to simplify control several of key the inlines */
 439
 440 #ifndef DEFAULT_INLINE
 441 #define DEFAULT_INLINE                  INLINE_LOCALS
 442 #endif
 443
 444 /* Code that converts between hosts and target byte order.  Used on
 445    every memory access (instruction and data).  See sim-endian.h for
 446    additional byte swapping configuration information.  This module
 447    can inline for all callers */
 448
 449 #ifndef SIM_ENDIAN_INLINE
 450 #define SIM_ENDIAN_INLINE               (DEFAULT_INLINE ? ALL_C_INLINE : 0)
 451 #endif
 452
 453 /* Low level bit manipulation routines. This module can inline for all
 454    callers */
 455
 456 #ifndef BITS_INLINE
 457 #define BITS_INLINE                     (DEFAULT_INLINE ? ALL_C_INLINE : 0)
 458 #endif
 459
 460 /* Code that gives access to various CPU internals such as registers.
 461    Used every time an instruction is executed */
 462
 463 #ifndef CPU_INLINE
 464 #define CPU_INLINE                      (DEFAULT_INLINE ? ALL_C_INLINE : 0)
 465 #endif
 466
 467 /* Code that translates between an effective and real address.  Used
 468    by every load or store. */
 469
 470 #ifndef VM_INLINE
 471 #define VM_INLINE                       DEFAULT_INLINE
 472 #endif
 473
 474 /* Code that loads/stores data to/from the memory data structure.
 475    Used by every load or store */
 476
 477 #ifndef CORE_INLINE
 478 #define CORE_INLINE                     DEFAULT_INLINE
 479 #endif
 480
 481 /* Code to check for and process any events scheduled in the future.
 482    Called once per instruction cycle */
 483
 484 #ifndef EVENTS_INLINE
 485 #define EVENTS_INLINE                   (DEFAULT_INLINE ? ALL_C_INLINE : 0)
 486 #endif
 487
 488 /* Code monotoring the processors performance.  It counts events on
 489    every instruction cycle */
 490
 491 #ifndef MON_INLINE
 492 #define MON_INLINE                      (DEFAULT_INLINE ? ALL_C_INLINE : 0)
 493 #endif
 494
 495 /* Code called on the rare occasions that an interrupt occures. */
 496
 497 #ifndef INTERRUPTS_INLINE
 498 #define INTERRUPTS_INLINE               DEFAULT_INLINE
 499 #endif
 500
 501 /* Code called on the rare occasion that either gdb or the device tree
 502    need to manipulate a register within a processor */
 503
 504 #ifndef REGISTERS_INLINE
 505 #define REGISTERS_INLINE                DEFAULT_INLINE
 506 #endif
 507
 508 /* Code called on the rare occasion that a processor is manipulating
 509    real hardware instead of RAM.
 510
 511    Also, most of the functions in devices.c are always called through
 512    a jump table. */
 513
 514 #ifndef DEVICE_INLINE
 515 #define DEVICE_INLINE                   (DEFAULT_INLINE ? INLINE_LOCALS : 0)
 516 #endif
 517
 518 /* Code called used while the device tree is being built.
 519
 520    Inlining this is of no benefit */
 521
 522 #ifndef TREE_INLINE
 523 #define TREE_INLINE                     (DEFAULT_INLINE ? INLINE_LOCALS : 0)
 524 #endif
 525
 526 /* Code called whenever information on a Special Purpose Register is
 527    required.  Called by the mflr/mtlr pseudo instructions */
 528
 529 #ifndef SPREG_INLINE
 530 #define SPREG_INLINE                    DEFAULT_INLINE
 531 #endif
 532
 533 /* Functions modeling the semantics of each instruction.  Two cases to
 534    consider, firstly of idecode is implemented with a switch then this
 535    allows the idecode function to inline each semantic function
 536    (avoiding a call).  The second case is when idecode is using a
 537    table, even then while the semantic functions can't be inlined,
 538    setting it to one still enables each semantic function to inline
 539    anything they call (if that code is marked for being inlined).
 540
 541    WARNING: you need lots (like 200mb of swap) of swap.  Setting this
 542    to 1 is useful when using a table as it enables the sematic code to
 543    inline all of their called functions */
 544
 545 #ifndef SEMANTICS_INLINE
 546 #define SEMANTICS_INLINE                (DEFAULT_INLINE & ~INLINE_MODULE)
 547 #endif
 548
 549 /* When using the instruction cache, code to decode an instruction and
 550    install it into the cache.  Normally called when ever there is a
 551    miss in the instruction cache. */
 552
 553 #ifndef ICACHE_INLINE
 554 #define ICACHE_INLINE                   (DEFAULT_INLINE & ~INLINE_MODULE)
 555 #endif
 556
 557 /* General functions called by semantics functions but part of the
 558    instruction table.  Although called by the semantic functions the
 559    frequency of calls is low.  Consequently the need to inline this
 560    code is reduced. */
 561
 562 #ifndef SUPPORT_INLINE
 563 #define SUPPORT_INLINE                  INLINE_LOCALS
 564 #endif
 565
 566 /* Model specific code used in simulating functional units.  Note, it actaully
 567    pays NOT to inline the PowerPC model functions (at least on the x86).  This
 568    is because if it is inlined, each PowerPC instruction gets a separate copy
 569    of the code, which is not friendly to the cache.  */
 570
 571 #ifndef MODEL_INLINE
 572 #define MODEL_INLINE                    (DEFAULT_INLINE & ~INLINE_MODULE)
 573 #endif
 574
 575 /* Code to print out what options we were compiled with.  Because this
 576    is called at process startup, it doesn't have to be inlined, but
 577    if it isn't brought in and the model routines are inline, the model
 578    routines will be pulled in twice.  */
 579
 580 #ifndef OPTIONS_INLINE
 581 #define OPTIONS_INLINE                  MODEL_INLINE
 582 #endif
 583
 584 /* idecode acts as the hub of the system, everything else is imported
 585    into this file */
 586
 587 #ifndef IDECOCE_INLINE
 588 #define IDECODE_INLINE                  INLINE_LOCALS
 589 #endif
 590
 591 /* psim, isn't actually inlined */
 592
 593 #ifndef PSIM_INLINE
 594 #define PSIM_INLINE                     INLINE_LOCALS
 595 #endif
 596
 597 /* Code to emulate os or rom compatibility.  This code is called via a
 598    table and hence there is little benefit in making it inline */
 599
 600 #ifndef OS_EMUL_INLINE
 601 #define OS_EMUL_INLINE                  0
 602 #endif
 603
 604 #endif /* _PSIM_CONFIG_H */