sim/m32r/Makefile.in

   1
   2 # Makefile template for Configure for the m32r simulator
   3 # Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
   4 # Contributed by Cygnus Support.
   5 #
   6 # This file is part of GDB, the GNU debugger.
   7 #
   8 # This program is free software; you can redistribute it and/or modify
   9 # it under the terms of the GNU General Public License as published by
  10 # the Free Software Foundation; either version 2 of the License, or
  11 # (at your option) any later version.
  12 #
  13 # This program is distributed in the hope that it will be useful,
  14 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 # GNU General Public License for more details.
  17 #
  18 # You should have received a copy of the GNU General Public License along
  19 # with this program; if not, write to the Free Software Foundation, Inc.,
  20 # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  21
  22 ## COMMON_PRE_CONFIG_FRAG
  23
  24 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
  25 # start-sanitize-m32rx
  26 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
  27 # end-sanitize-m32rx
  28
  29 CONFIG_DEVICES = dv-sockser.o
  30 CONFIG_DEVICES =
  31
  32 SIM_OBJS = \
  33         $(SIM_NEW_COMMON_OBJS) \
  34         sim-cpu.o \
  35         sim-hload.o \
  36         sim-hrw.o \
  37         sim-model.o \
  38         sim-reg.o \
  39         cgen-utils.o cgen-trace.o cgen-scache.o \
  40         cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
  41         sim-if.o arch.o \
  42         $(M32R_OBJS) \
  43         $(start-sanitize-m32rx) \
  44         $(M32RX_OBJS) \
  45         $(end-sanitize-m32rx) \
  46         traps.o devices.o \
  47         $(CONFIG_DEVICES)
  48
  49 # Extra headers included by sim-main.h.
  50 SIM_EXTRA_DEPS = \
  51         $(CGEN_INCLUDE_DEPS) \
  52         arch.h cpuall.h m32r-sim.h cpu-opc.h
  53
  54 SIM_EXTRA_CFLAGS =
  55
  56 SIM_RUN_OBJS = nrun.o
  57 SIM_EXTRA_CLEAN = m32r-clean
  58
  59 # This selects the m32r newlib/libgloss syscall definitions.
  60 NL_TARGET = -DNL_TARGET_m32r
  61
  62 ## COMMON_POST_CONFIG_FRAG
  63
  64 arch = m32r
  65
  66 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
  67
  68 arch.o: arch.c $(SIM_MAIN_DEPS)
  69
  70 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
  71 devices.o: devices.c $(SIM_MAIN_DEPS)
  72
  73 # M32R objs
  74
  75 M32RBF_INCLUDE_DEPS = \
  76         $(CGEN_MAIN_CPU_DEPS) \
  77         cpu.h decode.h eng.h
  78
  79 m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
  80
  81 # FIXME: Use of `mono' is wip.
  82 mloop.c eng.h: stamp-mloop
  83 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
  84         $(SHELL) $(srccom)/genmloop.sh \
  85                 -mono -fast -pbb -switch sem-switch.c \
  86                 -cpu m32rbf -infile $(srcdir)/mloop.in
  87         $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
  88         $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
  89         touch stamp-mloop
  90 mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
  91
  92 cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
  93 decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
  94 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
  95 model.o: model.c $(M32RBF_INCLUDE_DEPS)
  96
  97 # start-sanitize-m32rx
  98 # M32RX objs
  99
 100 M32RXF_INCLUDE_DEPS = \
 101         $(CGEN_MAIN_CPU_DEPS) \
 102         cpux.h decodex.h engx.h
 103
 104 m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
 105
 106 # FIXME: Use of `mono' is wip.
 107 mloopx.c engx.h: stamp-xmloop
 108 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
 109         $(SHELL) $(srccom)/genmloop.sh \
 110                 -mono -no-fast -pbb -parallel -switch semx-switch.c \
 111                 -cpu m32rxf -infile $(srcdir)/mloopx.in
 112         $(SHELL) $(srcroot)/move-if-change eng.hin engx.h
 113         $(SHELL) $(srcroot)/move-if-change mloop.cin mloopx.c
 114         touch stamp-xmloop
 115 mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
 116
 117 cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
 118 decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
 119 semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
 120 modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
 121 # end-sanitize-m32rx
 122
 123 m32r-clean:
 124         rm -f mloop.c eng.h stamp-arch stamp-cpu stamp-mloop
 125 # start-sanitize-m32rx
 126         rm -f mloopx.c engx.h stamp-xcpu stamp-xmloop
 127 # end-sanitize-m32rx
 128         rm -f tmp-*
 129
 130 # start-sanitize-cygnus
 131 # cgen support, enable with --enable-cgen-maint
 132 CGEN_MAINT = ; @true
 133 # The following line is commented in or out depending upon --enable-cgen-maint.
 134 @CGEN_MAINT@CGEN_MAINT =
 135
 136 stamp-arch: $(CGEN_MAIN_SCM) $(CGEN_ARCH_SCM) $(srccgen)/m32r.cpu
 137         $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all
 138         touch stamp-arch
 139 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
 140         @true
 141
 142 stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
 143         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 144           cpu=m32rbf mach=m32r SUFFIX= \
 145           FLAGS="with-scache,with-profile fn" \
 146           EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
 147         touch stamp-cpu
 148 cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
 149         @true
 150 # end-sanitize-cygnus
 151
 152 # start-sanitize-m32rx
 153 stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
 154         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 155           cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"
 156         touch stamp-xcpu
 157 cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
 158         @true
 159 # end-sanitize-m32rx