opcodes/i386-dis-evex-prefix.h

   1   /* PREFIX_EVEX_0F5B */
   2   {
   3     { VEX_W_TABLE (EVEX_W_0F5B_P_0) },
   4     { "%XEvcvttp%XS2dq", { XM, EXx, EXxEVexS }, 0 },
   5     { "%XEvcvtp%XS2dq", { XM, EXx, EXxEVexR }, 0 },
   6   },
   7   /* PREFIX_EVEX_0F6F */
   8   {
   9     { Bad_Opcode },
  10     { VEX_W_TABLE (EVEX_W_0F6F_P_1) },
  11     { VEX_W_TABLE (EVEX_W_0F6F_P_2) },
  12     { VEX_W_TABLE (EVEX_W_0F6F_P_3) },
  13   },
  14   /* PREFIX_EVEX_0F70 */
  15   {
  16     { Bad_Opcode },
  17     { "%XEvpshufhw",    { XM, EXx, Ib }, 0 },
  18     { VEX_W_TABLE (EVEX_W_0F70_P_2) },
  19     { "%XEvpshuflw",    { XM, EXx, Ib }, 0 },
  20   },
  21   /* PREFIX_EVEX_0F78 */
  22   {
  23     { VEX_W_TABLE (EVEX_W_0F78_P_0) },
  24     { "vcvttss2usi",    { Gdq, EXd, EXxEVexS }, 0 },
  25     { VEX_W_TABLE (EVEX_W_0F78_P_2) },
  26     { "vcvttsd2usi",    { Gdq, EXq, EXxEVexS }, 0 },
  27   },
  28   /* PREFIX_EVEX_0F79 */
  29   {
  30     { VEX_W_TABLE (EVEX_W_0F79_P_0) },
  31     { "vcvtss2usi",     { Gdq, EXd, EXxEVexR }, 0 },
  32     { VEX_W_TABLE (EVEX_W_0F79_P_2) },
  33     { "vcvtsd2usi",     { Gdq, EXq, EXxEVexR }, 0 },
  34   },
  35   /* PREFIX_EVEX_0F7A */
  36   {
  37     { Bad_Opcode },
  38     { VEX_W_TABLE (EVEX_W_0F7A_P_1) },
  39     { VEX_W_TABLE (EVEX_W_0F7A_P_2) },
  40     { VEX_W_TABLE (EVEX_W_0F7A_P_3) },
  41   },
  42   /* PREFIX_EVEX_0F7B */
  43   {
  44     { Bad_Opcode },
  45     { "vcvtusi2ssY{%LQ|}",      { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
  46     { VEX_W_TABLE (EVEX_W_0F7B_P_2) },
  47     { "vcvtusi2sdY{%LQ|}",      { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
  48   },
  49   /* PREFIX_EVEX_0F7E */
  50   {
  51     { Bad_Opcode },
  52     { VEX_W_TABLE (EVEX_W_0F7E_P_1) },
  53     { VEX_LEN_TABLE (VEX_LEN_0F7E_P_2) },
  54   },
  55   /* PREFIX_EVEX_0F7F */
  56   {
  57     { Bad_Opcode },
  58     { VEX_W_TABLE (EVEX_W_0F7F_P_1) },
  59     { VEX_W_TABLE (EVEX_W_0F7F_P_2) },
  60     { VEX_W_TABLE (EVEX_W_0F7F_P_3) },
  61   },
  62   /* PREFIX_EVEX_0FC2 */
  63   {
  64     { "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
  65     { "vcmps%XS",       { MaskG, VexScalar, EXd, EXxEVexS, CMP }, 0 },
  66     { "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
  67     { "vcmps%XD",       { MaskG, VexScalar, EXq, EXxEVexS, CMP }, 0 },
  68   },
  69   /* PREFIX_EVEX_0FE6 */
  70   {
  71     { Bad_Opcode },
  72     { VEX_W_TABLE (EVEX_W_0FE6_P_1) },
  73     { "%XEvcvttp%XD2dq%XY", { XMxmmq, EXx, EXxEVexS }, 0 },
  74     { "%XEvcvtp%XD2dq%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
  75   },
  76   /* PREFIX_EVEX_0F3810 */
  77   {
  78     { Bad_Opcode },
  79     { VEX_W_TABLE (EVEX_W_0F3810_P_1) },
  80     { VEX_W_TABLE (EVEX_W_0F3810_P_2) },
  81   },
  82   /* PREFIX_EVEX_0F3811 */
  83   {
  84     { Bad_Opcode },
  85     { VEX_W_TABLE (EVEX_W_0F3811_P_1) },
  86     { VEX_W_TABLE (EVEX_W_0F3811_P_2) },
  87   },
  88   /* PREFIX_EVEX_0F3812 */
  89   {
  90     { Bad_Opcode },
  91     { VEX_W_TABLE (EVEX_W_0F3812_P_1) },
  92     { VEX_W_TABLE (EVEX_W_0F3812_P_2) },
  93   },
  94   /* PREFIX_EVEX_0F3813 */
  95   {
  96     { Bad_Opcode },
  97     { VEX_W_TABLE (EVEX_W_0F3813_P_1) },
  98     { "%XEvcvtph2p%XS", { XM, EXxmmq, EXxEVexS }, 0 },
  99   },
 100   /* PREFIX_EVEX_0F3814 */
 101   {
 102     { Bad_Opcode },
 103     { VEX_W_TABLE (EVEX_W_0F3814_P_1) },
 104     { "vprorv%DQ",      { XM, Vex, EXx }, 0 },
 105   },
 106   /* PREFIX_EVEX_0F3815 */
 107   {
 108     { Bad_Opcode },
 109     { VEX_W_TABLE (EVEX_W_0F3815_P_1) },
 110     { "vprolv%DQ",      { XM, Vex, EXx }, 0 },
 111   },
 112   /* PREFIX_EVEX_0F3820 */
 113   {
 114     { Bad_Opcode },
 115     { VEX_W_TABLE (EVEX_W_0F3820_P_1) },
 116     { "%XEvpmovsxbw",   { XM, EXxmmq }, 0 },
 117   },
 118   /* PREFIX_EVEX_0F3821 */
 119   {
 120     { Bad_Opcode },
 121     { VEX_W_TABLE (EVEX_W_0F3821_P_1) },
 122     { "%XEvpmovsxbd",   { XM, EXxmmqd }, 0 },
 123   },
 124   /* PREFIX_EVEX_0F3822 */
 125   {
 126     { Bad_Opcode },
 127     { VEX_W_TABLE (EVEX_W_0F3822_P_1) },
 128     { "%XEvpmovsxbq",   { XM, EXxmmdw }, 0 },
 129   },
 130   /* PREFIX_EVEX_0F3823 */
 131   {
 132     { Bad_Opcode },
 133     { VEX_W_TABLE (EVEX_W_0F3823_P_1) },
 134     { "%XEvpmovsxwd",   { XM, EXxmmq }, 0 },
 135   },
 136   /* PREFIX_EVEX_0F3824 */
 137   {
 138     { Bad_Opcode },
 139     { VEX_W_TABLE (EVEX_W_0F3824_P_1) },
 140     { "%XEvpmovsxwq",   { XM, EXxmmqd }, 0 },
 141   },
 142   /* PREFIX_EVEX_0F3825 */
 143   {
 144     { Bad_Opcode },
 145     { VEX_W_TABLE (EVEX_W_0F3825_P_1) },
 146     { VEX_W_TABLE (EVEX_W_0F3825_P_2) },
 147   },
 148   /* PREFIX_EVEX_0F3826 */
 149   {
 150     { Bad_Opcode },
 151     { "vptestnm%BW",    { MaskG, Vex, EXx }, 0 },
 152     { "vptestm%BW",     { MaskG, Vex, EXx }, 0 },
 153   },
 154   /* PREFIX_EVEX_0F3827 */
 155   {
 156     { Bad_Opcode },
 157     { "vptestnm%DQ",    { MaskG, Vex, EXx }, 0 },
 158     { "vptestm%DQ",     { MaskG, Vex, EXx }, 0 },
 159   },
 160   /* PREFIX_EVEX_0F3828 */
 161   {
 162     { Bad_Opcode },
 163     { "vpmovm2Y%BW",    { XM, MaskR }, 0 },
 164     { VEX_W_TABLE (EVEX_W_0F3828_P_2) },
 165   },
 166   /* PREFIX_EVEX_0F3829 */
 167   {
 168     { Bad_Opcode },
 169     { "vpmov%BW2mY",    { MaskG, Ux }, 0 },
 170     { VEX_W_TABLE (EVEX_W_0F3829_P_2) },
 171   },
 172   /* PREFIX_EVEX_0F382A */
 173   {
 174     { Bad_Opcode },
 175     { VEX_W_TABLE (EVEX_W_0F382A_P_1) },
 176     { VEX_W_TABLE (EVEX_W_0F382A_P_2) },
 177   },
 178   /* PREFIX_EVEX_0F3830 */
 179   {
 180     { Bad_Opcode },
 181     { VEX_W_TABLE (EVEX_W_0F3830_P_1) },
 182     { "%XEvpmovzxbw",   { XM, EXxmmq }, 0 },
 183   },
 184   /* PREFIX_EVEX_0F3831 */
 185   {
 186     { Bad_Opcode },
 187     { VEX_W_TABLE (EVEX_W_0F3831_P_1) },
 188     { "%XEvpmovzxbd",   { XM, EXxmmqd }, 0 },
 189   },
 190   /* PREFIX_EVEX_0F3832 */
 191   {
 192     { Bad_Opcode },
 193     { VEX_W_TABLE (EVEX_W_0F3832_P_1) },
 194     { "%XEvpmovzxbq",   { XM, EXxmmdw }, 0 },
 195   },
 196   /* PREFIX_EVEX_0F3833 */
 197   {
 198     { Bad_Opcode },
 199     { VEX_W_TABLE (EVEX_W_0F3833_P_1) },
 200     { "%XEvpmovzxwd",   { XM, EXxmmq }, 0 },
 201   },
 202   /* PREFIX_EVEX_0F3834 */
 203   {
 204     { Bad_Opcode },
 205     { VEX_W_TABLE (EVEX_W_0F3834_P_1) },
 206     { "%XEvpmovzxwq",   { XM, EXxmmqd }, 0 },
 207   },
 208   /* PREFIX_EVEX_0F3835 */
 209   {
 210     { Bad_Opcode },
 211     { VEX_W_TABLE (EVEX_W_0F3835_P_1) },
 212     { VEX_W_TABLE (EVEX_W_0F3835_P_2) },
 213   },
 214   /* PREFIX_EVEX_0F3838 */
 215   {
 216     { Bad_Opcode },
 217     { "vpmovm2Y%DQ",    { XM, MaskR }, 0 },
 218     { "%XEvpminsb",     { XM, Vex, EXx }, 0 },
 219   },
 220   /* PREFIX_EVEX_0F3839 */
 221   {
 222     { Bad_Opcode },
 223     { "vpmov%DQ2mY",    { MaskG, Ux }, 0 },
 224     { "%XEvpmins%DQ",   { XM, Vex, EXx }, 0 },
 225   },
 226   /* PREFIX_EVEX_0F383A */
 227   {
 228     { Bad_Opcode },
 229     { VEX_W_TABLE (EVEX_W_0F383A_P_1) },
 230     { "%XEvpminuw",     { XM, Vex, EXx }, 0 },
 231   },
 232   /* PREFIX_EVEX_0F3852 */
 233   {
 234     { "vdpphp%XS",      { XM, Vex, EXx }, 0 },
 235     { "vdpbf16p%XS",    { XM, Vex, EXx }, 0 },
 236     { VEX_W_TABLE (VEX_W_0F3852) },
 237     { "vp4dpws%XSd",    { XM, Vex, Mxmm }, 0 },
 238   },
 239   /* PREFIX_EVEX_0F3853 */
 240   {
 241     { Bad_Opcode },
 242     { Bad_Opcode },
 243     { VEX_W_TABLE (VEX_W_0F3853) },
 244     { "vp4dpws%XSds",   { XM, Vex, Mxmm }, 0 },
 245   },
 246   /* PREFIX_EVEX_0F3868 */
 247   {
 248     { Bad_Opcode },
 249     { Bad_Opcode },
 250     { Bad_Opcode },
 251     { "vp2intersectY%DQ", { MaskG, Vex, EXx, EXxEVexS }, 0 },
 252   },
 253   /* PREFIX_EVEX_0F3872 */
 254   {
 255     { Bad_Opcode },
 256     { "vcvtnep%XS2bf16%XY", { XMxmmq, EXx }, 0 },
 257     { VEX_W_TABLE (EVEX_W_0F3872_P_2) },
 258     { "vcvtne2p%XS2bf16", { XM, Vex, EXx}, 0 },
 259   },
 260   /* PREFIX_EVEX_0F3874 */
 261   {
 262     { "vcvtbiasp%XH2bf8",       { XMxmmq, Vex, EXxh }, 0 },
 263     { "vcvtnep%XH2bf8%XY",      { XMxmmq, EXxh }, 0 },
 264     { Bad_Opcode },
 265     { "vcvtne2p%XH2bf8",        { XM, Vex, EXxh }, 0 },
 266   },
 267   /* PREFIX_EVEX_0F389A */
 268   {
 269     { Bad_Opcode },
 270     { Bad_Opcode },
 271     { "%XEvfmsub132p%XW",       { XM, Vex, EXx, EXxEVexR }, 0 },
 272     { "v4fmaddp%XS",    { XM, Vex, Mxmm }, 0 },
 273   },
 274   /* PREFIX_EVEX_0F389B */
 275   {
 276     { Bad_Opcode },
 277     { Bad_Opcode },
 278     { "%XEvfmsub132s%XW",       { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 },
 279     { "v4fmadds%XS",    { XMScalar, VexScalar, Mxmm }, 0 },
 280   },
 281   /* PREFIX_EVEX_0F38AA */
 282   {
 283     { Bad_Opcode },
 284     { Bad_Opcode },
 285     { "%XEvfmsub213p%XW",       { XM, Vex, EXx, EXxEVexR }, 0 },
 286     { "v4fnmaddp%XS",   { XM, Vex, Mxmm }, 0 },
 287   },
 288   /* PREFIX_EVEX_0F38AB */
 289   {
 290     { Bad_Opcode },
 291     { Bad_Opcode },
 292     { "%XEvfmsub213s%XW",       { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 },
 293     { "v4fnmadds%XS",   { XMScalar, VexScalar, Mxmm }, 0 },
 294   },
 295   /* PREFIX_EVEX_0F3A08 */
 296   {
 297     { "vrndscalep%XH",  { XM, EXxh, EXxEVexS, Ib }, 0 },
 298     { Bad_Opcode },
 299     { "vrndscalep%XS",  { XM, EXx, EXxEVexS, Ib }, 0 },
 300   },
 301   /* PREFIX_EVEX_0F3A0A */
 302   {
 303     { "vrndscales%XH",  { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
 304     { Bad_Opcode },
 305     { "vrndscales%XS",  { XMScalar, VexScalar, EXd, EXxEVexS, Ib }, 0 },
 306   },
 307   /* PREFIX_EVEX_0F3A26 */
 308   {
 309     { "vgetmantp%XH",     { XM, EXxh, EXxEVexS, Ib }, 0 },
 310     { Bad_Opcode },
 311     { "vgetmantp%XW",   { XM, EXx, EXxEVexS, Ib }, 0 },
 312   },
 313   /* PREFIX_EVEX_0F3A27 */
 314   {
 315     { "vgetmants%XH",     { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
 316     { Bad_Opcode },
 317     { "vgetmants%XW",   { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 },
 318   },
 319   /* PREFIX_EVEX_0F3A42_W_0 */
 320   {
 321     { Bad_Opcode },
 322     { "%XEvmpsadbw",    { XM, Vex, EXx, Ib }, 0 },
 323     { "vdbpsadbw",      { XM, Vex, EXx, Ib }, 0 },
 324   },
 325   /* PREFIX_EVEX_0F3A56 */
 326   {
 327     { "vreducep%XH",      { XM, EXxh, EXxEVexS, Ib }, 0 },
 328     { Bad_Opcode },
 329     { "vreducep%XW",    { XM, EXx, EXxEVexS, Ib }, 0 },
 330   },
 331   /* PREFIX_EVEX_0F3A57 */
 332   {
 333     { "vreduces%XH",      { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
 334     { Bad_Opcode },
 335     { "vreduces%XW",    { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 },
 336   },
 337   /* PREFIX_EVEX_0F3A66 */
 338   {
 339     { "vfpclassp%XH%XZ",  { MaskG, EXxh, Ib }, 0 },
 340     { Bad_Opcode },
 341     { "vfpclassp%XW%XZ",    { MaskG, EXx, Ib }, 0 },
 342   },
 343   /* PREFIX_EVEX_0F3A67 */
 344   {
 345     { "vfpclasss%XH",     { MaskG, EXw, Ib }, 0 },
 346     { Bad_Opcode },
 347     { "vfpclasss%XW",   { MaskG, EXdq, Ib }, 0 },
 348   },
 349   /* PREFIX_EVEX_0F3AC2 */
 350   {
 351     { "vcmpp%XH", { MaskG, Vex, EXxh, EXxEVexS, CMP }, 0 },
 352     { "vcmps%XH", { MaskG, VexScalar, EXw, EXxEVexS, CMP }, 0 },
 353   },
 354   /* PREFIX_EVEX_MAP4_4x */
 355   {
 356     { "%CFcmov%CCS",    { VexGv, { CFCMOV_Fixup, 0 }, { CFCMOV_Fixup, 1 } }, 0 },
 357     { Bad_Opcode },
 358     { "%CFcmov%CCS",    { VexGv, { CFCMOV_Fixup, 0 }, { CFCMOV_Fixup, 1 } }, 0 },
 359     { "set%ZU%CC",      { Eb }, 0 },
 360   },
 361   /* PREFIX_EVEX_MAP4_F0 */
 362   {
 363     { "crc32A", { Gdq, Eb }, 0 },
 364     { "invept", { Gm, Mo }, 0 },
 365   },
 366   /* PREFIX_EVEX_MAP4_F1 */
 367   {
 368     { "crc32Q", { Gdq, Ev }, 0 },
 369     { "invvpid", { Gm, Mo }, 0 },
 370     { "crc32Q", { Gdq, Ev }, 0 },
 371   },
 372   /* PREFIX_EVEX_MAP4_F2 */
 373   {
 374     { Bad_Opcode },
 375     { "invpcid", { Gm, M }, 0 },
 376   },
 377   /* PREFIX_EVEX_MAP4_F8 */
 378   {
 379     { Bad_Opcode },
 380     { MOD_TABLE (MOD_EVEX_MAP4_F8_P_1) },
 381     { "movdir64b", { Gva, M }, 0 },
 382     { MOD_TABLE (MOD_EVEX_MAP4_F8_P_3) },
 383   },
 384   /* PREFIX_EVEX_MAP5_10 */
 385   {
 386     { Bad_Opcode },
 387     { "vmovs%XH", { XMScalar, VexScalarR, EXw }, 0 },
 388   },
 389   /* PREFIX_EVEX_MAP5_11 */
 390   {
 391     { Bad_Opcode },
 392     { "vmovs%XH", { EXwS, VexScalarR, XMScalar }, 0 },
 393   },
 394   /* PREFIX_EVEX_MAP5_18 */
 395   {
 396     { "vcvtbiasp%XH2hf8",       { XMxmmq, Vex, EXxh }, 0 },
 397     { "vcvtnep%XH2hf8%XY",      { XMxmmq, EXxh }, 0 },
 398     { Bad_Opcode },
 399     { "vcvtne2p%XH2hf8",        { XM, Vex, EXxh }, 0 },
 400   },
 401   /* PREFIX_EVEX_MAP5_1B */
 402   {
 403     { "vcvtbiasp%XH2hf8s",      { XMxmmq, Vex, EXxh }, 0 },
 404     { "vcvtnep%XH2hf8s%XY",     { XMxmmq, EXxh }, 0 },
 405     { Bad_Opcode },
 406     { "vcvtne2p%XH2hf8s",       { XM, Vex, EXxh }, 0 },
 407   },
 408   /* PREFIX_EVEX_MAP5_1D */
 409   {
 410     { "vcvtss2s%XH",      { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
 411     { Bad_Opcode },
 412     { "vcvtps2p%XHx%XY",  { XMxmmq, EXx, EXxEVexR }, 0 },
 413   },
 414   /* PREFIX_EVEX_MAP5_1E */
 415   {
 416     { Bad_Opcode },
 417     { Bad_Opcode },
 418     { Bad_Opcode },
 419     { "vcvthf82p%XH",   { XM, EXxmmq }, 0 },
 420   },
 421   /* PREFIX_EVEX_MAP5_2A */
 422   {
 423     { Bad_Opcode },
 424     { "vcvtsi2shY{%LQ|}",        { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
 425   },
 426   /* PREFIX_EVEX_MAP5_2C */
 427   {
 428     { Bad_Opcode },
 429     { "vcvttsh2si",     { Gdq, EXw, EXxEVexS }, 0 },
 430   },
 431   /* PREFIX_EVEX_MAP5_2D */
 432   {
 433     { Bad_Opcode },
 434     { "vcvtsh2si",      { Gdq, EXw, EXxEVexR }, 0 },
 435   },
 436   /* PREFIX_EVEX_MAP5_2E */
 437   {
 438     { "vucomisY%XH",       { XMScalar, EXw, EXxEVexS }, 0 },
 439   },
 440   /* PREFIX_EVEX_MAP5_2F */
 441   {
 442     { "vcomisY%XH",        { XMScalar, EXw, EXxEVexS }, 0 },
 443   },
 444   /* PREFIX_EVEX_MAP5_51 */
 445   {
 446     { "vsqrtp%XH",        { XM, EXxh, EXxEVexR }, 0 },
 447     { "vsqrts%XH",        { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
 448   },
 449   /* PREFIX_EVEX_MAP5_58 */
 450   {
 451     { "vaddp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
 452     { "vadds%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
 453   },
 454   /* PREFIX_EVEX_MAP5_59 */
 455   {
 456     { "vmulp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
 457     { "vmuls%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
 458   },
 459   /* PREFIX_EVEX_MAP5_5A */
 460   {
 461     { "vcvtp%XH2pd",    { XM, EXxmmqdh, EXxEVexS }, 0 },
 462     { "vcvts%XH2sd",    { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
 463     { "vcvtp%XD2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
 464     { "vcvts%XD2sh",    { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
 465   },
 466   /* PREFIX_EVEX_MAP5_5B */
 467   {
 468     { VEX_W_TABLE (EVEX_W_MAP5_5B_P_0) },
 469     { "vcvttp%XH2dq",   { XM, EXxmmqh, EXxEVexS }, 0 },
 470     { "vcvtp%XH2dq",    { XM, EXxmmqh, EXxEVexR }, 0 },
 471   },
 472   /* PREFIX_EVEX_MAP5_5C */
 473   {
 474     { "vsubp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
 475     { "vsubs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
 476   },
 477   /* PREFIX_EVEX_MAP5_5D */
 478   {
 479     { "vminp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 },
 480     { "vmins%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
 481   },
 482   /* PREFIX_EVEX_MAP5_5E */
 483   {
 484     { "vdivp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
 485     { "vdivs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
 486   },
 487   /* PREFIX_EVEX_MAP5_5F */
 488   {
 489     { "vmaxp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 },
 490     { "vmaxs%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
 491   },
 492   /* PREFIX_EVEX_MAP5_74 */
 493   {
 494     { "vcvtbiasp%XH2bf8s",      { XMxmmq, Vex, EXxh }, 0 },
 495     { "vcvtnep%XH2bf8s%XY",     { XMxmmq, EXxh }, 0 },
 496     { Bad_Opcode },
 497     { "vcvtne2p%XH2bf8s",       { XM, Vex, EXxh }, 0 },
 498   },
 499   /* PREFIX_EVEX_MAP5_78 */
 500   {
 501     { "vcvttp%XH2udq",  { XM, EXxmmqh, EXxEVexS }, 0 },
 502     { "vcvttsh2usi",    { Gdq, EXw, EXxEVexS }, 0 },
 503     { "vcvttp%XH2uqq",  { XM, EXxmmqdh, EXxEVexS }, 0 },
 504   },
 505   /* PREFIX_EVEX_MAP5_79 */
 506   {
 507     { "vcvtp%XH2udq",   { XM, EXxmmqh, EXxEVexR }, 0 },
 508     { "vcvtsh2usi",     { Gdq, EXw, EXxEVexR }, 0 },
 509     { "vcvtp%XH2uqq",   { XM, EXxmmqdh, EXxEVexR }, 0 },
 510   },
 511   /* PREFIX_EVEX_MAP5_7A */
 512   {
 513     { Bad_Opcode },
 514     { Bad_Opcode },
 515     { "vcvttp%XH2qq",   { XM, EXxmmqdh, EXxEVexS }, 0 },
 516     { VEX_W_TABLE (EVEX_W_MAP5_7A_P_3) },
 517   },
 518   /* PREFIX_EVEX_MAP5_7B */
 519   {
 520     { Bad_Opcode },
 521     { "vcvtusi2shY{%LQ|}",       { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
 522     { "vcvtp%XH2qq",    { XM, EXxmmqdh, EXxEVexR }, 0 },
 523   },
 524   /* PREFIX_EVEX_MAP5_7C */
 525   {
 526     { "vcvttp%XH2uw",   { XM, EXxh, EXxEVexS }, 0 },
 527     { Bad_Opcode },
 528     { "vcvttp%XH2w",    { XM, EXxh, EXxEVexS }, 0 },
 529   },
 530   /* PREFIX_EVEX_MAP5_7D */
 531   {
 532     { "vcvtp%XH2uw",    { XM, EXxh, EXxEVexR }, 0 },
 533     { "vcvtw2p%XH",     { XM, EXxh, EXxEVexR }, 0 },
 534     { "vcvtp%XH2w",     { XM, EXxh, EXxEVexR }, 0 },
 535     { "vcvtuw2p%XH",    { XM, EXxh, EXxEVexR }, 0 },
 536   },
 537   /* PREFIX_EVEX_MAP6_13 */
 538   {
 539     { "vcvts%XH2ss",    { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
 540     { Bad_Opcode },
 541     { "vcvtp%XH2psx",   { XM, EXxmmqh, EXxEVexS }, 0 },
 542   },
 543   /* PREFIX_EVEX_MAP6_56 */
 544   {
 545     { Bad_Opcode },
 546     { "vfmaddcp%XH",      { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 },
 547     { Bad_Opcode },
 548     { "vfcmaddcp%XH",     { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 },
 549   },
 550   /* PREFIX_EVEX_MAP6_57 */
 551   {
 552     { Bad_Opcode },
 553     { "vfmaddcs%XH",      { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
 554     { Bad_Opcode },
 555     { "vfcmaddcs%XH",     { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
 556   },
 557   /* PREFIX_EVEX_MAP6_D6 */
 558   {
 559     { Bad_Opcode },
 560     { "vfmulcp%XH",     { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 },
 561     { Bad_Opcode },
 562     { "vfcmulcp%XH",    { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 },
 563   },
 564   /* PREFIX_EVEX_MAP6_D7 */
 565   {
 566     { Bad_Opcode },
 567     { "vfmulcs%XH",     { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
 568     { Bad_Opcode },
 569     { "vfcmulcs%XH",    { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
 570   },