[binutils, ARM, 4/16] BF insns infrastructure with array of relocs in struct arm_it
[binutils-gdb.git] / sim / bfin / proc_list.def
blob445b05cf1186765c26818197baf07e755875d60f
1 /* Blackfin processor list
3 Copyright (C) 2005-2019 Free Software Foundation, Inc.
4 Contributed by Analog Devices, Inc.
6 This file is part of simulators.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 /* First entry is the default model. */
22 P(537)
23 P(504)
24 P(506)
25 P(512)
26 P(514)
27 P(516)
28 P(518)
29 P(522)
30 P(523)
31 P(524)
32 P(525)
33 P(526)
34 P(527)
35 P(531)
36 P(532)
37 P(533)
38 P(534)
39 /*P(535)*/
40 P(536)
41 P(538)
42 P(539)
43 P(542)
44 P(544)
45 P(547)
46 P(548)
47 P(549)
48 P(561)
49 P(592)
50 P(000)