opcodes/epiphany-dis.c

   1 /* Disassembler interface for targets using CGEN. -*- C -*-
   2    CGEN: Cpu tools GENerator
   3
   4    THIS FILE IS MACHINE GENERATED WITH CGEN.
   5    - the resultant file is machine generated, cgen-dis.in isn't
   6
   7    Copyright (C) 1996-2015 Free Software Foundation, Inc.
   8
   9    This file is part of libopcodes.
  10
  11    This library is free software; you can redistribute it and/or modify
  12    it under the terms of the GNU General Public License as published by
  13    the Free Software Foundation; either version 3, or (at your option)
  14    any later version.
  15
  16    It is distributed in the hope that it will be useful, but WITHOUT
  17    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  18    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  19    License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software Foundation, Inc.,
  23    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
  24
  25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  26    Keep that in mind.  */
  27
  28 #include "sysdep.h"
  29 #include <stdio.h>
  30 #include "ansidecl.h"
  31 #include "dis-asm.h"
  32 #include "bfd.h"
  33 #include "symcat.h"
  34 #include "libiberty.h"
  35 #include "epiphany-desc.h"
  36 #include "epiphany-opc.h"
  37 #include "opintl.h"
  38
  39 /* Default text to print if an instruction isn't recognized.  */
  40 #define UNKNOWN_INSN_MSG _("*unknown*")
  41
  42 static void print_normal
  43   (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
  44 static void print_address
  45   (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
  46 static void print_keyword
  47   (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
  48 static void print_insn_normal
  49   (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
  50 static int print_insn
  51   (CGEN_CPU_DESC, bfd_vma,  disassemble_info *, bfd_byte *, unsigned);
  52 static int default_print_insn
  53   (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
  54 static int read_insn
  55   (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
  56    unsigned long *);
  57 \f
  58 /* -- disassembler routines inserted here.  */
  59
  60 /* -- dis.c */
  61
  62 #define CGEN_PRINT_INSN epiphany_print_insn
  63
  64 static int
  65 epiphany_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
  66 {
  67   bfd_byte buf[CGEN_MAX_INSN_SIZE];
  68   int buflen;
  69   int status;
  70
  71   info->bytes_per_chunk = 2;
  72
  73   /* Attempt to read the base part of the insn.  */
  74   info->bytes_per_line = buflen = cd->base_insn_bitsize / 8;
  75   status = (*info->read_memory_func) (pc, buf, buflen, info);
  76
  77   /* Try again with the minimum part, if min < base.  */
  78   if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
  79     {
  80       info->bytes_per_line = buflen = cd->min_insn_bitsize / 8;
  81       status = (*info->read_memory_func) (pc, buf, buflen, info);
  82     }
  83
  84   if (status != 0)
  85     {
  86       (*info->memory_error_func) (status, pc, info);
  87       return -1;
  88     }
  89
  90   return print_insn (cd, pc, info, buf, buflen);
  91 }
  92
  93
  94 static void
  95 print_postindex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  96                  void * dis_info,
  97                  long value,
  98                  unsigned int attrs ATTRIBUTE_UNUSED,
  99                  bfd_vma pc ATTRIBUTE_UNUSED,
 100                  int length ATTRIBUTE_UNUSED)
 101 {
 102   disassemble_info *info = (disassemble_info *) dis_info;
 103   (*info->fprintf_func) (info->stream, value ? "-" : "+");
 104 }
 105
 106 static void
 107 print_simm_not_reg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 108                     void * dis_info,
 109                     long value,
 110                     unsigned int attrs ATTRIBUTE_UNUSED,
 111                     bfd_vma pc ATTRIBUTE_UNUSED,
 112                     int length ATTRIBUTE_UNUSED)
 113 {
 114   print_address (cd, dis_info, value, attrs, pc, length);
 115 }
 116
 117 static void
 118 print_uimm_not_reg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 119                     void * dis_info,
 120                     unsigned long value,
 121                     unsigned int attrs ATTRIBUTE_UNUSED,
 122                     bfd_vma pc ATTRIBUTE_UNUSED,
 123                     int length ATTRIBUTE_UNUSED)
 124 {
 125   disassemble_info *info = (disassemble_info *)dis_info;
 126
 127   if (value & 0x800)
 128     (*info->fprintf_func) (info->stream, "-");
 129
 130   value &= 0x7ff;
 131   print_address (cd, dis_info, value, attrs, pc, length);
 132 }
 133
 134 \f
 135 /* -- */
 136
 137 void epiphany_cgen_print_operand
 138   (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
 139
 140 /* Main entry point for printing operands.
 141    XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
 142    of dis-asm.h on cgen.h.
 143
 144    This function is basically just a big switch statement.  Earlier versions
 145    used tables to look up the function to use, but
 146    - if the table contains both assembler and disassembler functions then
 147      the disassembler contains much of the assembler and vice-versa,
 148    - there's a lot of inlining possibilities as things grow,
 149    - using a switch statement avoids the function call overhead.
 150
 151    This function could be moved into `print_insn_normal', but keeping it
 152    separate makes clear the interface between `print_insn_normal' and each of
 153    the handlers.  */
 154
 155 void
 156 epiphany_cgen_print_operand (CGEN_CPU_DESC cd,
 157                            int opindex,
 158                            void * xinfo,
 159                            CGEN_FIELDS *fields,
 160                            void const *attrs ATTRIBUTE_UNUSED,
 161                            bfd_vma pc,
 162                            int length)
 163 {
 164   disassemble_info *info = (disassemble_info *) xinfo;
 165
 166   switch (opindex)
 167     {
 168     case EPIPHANY_OPERAND_DIRECTION :
 169       print_postindex (cd, info, fields->f_addsubx, 0, pc, length);
 170       break;
 171     case EPIPHANY_OPERAND_DISP11 :
 172       print_uimm_not_reg (cd, info, fields->f_disp11, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 173       break;
 174     case EPIPHANY_OPERAND_DISP3 :
 175       print_normal (cd, info, fields->f_disp3, 0, pc, length);
 176       break;
 177     case EPIPHANY_OPERAND_DPMI :
 178       print_postindex (cd, info, fields->f_subd, 0, pc, length);
 179       break;
 180     case EPIPHANY_OPERAND_FRD :
 181       print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rd, 0);
 182       break;
 183     case EPIPHANY_OPERAND_FRD6 :
 184       print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
 185       break;
 186     case EPIPHANY_OPERAND_FRM :
 187       print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rm, 0);
 188       break;
 189     case EPIPHANY_OPERAND_FRM6 :
 190       print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rm6, 0|(1<<CGEN_OPERAND_VIRTUAL));
 191       break;
 192     case EPIPHANY_OPERAND_FRN :
 193       print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rn, 0);
 194       break;
 195     case EPIPHANY_OPERAND_FRN6 :
 196       print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
 197       break;
 198     case EPIPHANY_OPERAND_IMM16 :
 199       print_address (cd, info, fields->f_imm16, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 200       break;
 201     case EPIPHANY_OPERAND_IMM8 :
 202       print_address (cd, info, fields->f_imm8, 0|(1<<CGEN_OPERAND_RELAX), pc, length);
 203       break;
 204     case EPIPHANY_OPERAND_RD :
 205       print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rd, 0);
 206       break;
 207     case EPIPHANY_OPERAND_RD6 :
 208       print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
 209       break;
 210     case EPIPHANY_OPERAND_RM :
 211       print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rm, 0);
 212       break;
 213     case EPIPHANY_OPERAND_RM6 :
 214       print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rm6, 0|(1<<CGEN_OPERAND_VIRTUAL));
 215       break;
 216     case EPIPHANY_OPERAND_RN :
 217       print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rn, 0);
 218       break;
 219     case EPIPHANY_OPERAND_RN6 :
 220       print_keyword (cd, info, & epiphany_cgen_opval_gr_names, fields->f_rn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
 221       break;
 222     case EPIPHANY_OPERAND_SD :
 223       print_keyword (cd, info, & epiphany_cgen_opval_cr_names, fields->f_sd, 0);
 224       break;
 225     case EPIPHANY_OPERAND_SD6 :
 226       print_keyword (cd, info, & epiphany_cgen_opval_cr_names, fields->f_sd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
 227       break;
 228     case EPIPHANY_OPERAND_SDDMA :
 229       print_keyword (cd, info, & epiphany_cgen_opval_crdma_names, fields->f_sd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
 230       break;
 231     case EPIPHANY_OPERAND_SDMEM :
 232       print_keyword (cd, info, & epiphany_cgen_opval_crmem_names, fields->f_sd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
 233       break;
 234     case EPIPHANY_OPERAND_SDMESH :
 235       print_keyword (cd, info, & epiphany_cgen_opval_crmesh_names, fields->f_sd6, 0|(1<<CGEN_OPERAND_VIRTUAL));
 236       break;
 237     case EPIPHANY_OPERAND_SHIFT :
 238       print_normal (cd, info, fields->f_shift, 0, pc, length);
 239       break;
 240     case EPIPHANY_OPERAND_SIMM11 :
 241       print_simm_not_reg (cd, info, fields->f_sdisp11, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 242       break;
 243     case EPIPHANY_OPERAND_SIMM24 :
 244       print_address (cd, info, fields->f_simm24, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 245       break;
 246     case EPIPHANY_OPERAND_SIMM3 :
 247       print_simm_not_reg (cd, info, fields->f_sdisp3, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_RELAX), pc, length);
 248       break;
 249     case EPIPHANY_OPERAND_SIMM8 :
 250       print_address (cd, info, fields->f_simm8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 251       break;
 252     case EPIPHANY_OPERAND_SN :
 253       print_keyword (cd, info, & epiphany_cgen_opval_cr_names, fields->f_sn, 0);
 254       break;
 255     case EPIPHANY_OPERAND_SN6 :
 256       print_keyword (cd, info, & epiphany_cgen_opval_cr_names, fields->f_sn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
 257       break;
 258     case EPIPHANY_OPERAND_SNDMA :
 259       print_keyword (cd, info, & epiphany_cgen_opval_crdma_names, fields->f_sn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
 260       break;
 261     case EPIPHANY_OPERAND_SNMEM :
 262       print_keyword (cd, info, & epiphany_cgen_opval_crmem_names, fields->f_sn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
 263       break;
 264     case EPIPHANY_OPERAND_SNMESH :
 265       print_keyword (cd, info, & epiphany_cgen_opval_crmesh_names, fields->f_sn6, 0|(1<<CGEN_OPERAND_VIRTUAL));
 266       break;
 267     case EPIPHANY_OPERAND_SWI_NUM :
 268       print_uimm_not_reg (cd, info, fields->f_trap_num, 0, pc, length);
 269       break;
 270     case EPIPHANY_OPERAND_TRAPNUM6 :
 271       print_normal (cd, info, fields->f_trap_num, 0, pc, length);
 272       break;
 273
 274     default :
 275       /* xgettext:c-format */
 276       fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
 277                opindex);
 278     abort ();
 279   }
 280 }
 281
 282 cgen_print_fn * const epiphany_cgen_print_handlers[] =
 283 {
 284   print_insn_normal,
 285 };
 286
 287
 288 void
 289 epiphany_cgen_init_dis (CGEN_CPU_DESC cd)
 290 {
 291   epiphany_cgen_init_opcode_table (cd);
 292   epiphany_cgen_init_ibld_table (cd);
 293   cd->print_handlers = & epiphany_cgen_print_handlers[0];
 294   cd->print_operand = epiphany_cgen_print_operand;
 295 }
 296
 297 \f
 298 /* Default print handler.  */
 299
 300 static void
 301 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 302               void *dis_info,
 303               long value,
 304               unsigned int attrs,
 305               bfd_vma pc ATTRIBUTE_UNUSED,
 306               int length ATTRIBUTE_UNUSED)
 307 {
 308   disassemble_info *info = (disassemble_info *) dis_info;
 309
 310   /* Print the operand as directed by the attributes.  */
 311   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 312     ; /* nothing to do */
 313   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 314     (*info->fprintf_func) (info->stream, "%ld", value);
 315   else
 316     (*info->fprintf_func) (info->stream, "0x%lx", value);
 317 }
 318
 319 /* Default address handler.  */
 320
 321 static void
 322 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 323                void *dis_info,
 324                bfd_vma value,
 325                unsigned int attrs,
 326                bfd_vma pc ATTRIBUTE_UNUSED,
 327                int length ATTRIBUTE_UNUSED)
 328 {
 329   disassemble_info *info = (disassemble_info *) dis_info;
 330
 331   /* Print the operand as directed by the attributes.  */
 332   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 333     ; /* Nothing to do.  */
 334   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
 335     (*info->print_address_func) (value, info);
 336   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
 337     (*info->print_address_func) (value, info);
 338   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 339     (*info->fprintf_func) (info->stream, "%ld", (long) value);
 340   else
 341     (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
 342 }
 343
 344 /* Keyword print handler.  */
 345
 346 static void
 347 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 348                void *dis_info,
 349                CGEN_KEYWORD *keyword_table,
 350                long value,
 351                unsigned int attrs ATTRIBUTE_UNUSED)
 352 {
 353   disassemble_info *info = (disassemble_info *) dis_info;
 354   const CGEN_KEYWORD_ENTRY *ke;
 355
 356   ke = cgen_keyword_lookup_value (keyword_table, value);
 357   if (ke != NULL)
 358     (*info->fprintf_func) (info->stream, "%s", ke->name);
 359   else
 360     (*info->fprintf_func) (info->stream, "???");
 361 }
 362 \f
 363 /* Default insn printer.
 364
 365    DIS_INFO is defined as `void *' so the disassembler needn't know anything
 366    about disassemble_info.  */
 367
 368 static void
 369 print_insn_normal (CGEN_CPU_DESC cd,
 370                    void *dis_info,
 371                    const CGEN_INSN *insn,
 372                    CGEN_FIELDS *fields,
 373                    bfd_vma pc,
 374                    int length)
 375 {
 376   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 377   disassemble_info *info = (disassemble_info *) dis_info;
 378   const CGEN_SYNTAX_CHAR_TYPE *syn;
 379
 380   CGEN_INIT_PRINT (cd);
 381
 382   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
 383     {
 384       if (CGEN_SYNTAX_MNEMONIC_P (*syn))
 385         {
 386           (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
 387           continue;
 388         }
 389       if (CGEN_SYNTAX_CHAR_P (*syn))
 390         {
 391           (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
 392           continue;
 393         }
 394
 395       /* We have an operand.  */
 396       epiphany_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
 397                                  fields, CGEN_INSN_ATTRS (insn), pc, length);
 398     }
 399 }
 400 \f
 401 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
 402    the extract info.
 403    Returns 0 if all is well, non-zero otherwise.  */
 404
 405 static int
 406 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 407            bfd_vma pc,
 408            disassemble_info *info,
 409            bfd_byte *buf,
 410            int buflen,
 411            CGEN_EXTRACT_INFO *ex_info,
 412            unsigned long *insn_value)
 413 {
 414   int status = (*info->read_memory_func) (pc, buf, buflen, info);
 415
 416   if (status != 0)
 417     {
 418       (*info->memory_error_func) (status, pc, info);
 419       return -1;
 420     }
 421
 422   ex_info->dis_info = info;
 423   ex_info->valid = (1 << buflen) - 1;
 424   ex_info->insn_bytes = buf;
 425
 426   *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
 427   return 0;
 428 }
 429
 430 /* Utility to print an insn.
 431    BUF is the base part of the insn, target byte order, BUFLEN bytes long.
 432    The result is the size of the insn in bytes or zero for an unknown insn
 433    or -1 if an error occurs fetching data (memory_error_func will have
 434    been called).  */
 435
 436 static int
 437 print_insn (CGEN_CPU_DESC cd,
 438             bfd_vma pc,
 439             disassemble_info *info,
 440             bfd_byte *buf,
 441             unsigned int buflen)
 442 {
 443   CGEN_INSN_INT insn_value;
 444   const CGEN_INSN_LIST *insn_list;
 445   CGEN_EXTRACT_INFO ex_info;
 446   int basesize;
 447
 448   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
 449   basesize = cd->base_insn_bitsize < buflen * 8 ?
 450                                      cd->base_insn_bitsize : buflen * 8;
 451   insn_value = cgen_get_insn_value (cd, buf, basesize);
 452
 453
 454   /* Fill in ex_info fields like read_insn would.  Don't actually call
 455      read_insn, since the incoming buffer is already read (and possibly
 456      modified a la m32r).  */
 457   ex_info.valid = (1 << buflen) - 1;
 458   ex_info.dis_info = info;
 459   ex_info.insn_bytes = buf;
 460
 461   /* The instructions are stored in hash lists.
 462      Pick the first one and keep trying until we find the right one.  */
 463
 464   insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
 465   while (insn_list != NULL)
 466     {
 467       const CGEN_INSN *insn = insn_list->insn;
 468       CGEN_FIELDS fields;
 469       int length;
 470       unsigned long insn_value_cropped;
 471
 472 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
 473       /* Not needed as insn shouldn't be in hash lists if not supported.  */
 474       /* Supported by this cpu?  */
 475       if (! epiphany_cgen_insn_supported (cd, insn))
 476         {
 477           insn_list = CGEN_DIS_NEXT_INSN (insn_list);
 478           continue;
 479         }
 480 #endif
 481
 482       /* Basic bit mask must be correct.  */
 483       /* ??? May wish to allow target to defer this check until the extract
 484          handler.  */
 485
 486       /* Base size may exceed this instruction's size.  Extract the
 487          relevant part from the buffer. */
 488       if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
 489           (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
 490         insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
 491                                            info->endian == BFD_ENDIAN_BIG);
 492       else
 493         insn_value_cropped = insn_value;
 494
 495       if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
 496           == CGEN_INSN_BASE_VALUE (insn))
 497         {
 498           /* Printing is handled in two passes.  The first pass parses the
 499              machine insn and extracts the fields.  The second pass prints
 500              them.  */
 501
 502           /* Make sure the entire insn is loaded into insn_value, if it
 503              can fit.  */
 504           if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
 505               (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
 506             {
 507               unsigned long full_insn_value;
 508               int rc = read_insn (cd, pc, info, buf,
 509                                   CGEN_INSN_BITSIZE (insn) / 8,
 510                                   & ex_info, & full_insn_value);
 511               if (rc != 0)
 512                 return rc;
 513               length = CGEN_EXTRACT_FN (cd, insn)
 514                 (cd, insn, &ex_info, full_insn_value, &fields, pc);
 515             }
 516           else
 517             length = CGEN_EXTRACT_FN (cd, insn)
 518               (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
 519
 520           /* Length < 0 -> error.  */
 521           if (length < 0)
 522             return length;
 523           if (length > 0)
 524             {
 525               CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
 526               /* Length is in bits, result is in bytes.  */
 527               return length / 8;
 528             }
 529         }
 530
 531       insn_list = CGEN_DIS_NEXT_INSN (insn_list);
 532     }
 533
 534   return 0;
 535 }
 536
 537 /* Default value for CGEN_PRINT_INSN.
 538    The result is the size of the insn in bytes or zero for an unknown insn
 539    or -1 if an error occured fetching bytes.  */
 540
 541 #ifndef CGEN_PRINT_INSN
 542 #define CGEN_PRINT_INSN default_print_insn
 543 #endif
 544
 545 static int
 546 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
 547 {
 548   bfd_byte buf[CGEN_MAX_INSN_SIZE];
 549   int buflen;
 550   int status;
 551
 552   /* Attempt to read the base part of the insn.  */
 553   buflen = cd->base_insn_bitsize / 8;
 554   status = (*info->read_memory_func) (pc, buf, buflen, info);
 555
 556   /* Try again with the minimum part, if min < base.  */
 557   if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
 558     {
 559       buflen = cd->min_insn_bitsize / 8;
 560       status = (*info->read_memory_func) (pc, buf, buflen, info);
 561     }
 562
 563   if (status != 0)
 564     {
 565       (*info->memory_error_func) (status, pc, info);
 566       return -1;
 567     }
 568
 569   return print_insn (cd, pc, info, buf, buflen);
 570 }
 571
 572 /* Main entry point.
 573    Print one instruction from PC on INFO->STREAM.
 574    Return the size of the instruction (in bytes).  */
 575
 576 typedef struct cpu_desc_list
 577 {
 578   struct cpu_desc_list *next;
 579   CGEN_BITSET *isa;
 580   int mach;
 581   int endian;
 582   CGEN_CPU_DESC cd;
 583 } cpu_desc_list;
 584
 585 int
 586 print_insn_epiphany (bfd_vma pc, disassemble_info *info)
 587 {
 588   static cpu_desc_list *cd_list = 0;
 589   cpu_desc_list *cl = 0;
 590   static CGEN_CPU_DESC cd = 0;
 591   static CGEN_BITSET *prev_isa;
 592   static int prev_mach;
 593   static int prev_endian;
 594   int length;
 595   CGEN_BITSET *isa;
 596   int mach;
 597   int endian = (info->endian == BFD_ENDIAN_BIG
 598                 ? CGEN_ENDIAN_BIG
 599                 : CGEN_ENDIAN_LITTLE);
 600   enum bfd_architecture arch;
 601
 602   /* ??? gdb will set mach but leave the architecture as "unknown" */
 603 #ifndef CGEN_BFD_ARCH
 604 #define CGEN_BFD_ARCH bfd_arch_epiphany
 605 #endif
 606   arch = info->arch;
 607   if (arch == bfd_arch_unknown)
 608     arch = CGEN_BFD_ARCH;
 609
 610   /* There's no standard way to compute the machine or isa number
 611      so we leave it to the target.  */
 612 #ifdef CGEN_COMPUTE_MACH
 613   mach = CGEN_COMPUTE_MACH (info);
 614 #else
 615   mach = info->mach;
 616 #endif
 617
 618 #ifdef CGEN_COMPUTE_ISA
 619   {
 620     static CGEN_BITSET *permanent_isa;
 621
 622     if (!permanent_isa)
 623       permanent_isa = cgen_bitset_create (MAX_ISAS);
 624     isa = permanent_isa;
 625     cgen_bitset_clear (isa);
 626     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
 627   }
 628 #else
 629   isa = info->insn_sets;
 630 #endif
 631
 632   /* If we've switched cpu's, try to find a handle we've used before */
 633   if (cd
 634       && (cgen_bitset_compare (isa, prev_isa) != 0
 635           || mach != prev_mach
 636           || endian != prev_endian))
 637     {
 638       cd = 0;
 639       for (cl = cd_list; cl; cl = cl->next)
 640         {
 641           if (cgen_bitset_compare (cl->isa, isa) == 0 &&
 642               cl->mach == mach &&
 643               cl->endian == endian)
 644             {
 645               cd = cl->cd;
 646               prev_isa = cd->isas;
 647               break;
 648             }
 649         }
 650     }
 651
 652   /* If we haven't initialized yet, initialize the opcode table.  */
 653   if (! cd)
 654     {
 655       const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
 656       const char *mach_name;
 657
 658       if (!arch_type)
 659         abort ();
 660       mach_name = arch_type->printable_name;
 661
 662       prev_isa = cgen_bitset_copy (isa);
 663       prev_mach = mach;
 664       prev_endian = endian;
 665       cd = epiphany_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
 666                                  CGEN_CPU_OPEN_BFDMACH, mach_name,
 667                                  CGEN_CPU_OPEN_ENDIAN, prev_endian,
 668                                  CGEN_CPU_OPEN_END);
 669       if (!cd)
 670         abort ();
 671
 672       /* Save this away for future reference.  */
 673       cl = xmalloc (sizeof (struct cpu_desc_list));
 674       cl->cd = cd;
 675       cl->isa = prev_isa;
 676       cl->mach = mach;
 677       cl->endian = endian;
 678       cl->next = cd_list;
 679       cd_list = cl;
 680
 681       epiphany_cgen_init_dis (cd);
 682     }
 683
 684   /* We try to have as much common code as possible.
 685      But at this point some targets need to take over.  */
 686   /* ??? Some targets may need a hook elsewhere.  Try to avoid this,
 687      but if not possible try to move this hook elsewhere rather than
 688      have two hooks.  */
 689   length = CGEN_PRINT_INSN (cd, pc, info);
 690   if (length > 0)
 691     return length;
 692   if (length < 0)
 693     return -1;
 694
 695   (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
 696   return cd->default_insn_bitsize / 8;
 697 }