opcodes/m32c-dis.c

   1 /* Disassembler interface for targets using CGEN. -*- C -*-
   2    CGEN: Cpu tools GENerator
   3
   4    THIS FILE IS MACHINE GENERATED WITH CGEN.
   5    - the resultant file is machine generated, cgen-dis.in isn't
   6
   7    Copyright (C) 1996-2015 Free Software Foundation, Inc.
   8
   9    This file is part of libopcodes.
  10
  11    This library is free software; you can redistribute it and/or modify
  12    it under the terms of the GNU General Public License as published by
  13    the Free Software Foundation; either version 3, or (at your option)
  14    any later version.
  15
  16    It is distributed in the hope that it will be useful, but WITHOUT
  17    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  18    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  19    License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software Foundation, Inc.,
  23    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
  24
  25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  26    Keep that in mind.  */
  27
  28 #include "sysdep.h"
  29 #include <stdio.h>
  30 #include "ansidecl.h"
  31 #include "dis-asm.h"
  32 #include "bfd.h"
  33 #include "symcat.h"
  34 #include "libiberty.h"
  35 #include "m32c-desc.h"
  36 #include "m32c-opc.h"
  37 #include "opintl.h"
  38
  39 /* Default text to print if an instruction isn't recognized.  */
  40 #define UNKNOWN_INSN_MSG _("*unknown*")
  41
  42 static void print_normal
  43   (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
  44 static void print_address
  45   (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
  46 static void print_keyword
  47   (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
  48 static void print_insn_normal
  49   (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
  50 static int print_insn
  51   (CGEN_CPU_DESC, bfd_vma,  disassemble_info *, bfd_byte *, unsigned);
  52 static int default_print_insn
  53   (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
  54 static int read_insn
  55   (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
  56    unsigned long *);
  57 \f
  58 /* -- disassembler routines inserted here.  */
  59
  60 /* -- dis.c */
  61
  62 #include "elf/m32c.h"
  63 #include "elf-bfd.h"
  64
  65 /* Always print the short insn format suffix as ':<char>'.  */
  66
  67 static void
  68 print_suffix (void * dis_info, char suffix)
  69 {
  70   disassemble_info *info = dis_info;
  71
  72   (*info->fprintf_func) (info->stream, ":%c", suffix);
  73 }
  74
  75 static void
  76 print_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  77          void * dis_info,
  78          long value ATTRIBUTE_UNUSED,
  79          unsigned int attrs ATTRIBUTE_UNUSED,
  80          bfd_vma pc ATTRIBUTE_UNUSED,
  81          int length ATTRIBUTE_UNUSED)
  82 {
  83   print_suffix (dis_info, 's');
  84 }
  85
  86
  87 static void
  88 print_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
  89          void * dis_info,
  90          long value ATTRIBUTE_UNUSED,
  91          unsigned int attrs ATTRIBUTE_UNUSED,
  92          bfd_vma pc ATTRIBUTE_UNUSED,
  93          int length ATTRIBUTE_UNUSED)
  94 {
  95   print_suffix (dis_info, 'g');
  96 }
  97
  98 static void
  99 print_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 100          void * dis_info,
 101          long value ATTRIBUTE_UNUSED,
 102          unsigned int attrs ATTRIBUTE_UNUSED,
 103          bfd_vma pc ATTRIBUTE_UNUSED,
 104          int length ATTRIBUTE_UNUSED)
 105 {
 106   print_suffix (dis_info, 'q');
 107 }
 108
 109 static void
 110 print_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 111          void * dis_info,
 112          long value ATTRIBUTE_UNUSED,
 113          unsigned int attrs ATTRIBUTE_UNUSED,
 114          bfd_vma pc ATTRIBUTE_UNUSED,
 115          int length ATTRIBUTE_UNUSED)
 116 {
 117   print_suffix (dis_info, 'z');
 118 }
 119
 120 /* Print the empty suffix.  */
 121
 122 static void
 123 print_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 124          void * dis_info ATTRIBUTE_UNUSED,
 125          long value ATTRIBUTE_UNUSED,
 126          unsigned int attrs ATTRIBUTE_UNUSED,
 127          bfd_vma pc ATTRIBUTE_UNUSED,
 128          int length ATTRIBUTE_UNUSED)
 129 {
 130   return;
 131 }
 132
 133 static void
 134 print_r0l_r0h (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 135                void * dis_info,
 136                long value,
 137                unsigned int attrs ATTRIBUTE_UNUSED,
 138                bfd_vma pc ATTRIBUTE_UNUSED,
 139                int length ATTRIBUTE_UNUSED)
 140 {
 141   disassemble_info *info = dis_info;
 142
 143   if (value == 0)
 144     (*info->fprintf_func) (info->stream, "r0h,r0l");
 145   else
 146     (*info->fprintf_func) (info->stream, "r0l,r0h");
 147 }
 148
 149 static void
 150 print_unsigned_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 151                         void * dis_info,
 152                         unsigned long value,
 153                         unsigned int attrs ATTRIBUTE_UNUSED,
 154                         bfd_vma pc ATTRIBUTE_UNUSED,
 155                         int length ATTRIBUTE_UNUSED)
 156 {
 157   disassemble_info *info = dis_info;
 158
 159   (*info->fprintf_func) (info->stream, "%ld,0x%lx", value & 0x7, value >> 3);
 160 }
 161
 162 static void
 163 print_signed_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 164                       void * dis_info,
 165                       signed long value,
 166                       unsigned int attrs ATTRIBUTE_UNUSED,
 167                       bfd_vma pc ATTRIBUTE_UNUSED,
 168                       int length ATTRIBUTE_UNUSED)
 169 {
 170   disassemble_info *info = dis_info;
 171
 172   (*info->fprintf_func) (info->stream, "%ld,%ld", value & 0x7, value >> 3);
 173 }
 174
 175 static void
 176 print_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 177             void * dis_info,
 178             long value ATTRIBUTE_UNUSED,
 179             unsigned int attrs ATTRIBUTE_UNUSED,
 180             bfd_vma pc ATTRIBUTE_UNUSED,
 181             int length ATTRIBUTE_UNUSED)
 182 {
 183   /* Always print the size as '.w'.  */
 184   disassemble_info *info = dis_info;
 185
 186   (*info->fprintf_func) (info->stream, ".w");
 187 }
 188
 189 #define POP  0
 190 #define PUSH 1
 191
 192 static void print_pop_regset  (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
 193 static void print_push_regset (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
 194
 195 /* Print a set of registers, R0,R1,A0,A1,SB,FB.  */
 196
 197 static void
 198 print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 199               void * dis_info,
 200               long value,
 201               unsigned int attrs ATTRIBUTE_UNUSED,
 202               bfd_vma pc ATTRIBUTE_UNUSED,
 203               int length ATTRIBUTE_UNUSED,
 204               int push)
 205 {
 206   static char * m16c_register_names [] =
 207   {
 208     "r0", "r1", "r2", "r3", "a0", "a1", "sb", "fb"
 209   };
 210   disassemble_info *info = dis_info;
 211   int mask;
 212   int reg_index = 0;
 213   char* comma = "";
 214
 215   if (push)
 216     mask = 0x80;
 217   else
 218     mask = 1;
 219
 220   if (value & mask)
 221     {
 222       (*info->fprintf_func) (info->stream, "%s", m16c_register_names [0]);
 223       comma = ",";
 224     }
 225
 226   for (reg_index = 1; reg_index <= 7; ++reg_index)
 227     {
 228       if (push)
 229         mask >>= 1;
 230       else
 231         mask <<= 1;
 232
 233       if (value & mask)
 234         {
 235           (*info->fprintf_func) (info->stream, "%s%s", comma,
 236                                  m16c_register_names [reg_index]);
 237           comma = ",";
 238         }
 239     }
 240 }
 241
 242 static void
 243 print_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 244                   void * dis_info,
 245                   long value,
 246                   unsigned int attrs ATTRIBUTE_UNUSED,
 247                   bfd_vma pc ATTRIBUTE_UNUSED,
 248                   int length ATTRIBUTE_UNUSED)
 249 {
 250   print_regset (cd, dis_info, value, attrs, pc, length, POP);
 251 }
 252
 253 static void
 254 print_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 255                    void * dis_info,
 256                    long value,
 257                    unsigned int attrs ATTRIBUTE_UNUSED,
 258                    bfd_vma pc ATTRIBUTE_UNUSED,
 259                    int length ATTRIBUTE_UNUSED)
 260 {
 261   print_regset (cd, dis_info, value, attrs, pc, length, PUSH);
 262 }
 263
 264 static void
 265 print_signed4n (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 266                 void * dis_info,
 267                 signed long value,
 268                 unsigned int attrs ATTRIBUTE_UNUSED,
 269                 bfd_vma pc ATTRIBUTE_UNUSED,
 270                 int length ATTRIBUTE_UNUSED)
 271 {
 272   disassemble_info *info = dis_info;
 273
 274   (*info->fprintf_func) (info->stream, "%ld", -value);
 275 }
 276
 277 void m32c_cgen_print_operand
 278   (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
 279
 280 /* Main entry point for printing operands.
 281    XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
 282    of dis-asm.h on cgen.h.
 283
 284    This function is basically just a big switch statement.  Earlier versions
 285    used tables to look up the function to use, but
 286    - if the table contains both assembler and disassembler functions then
 287      the disassembler contains much of the assembler and vice-versa,
 288    - there's a lot of inlining possibilities as things grow,
 289    - using a switch statement avoids the function call overhead.
 290
 291    This function could be moved into `print_insn_normal', but keeping it
 292    separate makes clear the interface between `print_insn_normal' and each of
 293    the handlers.  */
 294
 295 void
 296 m32c_cgen_print_operand (CGEN_CPU_DESC cd,
 297                            int opindex,
 298                            void * xinfo,
 299                            CGEN_FIELDS *fields,
 300                            void const *attrs ATTRIBUTE_UNUSED,
 301                            bfd_vma pc,
 302                            int length)
 303 {
 304   disassemble_info *info = (disassemble_info *) xinfo;
 305
 306   switch (opindex)
 307     {
 308     case M32C_OPERAND_A0 :
 309       print_keyword (cd, info, & m32c_cgen_opval_h_a0, 0, 0);
 310       break;
 311     case M32C_OPERAND_A1 :
 312       print_keyword (cd, info, & m32c_cgen_opval_h_a1, 0, 0);
 313       break;
 314     case M32C_OPERAND_AN16_PUSH_S :
 315       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_4_1, 0);
 316       break;
 317     case M32C_OPERAND_BIT16AN :
 318       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst16_an, 0);
 319       break;
 320     case M32C_OPERAND_BIT16RN :
 321       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst16_rn, 0);
 322       break;
 323     case M32C_OPERAND_BIT3_S :
 324       print_normal (cd, info, fields->f_imm3_S, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 325       break;
 326     case M32C_OPERAND_BIT32ANPREFIXED :
 327       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
 328       break;
 329     case M32C_OPERAND_BIT32ANUNPREFIXED :
 330       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
 331       break;
 332     case M32C_OPERAND_BIT32RNPREFIXED :
 333       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_prefixed_QI, 0);
 334       break;
 335     case M32C_OPERAND_BIT32RNUNPREFIXED :
 336       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_unprefixed_QI, 0);
 337       break;
 338     case M32C_OPERAND_BITBASE16_16_S8 :
 339       print_signed_bitbase (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 340       break;
 341     case M32C_OPERAND_BITBASE16_16_U16 :
 342       print_unsigned_bitbase (cd, info, fields->f_dsp_16_u16, 0, pc, length);
 343       break;
 344     case M32C_OPERAND_BITBASE16_16_U8 :
 345       print_unsigned_bitbase (cd, info, fields->f_dsp_16_u8, 0, pc, length);
 346       break;
 347     case M32C_OPERAND_BITBASE16_8_U11_S :
 348       print_unsigned_bitbase (cd, info, fields->f_bitbase16_u11_S, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 349       break;
 350     case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
 351       print_signed_bitbase (cd, info, fields->f_bitbase32_16_s11_unprefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 352       break;
 353     case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
 354       print_signed_bitbase (cd, info, fields->f_bitbase32_16_s19_unprefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 355       break;
 356     case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
 357       print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u11_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 358       break;
 359     case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
 360       print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u19_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 361       break;
 362     case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
 363       print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u27_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 364       break;
 365     case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
 366       print_signed_bitbase (cd, info, fields->f_bitbase32_24_s11_prefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 367       break;
 368     case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
 369       print_signed_bitbase (cd, info, fields->f_bitbase32_24_s19_prefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 370       break;
 371     case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
 372       print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u11_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 373       break;
 374     case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
 375       print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u19_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 376       break;
 377     case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
 378       print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u27_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 379       break;
 380     case M32C_OPERAND_BITNO16R :
 381       print_normal (cd, info, fields->f_dsp_16_u8, 0, pc, length);
 382       break;
 383     case M32C_OPERAND_BITNO32PREFIXED :
 384       print_normal (cd, info, fields->f_bitno32_prefixed, 0, pc, length);
 385       break;
 386     case M32C_OPERAND_BITNO32UNPREFIXED :
 387       print_normal (cd, info, fields->f_bitno32_unprefixed, 0, pc, length);
 388       break;
 389     case M32C_OPERAND_DSP_10_U6 :
 390       print_normal (cd, info, fields->f_dsp_10_u6, 0, pc, length);
 391       break;
 392     case M32C_OPERAND_DSP_16_S16 :
 393       print_normal (cd, info, fields->f_dsp_16_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 394       break;
 395     case M32C_OPERAND_DSP_16_S8 :
 396       print_normal (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 397       break;
 398     case M32C_OPERAND_DSP_16_U16 :
 399       print_normal (cd, info, fields->f_dsp_16_u16, 0, pc, length);
 400       break;
 401     case M32C_OPERAND_DSP_16_U20 :
 402       print_normal (cd, info, fields->f_dsp_16_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 403       break;
 404     case M32C_OPERAND_DSP_16_U24 :
 405       print_normal (cd, info, fields->f_dsp_16_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 406       break;
 407     case M32C_OPERAND_DSP_16_U8 :
 408       print_normal (cd, info, fields->f_dsp_16_u8, 0, pc, length);
 409       break;
 410     case M32C_OPERAND_DSP_24_S16 :
 411       print_normal (cd, info, fields->f_dsp_24_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 412       break;
 413     case M32C_OPERAND_DSP_24_S8 :
 414       print_normal (cd, info, fields->f_dsp_24_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 415       break;
 416     case M32C_OPERAND_DSP_24_U16 :
 417       print_normal (cd, info, fields->f_dsp_24_u16, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 418       break;
 419     case M32C_OPERAND_DSP_24_U20 :
 420       print_normal (cd, info, fields->f_dsp_24_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 421       break;
 422     case M32C_OPERAND_DSP_24_U24 :
 423       print_normal (cd, info, fields->f_dsp_24_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 424       break;
 425     case M32C_OPERAND_DSP_24_U8 :
 426       print_normal (cd, info, fields->f_dsp_24_u8, 0, pc, length);
 427       break;
 428     case M32C_OPERAND_DSP_32_S16 :
 429       print_normal (cd, info, fields->f_dsp_32_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 430       break;
 431     case M32C_OPERAND_DSP_32_S8 :
 432       print_normal (cd, info, fields->f_dsp_32_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 433       break;
 434     case M32C_OPERAND_DSP_32_U16 :
 435       print_normal (cd, info, fields->f_dsp_32_u16, 0, pc, length);
 436       break;
 437     case M32C_OPERAND_DSP_32_U20 :
 438       print_normal (cd, info, fields->f_dsp_32_u24, 0, pc, length);
 439       break;
 440     case M32C_OPERAND_DSP_32_U24 :
 441       print_normal (cd, info, fields->f_dsp_32_u24, 0, pc, length);
 442       break;
 443     case M32C_OPERAND_DSP_32_U8 :
 444       print_normal (cd, info, fields->f_dsp_32_u8, 0, pc, length);
 445       break;
 446     case M32C_OPERAND_DSP_40_S16 :
 447       print_normal (cd, info, fields->f_dsp_40_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 448       break;
 449     case M32C_OPERAND_DSP_40_S8 :
 450       print_normal (cd, info, fields->f_dsp_40_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 451       break;
 452     case M32C_OPERAND_DSP_40_U16 :
 453       print_normal (cd, info, fields->f_dsp_40_u16, 0, pc, length);
 454       break;
 455     case M32C_OPERAND_DSP_40_U20 :
 456       print_normal (cd, info, fields->f_dsp_40_u20, 0, pc, length);
 457       break;
 458     case M32C_OPERAND_DSP_40_U24 :
 459       print_normal (cd, info, fields->f_dsp_40_u24, 0, pc, length);
 460       break;
 461     case M32C_OPERAND_DSP_40_U8 :
 462       print_normal (cd, info, fields->f_dsp_40_u8, 0, pc, length);
 463       break;
 464     case M32C_OPERAND_DSP_48_S16 :
 465       print_normal (cd, info, fields->f_dsp_48_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 466       break;
 467     case M32C_OPERAND_DSP_48_S8 :
 468       print_normal (cd, info, fields->f_dsp_48_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 469       break;
 470     case M32C_OPERAND_DSP_48_U16 :
 471       print_normal (cd, info, fields->f_dsp_48_u16, 0, pc, length);
 472       break;
 473     case M32C_OPERAND_DSP_48_U20 :
 474       print_normal (cd, info, fields->f_dsp_48_u20, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 475       break;
 476     case M32C_OPERAND_DSP_48_U24 :
 477       print_normal (cd, info, fields->f_dsp_48_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 478       break;
 479     case M32C_OPERAND_DSP_48_U8 :
 480       print_normal (cd, info, fields->f_dsp_48_u8, 0, pc, length);
 481       break;
 482     case M32C_OPERAND_DSP_8_S24 :
 483       print_normal (cd, info, fields->f_dsp_8_s24, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 484       break;
 485     case M32C_OPERAND_DSP_8_S8 :
 486       print_normal (cd, info, fields->f_dsp_8_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 487       break;
 488     case M32C_OPERAND_DSP_8_U16 :
 489       print_normal (cd, info, fields->f_dsp_8_u16, 0, pc, length);
 490       break;
 491     case M32C_OPERAND_DSP_8_U24 :
 492       print_normal (cd, info, fields->f_dsp_8_u24, 0, pc, length);
 493       break;
 494     case M32C_OPERAND_DSP_8_U6 :
 495       print_normal (cd, info, fields->f_dsp_8_u6, 0, pc, length);
 496       break;
 497     case M32C_OPERAND_DSP_8_U8 :
 498       print_normal (cd, info, fields->f_dsp_8_u8, 0, pc, length);
 499       break;
 500     case M32C_OPERAND_DST16AN :
 501       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst16_an, 0);
 502       break;
 503     case M32C_OPERAND_DST16AN_S :
 504       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst16_an_s, 0);
 505       break;
 506     case M32C_OPERAND_DST16ANHI :
 507       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst16_an, 0);
 508       break;
 509     case M32C_OPERAND_DST16ANQI :
 510       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst16_an, 0);
 511       break;
 512     case M32C_OPERAND_DST16ANQI_S :
 513       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst16_rn_QI_s, 0);
 514       break;
 515     case M32C_OPERAND_DST16ANSI :
 516       print_keyword (cd, info, & m32c_cgen_opval_h_ar_SI, fields->f_dst16_an, 0);
 517       break;
 518     case M32C_OPERAND_DST16RNEXTQI :
 519       print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_QI, fields->f_dst16_rn_ext, 0);
 520       break;
 521     case M32C_OPERAND_DST16RNHI :
 522       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst16_rn, 0);
 523       break;
 524     case M32C_OPERAND_DST16RNQI :
 525       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst16_rn, 0);
 526       break;
 527     case M32C_OPERAND_DST16RNQI_S :
 528       print_keyword (cd, info, & m32c_cgen_opval_h_r0l_r0h, fields->f_dst16_rn_QI_s, 0);
 529       break;
 530     case M32C_OPERAND_DST16RNSI :
 531       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst16_rn, 0);
 532       break;
 533     case M32C_OPERAND_DST32ANEXTUNPREFIXED :
 534       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
 535       break;
 536     case M32C_OPERAND_DST32ANPREFIXED :
 537       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
 538       break;
 539     case M32C_OPERAND_DST32ANPREFIXEDHI :
 540       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst32_an_prefixed, 0);
 541       break;
 542     case M32C_OPERAND_DST32ANPREFIXEDQI :
 543       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst32_an_prefixed, 0);
 544       break;
 545     case M32C_OPERAND_DST32ANPREFIXEDSI :
 546       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
 547       break;
 548     case M32C_OPERAND_DST32ANUNPREFIXED :
 549       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
 550       break;
 551     case M32C_OPERAND_DST32ANUNPREFIXEDHI :
 552       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst32_an_unprefixed, 0);
 553       break;
 554     case M32C_OPERAND_DST32ANUNPREFIXEDQI :
 555       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst32_an_unprefixed, 0);
 556       break;
 557     case M32C_OPERAND_DST32ANUNPREFIXEDSI :
 558       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
 559       break;
 560     case M32C_OPERAND_DST32R0HI_S :
 561       print_keyword (cd, info, & m32c_cgen_opval_h_r0, 0, 0);
 562       break;
 563     case M32C_OPERAND_DST32R0QI_S :
 564       print_keyword (cd, info, & m32c_cgen_opval_h_r0l, 0, 0);
 565       break;
 566     case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
 567       print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_HI, fields->f_dst32_rn_ext_unprefixed, 0);
 568       break;
 569     case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
 570       print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_QI, fields->f_dst32_rn_ext_unprefixed, 0);
 571       break;
 572     case M32C_OPERAND_DST32RNPREFIXEDHI :
 573       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst32_rn_prefixed_HI, 0);
 574       break;
 575     case M32C_OPERAND_DST32RNPREFIXEDQI :
 576       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_prefixed_QI, 0);
 577       break;
 578     case M32C_OPERAND_DST32RNPREFIXEDSI :
 579       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst32_rn_prefixed_SI, 0);
 580       break;
 581     case M32C_OPERAND_DST32RNUNPREFIXEDHI :
 582       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst32_rn_unprefixed_HI, 0);
 583       break;
 584     case M32C_OPERAND_DST32RNUNPREFIXEDQI :
 585       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_unprefixed_QI, 0);
 586       break;
 587     case M32C_OPERAND_DST32RNUNPREFIXEDSI :
 588       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst32_rn_unprefixed_SI, 0);
 589       break;
 590     case M32C_OPERAND_G :
 591       print_G (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 592       break;
 593     case M32C_OPERAND_IMM_12_S4 :
 594       print_normal (cd, info, fields->f_imm_12_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 595       break;
 596     case M32C_OPERAND_IMM_12_S4N :
 597       print_signed4n (cd, info, fields->f_imm_12_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 598       break;
 599     case M32C_OPERAND_IMM_13_U3 :
 600       print_normal (cd, info, fields->f_imm_13_u3, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 601       break;
 602     case M32C_OPERAND_IMM_16_HI :
 603       print_normal (cd, info, fields->f_dsp_16_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 604       break;
 605     case M32C_OPERAND_IMM_16_QI :
 606       print_normal (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 607       break;
 608     case M32C_OPERAND_IMM_16_SI :
 609       print_normal (cd, info, fields->f_dsp_16_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 610       break;
 611     case M32C_OPERAND_IMM_20_S4 :
 612       print_normal (cd, info, fields->f_imm_20_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 613       break;
 614     case M32C_OPERAND_IMM_24_HI :
 615       print_normal (cd, info, fields->f_dsp_24_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 616       break;
 617     case M32C_OPERAND_IMM_24_QI :
 618       print_normal (cd, info, fields->f_dsp_24_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 619       break;
 620     case M32C_OPERAND_IMM_24_SI :
 621       print_normal (cd, info, fields->f_dsp_24_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 622       break;
 623     case M32C_OPERAND_IMM_32_HI :
 624       print_normal (cd, info, fields->f_dsp_32_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 625       break;
 626     case M32C_OPERAND_IMM_32_QI :
 627       print_normal (cd, info, fields->f_dsp_32_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 628       break;
 629     case M32C_OPERAND_IMM_32_SI :
 630       print_normal (cd, info, fields->f_dsp_32_s32, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 631       break;
 632     case M32C_OPERAND_IMM_40_HI :
 633       print_normal (cd, info, fields->f_dsp_40_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 634       break;
 635     case M32C_OPERAND_IMM_40_QI :
 636       print_normal (cd, info, fields->f_dsp_40_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 637       break;
 638     case M32C_OPERAND_IMM_40_SI :
 639       print_normal (cd, info, fields->f_dsp_40_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 640       break;
 641     case M32C_OPERAND_IMM_48_HI :
 642       print_normal (cd, info, fields->f_dsp_48_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 643       break;
 644     case M32C_OPERAND_IMM_48_QI :
 645       print_normal (cd, info, fields->f_dsp_48_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 646       break;
 647     case M32C_OPERAND_IMM_48_SI :
 648       print_normal (cd, info, fields->f_dsp_48_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 649       break;
 650     case M32C_OPERAND_IMM_56_HI :
 651       print_normal (cd, info, fields->f_dsp_56_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 652       break;
 653     case M32C_OPERAND_IMM_56_QI :
 654       print_normal (cd, info, fields->f_dsp_56_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 655       break;
 656     case M32C_OPERAND_IMM_64_HI :
 657       print_normal (cd, info, fields->f_dsp_64_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 658       break;
 659     case M32C_OPERAND_IMM_8_HI :
 660       print_normal (cd, info, fields->f_dsp_8_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 661       break;
 662     case M32C_OPERAND_IMM_8_QI :
 663       print_normal (cd, info, fields->f_dsp_8_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 664       break;
 665     case M32C_OPERAND_IMM_8_S4 :
 666       print_normal (cd, info, fields->f_imm_8_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 667       break;
 668     case M32C_OPERAND_IMM_8_S4N :
 669       print_signed4n (cd, info, fields->f_imm_8_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 670       break;
 671     case M32C_OPERAND_IMM_SH_12_S4 :
 672       print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_12_s4, 0);
 673       break;
 674     case M32C_OPERAND_IMM_SH_20_S4 :
 675       print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_20_s4, 0);
 676       break;
 677     case M32C_OPERAND_IMM_SH_8_S4 :
 678       print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_8_s4, 0);
 679       break;
 680     case M32C_OPERAND_IMM1_S :
 681       print_normal (cd, info, fields->f_imm1_S, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 682       break;
 683     case M32C_OPERAND_IMM3_S :
 684       print_normal (cd, info, fields->f_imm3_S, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 685       break;
 686     case M32C_OPERAND_LAB_16_8 :
 687       print_address (cd, info, fields->f_lab_16_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 688       break;
 689     case M32C_OPERAND_LAB_24_8 :
 690       print_address (cd, info, fields->f_lab_24_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 691       break;
 692     case M32C_OPERAND_LAB_32_8 :
 693       print_address (cd, info, fields->f_lab_32_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 694       break;
 695     case M32C_OPERAND_LAB_40_8 :
 696       print_address (cd, info, fields->f_lab_40_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 697       break;
 698     case M32C_OPERAND_LAB_5_3 :
 699       print_address (cd, info, fields->f_lab_5_3, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 700       break;
 701     case M32C_OPERAND_LAB_8_16 :
 702       print_address (cd, info, fields->f_lab_8_16, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 703       break;
 704     case M32C_OPERAND_LAB_8_24 :
 705       print_address (cd, info, fields->f_lab_8_24, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
 706       break;
 707     case M32C_OPERAND_LAB_8_8 :
 708       print_address (cd, info, fields->f_lab_8_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 709       break;
 710     case M32C_OPERAND_LAB32_JMP_S :
 711       print_address (cd, info, fields->f_lab32_jmp_s, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
 712       break;
 713     case M32C_OPERAND_Q :
 714       print_Q (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 715       break;
 716     case M32C_OPERAND_R0 :
 717       print_keyword (cd, info, & m32c_cgen_opval_h_r0, 0, 0);
 718       break;
 719     case M32C_OPERAND_R0H :
 720       print_keyword (cd, info, & m32c_cgen_opval_h_r0h, 0, 0);
 721       break;
 722     case M32C_OPERAND_R0L :
 723       print_keyword (cd, info, & m32c_cgen_opval_h_r0l, 0, 0);
 724       break;
 725     case M32C_OPERAND_R1 :
 726       print_keyword (cd, info, & m32c_cgen_opval_h_r1, 0, 0);
 727       break;
 728     case M32C_OPERAND_R1R2R0 :
 729       print_keyword (cd, info, & m32c_cgen_opval_h_r1r2r0, 0, 0);
 730       break;
 731     case M32C_OPERAND_R2 :
 732       print_keyword (cd, info, & m32c_cgen_opval_h_r2, 0, 0);
 733       break;
 734     case M32C_OPERAND_R2R0 :
 735       print_keyword (cd, info, & m32c_cgen_opval_h_r2r0, 0, 0);
 736       break;
 737     case M32C_OPERAND_R3 :
 738       print_keyword (cd, info, & m32c_cgen_opval_h_r3, 0, 0);
 739       break;
 740     case M32C_OPERAND_R3R1 :
 741       print_keyword (cd, info, & m32c_cgen_opval_h_r3r1, 0, 0);
 742       break;
 743     case M32C_OPERAND_REGSETPOP :
 744       print_pop_regset (cd, info, fields->f_8_8, 0, pc, length);
 745       break;
 746     case M32C_OPERAND_REGSETPUSH :
 747       print_push_regset (cd, info, fields->f_8_8, 0, pc, length);
 748       break;
 749     case M32C_OPERAND_RN16_PUSH_S :
 750       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_4_1, 0);
 751       break;
 752     case M32C_OPERAND_S :
 753       print_S (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 754       break;
 755     case M32C_OPERAND_SRC16AN :
 756       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src16_an, 0);
 757       break;
 758     case M32C_OPERAND_SRC16ANHI :
 759       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src16_an, 0);
 760       break;
 761     case M32C_OPERAND_SRC16ANQI :
 762       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src16_an, 0);
 763       break;
 764     case M32C_OPERAND_SRC16RNHI :
 765       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src16_rn, 0);
 766       break;
 767     case M32C_OPERAND_SRC16RNQI :
 768       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src16_rn, 0);
 769       break;
 770     case M32C_OPERAND_SRC32ANPREFIXED :
 771       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_prefixed, 0);
 772       break;
 773     case M32C_OPERAND_SRC32ANPREFIXEDHI :
 774       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src32_an_prefixed, 0);
 775       break;
 776     case M32C_OPERAND_SRC32ANPREFIXEDQI :
 777       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src32_an_prefixed, 0);
 778       break;
 779     case M32C_OPERAND_SRC32ANPREFIXEDSI :
 780       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_prefixed, 0);
 781       break;
 782     case M32C_OPERAND_SRC32ANUNPREFIXED :
 783       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_unprefixed, 0);
 784       break;
 785     case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
 786       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src32_an_unprefixed, 0);
 787       break;
 788     case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
 789       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src32_an_unprefixed, 0);
 790       break;
 791     case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
 792       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_unprefixed, 0);
 793       break;
 794     case M32C_OPERAND_SRC32RNPREFIXEDHI :
 795       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src32_rn_prefixed_HI, 0);
 796       break;
 797     case M32C_OPERAND_SRC32RNPREFIXEDQI :
 798       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src32_rn_prefixed_QI, 0);
 799       break;
 800     case M32C_OPERAND_SRC32RNPREFIXEDSI :
 801       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_src32_rn_prefixed_SI, 0);
 802       break;
 803     case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
 804       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src32_rn_unprefixed_HI, 0);
 805       break;
 806     case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
 807       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src32_rn_unprefixed_QI, 0);
 808       break;
 809     case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
 810       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_src32_rn_unprefixed_SI, 0);
 811       break;
 812     case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
 813       print_r0l_r0h (cd, info, fields->f_5_1, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 814       break;
 815     case M32C_OPERAND_X :
 816       print_X (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 817       break;
 818     case M32C_OPERAND_Z :
 819       print_Z (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 820       break;
 821     case M32C_OPERAND_COND16_16 :
 822       print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_16_u8, 0);
 823       break;
 824     case M32C_OPERAND_COND16_24 :
 825       print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_24_u8, 0);
 826       break;
 827     case M32C_OPERAND_COND16_32 :
 828       print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_32_u8, 0);
 829       break;
 830     case M32C_OPERAND_COND16C :
 831       print_keyword (cd, info, & m32c_cgen_opval_h_cond16c, fields->f_cond16, 0);
 832       break;
 833     case M32C_OPERAND_COND16J :
 834       print_keyword (cd, info, & m32c_cgen_opval_h_cond16j, fields->f_cond16, 0);
 835       break;
 836     case M32C_OPERAND_COND16J5 :
 837       print_keyword (cd, info, & m32c_cgen_opval_h_cond16j_5, fields->f_cond16j_5, 0);
 838       break;
 839     case M32C_OPERAND_COND32 :
 840       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond32, 0|(1<<CGEN_OPERAND_VIRTUAL));
 841       break;
 842     case M32C_OPERAND_COND32_16 :
 843       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_16_u8, 0);
 844       break;
 845     case M32C_OPERAND_COND32_24 :
 846       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_24_u8, 0);
 847       break;
 848     case M32C_OPERAND_COND32_32 :
 849       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_32_u8, 0);
 850       break;
 851     case M32C_OPERAND_COND32_40 :
 852       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_40_u8, 0);
 853       break;
 854     case M32C_OPERAND_COND32J :
 855       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond32j, 0|(1<<CGEN_OPERAND_VIRTUAL));
 856       break;
 857     case M32C_OPERAND_CR1_PREFIXED_32 :
 858       print_keyword (cd, info, & m32c_cgen_opval_h_cr1_32, fields->f_21_3, 0);
 859       break;
 860     case M32C_OPERAND_CR1_UNPREFIXED_32 :
 861       print_keyword (cd, info, & m32c_cgen_opval_h_cr1_32, fields->f_13_3, 0);
 862       break;
 863     case M32C_OPERAND_CR16 :
 864       print_keyword (cd, info, & m32c_cgen_opval_h_cr_16, fields->f_9_3, 0);
 865       break;
 866     case M32C_OPERAND_CR2_32 :
 867       print_keyword (cd, info, & m32c_cgen_opval_h_cr2_32, fields->f_13_3, 0);
 868       break;
 869     case M32C_OPERAND_CR3_PREFIXED_32 :
 870       print_keyword (cd, info, & m32c_cgen_opval_h_cr3_32, fields->f_21_3, 0);
 871       break;
 872     case M32C_OPERAND_CR3_UNPREFIXED_32 :
 873       print_keyword (cd, info, & m32c_cgen_opval_h_cr3_32, fields->f_13_3, 0);
 874       break;
 875     case M32C_OPERAND_FLAGS16 :
 876       print_keyword (cd, info, & m32c_cgen_opval_h_flags, fields->f_9_3, 0);
 877       break;
 878     case M32C_OPERAND_FLAGS32 :
 879       print_keyword (cd, info, & m32c_cgen_opval_h_flags, fields->f_13_3, 0);
 880       break;
 881     case M32C_OPERAND_SCCOND32 :
 882       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond16, 0);
 883       break;
 884     case M32C_OPERAND_SIZE :
 885       print_size (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 886       break;
 887
 888     default :
 889       /* xgettext:c-format */
 890       fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
 891                opindex);
 892     abort ();
 893   }
 894 }
 895
 896 cgen_print_fn * const m32c_cgen_print_handlers[] =
 897 {
 898   print_insn_normal,
 899 };
 900
 901
 902 void
 903 m32c_cgen_init_dis (CGEN_CPU_DESC cd)
 904 {
 905   m32c_cgen_init_opcode_table (cd);
 906   m32c_cgen_init_ibld_table (cd);
 907   cd->print_handlers = & m32c_cgen_print_handlers[0];
 908   cd->print_operand = m32c_cgen_print_operand;
 909 }
 910
 911 \f
 912 /* Default print handler.  */
 913
 914 static void
 915 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 916               void *dis_info,
 917               long value,
 918               unsigned int attrs,
 919               bfd_vma pc ATTRIBUTE_UNUSED,
 920               int length ATTRIBUTE_UNUSED)
 921 {
 922   disassemble_info *info = (disassemble_info *) dis_info;
 923
 924   /* Print the operand as directed by the attributes.  */
 925   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 926     ; /* nothing to do */
 927   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 928     (*info->fprintf_func) (info->stream, "%ld", value);
 929   else
 930     (*info->fprintf_func) (info->stream, "0x%lx", value);
 931 }
 932
 933 /* Default address handler.  */
 934
 935 static void
 936 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 937                void *dis_info,
 938                bfd_vma value,
 939                unsigned int attrs,
 940                bfd_vma pc ATTRIBUTE_UNUSED,
 941                int length ATTRIBUTE_UNUSED)
 942 {
 943   disassemble_info *info = (disassemble_info *) dis_info;
 944
 945   /* Print the operand as directed by the attributes.  */
 946   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 947     ; /* Nothing to do.  */
 948   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
 949     (*info->print_address_func) (value, info);
 950   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
 951     (*info->print_address_func) (value, info);
 952   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 953     (*info->fprintf_func) (info->stream, "%ld", (long) value);
 954   else
 955     (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
 956 }
 957
 958 /* Keyword print handler.  */
 959
 960 static void
 961 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
 962                void *dis_info,
 963                CGEN_KEYWORD *keyword_table,
 964                long value,
 965                unsigned int attrs ATTRIBUTE_UNUSED)
 966 {
 967   disassemble_info *info = (disassemble_info *) dis_info;
 968   const CGEN_KEYWORD_ENTRY *ke;
 969
 970   ke = cgen_keyword_lookup_value (keyword_table, value);
 971   if (ke != NULL)
 972     (*info->fprintf_func) (info->stream, "%s", ke->name);
 973   else
 974     (*info->fprintf_func) (info->stream, "???");
 975 }
 976 \f
 977 /* Default insn printer.
 978
 979    DIS_INFO is defined as `void *' so the disassembler needn't know anything
 980    about disassemble_info.  */
 981
 982 static void
 983 print_insn_normal (CGEN_CPU_DESC cd,
 984                    void *dis_info,
 985                    const CGEN_INSN *insn,
 986                    CGEN_FIELDS *fields,
 987                    bfd_vma pc,
 988                    int length)
 989 {
 990   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 991   disassemble_info *info = (disassemble_info *) dis_info;
 992   const CGEN_SYNTAX_CHAR_TYPE *syn;
 993
 994   CGEN_INIT_PRINT (cd);
 995
 996   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
 997     {
 998       if (CGEN_SYNTAX_MNEMONIC_P (*syn))
 999         {
1000           (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
1001           continue;
1002         }
1003       if (CGEN_SYNTAX_CHAR_P (*syn))
1004         {
1005           (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
1006           continue;
1007         }
1008
1009       /* We have an operand.  */
1010       m32c_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
1011                                  fields, CGEN_INSN_ATTRS (insn), pc, length);
1012     }
1013 }
1014 \f
1015 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
1016    the extract info.
1017    Returns 0 if all is well, non-zero otherwise.  */
1018
1019 static int
1020 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1021            bfd_vma pc,
1022            disassemble_info *info,
1023            bfd_byte *buf,
1024            int buflen,
1025            CGEN_EXTRACT_INFO *ex_info,
1026            unsigned long *insn_value)
1027 {
1028   int status = (*info->read_memory_func) (pc, buf, buflen, info);
1029
1030   if (status != 0)
1031     {
1032       (*info->memory_error_func) (status, pc, info);
1033       return -1;
1034     }
1035
1036   ex_info->dis_info = info;
1037   ex_info->valid = (1 << buflen) - 1;
1038   ex_info->insn_bytes = buf;
1039
1040   *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
1041   return 0;
1042 }
1043
1044 /* Utility to print an insn.
1045    BUF is the base part of the insn, target byte order, BUFLEN bytes long.
1046    The result is the size of the insn in bytes or zero for an unknown insn
1047    or -1 if an error occurs fetching data (memory_error_func will have
1048    been called).  */
1049
1050 static int
1051 print_insn (CGEN_CPU_DESC cd,
1052             bfd_vma pc,
1053             disassemble_info *info,
1054             bfd_byte *buf,
1055             unsigned int buflen)
1056 {
1057   CGEN_INSN_INT insn_value;
1058   const CGEN_INSN_LIST *insn_list;
1059   CGEN_EXTRACT_INFO ex_info;
1060   int basesize;
1061
1062   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
1063   basesize = cd->base_insn_bitsize < buflen * 8 ?
1064                                      cd->base_insn_bitsize : buflen * 8;
1065   insn_value = cgen_get_insn_value (cd, buf, basesize);
1066
1067
1068   /* Fill in ex_info fields like read_insn would.  Don't actually call
1069      read_insn, since the incoming buffer is already read (and possibly
1070      modified a la m32r).  */
1071   ex_info.valid = (1 << buflen) - 1;
1072   ex_info.dis_info = info;
1073   ex_info.insn_bytes = buf;
1074
1075   /* The instructions are stored in hash lists.
1076      Pick the first one and keep trying until we find the right one.  */
1077
1078   insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
1079   while (insn_list != NULL)
1080     {
1081       const CGEN_INSN *insn = insn_list->insn;
1082       CGEN_FIELDS fields;
1083       int length;
1084       unsigned long insn_value_cropped;
1085
1086 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
1087       /* Not needed as insn shouldn't be in hash lists if not supported.  */
1088       /* Supported by this cpu?  */
1089       if (! m32c_cgen_insn_supported (cd, insn))
1090         {
1091           insn_list = CGEN_DIS_NEXT_INSN (insn_list);
1092           continue;
1093         }
1094 #endif
1095
1096       /* Basic bit mask must be correct.  */
1097       /* ??? May wish to allow target to defer this check until the extract
1098          handler.  */
1099
1100       /* Base size may exceed this instruction's size.  Extract the
1101          relevant part from the buffer. */
1102       if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
1103           (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
1104         insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
1105                                            info->endian == BFD_ENDIAN_BIG);
1106       else
1107         insn_value_cropped = insn_value;
1108
1109       if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
1110           == CGEN_INSN_BASE_VALUE (insn))
1111         {
1112           /* Printing is handled in two passes.  The first pass parses the
1113              machine insn and extracts the fields.  The second pass prints
1114              them.  */
1115
1116           /* Make sure the entire insn is loaded into insn_value, if it
1117              can fit.  */
1118           if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
1119               (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
1120             {
1121               unsigned long full_insn_value;
1122               int rc = read_insn (cd, pc, info, buf,
1123                                   CGEN_INSN_BITSIZE (insn) / 8,
1124                                   & ex_info, & full_insn_value);
1125               if (rc != 0)
1126                 return rc;
1127               length = CGEN_EXTRACT_FN (cd, insn)
1128                 (cd, insn, &ex_info, full_insn_value, &fields, pc);
1129             }
1130           else
1131             length = CGEN_EXTRACT_FN (cd, insn)
1132               (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
1133
1134           /* Length < 0 -> error.  */
1135           if (length < 0)
1136             return length;
1137           if (length > 0)
1138             {
1139               CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
1140               /* Length is in bits, result is in bytes.  */
1141               return length / 8;
1142             }
1143         }
1144
1145       insn_list = CGEN_DIS_NEXT_INSN (insn_list);
1146     }
1147
1148   return 0;
1149 }
1150
1151 /* Default value for CGEN_PRINT_INSN.
1152    The result is the size of the insn in bytes or zero for an unknown insn
1153    or -1 if an error occured fetching bytes.  */
1154
1155 #ifndef CGEN_PRINT_INSN
1156 #define CGEN_PRINT_INSN default_print_insn
1157 #endif
1158
1159 static int
1160 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
1161 {
1162   bfd_byte buf[CGEN_MAX_INSN_SIZE];
1163   int buflen;
1164   int status;
1165
1166   /* Attempt to read the base part of the insn.  */
1167   buflen = cd->base_insn_bitsize / 8;
1168   status = (*info->read_memory_func) (pc, buf, buflen, info);
1169
1170   /* Try again with the minimum part, if min < base.  */
1171   if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
1172     {
1173       buflen = cd->min_insn_bitsize / 8;
1174       status = (*info->read_memory_func) (pc, buf, buflen, info);
1175     }
1176
1177   if (status != 0)
1178     {
1179       (*info->memory_error_func) (status, pc, info);
1180       return -1;
1181     }
1182
1183   return print_insn (cd, pc, info, buf, buflen);
1184 }
1185
1186 /* Main entry point.
1187    Print one instruction from PC on INFO->STREAM.
1188    Return the size of the instruction (in bytes).  */
1189
1190 typedef struct cpu_desc_list
1191 {
1192   struct cpu_desc_list *next;
1193   CGEN_BITSET *isa;
1194   int mach;
1195   int endian;
1196   CGEN_CPU_DESC cd;
1197 } cpu_desc_list;
1198
1199 int
1200 print_insn_m32c (bfd_vma pc, disassemble_info *info)
1201 {
1202   static cpu_desc_list *cd_list = 0;
1203   cpu_desc_list *cl = 0;
1204   static CGEN_CPU_DESC cd = 0;
1205   static CGEN_BITSET *prev_isa;
1206   static int prev_mach;
1207   static int prev_endian;
1208   int length;
1209   CGEN_BITSET *isa;
1210   int mach;
1211   int endian = (info->endian == BFD_ENDIAN_BIG
1212                 ? CGEN_ENDIAN_BIG
1213                 : CGEN_ENDIAN_LITTLE);
1214   enum bfd_architecture arch;
1215
1216   /* ??? gdb will set mach but leave the architecture as "unknown" */
1217 #ifndef CGEN_BFD_ARCH
1218 #define CGEN_BFD_ARCH bfd_arch_m32c
1219 #endif
1220   arch = info->arch;
1221   if (arch == bfd_arch_unknown)
1222     arch = CGEN_BFD_ARCH;
1223
1224   /* There's no standard way to compute the machine or isa number
1225      so we leave it to the target.  */
1226 #ifdef CGEN_COMPUTE_MACH
1227   mach = CGEN_COMPUTE_MACH (info);
1228 #else
1229   mach = info->mach;
1230 #endif
1231
1232 #ifdef CGEN_COMPUTE_ISA
1233   {
1234     static CGEN_BITSET *permanent_isa;
1235
1236     if (!permanent_isa)
1237       permanent_isa = cgen_bitset_create (MAX_ISAS);
1238     isa = permanent_isa;
1239     cgen_bitset_clear (isa);
1240     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
1241   }
1242 #else
1243   isa = info->insn_sets;
1244 #endif
1245
1246   /* If we've switched cpu's, try to find a handle we've used before */
1247   if (cd
1248       && (cgen_bitset_compare (isa, prev_isa) != 0
1249           || mach != prev_mach
1250           || endian != prev_endian))
1251     {
1252       cd = 0;
1253       for (cl = cd_list; cl; cl = cl->next)
1254         {
1255           if (cgen_bitset_compare (cl->isa, isa) == 0 &&
1256               cl->mach == mach &&
1257               cl->endian == endian)
1258             {
1259               cd = cl->cd;
1260               prev_isa = cd->isas;
1261               break;
1262             }
1263         }
1264     }
1265
1266   /* If we haven't initialized yet, initialize the opcode table.  */
1267   if (! cd)
1268     {
1269       const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
1270       const char *mach_name;
1271
1272       if (!arch_type)
1273         abort ();
1274       mach_name = arch_type->printable_name;
1275
1276       prev_isa = cgen_bitset_copy (isa);
1277       prev_mach = mach;
1278       prev_endian = endian;
1279       cd = m32c_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
1280                                  CGEN_CPU_OPEN_BFDMACH, mach_name,
1281                                  CGEN_CPU_OPEN_ENDIAN, prev_endian,
1282                                  CGEN_CPU_OPEN_END);
1283       if (!cd)
1284         abort ();
1285
1286       /* Save this away for future reference.  */
1287       cl = xmalloc (sizeof (struct cpu_desc_list));
1288       cl->cd = cd;
1289       cl->isa = prev_isa;
1290       cl->mach = mach;
1291       cl->endian = endian;
1292       cl->next = cd_list;
1293       cd_list = cl;
1294
1295       m32c_cgen_init_dis (cd);
1296     }
1297
1298   /* We try to have as much common code as possible.
1299      But at this point some targets need to take over.  */
1300   /* ??? Some targets may need a hook elsewhere.  Try to avoid this,
1301      but if not possible try to move this hook elsewhere rather than
1302      have two hooks.  */
1303   length = CGEN_PRINT_INSN (cd, pc, info);
1304   if (length > 0)
1305     return length;
1306   if (length < 0)
1307     return -1;
1308
1309   (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
1310   return cd->default_insn_bitsize / 8;
1311 }