AArch64: Add SVE DWARF registers
[binutils-gdb.git] / ld / testsuite / ld-arm / arm-export-class.rd
blob78d5d1e87034db728b0956ca4aafab771bc478a2
1 Relocation section '\.rel\.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries:
2  * Offset * Info * Type * Sym\. *Value * Sym\. * Name
3 12340010  00000017 R_ARM_RELATIVE *
4 12340020  00000017 R_ARM_RELATIVE *
5 12340060  00000017 R_ARM_RELATIVE *
6 12340070  00000017 R_ARM_RELATIVE *
7 12340080  00000017 R_ARM_RELATIVE *
8 12340090  00000017 R_ARM_RELATIVE *
9 12340000  [0-9a-f]+02 R_ARM_ABS32       123400a0   protected_baz
10 12340040  [0-9a-f]+02 R_ARM_ABS32       123400a0   protected_foo
11 12340050  [0-9a-f]+02 R_ARM_ABS32       123400a0   protected_bar