AArch64: Add SVE DWARF registers
[binutils-gdb.git] / ld / testsuite / ld-mips-elf / n64-plt-4.dd
blob01c502561538f5a662445237ba6b86a295342912
1 .*: +file format .*mips.*
3 Disassembly of section \.plt:
5 ffffffff10000280 <_PROCEDURE_LINKAGE_TABLE_>:
6 ffffffff10000280:       3c0e8000        lui     t2,0x8000
7 ffffffff10000284:       ddd98000        ld      t9,-32768\(t2\)
8 ffffffff10000288:       25ce8000        addiu   t2,t2,-32768
9 ffffffff1000028c:       030ec023        subu    t8,t8,t2
10 ffffffff10000290:       03e07825        move    t3,ra
11 ffffffff10000294:       0018c0c2        srl     t8,t8,0x3
12 ffffffff10000298:       0320f809        jalr    t9
13 ffffffff1000029c:       2718fffe        addiu   t8,t8,-2
15 ffffffff100002a0 <bar@plt>:
16 ffffffff100002a0:       3c0f8000        lui     t3,0x8000
17 ffffffff100002a4:       ddf98010        ld      t9,-32752\(t3\)
18 ffffffff100002a8:       03200008        jr      t9
19 ffffffff100002ac:       25f88010        addiu   t8,t3,-32752
21 Disassembly of section \.text:
23 ffffffff100002b0 <foo>:
24 ffffffff100002b0:       080000a8        j       ffffffff100002a0 <bar@plt>
25 ffffffff100002b4:       00000000        nop
26         \.\.\.