gdb/i386-tdep.h

   1 /* Target-dependent code for the i386.
   2
   3    Copyright (C) 2001-2022 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #ifndef I386_TDEP_H
  21 #define I386_TDEP_H
  22
  23 #include "gdbarch.h"
  24 #include "infrun.h"
  25 #include "expression.h"
  26
  27 struct frame_info;
  28 struct gdbarch;
  29 struct reggroup;
  30 struct regset;
  31 struct regcache;
  32
  33 /* GDB's i386 target supports both the 32-bit Intel Architecture
  34    (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
  35    a similar register layout for both.
  36
  37    - General purpose registers
  38    - FPU data registers
  39    - FPU control registers
  40    - SSE data registers
  41    - SSE control register
  42
  43    The general purpose registers for the x86-64 architecture are quite
  44    different from IA-32.  Therefore, gdbarch_fp0_regnum
  45    determines the register number at which the FPU data registers
  46    start.  The number of FPU data and control registers is the same
  47    for both architectures.  The number of SSE registers however,
  48    differs and is determined by the num_xmm_regs member of `struct
  49    gdbarch_tdep'.  */
  50
  51 /* Convention for returning structures.  */
  52
  53 enum struct_return
  54 {
  55   pcc_struct_return,            /* Return "short" structures in memory.  */
  56   reg_struct_return             /* Return "short" structures in registers.  */
  57 };
  58
  59 /* i386 architecture specific information.  */
  60 struct i386_gdbarch_tdep : gdbarch_tdep
  61 {
  62   /* General-purpose registers.  */
  63   int *gregset_reg_offset = 0;
  64   int gregset_num_regs = 0;
  65   size_t sizeof_gregset = 0;
  66
  67   /* Floating-point registers.  */
  68   size_t sizeof_fpregset = 0;
  69
  70   /* Register number for %st(0).  The register numbers for the other
  71      registers follow from this one.  Set this to -1 to indicate the
  72      absence of an FPU.  */
  73   int st0_regnum = 0;
  74
  75   /* Number of MMX registers.  */
  76   int num_mmx_regs = 0;
  77
  78   /* Register number for %mm0.  Set this to -1 to indicate the absence
  79      of MMX support.  */
  80   int mm0_regnum = 0;
  81
  82   /* Number of pseudo YMM registers.  */
  83   int num_ymm_regs = 0;
  84
  85   /* Register number for %ymm0.  Set this to -1 to indicate the absence
  86      of pseudo YMM register support.  */
  87   int ymm0_regnum = 0;
  88
  89   /* Number of AVX512 OpMask registers (K-registers)  */
  90   int num_k_regs = 0;
  91
  92   /* Register number for %k0.  Set this to -1 to indicate the absence
  93      of AVX512 OpMask register support.  */
  94   int k0_regnum = 0;
  95
  96   /* Number of pseudo ZMM registers ($zmm0-$zmm31).  */
  97   int num_zmm_regs = 0;
  98
  99   /* Register number for %zmm0.  Set this to -1 to indicate the absence
 100      of pseudo ZMM register support.  */
 101   int zmm0_regnum = 0;
 102
 103   /* Number of byte registers.  */
 104   int num_byte_regs = 0;
 105
 106   /* Register pseudo number for %al.  */
 107   int al_regnum = 0;
 108
 109   /* Number of pseudo word registers.  */
 110   int num_word_regs = 0;
 111
 112   /* Register number for %ax.  */
 113   int ax_regnum = 0;
 114
 115   /* Number of pseudo dword registers.  */
 116   int num_dword_regs = 0;
 117
 118   /* Register number for %eax.  Set this to -1 to indicate the absence
 119      of pseudo dword register support.  */
 120   int eax_regnum = 0;
 121
 122   /* Number of core registers.  */
 123   int num_core_regs = 0;
 124
 125   /* Number of SSE registers.  */
 126   int num_xmm_regs = 0;
 127
 128   /* Number of SSE registers added in AVX512.  */
 129   int num_xmm_avx512_regs = 0;
 130
 131   /* Register number of XMM16, the first XMM register added in AVX512.  */
 132   int xmm16_regnum = 0;
 133
 134   /* Number of YMM registers added in AVX512.  */
 135   int num_ymm_avx512_regs = 0;
 136
 137   /* Register number of YMM16, the first YMM register added in AVX512.  */
 138   int ymm16_regnum = 0;
 139
 140   /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
 141      register), excluding the x87 bit, which are supported by this GDB.  */
 142
 143   uint64_t xcr0 = 0;
 144
 145   /* Offset of XCR0 in XSAVE extended state.  */
 146   int xsave_xcr0_offset = 0;
 147
 148   /* Register names.  */
 149   const char * const *register_names = nullptr;
 150
 151   /* Register number for %ymm0h.  Set this to -1 to indicate the absence
 152      of upper YMM register support.  */
 153   int ymm0h_regnum = 0;
 154
 155   /* Upper YMM register names.  Only used for tdesc_numbered_register.  */
 156   const char * const *ymmh_register_names = nullptr;
 157
 158   /* Register number for %ymm16h.  Set this to -1 to indicate the absence
 159   of support for YMM16-31.  */
 160   int ymm16h_regnum = 0;
 161
 162   /* YMM16-31 register names.  Only used for tdesc_numbered_register.  */
 163   const char * const *ymm16h_register_names = nullptr;
 164
 165   /* Register number for %bnd0r.  Set this to -1 to indicate the absence
 166      bound registers.  */
 167   int bnd0r_regnum = 0;
 168
 169   /* Register number for pseudo register %bnd0.  Set this to -1 to indicate the absence
 170      bound registers.  */
 171   int bnd0_regnum = 0;
 172
 173   /* Register number for %bndcfgu. Set this to -1 to indicate the absence
 174      bound control registers.  */
 175   int bndcfgu_regnum = 0;
 176
 177   /* MPX register names.  Only used for tdesc_numbered_register.  */
 178   const char * const *mpx_register_names = nullptr;
 179
 180   /* Register number for %zmm0h.  Set this to -1 to indicate the absence
 181      of ZMM_HI256 register support.  */
 182   int zmm0h_regnum = 0;
 183
 184   /* OpMask register names.  */
 185   const char * const *k_register_names = nullptr;
 186
 187   /* ZMM register names.  Only used for tdesc_numbered_register.  */
 188   const char * const *zmmh_register_names = nullptr;
 189
 190   /* XMM16-31 register names.  Only used for tdesc_numbered_register.  */
 191   const char * const *xmm_avx512_register_names = nullptr;
 192
 193   /* YMM16-31 register names.  Only used for tdesc_numbered_register.  */
 194   const char * const *ymm_avx512_register_names = nullptr;
 195
 196   /* Number of PKEYS registers.  */
 197   int num_pkeys_regs = 0;
 198
 199   /* Register number for PKRU register.  */
 200   int pkru_regnum = 0;
 201
 202   /* PKEYS register names.  */
 203   const char * const *pkeys_register_names = nullptr;
 204
 205   /* Register number for %fsbase.  Set this to -1 to indicate the
 206      absence of segment base registers.  */
 207   int fsbase_regnum = 0;
 208
 209   /* Target description.  */
 210   const struct target_desc *tdesc = nullptr;
 211
 212   /* Register group function.  */
 213   gdbarch_register_reggroup_p_ftype *register_reggroup_p = nullptr;
 214
 215   /* Offset of saved PC in jmp_buf.  */
 216   int jb_pc_offset = 0;
 217
 218   /* Convention for returning structures.  */
 219   enum struct_return struct_return {};
 220
 221   /* Address range where sigtramp lives.  */
 222   CORE_ADDR sigtramp_start = 0;
 223   CORE_ADDR sigtramp_end = 0;
 224
 225   /* Detect sigtramp.  */
 226   int (*sigtramp_p) (struct frame_info *) = nullptr;
 227
 228   /* Get address of sigcontext for sigtramp.  */
 229   CORE_ADDR (*sigcontext_addr) (struct frame_info *) = nullptr;
 230
 231   /* Offset of registers in `struct sigcontext'.  */
 232   int *sc_reg_offset = 0;
 233   int sc_num_regs = 0;
 234
 235   /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
 236      is deprecated, please use `sc_reg_offset' instead.  */
 237   int sc_pc_offset = 0;
 238   int sc_sp_offset = 0;
 239
 240   /* ISA-specific data types.  */
 241   struct type *i386_mmx_type = nullptr;
 242   struct type *i386_ymm_type = nullptr;
 243   struct type *i386_zmm_type = nullptr;
 244   struct type *i387_ext_type = nullptr;
 245   struct type *i386_bnd_type = nullptr;
 246
 247   /* Process record/replay target.  */
 248   /* The map for registers because the AMD64's registers order
 249      in GDB is not same as I386 instructions.  */
 250   const int *record_regmap = nullptr;
 251   /* Parse intx80 args.  */
 252   int (*i386_intx80_record) (struct regcache *regcache) = nullptr;
 253   /* Parse sysenter args.  */
 254   int (*i386_sysenter_record) (struct regcache *regcache) = nullptr;
 255   /* Parse syscall args.  */
 256   int (*i386_syscall_record) (struct regcache *regcache) = nullptr;
 257
 258   /* Regsets. */
 259   const struct regset *fpregset = nullptr;
 260 };
 261
 262 /* Floating-point registers.  */
 263
 264 /* All FPU control registers (except for FIOFF and FOOFF) are 16-bit
 265    (at most) in the FPU, but are zero-extended to 32 bits in GDB's
 266    register cache.  */
 267
 268 /* Return non-zero if REGNUM matches the FP register and the FP
 269    register set is active.  */
 270 extern int i386_fp_regnum_p (struct gdbarch *, int);
 271 extern int i386_fpc_regnum_p (struct gdbarch *, int);
 272
 273 /* Register numbers of various important registers.  */
 274
 275 enum i386_regnum
 276 {
 277   I386_EAX_REGNUM,              /* %eax */
 278   I386_ECX_REGNUM,              /* %ecx */
 279   I386_EDX_REGNUM,              /* %edx */
 280   I386_EBX_REGNUM,              /* %ebx */
 281   I386_ESP_REGNUM,              /* %esp */
 282   I386_EBP_REGNUM,              /* %ebp */
 283   I386_ESI_REGNUM,              /* %esi */
 284   I386_EDI_REGNUM,              /* %edi */
 285   I386_EIP_REGNUM,              /* %eip */
 286   I386_EFLAGS_REGNUM,           /* %eflags */
 287   I386_CS_REGNUM,               /* %cs */
 288   I386_SS_REGNUM,               /* %ss */
 289   I386_DS_REGNUM,               /* %ds */
 290   I386_ES_REGNUM,               /* %es */
 291   I386_FS_REGNUM,               /* %fs */
 292   I386_GS_REGNUM,               /* %gs */
 293   I386_ST0_REGNUM,              /* %st(0) */
 294   I386_MXCSR_REGNUM = 40,       /* %mxcsr */
 295   I386_YMM0H_REGNUM,            /* %ymm0h */
 296   I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
 297   I386_BND0R_REGNUM,
 298   I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
 299   I386_BNDCFGU_REGNUM,
 300   I386_BNDSTATUS_REGNUM,
 301   I386_K0_REGNUM,               /* %k0 */
 302   I386_K7_REGNUM = I386_K0_REGNUM + 7,
 303   I386_ZMM0H_REGNUM,            /* %zmm0h */
 304   I386_ZMM7H_REGNUM = I386_ZMM0H_REGNUM + 7,
 305   I386_PKRU_REGNUM,
 306   I386_FSBASE_REGNUM,
 307   I386_GSBASE_REGNUM
 308 };
 309
 310 /* Register numbers of RECORD_REGMAP.  */
 311
 312 enum record_i386_regnum
 313 {
 314   X86_RECORD_REAX_REGNUM,
 315   X86_RECORD_RECX_REGNUM,
 316   X86_RECORD_REDX_REGNUM,
 317   X86_RECORD_REBX_REGNUM,
 318   X86_RECORD_RESP_REGNUM,
 319   X86_RECORD_REBP_REGNUM,
 320   X86_RECORD_RESI_REGNUM,
 321   X86_RECORD_REDI_REGNUM,
 322   X86_RECORD_R8_REGNUM,
 323   X86_RECORD_R9_REGNUM,
 324   X86_RECORD_R10_REGNUM,
 325   X86_RECORD_R11_REGNUM,
 326   X86_RECORD_R12_REGNUM,
 327   X86_RECORD_R13_REGNUM,
 328   X86_RECORD_R14_REGNUM,
 329   X86_RECORD_R15_REGNUM,
 330   X86_RECORD_REIP_REGNUM,
 331   X86_RECORD_EFLAGS_REGNUM,
 332   X86_RECORD_CS_REGNUM,
 333   X86_RECORD_SS_REGNUM,
 334   X86_RECORD_DS_REGNUM,
 335   X86_RECORD_ES_REGNUM,
 336   X86_RECORD_FS_REGNUM,
 337   X86_RECORD_GS_REGNUM,
 338 };
 339
 340 #define I386_NUM_GREGS  16
 341 #define I386_NUM_XREGS  9
 342
 343 #define I386_SSE_NUM_REGS       (I386_MXCSR_REGNUM + 1)
 344 #define I386_AVX_NUM_REGS       (I386_YMM7H_REGNUM + 1)
 345 #define I386_MPX_NUM_REGS       (I386_BNDSTATUS_REGNUM + 1)
 346 #define I386_AVX512_NUM_REGS    (I386_ZMM7H_REGNUM + 1)
 347 #define I386_PKEYS_NUM_REGS     (I386_PKRU_REGNUM + 1)
 348 #define I386_NUM_REGS           (I386_GSBASE_REGNUM + 1)
 349
 350 /* Size of the largest register.  */
 351 #define I386_MAX_REGISTER_SIZE  64
 352
 353 /* Types for i386-specific registers.  */
 354 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
 355
 356 /* Checks of different pseudo-registers.  */
 357 extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
 358 extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
 359 extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
 360 extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
 361 extern int i386_xmm_avx512_regnum_p (struct gdbarch * gdbarch, int regnum);
 362 extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
 363 extern int i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum);
 364 extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
 365 extern int i386_k_regnum_p (struct gdbarch *gdbarch, int regnum);
 366 extern int i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum);
 367 extern int i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum);
 368 extern bool i386_pkru_regnum_p (struct gdbarch *gdbarch, int regnum);
 369
 370 extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
 371                                               int regnum);
 372 extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
 373                                                int regnum);
 374
 375 extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
 376                                                   readable_regcache *regcache,
 377                                                   int regnum,
 378                                                   struct value *result);
 379
 380 extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
 381                                         struct regcache *regcache,
 382                                         int regnum, const gdb_byte *buf);
 383
 384 extern int i386_ax_pseudo_register_collect (struct gdbarch *gdbarch,
 385                                             struct agent_expr *ax,
 386                                             int regnum);
 387
 388 /* Segment selectors.  */
 389 #define I386_SEL_RPL    0x0003  /* Requester's Privilege Level mask.  */
 390 #define I386_SEL_UPL    0x0003  /* User Privilige Level.  */
 391 #define I386_SEL_KPL    0x0000  /* Kernel Privilige Level.  */
 392
 393 /* The length of the longest i386 instruction (according to
 394    include/asm-i386/kprobes.h in Linux 2.6.  */
 395 #define I386_MAX_INSN_LEN (16)
 396
 397 /* Functions exported from i386-tdep.c.  */
 398 extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
 399                                                CORE_ADDR pc, char *name);
 400 extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
 401                                           CORE_ADDR pc);
 402
 403 /* The "push_dummy_call" gdbarch method, optionally with the thiscall
 404    calling convention.  */
 405 extern CORE_ADDR i386_thiscall_push_dummy_call (struct gdbarch *gdbarch,
 406                                                 struct value *function,
 407                                                 struct regcache *regcache,
 408                                                 CORE_ADDR bp_addr,
 409                                                 int nargs, struct value **args,
 410                                                 CORE_ADDR sp,
 411                                                 function_call_return_method
 412                                                 return_method,
 413                                                 CORE_ADDR struct_addr,
 414                                                 bool thiscall);
 415
 416 /* Return whether the THIS_FRAME corresponds to a sigtramp routine.  */
 417 extern int i386_sigtramp_p (struct frame_info *this_frame);
 418
 419 /* Return non-zero if REGNUM is a member of the specified group.  */
 420 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
 421                                      const struct reggroup *group);
 422
 423 /* Supply register REGNUM from the general-purpose register set REGSET
 424    to register cache REGCACHE.  If REGNUM is -1, do this for all
 425    registers in REGSET.  */
 426 extern void i386_supply_gregset (const struct regset *regset,
 427                                  struct regcache *regcache, int regnum,
 428                                  const void *gregs, size_t len);
 429
 430 /* General-purpose register set. */
 431 extern const struct regset i386_gregset;
 432
 433 /* Floating-point register set. */
 434 extern const struct regset i386_fpregset;
 435
 436 /* Default iterator over core file register note sections.  */
 437 extern void
 438   i386_iterate_over_regset_sections (struct gdbarch *gdbarch,
 439                                      iterate_over_regset_sections_cb *cb,
 440                                      void *cb_data,
 441                                      const struct regcache *regcache);
 442
 443 typedef buf_displaced_step_copy_insn_closure
 444   i386_displaced_step_copy_insn_closure;
 445
 446 extern displaced_step_copy_insn_closure_up i386_displaced_step_copy_insn
 447   (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
 448    struct regcache *regs);
 449 extern void i386_displaced_step_fixup
 450   (struct gdbarch *gdbarch, displaced_step_copy_insn_closure *closure,
 451    CORE_ADDR from, CORE_ADDR to, regcache *regs);
 452
 453 /* Initialize a basic ELF architecture variant.  */
 454 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
 455
 456 /* Initialize a SVR4 architecture variant.  */
 457 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
 458
 459 /* Convert SVR4 register number REG to the appropriate register number
 460    used by GDB.  */
 461 extern int i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg);
 462
 463 extern int i386_process_record (struct gdbarch *gdbarch,
 464                                 struct regcache *regcache, CORE_ADDR addr);
 465 extern const struct target_desc *i386_target_description (uint64_t xcr0,
 466                                                           bool segments);
 467
 468 /* Return true iff the current target is MPX enabled.  */
 469 extern int i386_mpx_enabled (void);
 470 \f
 471
 472 /* Functions and variables exported from i386-bsd-tdep.c.  */
 473
 474 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
 475 extern CORE_ADDR i386obsd_sigtramp_start_addr;
 476 extern CORE_ADDR i386obsd_sigtramp_end_addr;
 477 extern int i386obsd_sc_reg_offset[];
 478 extern int i386bsd_sc_reg_offset[];
 479
 480 /* SystemTap related functions.  */
 481
 482 extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
 483                                         const char *s);
 484
 485 extern expr::operation_up i386_stap_parse_special_token
 486      (struct gdbarch *gdbarch, struct stap_parse_info *p);
 487
 488 #endif /* i386-tdep.h */