1 @c Copyright (C) 2001-2022 Free Software Foundation, Inc.
2 @c This is part of the GAS manual.
3 @c For copying conditions, see the file as.texinfo.
8 @chapter PowerPC Dependent Features
11 @node Machine Dependencies
12 @chapter PowerPC Dependent Features
15 @cindex PowerPC support
17 * PowerPC-Opts:: Options
18 * PowerPC-Pseudo:: PowerPC Assembler Directives
19 * PowerPC-Syntax:: PowerPC Syntax
25 @cindex options for PowerPC
26 @cindex PowerPC options
27 @cindex architectures, PowerPC
28 @cindex PowerPC architectures
29 The PowerPC chip family includes several successive levels, using the same
30 core instruction set, but including a few additional instructions at
31 each level. There are exceptions to this however. For details on what
32 instructions each variant supports, please see the chip's architecture
35 The following table lists all available PowerPC options.
40 Generate ELF32 or XCOFF32.
43 Generate ELF64 or XCOFF64.
46 Set EF_PPC_RELOCATABLE_LIB in ELF flags.
49 Generate code for POWER/2 (RIOS2).
52 Generate code for POWER (RIOS1)
55 Generate code for PowerPC 601.
57 @item -mppc, -mppc32, -m603, -m604
58 Generate code for PowerPC 603/604.
61 Generate code for PowerPC 403/405.
64 Generate code for PowerPC 440. BookE and some 405 instructions.
67 Generate code for PowerPC 464.
70 Generate code for PowerPC 476.
72 @item -m7400, -m7410, -m7450, -m7455
73 Generate code for PowerPC 7400/7410/7450/7455.
75 @item -m750cl, -mgekko, -mbroadway
76 Generate code for PowerPC 750CL/Gekko/Broadway.
78 @item -m821, -m850, -m860
79 Generate code for PowerPC 821/850/860.
82 Generate code for PowerPC 620/625/630.
84 @item -me500, -me500x2
85 Generate code for Motorola e500 core complex.
88 Generate code for Freescale e500mc core complex.
91 Generate code for Freescale e500mc64 core complex.
94 Generate code for Freescale e5500 core complex.
97 Generate code for Freescale e6500 core complex.
100 Generate code for Motorola SPE instructions.
103 Generate code for Freescale SPE2 instructions.
106 Generate code for AppliedMicro Titan core complex.
109 Generate code for PowerPC 64, including bridge insns.
112 Generate code for 32-bit BookE.
115 Generate code for A2 architecture.
118 Generate code for PowerPC e300 family.
121 Generate code for processors with AltiVec instructions.
124 Generate code for Freescale PowerPC VLE instructions.
127 Generate code for processors with Vector-Scalar (VSX) instructions.
130 Generate code for processors with Hardware Transactional Memory instructions.
132 @item -mpower4, -mpwr4
133 Generate code for Power4 architecture.
135 @item -mpower5, -mpwr5, -mpwr5x
136 Generate code for Power5 architecture.
138 @item -mpower6, -mpwr6
139 Generate code for Power6 architecture.
141 @item -mpower7, -mpwr7
142 Generate code for Power7 architecture.
144 @item -mpower8, -mpwr8
145 Generate code for Power8 architecture.
147 @item -mpower9, -mpwr9
148 Generate code for Power9 architecture.
150 @item -mpower10, -mpwr10
151 Generate code for Power10 architecture.
155 Generate code for Cell Broadband Engine architecture.
158 Generate code Power/PowerPC common instructions.
161 Generate code for any architecture (PWR/PWRX/PPC).
164 Allow symbolic names for registers.
167 Do not allow symbolic names for registers.
170 Support for GCC's -mrelocatable option.
172 @item -mrelocatable-lib
173 Support for GCC's -mrelocatable-lib option.
176 Set PPC_EMB bit in ELF flags.
178 @item -mlittle, -mlittle-endian, -le
179 Generate code for a little endian machine.
181 @item -mbig, -mbig-endian, -be
182 Generate code for a big endian machine.
185 Generate code for Solaris.
188 Do not generate code for Solaris.
190 @item -nops=@var{count}
191 If an alignment directive inserts more than @var{count} nops, put a
192 branch at the beginning to skip execution of the nops.
198 @section PowerPC Assembler Directives
200 @cindex directives for PowerPC
201 @cindex PowerPC directives
202 A number of assembler directives are available for PowerPC. The
203 following table is far from complete.
206 @item .machine "string"
207 This directive allows you to change the machine for which code is
208 generated. @code{"string"} may be any of the -m cpu selection options
209 (without the -m) enclosed in double quotes, @code{"push"}, or
210 @code{"pop"}. @code{.machine "push"} saves the currently selected
211 cpu, which may be restored with @code{.machine "pop"}.
215 @section PowerPC Syntax
217 * PowerPC-Chars:: Special Characters
221 @subsection Special Characters
223 @cindex line comment character, PowerPC
224 @cindex PowerPC line comment character
225 The presence of a @samp{#} on a line indicates the start of a comment
226 that extends to the end of the current line.
228 If a @samp{#} appears as the first character of a line then the whole
229 line is treated as a comment, but in this case the line could also be
230 a logical line number directive (@pxref{Comments}) or a preprocessor
231 control command (@pxref{Preprocessing}).
233 If the assembler has been configured for the ppc-*-solaris* target
234 then the @samp{!} character also acts as a line comment character.
235 This can be disabled via the @option{-mno-solaris} command-line
238 @cindex line separator, PowerPC
239 @cindex statement separator, PowerPC
240 @cindex PowerPC line separator
241 The @samp{;} character can be used to separate statements on the same