gdbsupport/x86-xstate.h

   1 /* Common code for x86 XSAVE extended state.
   2
   3    Copyright (C) 2010-2022 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #ifndef COMMON_X86_XSTATE_H
  21 #define COMMON_X86_XSTATE_H
  22
  23 /* The extended state feature bits.  */
  24 #define X86_XSTATE_X87          (1ULL << 0)
  25 #define X86_XSTATE_SSE          (1ULL << 1)
  26 #define X86_XSTATE_AVX          (1ULL << 2)
  27 #define X86_XSTATE_BNDREGS      (1ULL << 3)
  28 #define X86_XSTATE_BNDCFG       (1ULL << 4)
  29 #define X86_XSTATE_MPX          (X86_XSTATE_BNDREGS | X86_XSTATE_BNDCFG)
  30
  31 /* AVX 512 adds three feature bits.  All three must be enabled.  */
  32 #define X86_XSTATE_K            (1ULL << 5)
  33 #define X86_XSTATE_ZMM_H        (1ULL << 6)
  34 #define X86_XSTATE_ZMM          (1ULL << 7)
  35 #define X86_XSTATE_AVX512       (X86_XSTATE_K | X86_XSTATE_ZMM_H \
  36                                  | X86_XSTATE_ZMM)
  37
  38 #define X86_XSTATE_PKRU         (1ULL << 9)
  39
  40 /* Supported mask and size of the extended state.  */
  41 #define X86_XSTATE_X87_MASK     X86_XSTATE_X87
  42 #define X86_XSTATE_SSE_MASK     (X86_XSTATE_X87 | X86_XSTATE_SSE)
  43 #define X86_XSTATE_AVX_MASK     (X86_XSTATE_SSE_MASK | X86_XSTATE_AVX)
  44 #define X86_XSTATE_MPX_MASK     (X86_XSTATE_SSE_MASK | X86_XSTATE_MPX)
  45 #define X86_XSTATE_AVX_MPX_MASK (X86_XSTATE_AVX_MASK | X86_XSTATE_MPX)
  46 #define X86_XSTATE_AVX_AVX512_MASK      (X86_XSTATE_AVX_MASK | X86_XSTATE_AVX512)
  47 #define X86_XSTATE_AVX_MPX_AVX512_PKU_MASK      (X86_XSTATE_AVX_MPX_MASK\
  48                                         | X86_XSTATE_AVX512 | X86_XSTATE_PKRU)
  49
  50 #define X86_XSTATE_ALL_MASK             (X86_XSTATE_AVX_MPX_AVX512_PKU_MASK)
  51
  52
  53 #define X86_XSTATE_SSE_SIZE     576
  54 #define X86_XSTATE_AVX_SIZE     832
  55 #define X86_XSTATE_BNDREGS_SIZE 1024
  56 #define X86_XSTATE_BNDCFG_SIZE  1088
  57 #define X86_XSTATE_AVX512_SIZE  2688
  58 #define X86_XSTATE_PKRU_SIZE    2696
  59 #define X86_XSTATE_MAX_SIZE     2696
  60
  61
  62 /* In case one of the MPX XCR0 bits is set we consider we have MPX.  */
  63 #define HAS_MPX(XCR0) (((XCR0) & X86_XSTATE_MPX) != 0)
  64 #define HAS_AVX(XCR0) (((XCR0) & X86_XSTATE_AVX) != 0)
  65 #define HAS_AVX512(XCR0) (((XCR0) & X86_XSTATE_AVX512) != 0)
  66 #define HAS_PKRU(XCR0) (((XCR0) & X86_XSTATE_PKRU) != 0)
  67
  68 /* Get I386 XSAVE extended state size.  */
  69 #define X86_XSTATE_SIZE(XCR0) \
  70     (HAS_PKRU (XCR0) ? X86_XSTATE_PKRU_SIZE : \
  71      (HAS_AVX512 (XCR0) ? X86_XSTATE_AVX512_SIZE : \
  72       (HAS_MPX (XCR0) ? X86_XSTATE_BNDCFG_SIZE : \
  73        (HAS_AVX (XCR0) ? X86_XSTATE_AVX_SIZE : X86_XSTATE_SSE_SIZE))))
  74
  75 /* Initial value for fctrl register, as defined in the X86 manual, and
  76    confirmed in the (Linux) kernel source.  When the x87 floating point
  77    feature is not enabled in an inferior we use this as the value of the
  78    fcrtl register.  */
  79
  80 #define I387_FCTRL_INIT_VAL 0x037f
  81
  82 /* Initial value for mxcsr register.  When the avx and sse floating point
  83    features are not enabled in an inferior we use this as the value of the
  84    mxcsr register.  */
  85
  86 #define I387_MXCSR_INIT_VAL 0x1f80
  87
  88 #endif /* COMMON_X86_XSTATE_H */