regenerate configure
[binutils.git] / ld / testsuite / ld-powerpc / tlsso.d
blob3fa4029d5a91bedfd17a6cb0af7ad27a9c7bf011
1 #source: tls.s
2 #as: -a64
3 #ld: -shared -melf64ppc
4 #objdump: -dr
5 #target: powerpc64*-*-*
7 .*: +file format elf64-powerpc
9 Disassembly of section \.text:
11 .* <\.__tls_get_addr>:
12 .* f8 41 00 28 std r2,40\(r1\)
13 .* e9 62 80 78 ld r11,-32648\(r2\)
14 .* 7d 69 03 a6 mtctr r11
15 .* e9 62 80 88 ld r11,-32632\(r2\)
16 .* e8 42 80 80 ld r2,-32640\(r2\)
17 .* 4e 80 04 20 bctr
19 .* <_start>:
20 .* 38 62 80 30 addi r3,r2,-32720
21 .* 4b ff ff e5 bl .* <\.__tls_get_addr>
22 .* e8 41 00 28 ld r2,40\(r1\)
23 .* 38 62 80 08 addi r3,r2,-32760
24 .* 4b ff ff d9 bl .* <\.__tls_get_addr>
25 .* e8 41 00 28 ld r2,40\(r1\)
26 .* 38 62 80 48 addi r3,r2,-32696
27 .* 4b ff ff cd bl .* <\.__tls_get_addr>
28 .* e8 41 00 28 ld r2,40\(r1\)
29 .* 38 62 80 08 addi r3,r2,-32760
30 .* 4b ff ff c1 bl .* <\.__tls_get_addr>
31 .* e8 41 00 28 ld r2,40\(r1\)
32 .* 39 23 80 40 addi r9,r3,-32704
33 .* 3d 23 00 00 addis r9,r3,0
34 .* 81 49 80 48 lwz r10,-32696\(r9\)
35 .* e9 22 80 40 ld r9,-32704\(r2\)
36 .* 7d 49 18 2a ldx r10,r9,r3
37 .* e9 22 80 58 ld r9,-32680\(r2\)
38 .* 7d 49 6a 2e lhzx r10,r9,r13
39 .* 89 4d 00 00 lbz r10,0\(r13\)
40 .* 3d 2d 00 00 addis r9,r13,0
41 .* 99 49 00 00 stb r10,0\(r9\)
42 .* 38 62 80 18 addi r3,r2,-32744
43 .* 4b ff ff 8d bl .* <\.__tls_get_addr>
44 .* e8 41 00 28 ld r2,40\(r1\)
45 .* 38 62 80 08 addi r3,r2,-32760
46 .* 4b ff ff 81 bl .* <\.__tls_get_addr>
47 .* e8 41 00 28 ld r2,40\(r1\)
48 .* f9 43 80 08 std r10,-32760\(r3\)
49 .* 3d 23 00 00 addis r9,r3,0
50 .* 91 49 80 10 stw r10,-32752\(r9\)
51 .* e9 22 80 28 ld r9,-32728\(r2\)
52 .* 7d 49 19 2a stdx r10,r9,r3
53 .* e9 22 80 58 ld r9,-32680\(r2\)
54 .* 7d 49 6b 2e sthx r10,r9,r13
55 .* e9 4d 00 02 lwa r10,0\(r13\)
56 .* 3d 2d 00 00 addis r9,r13,0
57 .* a9 49 00 00 lha r10,0\(r9\)
58 .* 00 00 00 00 .*
59 .* 00 01 02 20 .*
60 .* 7d 88 02 a6 mflr r12
61 .* 42 9f 00 05 bcl- 20,4\*cr7\+so,.*
62 .* 7d 68 02 a6 mflr r11
63 .* e8 4b ff f0 ld r2,-16\(r11\)
64 .* 7d 88 03 a6 mtlr r12
65 .* 7d 82 5a 14 add r12,r2,r11
66 .* e9 6c 00 00 ld r11,0\(r12\)
67 .* e8 4c 00 08 ld r2,8\(r12\)
68 .* 7d 69 03 a6 mtctr r11
69 .* e9 6c 00 10 ld r11,16\(r12\)
70 .* 4e 80 04 20 bctr
71 .* 60 00 00 00 nop
72 .* 60 00 00 00 nop
73 .* 60 00 00 00 nop
74 .* 38 00 00 00 li r0,0
75 .* 4b ff ff c4 b .*