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* binutils-all/objcopy.exp: Move XFAIL from objcopy_test to copy_executable.
[binutils.git] / opcodes / m32c-ibld.c
blobe04c3021e637c658cee7a11a1b4eb7807e6f48dd
1 /* Instruction building/extraction support for m32c. -*- C -*-
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
4 - the resultant file is machine generated, cgen-ibld.in isn't
5
6 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006, 2007,
7 2008 Free Software Foundation, Inc.
8
9 This file is part of libopcodes.
10
11 This library is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
14 any later version.
15
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "dis-asm.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "m32c-desc.h"
35 #include "m32c-opc.h"
36 #include "opintl.h"
37 #include "safe-ctype.h"
38
39 #undef min
40 #define min(a,b) ((a) < (b) ? (a) : (b))
41 #undef max
42 #define max(a,b) ((a) > (b) ? (a) : (b))
43
44 /* Used by the ifield rtx function. */
45 #define FLD(f) (fields->f)
46
47 static const char * insert_normal
48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
50 static const char * insert_insn_normal
51 (CGEN_CPU_DESC, const CGEN_INSN *,
52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
53 static int extract_normal
54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
55 unsigned int, unsigned int, unsigned int, unsigned int,
56 unsigned int, unsigned int, bfd_vma, long *);
57 static int extract_insn_normal
58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
60 #if CGEN_INT_INSN_P
61 static void put_insn_int_value
62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
63 #endif
64 #if ! CGEN_INT_INSN_P
65 static CGEN_INLINE void insert_1
66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
67 static CGEN_INLINE int fill_cache
68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
69 static CGEN_INLINE long extract_1
70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
71 #endif
72 \f
73 /* Operand insertion. */
74
75 #if ! CGEN_INT_INSN_P
76
77 /* Subroutine of insert_normal. */
78
79 static CGEN_INLINE void
80 insert_1 (CGEN_CPU_DESC cd,
81 unsigned long value,
82 int start,
83 int length,
84 int word_length,
85 unsigned char *bufp)
86 {
87 unsigned long x,mask;
88 int shift;
89
90 x = cgen_get_insn_value (cd, bufp, word_length);
91
92 /* Written this way to avoid undefined behaviour. */
93 mask = (((1L << (length - 1)) - 1) << 1) | 1;
94 if (CGEN_INSN_LSB0_P)
95 shift = (start + 1) - length;
96 else
97 shift = (word_length - (start + length));
98 x = (x & ~(mask << shift)) | ((value & mask) << shift);
99
100 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
101 }
102
103 #endif /* ! CGEN_INT_INSN_P */
104
105 /* Default insertion routine.
106
107 ATTRS is a mask of the boolean attributes.
108 WORD_OFFSET is the offset in bits from the start of the insn of the value.
109 WORD_LENGTH is the length of the word in bits in which the value resides.
110 START is the starting bit number in the word, architecture origin.
111 LENGTH is the length of VALUE in bits.
112 TOTAL_LENGTH is the total length of the insn in bits.
113
114 The result is an error message or NULL if success. */
115
116 /* ??? This duplicates functionality with bfd's howto table and
117 bfd_install_relocation. */
118 /* ??? This doesn't handle bfd_vma's. Create another function when
119 necessary. */
120
121 static const char *
122 insert_normal (CGEN_CPU_DESC cd,
123 long value,
124 unsigned int attrs,
125 unsigned int word_offset,
126 unsigned int start,
127 unsigned int length,
128 unsigned int word_length,
129 unsigned int total_length,
130 CGEN_INSN_BYTES_PTR buffer)
131 {
132 static char errbuf[100];
133 /* Written this way to avoid undefined behaviour. */
134 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
135
136 /* If LENGTH is zero, this operand doesn't contribute to the value. */
137 if (length == 0)
138 return NULL;
139
140 if (word_length > 32)
141 abort ();
142
143 /* For architectures with insns smaller than the base-insn-bitsize,
144 word_length may be too big. */
145 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
146 {
147 if (word_offset == 0
148 && word_length > total_length)
149 word_length = total_length;
150 }
151
152 /* Ensure VALUE will fit. */
153 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
154 {
155 long minval = - (1L << (length - 1));
156 unsigned long maxval = mask;
157
158 if ((value > 0 && (unsigned long) value > maxval)
159 || value < minval)
160 {
161 /* xgettext:c-format */
162 sprintf (errbuf,
163 _("operand out of range (%ld not between %ld and %lu)"),
164 value, minval, maxval);
165 return errbuf;
166 }
167 }
168 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
169 {
170 unsigned long maxval = mask;
171 unsigned long val = (unsigned long) value;
172
173 /* For hosts with a word size > 32 check to see if value has been sign
174 extended beyond 32 bits. If so then ignore these higher sign bits
175 as the user is attempting to store a 32-bit signed value into an
176 unsigned 32-bit field which is allowed. */
177 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
178 val &= 0xFFFFFFFF;
179
180 if (val > maxval)
181 {
182 /* xgettext:c-format */
183 sprintf (errbuf,
184 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
185 val, maxval);
186 return errbuf;
187 }
188 }
189 else
190 {
191 if (! cgen_signed_overflow_ok_p (cd))
192 {
193 long minval = - (1L << (length - 1));
194 long maxval = (1L << (length - 1)) - 1;
195
196 if (value < minval || value > maxval)
197 {
198 sprintf
199 /* xgettext:c-format */
200 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
201 value, minval, maxval);
202 return errbuf;
203 }
204 }
205 }
206
207 #if CGEN_INT_INSN_P
208
209 {
210 int shift;
211
212 if (CGEN_INSN_LSB0_P)
213 shift = (word_offset + start + 1) - length;
214 else
215 shift = total_length - (word_offset + start + length);
216 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
217 }
218
219 #else /* ! CGEN_INT_INSN_P */
220
221 {
222 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
223
224 insert_1 (cd, value, start, length, word_length, bufp);
225 }
226
227 #endif /* ! CGEN_INT_INSN_P */
228
229 return NULL;
230 }
231
232 /* Default insn builder (insert handler).
233 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
234 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
235 recorded in host byte order, otherwise BUFFER is an array of bytes
236 and the value is recorded in target byte order).
237 The result is an error message or NULL if success. */
238
239 static const char *
240 insert_insn_normal (CGEN_CPU_DESC cd,
241 const CGEN_INSN * insn,
242 CGEN_FIELDS * fields,
243 CGEN_INSN_BYTES_PTR buffer,
244 bfd_vma pc)
245 {
246 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
247 unsigned long value;
248 const CGEN_SYNTAX_CHAR_TYPE * syn;
249
250 CGEN_INIT_INSERT (cd);
251 value = CGEN_INSN_BASE_VALUE (insn);
252
253 /* If we're recording insns as numbers (rather than a string of bytes),
254 target byte order handling is deferred until later. */
255
256 #if CGEN_INT_INSN_P
257
258 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
259 CGEN_FIELDS_BITSIZE (fields), value);
260
261 #else
262
263 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
264 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
265 value);
266
267 #endif /* ! CGEN_INT_INSN_P */
268
269 /* ??? It would be better to scan the format's fields.
270 Still need to be able to insert a value based on the operand though;
271 e.g. storing a branch displacement that got resolved later.
272 Needs more thought first. */
273
274 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
275 {
276 const char *errmsg;
277
278 if (CGEN_SYNTAX_CHAR_P (* syn))
279 continue;
280
281 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
282 fields, buffer, pc);
283 if (errmsg)
284 return errmsg;
285 }
286
287 return NULL;
288 }
289
290 #if CGEN_INT_INSN_P
291 /* Cover function to store an insn value into an integral insn. Must go here
292 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
293
294 static void
295 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
296 CGEN_INSN_BYTES_PTR buf,
297 int length,
298 int insn_length,
299 CGEN_INSN_INT value)
300 {
301 /* For architectures with insns smaller than the base-insn-bitsize,
302 length may be too big. */
303 if (length > insn_length)
304 *buf = value;
305 else
306 {
307 int shift = insn_length - length;
308 /* Written this way to avoid undefined behaviour. */
309 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
310
311 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
312 }
313 }
314 #endif
315 \f
316 /* Operand extraction. */
317
318 #if ! CGEN_INT_INSN_P
319
320 /* Subroutine of extract_normal.
321 Ensure sufficient bytes are cached in EX_INFO.
322 OFFSET is the offset in bytes from the start of the insn of the value.
323 BYTES is the length of the needed value.
324 Returns 1 for success, 0 for failure. */
325
326 static CGEN_INLINE int
327 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
328 CGEN_EXTRACT_INFO *ex_info,
329 int offset,
330 int bytes,
331 bfd_vma pc)
332 {
333 /* It's doubtful that the middle part has already been fetched so
334 we don't optimize that case. kiss. */
335 unsigned int mask;
336 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
337
338 /* First do a quick check. */
339 mask = (1 << bytes) - 1;
340 if (((ex_info->valid >> offset) & mask) == mask)
341 return 1;
342
343 /* Search for the first byte we need to read. */
344 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
345 if (! (mask & ex_info->valid))
346 break;
347
348 if (bytes)
349 {
350 int status;
351
352 pc += offset;
353 status = (*info->read_memory_func)
354 (pc, ex_info->insn_bytes + offset, bytes, info);
355
356 if (status != 0)
357 {
358 (*info->memory_error_func) (status, pc, info);
359 return 0;
360 }
361
362 ex_info->valid |= ((1 << bytes) - 1) << offset;
363 }
364
365 return 1;
366 }
367
368 /* Subroutine of extract_normal. */
369
370 static CGEN_INLINE long
371 extract_1 (CGEN_CPU_DESC cd,
372 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
373 int start,
374 int length,
375 int word_length,
376 unsigned char *bufp,
377 bfd_vma pc ATTRIBUTE_UNUSED)
378 {
379 unsigned long x;
380 int shift;
381
382 x = cgen_get_insn_value (cd, bufp, word_length);
383
384 if (CGEN_INSN_LSB0_P)
385 shift = (start + 1) - length;
386 else
387 shift = (word_length - (start + length));
388 return x >> shift;
389 }
390
391 #endif /* ! CGEN_INT_INSN_P */
392
393 /* Default extraction routine.
394
395 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
396 or sometimes less for cases like the m32r where the base insn size is 32
397 but some insns are 16 bits.
398 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
399 but for generality we take a bitmask of all of them.
400 WORD_OFFSET is the offset in bits from the start of the insn of the value.
401 WORD_LENGTH is the length of the word in bits in which the value resides.
402 START is the starting bit number in the word, architecture origin.
403 LENGTH is the length of VALUE in bits.
404 TOTAL_LENGTH is the total length of the insn in bits.
405
406 Returns 1 for success, 0 for failure. */
407
408 /* ??? The return code isn't properly used. wip. */
409
410 /* ??? This doesn't handle bfd_vma's. Create another function when
411 necessary. */
412
413 static int
414 extract_normal (CGEN_CPU_DESC cd,
415 #if ! CGEN_INT_INSN_P
416 CGEN_EXTRACT_INFO *ex_info,
417 #else
418 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
419 #endif
420 CGEN_INSN_INT insn_value,
421 unsigned int attrs,
422 unsigned int word_offset,
423 unsigned int start,
424 unsigned int length,
425 unsigned int word_length,
426 unsigned int total_length,
427 #if ! CGEN_INT_INSN_P
428 bfd_vma pc,
429 #else
430 bfd_vma pc ATTRIBUTE_UNUSED,
431 #endif
432 long *valuep)
433 {
434 long value, mask;
435
436 /* If LENGTH is zero, this operand doesn't contribute to the value
437 so give it a standard value of zero. */
438 if (length == 0)
439 {
440 *valuep = 0;
441 return 1;
442 }
443
444 if (word_length > 32)
445 abort ();
446
447 /* For architectures with insns smaller than the insn-base-bitsize,
448 word_length may be too big. */
449 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
450 {
451 if (word_offset + word_length > total_length)
452 word_length = total_length - word_offset;
453 }
454
455 /* Does the value reside in INSN_VALUE, and at the right alignment? */
456
457 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
458 {
459 if (CGEN_INSN_LSB0_P)
460 value = insn_value >> ((word_offset + start + 1) - length);
461 else
462 value = insn_value >> (total_length - ( word_offset + start + length));
463 }
464
465 #if ! CGEN_INT_INSN_P
466
467 else
468 {
469 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
470
471 if (word_length > 32)
472 abort ();
473
474 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
475 return 0;
476
477 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
478 }
479
480 #endif /* ! CGEN_INT_INSN_P */
481
482 /* Written this way to avoid undefined behaviour. */
483 mask = (((1L << (length - 1)) - 1) << 1) | 1;
484
485 value &= mask;
486 /* sign extend? */
487 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
488 && (value & (1L << (length - 1))))
489 value |= ~mask;
490
491 *valuep = value;
492
493 return 1;
494 }
495
496 /* Default insn extractor.
497
498 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
499 The extracted fields are stored in FIELDS.
500 EX_INFO is used to handle reading variable length insns.
501 Return the length of the insn in bits, or 0 if no match,
502 or -1 if an error occurs fetching data (memory_error_func will have
503 been called). */
504
505 static int
506 extract_insn_normal (CGEN_CPU_DESC cd,
507 const CGEN_INSN *insn,
508 CGEN_EXTRACT_INFO *ex_info,
509 CGEN_INSN_INT insn_value,
510 CGEN_FIELDS *fields,
511 bfd_vma pc)
512 {
513 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
514 const CGEN_SYNTAX_CHAR_TYPE *syn;
515
516 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
517
518 CGEN_INIT_EXTRACT (cd);
519
520 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
521 {
522 int length;
523
524 if (CGEN_SYNTAX_CHAR_P (*syn))
525 continue;
526
527 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
528 ex_info, insn_value, fields, pc);
529 if (length <= 0)
530 return length;
531 }
532
533 /* We recognized and successfully extracted this insn. */
534 return CGEN_INSN_BITSIZE (insn);
535 }
536 \f
537 /* Machine generated code added here. */
538
539 const char * m32c_cgen_insert_operand
540 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
541
542 /* Main entry point for operand insertion.
543
544 This function is basically just a big switch statement. Earlier versions
545 used tables to look up the function to use, but
546 - if the table contains both assembler and disassembler functions then
547 the disassembler contains much of the assembler and vice-versa,
548 - there's a lot of inlining possibilities as things grow,
549 - using a switch statement avoids the function call overhead.
550
551 This function could be moved into `parse_insn_normal', but keeping it
552 separate makes clear the interface between `parse_insn_normal' and each of
553 the handlers. It's also needed by GAS to insert operands that couldn't be
554 resolved during parsing. */
555
556 const char *
557 m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
558 int opindex,
559 CGEN_FIELDS * fields,
560 CGEN_INSN_BYTES_PTR buffer,
561 bfd_vma pc ATTRIBUTE_UNUSED)
562 {
563 const char * errmsg = NULL;
564 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
565
566 switch (opindex)
567 {
568 case M32C_OPERAND_A0 :
569 break;
570 case M32C_OPERAND_A1 :
571 break;
572 case M32C_OPERAND_AN16_PUSH_S :
573 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
574 break;
575 case M32C_OPERAND_BIT16AN :
576 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
577 break;
578 case M32C_OPERAND_BIT16RN :
579 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
580 break;
581 case M32C_OPERAND_BIT3_S :
582 {
583 {
584 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
585 FLD (f_2_2) = ((((unsigned int) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
586 }
587 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
588 if (errmsg)
589 break;
590 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
591 if (errmsg)
592 break;
593 }
594 break;
595 case M32C_OPERAND_BIT32ANPREFIXED :
596 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
597 break;
598 case M32C_OPERAND_BIT32ANUNPREFIXED :
599 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
600 break;
601 case M32C_OPERAND_BIT32RNPREFIXED :
602 {
603 long value = fields->f_dst32_rn_prefixed_QI;
604 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
605 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
606 }
607 break;
608 case M32C_OPERAND_BIT32RNUNPREFIXED :
609 {
610 long value = fields->f_dst32_rn_unprefixed_QI;
611 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
612 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
613 }
614 break;
615 case M32C_OPERAND_BITBASE16_16_S8 :
616 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
617 break;
618 case M32C_OPERAND_BITBASE16_16_U16 :
619 {
620 long value = fields->f_dsp_16_u16;
621 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
622 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
623 }
624 break;
625 case M32C_OPERAND_BITBASE16_16_U8 :
626 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
627 break;
628 case M32C_OPERAND_BITBASE16_8_U11_S :
629 {
630 {
631 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
632 FLD (f_dsp_8_u8) = ((((unsigned int) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
633 }
634 errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer);
635 if (errmsg)
636 break;
637 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
638 if (errmsg)
639 break;
640 }
641 break;
642 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
643 {
644 {
645 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7));
646 FLD (f_dsp_16_s8) = ((int) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
647 }
648 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
649 if (errmsg)
650 break;
651 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
652 if (errmsg)
653 break;
654 }
655 break;
656 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
657 {
658 {
659 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7));
660 FLD (f_dsp_16_s16) = ((int) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
661 }
662 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
663 if (errmsg)
664 break;
665 {
666 long value = fields->f_dsp_16_s16;
667 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
668 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
669 }
670 if (errmsg)
671 break;
672 }
673 break;
674 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
675 {
676 {
677 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7));
678 FLD (f_dsp_16_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
679 }
680 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
681 if (errmsg)
682 break;
683 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
684 if (errmsg)
685 break;
686 }
687 break;
688 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
689 {
690 {
691 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7));
692 FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
693 }
694 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
695 if (errmsg)
696 break;
697 {
698 long value = fields->f_dsp_16_u16;
699 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
700 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
701 }
702 if (errmsg)
703 break;
704 }
705 break;
706 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
707 {
708 {
709 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7));
710 FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
711 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
712 }
713 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
714 if (errmsg)
715 break;
716 {
717 long value = fields->f_dsp_16_u16;
718 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
719 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
720 }
721 if (errmsg)
722 break;
723 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
724 if (errmsg)
725 break;
726 }
727 break;
728 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
729 {
730 {
731 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7));
732 FLD (f_dsp_24_s8) = ((int) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
733 }
734 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
735 if (errmsg)
736 break;
737 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
738 if (errmsg)
739 break;
740 }
741 break;
742 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
743 {
744 {
745 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7));
746 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
747 FLD (f_dsp_32_s8) = ((int) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
748 }
749 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
750 if (errmsg)
751 break;
752 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
753 if (errmsg)
754 break;
755 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
756 if (errmsg)
757 break;
758 }
759 break;
760 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
761 {
762 {
763 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7));
764 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
765 }
766 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
767 if (errmsg)
768 break;
769 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
770 if (errmsg)
771 break;
772 }
773 break;
774 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
775 {
776 {
777 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7));
778 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
779 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
780 }
781 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
782 if (errmsg)
783 break;
784 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
785 if (errmsg)
786 break;
787 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
788 if (errmsg)
789 break;
790 }
791 break;
792 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
793 {
794 {
795 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7));
796 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
797 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
798 }
799 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
800 if (errmsg)
801 break;
802 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
803 if (errmsg)
804 break;
805 {
806 long value = fields->f_dsp_32_u16;
807 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
808 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
809 }
810 if (errmsg)
811 break;
812 }
813 break;
814 case M32C_OPERAND_BITNO16R :
815 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
816 break;
817 case M32C_OPERAND_BITNO32PREFIXED :
818 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
819 break;
820 case M32C_OPERAND_BITNO32UNPREFIXED :
821 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
822 break;
823 case M32C_OPERAND_DSP_10_U6 :
824 errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer);
825 break;
826 case M32C_OPERAND_DSP_16_S16 :
827 {
828 long value = fields->f_dsp_16_s16;
829 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
830 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
831 }
832 break;
833 case M32C_OPERAND_DSP_16_S8 :
834 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
835 break;
836 case M32C_OPERAND_DSP_16_U16 :
837 {
838 long value = fields->f_dsp_16_u16;
839 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
840 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
841 }
842 break;
843 case M32C_OPERAND_DSP_16_U20 :
844 {
845 {
846 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
847 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
848 }
849 {
850 long value = fields->f_dsp_16_u16;
851 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
852 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
853 }
854 if (errmsg)
855 break;
856 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
857 if (errmsg)
858 break;
859 }
860 break;
861 case M32C_OPERAND_DSP_16_U24 :
862 {
863 {
864 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
865 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
866 }
867 {
868 long value = fields->f_dsp_16_u16;
869 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
870 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
871 }
872 if (errmsg)
873 break;
874 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
875 if (errmsg)
876 break;
877 }
878 break;
879 case M32C_OPERAND_DSP_16_U8 :
880 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
881 break;
882 case M32C_OPERAND_DSP_24_S16 :
883 {
884 {
885 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
886 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
887 }
888 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
889 if (errmsg)
890 break;
891 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
892 if (errmsg)
893 break;
894 }
895 break;
896 case M32C_OPERAND_DSP_24_S8 :
897 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
898 break;
899 case M32C_OPERAND_DSP_24_U16 :
900 {
901 {
902 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255));
903 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_u16)) >> (8))) & (255));
904 }
905 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
906 if (errmsg)
907 break;
908 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
909 if (errmsg)
910 break;
911 }
912 break;
913 case M32C_OPERAND_DSP_24_U20 :
914 {
915 {
916 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
917 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
918 }
919 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
920 if (errmsg)
921 break;
922 {
923 long value = fields->f_dsp_32_u16;
924 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
925 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
926 }
927 if (errmsg)
928 break;
929 }
930 break;
931 case M32C_OPERAND_DSP_24_U24 :
932 {
933 {
934 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
935 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
936 }
937 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
938 if (errmsg)
939 break;
940 {
941 long value = fields->f_dsp_32_u16;
942 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
943 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
944 }
945 if (errmsg)
946 break;
947 }
948 break;
949 case M32C_OPERAND_DSP_24_U8 :
950 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
951 break;
952 case M32C_OPERAND_DSP_32_S16 :
953 {
954 long value = fields->f_dsp_32_s16;
955 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
956 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
957 }
958 break;
959 case M32C_OPERAND_DSP_32_S8 :
960 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
961 break;
962 case M32C_OPERAND_DSP_32_U16 :
963 {
964 long value = fields->f_dsp_32_u16;
965 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
966 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
967 }
968 break;
969 case M32C_OPERAND_DSP_32_U20 :
970 {
971 long value = fields->f_dsp_32_u24;
972 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
973 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
974 }
975 break;
976 case M32C_OPERAND_DSP_32_U24 :
977 {
978 long value = fields->f_dsp_32_u24;
979 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
980 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
981 }
982 break;
983 case M32C_OPERAND_DSP_32_U8 :
984 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
985 break;
986 case M32C_OPERAND_DSP_40_S16 :
987 {
988 long value = fields->f_dsp_40_s16;
989 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
990 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
991 }
992 break;
993 case M32C_OPERAND_DSP_40_S8 :
994 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
995 break;
996 case M32C_OPERAND_DSP_40_U16 :
997 {
998 long value = fields->f_dsp_40_u16;
999 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1000 errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer);
1001 }
1002 break;
1003 case M32C_OPERAND_DSP_40_U20 :
1004 {
1005 long value = fields->f_dsp_40_u20;
1006 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
1007 errmsg = insert_normal (cd, value, 0, 32, 8, 20, 32, total_length, buffer);
1008 }
1009 break;
1010 case M32C_OPERAND_DSP_40_U24 :
1011 {
1012 long value = fields->f_dsp_40_u24;
1013 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1014 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1015 }
1016 break;
1017 case M32C_OPERAND_DSP_40_U8 :
1018 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1019 break;
1020 case M32C_OPERAND_DSP_48_S16 :
1021 {
1022 long value = fields->f_dsp_48_s16;
1023 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1024 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1025 }
1026 break;
1027 case M32C_OPERAND_DSP_48_S8 :
1028 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1029 break;
1030 case M32C_OPERAND_DSP_48_U16 :
1031 {
1032 long value = fields->f_dsp_48_u16;
1033 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1034 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1035 }
1036 break;
1037 case M32C_OPERAND_DSP_48_U20 :
1038 {
1039 {
1040 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_48_u20)) >> (16))) & (15));
1041 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u20)) & (65535));
1042 }
1043 {
1044 long value = fields->f_dsp_48_u16;
1045 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1046 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1047 }
1048 if (errmsg)
1049 break;
1050 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1051 if (errmsg)
1052 break;
1053 }
1054 break;
1055 case M32C_OPERAND_DSP_48_U24 :
1056 {
1057 {
1058 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_48_u24)) >> (16))) & (255));
1059 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535));
1060 }
1061 {
1062 long value = fields->f_dsp_48_u16;
1063 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1064 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1065 }
1066 if (errmsg)
1067 break;
1068 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1069 if (errmsg)
1070 break;
1071 }
1072 break;
1073 case M32C_OPERAND_DSP_48_U8 :
1074 errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer);
1075 break;
1076 case M32C_OPERAND_DSP_8_S24 :
1077 {
1078 long value = fields->f_dsp_8_s24;
1079 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
1080 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer);
1081 }
1082 break;
1083 case M32C_OPERAND_DSP_8_S8 :
1084 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1085 break;
1086 case M32C_OPERAND_DSP_8_U16 :
1087 {
1088 long value = fields->f_dsp_8_u16;
1089 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1090 errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
1091 }
1092 break;
1093 case M32C_OPERAND_DSP_8_U24 :
1094 {
1095 long value = fields->f_dsp_8_u24;
1096 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1097 errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
1098 }
1099 break;
1100 case M32C_OPERAND_DSP_8_U6 :
1101 errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer);
1102 break;
1103 case M32C_OPERAND_DSP_8_U8 :
1104 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
1105 break;
1106 case M32C_OPERAND_DST16AN :
1107 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1108 break;
1109 case M32C_OPERAND_DST16AN_S :
1110 errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer);
1111 break;
1112 case M32C_OPERAND_DST16ANHI :
1113 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1114 break;
1115 case M32C_OPERAND_DST16ANQI :
1116 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1117 break;
1118 case M32C_OPERAND_DST16ANQI_S :
1119 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1120 break;
1121 case M32C_OPERAND_DST16ANSI :
1122 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1123 break;
1124 case M32C_OPERAND_DST16RNEXTQI :
1125 errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer);
1126 break;
1127 case M32C_OPERAND_DST16RNHI :
1128 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1129 break;
1130 case M32C_OPERAND_DST16RNQI :
1131 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1132 break;
1133 case M32C_OPERAND_DST16RNQI_S :
1134 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1135 break;
1136 case M32C_OPERAND_DST16RNSI :
1137 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1138 break;
1139 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1140 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1141 break;
1142 case M32C_OPERAND_DST32ANPREFIXED :
1143 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1144 break;
1145 case M32C_OPERAND_DST32ANPREFIXEDHI :
1146 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1147 break;
1148 case M32C_OPERAND_DST32ANPREFIXEDQI :
1149 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1150 break;
1151 case M32C_OPERAND_DST32ANPREFIXEDSI :
1152 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1153 break;
1154 case M32C_OPERAND_DST32ANUNPREFIXED :
1155 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1156 break;
1157 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1158 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1159 break;
1160 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1161 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1162 break;
1163 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1164 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1165 break;
1166 case M32C_OPERAND_DST32R0HI_S :
1167 break;
1168 case M32C_OPERAND_DST32R0QI_S :
1169 break;
1170 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1171 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1172 break;
1173 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1174 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1175 break;
1176 case M32C_OPERAND_DST32RNPREFIXEDHI :
1177 {
1178 long value = fields->f_dst32_rn_prefixed_HI;
1179 value = ((((value) + (2))) % (4));
1180 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1181 }
1182 break;
1183 case M32C_OPERAND_DST32RNPREFIXEDQI :
1184 {
1185 long value = fields->f_dst32_rn_prefixed_QI;
1186 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1187 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1188 }
1189 break;
1190 case M32C_OPERAND_DST32RNPREFIXEDSI :
1191 {
1192 long value = fields->f_dst32_rn_prefixed_SI;
1193 value = ((value) + (2));
1194 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1195 }
1196 break;
1197 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1198 {
1199 long value = fields->f_dst32_rn_unprefixed_HI;
1200 value = ((((value) + (2))) % (4));
1201 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1202 }
1203 break;
1204 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1205 {
1206 long value = fields->f_dst32_rn_unprefixed_QI;
1207 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1208 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1209 }
1210 break;
1211 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1212 {
1213 long value = fields->f_dst32_rn_unprefixed_SI;
1214 value = ((value) + (2));
1215 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1216 }
1217 break;
1218 case M32C_OPERAND_G :
1219 break;
1220 case M32C_OPERAND_IMM_12_S4 :
1221 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1222 break;
1223 case M32C_OPERAND_IMM_12_S4N :
1224 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1225 break;
1226 case M32C_OPERAND_IMM_13_U3 :
1227 errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer);
1228 break;
1229 case M32C_OPERAND_IMM_16_HI :
1230 {
1231 long value = fields->f_dsp_16_s16;
1232 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1233 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
1234 }
1235 break;
1236 case M32C_OPERAND_IMM_16_QI :
1237 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
1238 break;
1239 case M32C_OPERAND_IMM_16_SI :
1240 {
1241 {
1242 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
1243 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535));
1244 }
1245 {
1246 long value = fields->f_dsp_16_u16;
1247 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1248 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
1249 }
1250 if (errmsg)
1251 break;
1252 {
1253 long value = fields->f_dsp_32_u16;
1254 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1255 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
1256 }
1257 if (errmsg)
1258 break;
1259 }
1260 break;
1261 case M32C_OPERAND_IMM_20_S4 :
1262 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1263 break;
1264 case M32C_OPERAND_IMM_24_HI :
1265 {
1266 {
1267 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
1268 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
1269 }
1270 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1271 if (errmsg)
1272 break;
1273 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1274 if (errmsg)
1275 break;
1276 }
1277 break;
1278 case M32C_OPERAND_IMM_24_QI :
1279 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
1280 break;
1281 case M32C_OPERAND_IMM_24_SI :
1282 {
1283 {
1284 FLD (f_dsp_32_u24) = ((((unsigned int) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
1285 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255));
1286 }
1287 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1288 if (errmsg)
1289 break;
1290 {
1291 long value = fields->f_dsp_32_u24;
1292 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1293 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
1294 }
1295 if (errmsg)
1296 break;
1297 }
1298 break;
1299 case M32C_OPERAND_IMM_32_HI :
1300 {
1301 long value = fields->f_dsp_32_s16;
1302 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1303 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
1304 }
1305 break;
1306 case M32C_OPERAND_IMM_32_QI :
1307 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
1308 break;
1309 case M32C_OPERAND_IMM_32_SI :
1310 {
1311 long value = fields->f_dsp_32_s32;
1312 value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
1313 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer);
1314 }
1315 break;
1316 case M32C_OPERAND_IMM_40_HI :
1317 {
1318 long value = fields->f_dsp_40_s16;
1319 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1320 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1321 }
1322 break;
1323 case M32C_OPERAND_IMM_40_QI :
1324 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1325 break;
1326 case M32C_OPERAND_IMM_40_SI :
1327 {
1328 {
1329 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_40_s32)) >> (24))) & (255));
1330 FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215));
1331 }
1332 {
1333 long value = fields->f_dsp_40_u24;
1334 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1335 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1336 }
1337 if (errmsg)
1338 break;
1339 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1340 if (errmsg)
1341 break;
1342 }
1343 break;
1344 case M32C_OPERAND_IMM_48_HI :
1345 {
1346 long value = fields->f_dsp_48_s16;
1347 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1348 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1349 }
1350 break;
1351 case M32C_OPERAND_IMM_48_QI :
1352 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1353 break;
1354 case M32C_OPERAND_IMM_48_SI :
1355 {
1356 {
1357 FLD (f_dsp_64_u16) = ((((unsigned int) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
1358 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535));
1359 }
1360 {
1361 long value = fields->f_dsp_48_u16;
1362 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1363 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1364 }
1365 if (errmsg)
1366 break;
1367 {
1368 long value = fields->f_dsp_64_u16;
1369 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1370 errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer);
1371 }
1372 if (errmsg)
1373 break;
1374 }
1375 break;
1376 case M32C_OPERAND_IMM_56_HI :
1377 {
1378 {
1379 FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255));
1380 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_56_s16)) >> (8))) & (255));
1381 }
1382 errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer);
1383 if (errmsg)
1384 break;
1385 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1386 if (errmsg)
1387 break;
1388 }
1389 break;
1390 case M32C_OPERAND_IMM_56_QI :
1391 errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer);
1392 break;
1393 case M32C_OPERAND_IMM_64_HI :
1394 {
1395 long value = fields->f_dsp_64_s16;
1396 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1397 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
1398 }
1399 break;
1400 case M32C_OPERAND_IMM_8_HI :
1401 {
1402 long value = fields->f_dsp_8_s16;
1403 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1404 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer);
1405 }
1406 break;
1407 case M32C_OPERAND_IMM_8_QI :
1408 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1409 break;
1410 case M32C_OPERAND_IMM_8_S4 :
1411 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1412 break;
1413 case M32C_OPERAND_IMM_8_S4N :
1414 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1415 break;
1416 case M32C_OPERAND_IMM_SH_12_S4 :
1417 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1418 break;
1419 case M32C_OPERAND_IMM_SH_20_S4 :
1420 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1421 break;
1422 case M32C_OPERAND_IMM_SH_8_S4 :
1423 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1424 break;
1425 case M32C_OPERAND_IMM1_S :
1426 {
1427 long value = fields->f_imm1_S;
1428 value = ((value) - (1));
1429 errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer);
1430 }
1431 break;
1432 case M32C_OPERAND_IMM3_S :
1433 {
1434 {
1435 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
1436 FLD (f_2_2) = ((((unsigned int) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
1437 }
1438 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1439 if (errmsg)
1440 break;
1441 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1442 if (errmsg)
1443 break;
1444 }
1445 break;
1446 case M32C_OPERAND_LAB_16_8 :
1447 {
1448 long value = fields->f_lab_16_8;
1449 value = ((value) - (((pc) + (2))));
1450 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer);
1451 }
1452 break;
1453 case M32C_OPERAND_LAB_24_8 :
1454 {
1455 long value = fields->f_lab_24_8;
1456 value = ((value) - (((pc) + (2))));
1457 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer);
1458 }
1459 break;
1460 case M32C_OPERAND_LAB_32_8 :
1461 {
1462 long value = fields->f_lab_32_8;
1463 value = ((value) - (((pc) + (2))));
1464 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer);
1465 }
1466 break;
1467 case M32C_OPERAND_LAB_40_8 :
1468 {
1469 long value = fields->f_lab_40_8;
1470 value = ((value) - (((pc) + (2))));
1471 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer);
1472 }
1473 break;
1474 case M32C_OPERAND_LAB_5_3 :
1475 {
1476 long value = fields->f_lab_5_3;
1477 value = ((value) - (((pc) + (2))));
1478 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
1479 }
1480 break;
1481 case M32C_OPERAND_LAB_8_16 :
1482 {
1483 long value = fields->f_lab_8_16;
1484 value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((unsigned int) (((((value) - (((pc) + (1))))) & (65535))) >> (8))));
1485 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer);
1486 }
1487 break;
1488 case M32C_OPERAND_LAB_8_24 :
1489 {
1490 long value = fields->f_lab_8_24;
1491 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1492 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer);
1493 }
1494 break;
1495 case M32C_OPERAND_LAB_8_8 :
1496 {
1497 long value = fields->f_lab_8_8;
1498 value = ((value) - (((pc) + (1))));
1499 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
1500 }
1501 break;
1502 case M32C_OPERAND_LAB32_JMP_S :
1503 {
1504 {
1505 SI tmp_val;
1506 tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
1507 FLD (f_7_1) = ((tmp_val) & (1));
1508 FLD (f_2_2) = ((unsigned int) (tmp_val) >> (1));
1509 }
1510 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1511 if (errmsg)
1512 break;
1513 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1514 if (errmsg)
1515 break;
1516 }
1517 break;
1518 case M32C_OPERAND_Q :
1519 break;
1520 case M32C_OPERAND_R0 :
1521 break;
1522 case M32C_OPERAND_R0H :
1523 break;
1524 case M32C_OPERAND_R0L :
1525 break;
1526 case M32C_OPERAND_R1 :
1527 break;
1528 case M32C_OPERAND_R1R2R0 :
1529 break;
1530 case M32C_OPERAND_R2 :
1531 break;
1532 case M32C_OPERAND_R2R0 :
1533 break;
1534 case M32C_OPERAND_R3 :
1535 break;
1536 case M32C_OPERAND_R3R1 :
1537 break;
1538 case M32C_OPERAND_REGSETPOP :
1539 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1540 break;
1541 case M32C_OPERAND_REGSETPUSH :
1542 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1543 break;
1544 case M32C_OPERAND_RN16_PUSH_S :
1545 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
1546 break;
1547 case M32C_OPERAND_S :
1548 break;
1549 case M32C_OPERAND_SRC16AN :
1550 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1551 break;
1552 case M32C_OPERAND_SRC16ANHI :
1553 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1554 break;
1555 case M32C_OPERAND_SRC16ANQI :
1556 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1557 break;
1558 case M32C_OPERAND_SRC16RNHI :
1559 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1560 break;
1561 case M32C_OPERAND_SRC16RNQI :
1562 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1563 break;
1564 case M32C_OPERAND_SRC32ANPREFIXED :
1565 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1566 break;
1567 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1568 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1569 break;
1570 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1571 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1572 break;
1573 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1574 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1575 break;
1576 case M32C_OPERAND_SRC32ANUNPREFIXED :
1577 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1578 break;
1579 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1580 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1581 break;
1582 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1583 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1584 break;
1585 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1586 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1587 break;
1588 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1589 {
1590 long value = fields->f_src32_rn_prefixed_HI;
1591 value = ((((value) + (2))) % (4));
1592 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1593 }
1594 break;
1595 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1596 {
1597 long value = fields->f_src32_rn_prefixed_QI;
1598 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1599 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1600 }
1601 break;
1602 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1603 {
1604 long value = fields->f_src32_rn_prefixed_SI;
1605 value = ((value) + (2));
1606 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1607 }
1608 break;
1609 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1610 {
1611 long value = fields->f_src32_rn_unprefixed_HI;
1612 value = ((((value) + (2))) % (4));
1613 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1614 }
1615 break;
1616 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1617 {
1618 long value = fields->f_src32_rn_unprefixed_QI;
1619 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1620 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1621 }
1622 break;
1623 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1624 {
1625 long value = fields->f_src32_rn_unprefixed_SI;
1626 value = ((value) + (2));
1627 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1628 }
1629 break;
1630 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1631 errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer);
1632 break;
1633 case M32C_OPERAND_X :
1634 break;
1635 case M32C_OPERAND_Z :
1636 break;
1637 case M32C_OPERAND_COND16_16 :
1638 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1639 break;
1640 case M32C_OPERAND_COND16_24 :
1641 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1642 break;
1643 case M32C_OPERAND_COND16_32 :
1644 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1645 break;
1646 case M32C_OPERAND_COND16C :
1647 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1648 break;
1649 case M32C_OPERAND_COND16J :
1650 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1651 break;
1652 case M32C_OPERAND_COND16J5 :
1653 errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer);
1654 break;
1655 case M32C_OPERAND_COND32 :
1656 {
1657 {
1658 FLD (f_9_1) = ((((unsigned int) (FLD (f_cond32)) >> (3))) & (1));
1659 FLD (f_13_3) = ((FLD (f_cond32)) & (7));
1660 }
1661 errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer);
1662 if (errmsg)
1663 break;
1664 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1665 if (errmsg)
1666 break;
1667 }
1668 break;
1669 case M32C_OPERAND_COND32_16 :
1670 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1671 break;
1672 case M32C_OPERAND_COND32_24 :
1673 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1674 break;
1675 case M32C_OPERAND_COND32_32 :
1676 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1677 break;
1678 case M32C_OPERAND_COND32_40 :
1679 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1680 break;
1681 case M32C_OPERAND_COND32J :
1682 {
1683 {
1684 FLD (f_1_3) = ((((unsigned int) (FLD (f_cond32j)) >> (1))) & (7));
1685 FLD (f_7_1) = ((FLD (f_cond32j)) & (1));
1686 }
1687 errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer);
1688 if (errmsg)
1689 break;
1690 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1691 if (errmsg)
1692 break;
1693 }
1694 break;
1695 case M32C_OPERAND_CR1_PREFIXED_32 :
1696 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1697 break;
1698 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1699 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1700 break;
1701 case M32C_OPERAND_CR16 :
1702 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1703 break;
1704 case M32C_OPERAND_CR2_32 :
1705 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1706 break;
1707 case M32C_OPERAND_CR3_PREFIXED_32 :
1708 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1709 break;
1710 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1711 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1712 break;
1713 case M32C_OPERAND_FLAGS16 :
1714 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1715 break;
1716 case M32C_OPERAND_FLAGS32 :
1717 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1718 break;
1719 case M32C_OPERAND_SCCOND32 :
1720 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1721 break;
1722 case M32C_OPERAND_SIZE :
1723 break;
1724
1725 default :
1726 /* xgettext:c-format */
1727 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
1728 opindex);
1729 abort ();
1730 }
1731
1732 return errmsg;
1733 }
1734
1735 int m32c_cgen_extract_operand
1736 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
1737
1738 /* Main entry point for operand extraction.
1739 The result is <= 0 for error, >0 for success.
1740 ??? Actual values aren't well defined right now.
1741
1742 This function is basically just a big switch statement. Earlier versions
1743 used tables to look up the function to use, but
1744 - if the table contains both assembler and disassembler functions then
1745 the disassembler contains much of the assembler and vice-versa,
1746 - there's a lot of inlining possibilities as things grow,
1747 - using a switch statement avoids the function call overhead.
1748
1749 This function could be moved into `print_insn_normal', but keeping it
1750 separate makes clear the interface between `print_insn_normal' and each of
1751 the handlers. */
1752
1753 int
1754 m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
1755 int opindex,
1756 CGEN_EXTRACT_INFO *ex_info,
1757 CGEN_INSN_INT insn_value,
1758 CGEN_FIELDS * fields,
1759 bfd_vma pc)
1760 {
1761 /* Assume success (for those operands that are nops). */
1762 int length = 1;
1763 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
1764
1765 switch (opindex)
1766 {
1767 case M32C_OPERAND_A0 :
1768 break;
1769 case M32C_OPERAND_A1 :
1770 break;
1771 case M32C_OPERAND_AN16_PUSH_S :
1772 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
1773 break;
1774 case M32C_OPERAND_BIT16AN :
1775 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
1776 break;
1777 case M32C_OPERAND_BIT16RN :
1778 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
1779 break;
1780 case M32C_OPERAND_BIT3_S :
1781 {
1782 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
1783 if (length <= 0) break;
1784 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
1785 if (length <= 0) break;
1786 {
1787 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
1788 }
1789 }
1790 break;
1791 case M32C_OPERAND_BIT32ANPREFIXED :
1792 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
1793 break;
1794 case M32C_OPERAND_BIT32ANUNPREFIXED :
1795 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
1796 break;
1797 case M32C_OPERAND_BIT32RNPREFIXED :
1798 {
1799 long value;
1800 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
1801 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1802 fields->f_dst32_rn_prefixed_QI = value;
1803 }
1804 break;
1805 case M32C_OPERAND_BIT32RNUNPREFIXED :
1806 {
1807 long value;
1808 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
1809 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1810 fields->f_dst32_rn_unprefixed_QI = value;
1811 }
1812 break;
1813 case M32C_OPERAND_BITBASE16_16_S8 :
1814 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1815 break;
1816 case M32C_OPERAND_BITBASE16_16_U16 :
1817 {
1818 long value;
1819 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1820 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1821 fields->f_dsp_16_u16 = value;
1822 }
1823 break;
1824 case M32C_OPERAND_BITBASE16_16_U8 :
1825 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1826 break;
1827 case M32C_OPERAND_BITBASE16_8_U11_S :
1828 {
1829 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S);
1830 if (length <= 0) break;
1831 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
1832 if (length <= 0) break;
1833 {
1834 FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S)));
1835 }
1836 }
1837 break;
1838 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1839 {
1840 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1841 if (length <= 0) break;
1842 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1843 if (length <= 0) break;
1844 {
1845 FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1846 }
1847 }
1848 break;
1849 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1850 {
1851 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1852 if (length <= 0) break;
1853 {
1854 long value;
1855 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1856 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1857 fields->f_dsp_16_s16 = value;
1858 }
1859 if (length <= 0) break;
1860 {
1861 FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1862 }
1863 }
1864 break;
1865 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1866 {
1867 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1868 if (length <= 0) break;
1869 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1870 if (length <= 0) break;
1871 {
1872 FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1873 }
1874 }
1875 break;
1876 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1877 {
1878 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1879 if (length <= 0) break;
1880 {
1881 long value;
1882 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1883 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1884 fields->f_dsp_16_u16 = value;
1885 }
1886 if (length <= 0) break;
1887 {
1888 FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1889 }
1890 }
1891 break;
1892 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1893 {
1894 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1895 if (length <= 0) break;
1896 {
1897 long value;
1898 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1899 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1900 fields->f_dsp_16_u16 = value;
1901 }
1902 if (length <= 0) break;
1903 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1904 if (length <= 0) break;
1905 {
1906 FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed)))));
1907 }
1908 }
1909 break;
1910 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1911 {
1912 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1913 if (length <= 0) break;
1914 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1915 if (length <= 0) break;
1916 {
1917 FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed)));
1918 }
1919 }
1920 break;
1921 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1922 {
1923 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1924 if (length <= 0) break;
1925 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1926 if (length <= 0) break;
1927 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
1928 if (length <= 0) break;
1929 {
1930 FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1931 }
1932 }
1933 break;
1934 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1935 {
1936 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1937 if (length <= 0) break;
1938 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1939 if (length <= 0) break;
1940 {
1941 FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed)));
1942 }
1943 }
1944 break;
1945 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1946 {
1947 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1948 if (length <= 0) break;
1949 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1950 if (length <= 0) break;
1951 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1952 if (length <= 0) break;
1953 {
1954 FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1955 }
1956 }
1957 break;
1958 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1959 {
1960 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1961 if (length <= 0) break;
1962 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1963 if (length <= 0) break;
1964 {
1965 long value;
1966 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
1967 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1968 fields->f_dsp_32_u16 = value;
1969 }
1970 if (length <= 0) break;
1971 {
1972 FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed)))));
1973 }
1974 }
1975 break;
1976 case M32C_OPERAND_BITNO16R :
1977 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1978 break;
1979 case M32C_OPERAND_BITNO32PREFIXED :
1980 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1981 break;
1982 case M32C_OPERAND_BITNO32UNPREFIXED :
1983 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1984 break;
1985 case M32C_OPERAND_DSP_10_U6 :
1986 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6);
1987 break;
1988 case M32C_OPERAND_DSP_16_S16 :
1989 {
1990 long value;
1991 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1992 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1993 fields->f_dsp_16_s16 = value;
1994 }
1995 break;
1996 case M32C_OPERAND_DSP_16_S8 :
1997 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1998 break;
1999 case M32C_OPERAND_DSP_16_U16 :
2000 {
2001 long value;
2002 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2003 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2004 fields->f_dsp_16_u16 = value;
2005 }
2006 break;
2007 case M32C_OPERAND_DSP_16_U20 :
2008 {
2009 {
2010 long value;
2011 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2012 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2013 fields->f_dsp_16_u16 = value;
2014 }
2015 if (length <= 0) break;
2016 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2017 if (length <= 0) break;
2018 {
2019 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2020 }
2021 }
2022 break;
2023 case M32C_OPERAND_DSP_16_U24 :
2024 {
2025 {
2026 long value;
2027 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2028 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2029 fields->f_dsp_16_u16 = value;
2030 }
2031 if (length <= 0) break;
2032 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2033 if (length <= 0) break;
2034 {
2035 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
2036 }
2037 }
2038 break;
2039 case M32C_OPERAND_DSP_16_U8 :
2040 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2041 break;
2042 case M32C_OPERAND_DSP_24_S16 :
2043 {
2044 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2045 if (length <= 0) break;
2046 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2047 if (length <= 0) break;
2048 {
2049 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2050 }
2051 }
2052 break;
2053 case M32C_OPERAND_DSP_24_S8 :
2054 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2055 break;
2056 case M32C_OPERAND_DSP_24_U16 :
2057 {
2058 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2059 if (length <= 0) break;
2060 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2061 if (length <= 0) break;
2062 {
2063 FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)));
2064 }
2065 }
2066 break;
2067 case M32C_OPERAND_DSP_24_U20 :
2068 {
2069 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2070 if (length <= 0) break;
2071 {
2072 long value;
2073 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2074 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2075 fields->f_dsp_32_u16 = value;
2076 }
2077 if (length <= 0) break;
2078 {
2079 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2080 }
2081 }
2082 break;
2083 case M32C_OPERAND_DSP_24_U24 :
2084 {
2085 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2086 if (length <= 0) break;
2087 {
2088 long value;
2089 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2090 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2091 fields->f_dsp_32_u16 = value;
2092 }
2093 if (length <= 0) break;
2094 {
2095 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2096 }
2097 }
2098 break;
2099 case M32C_OPERAND_DSP_24_U8 :
2100 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2101 break;
2102 case M32C_OPERAND_DSP_32_S16 :
2103 {
2104 long value;
2105 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2106 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2107 fields->f_dsp_32_s16 = value;
2108 }
2109 break;
2110 case M32C_OPERAND_DSP_32_S8 :
2111 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2112 break;
2113 case M32C_OPERAND_DSP_32_U16 :
2114 {
2115 long value;
2116 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2117 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2118 fields->f_dsp_32_u16 = value;
2119 }
2120 break;
2121 case M32C_OPERAND_DSP_32_U20 :
2122 {
2123 long value;
2124 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2125 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2126 fields->f_dsp_32_u24 = value;
2127 }
2128 break;
2129 case M32C_OPERAND_DSP_32_U24 :
2130 {
2131 long value;
2132 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2133 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2134 fields->f_dsp_32_u24 = value;
2135 }
2136 break;
2137 case M32C_OPERAND_DSP_32_U8 :
2138 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2139 break;
2140 case M32C_OPERAND_DSP_40_S16 :
2141 {
2142 long value;
2143 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2144 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2145 fields->f_dsp_40_s16 = value;
2146 }
2147 break;
2148 case M32C_OPERAND_DSP_40_S8 :
2149 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2150 break;
2151 case M32C_OPERAND_DSP_40_U16 :
2152 {
2153 long value;
2154 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
2155 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2156 fields->f_dsp_40_u16 = value;
2157 }
2158 break;
2159 case M32C_OPERAND_DSP_40_U20 :
2160 {
2161 long value;
2162 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value);
2163 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
2164 fields->f_dsp_40_u20 = value;
2165 }
2166 break;
2167 case M32C_OPERAND_DSP_40_U24 :
2168 {
2169 long value;
2170 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2171 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2172 fields->f_dsp_40_u24 = value;
2173 }
2174 break;
2175 case M32C_OPERAND_DSP_40_U8 :
2176 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2177 break;
2178 case M32C_OPERAND_DSP_48_S16 :
2179 {
2180 long value;
2181 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2182 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2183 fields->f_dsp_48_s16 = value;
2184 }
2185 break;
2186 case M32C_OPERAND_DSP_48_S8 :
2187 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2188 break;
2189 case M32C_OPERAND_DSP_48_U16 :
2190 {
2191 long value;
2192 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2193 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2194 fields->f_dsp_48_u16 = value;
2195 }
2196 break;
2197 case M32C_OPERAND_DSP_48_U20 :
2198 {
2199 {
2200 long value;
2201 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2202 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2203 fields->f_dsp_48_u16 = value;
2204 }
2205 if (length <= 0) break;
2206 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2207 if (length <= 0) break;
2208 {
2209 FLD (f_dsp_48_u20) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (983040))));
2210 }
2211 }
2212 break;
2213 case M32C_OPERAND_DSP_48_U24 :
2214 {
2215 {
2216 long value;
2217 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2218 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2219 fields->f_dsp_48_u16 = value;
2220 }
2221 if (length <= 0) break;
2222 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2223 if (length <= 0) break;
2224 {
2225 FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680))));
2226 }
2227 }
2228 break;
2229 case M32C_OPERAND_DSP_48_U8 :
2230 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8);
2231 break;
2232 case M32C_OPERAND_DSP_8_S24 :
2233 {
2234 long value;
2235 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
2236 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
2237 fields->f_dsp_8_s24 = value;
2238 }
2239 break;
2240 case M32C_OPERAND_DSP_8_S8 :
2241 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2242 break;
2243 case M32C_OPERAND_DSP_8_U16 :
2244 {
2245 long value;
2246 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
2247 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2248 fields->f_dsp_8_u16 = value;
2249 }
2250 break;
2251 case M32C_OPERAND_DSP_8_U24 :
2252 {
2253 long value;
2254 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
2255 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2256 fields->f_dsp_8_u24 = value;
2257 }
2258 break;
2259 case M32C_OPERAND_DSP_8_U6 :
2260 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6);
2261 break;
2262 case M32C_OPERAND_DSP_8_U8 :
2263 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
2264 break;
2265 case M32C_OPERAND_DST16AN :
2266 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2267 break;
2268 case M32C_OPERAND_DST16AN_S :
2269 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s);
2270 break;
2271 case M32C_OPERAND_DST16ANHI :
2272 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2273 break;
2274 case M32C_OPERAND_DST16ANQI :
2275 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2276 break;
2277 case M32C_OPERAND_DST16ANQI_S :
2278 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2279 break;
2280 case M32C_OPERAND_DST16ANSI :
2281 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2282 break;
2283 case M32C_OPERAND_DST16RNEXTQI :
2284 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext);
2285 break;
2286 case M32C_OPERAND_DST16RNHI :
2287 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2288 break;
2289 case M32C_OPERAND_DST16RNQI :
2290 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2291 break;
2292 case M32C_OPERAND_DST16RNQI_S :
2293 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2294 break;
2295 case M32C_OPERAND_DST16RNSI :
2296 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2297 break;
2298 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
2299 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2300 break;
2301 case M32C_OPERAND_DST32ANPREFIXED :
2302 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2303 break;
2304 case M32C_OPERAND_DST32ANPREFIXEDHI :
2305 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2306 break;
2307 case M32C_OPERAND_DST32ANPREFIXEDQI :
2308 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2309 break;
2310 case M32C_OPERAND_DST32ANPREFIXEDSI :
2311 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2312 break;
2313 case M32C_OPERAND_DST32ANUNPREFIXED :
2314 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2315 break;
2316 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
2317 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2318 break;
2319 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
2320 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2321 break;
2322 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
2323 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2324 break;
2325 case M32C_OPERAND_DST32R0HI_S :
2326 break;
2327 case M32C_OPERAND_DST32R0QI_S :
2328 break;
2329 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
2330 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2331 break;
2332 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
2333 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2334 break;
2335 case M32C_OPERAND_DST32RNPREFIXEDHI :
2336 {
2337 long value;
2338 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2339 value = ((((value) + (2))) % (4));
2340 fields->f_dst32_rn_prefixed_HI = value;
2341 }
2342 break;
2343 case M32C_OPERAND_DST32RNPREFIXEDQI :
2344 {
2345 long value;
2346 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2347 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2348 fields->f_dst32_rn_prefixed_QI = value;
2349 }
2350 break;
2351 case M32C_OPERAND_DST32RNPREFIXEDSI :
2352 {
2353 long value;
2354 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2355 value = ((value) - (2));
2356 fields->f_dst32_rn_prefixed_SI = value;
2357 }
2358 break;
2359 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
2360 {
2361 long value;
2362 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2363 value = ((((value) + (2))) % (4));
2364 fields->f_dst32_rn_unprefixed_HI = value;
2365 }
2366 break;
2367 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
2368 {
2369 long value;
2370 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2371 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2372 fields->f_dst32_rn_unprefixed_QI = value;
2373 }
2374 break;
2375 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
2376 {
2377 long value;
2378 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2379 value = ((value) - (2));
2380 fields->f_dst32_rn_unprefixed_SI = value;
2381 }
2382 break;
2383 case M32C_OPERAND_G :
2384 break;
2385 case M32C_OPERAND_IMM_12_S4 :
2386 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2387 break;
2388 case M32C_OPERAND_IMM_12_S4N :
2389 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2390 break;
2391 case M32C_OPERAND_IMM_13_U3 :
2392 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3);
2393 break;
2394 case M32C_OPERAND_IMM_16_HI :
2395 {
2396 long value;
2397 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2398 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2399 fields->f_dsp_16_s16 = value;
2400 }
2401 break;
2402 case M32C_OPERAND_IMM_16_QI :
2403 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2404 break;
2405 case M32C_OPERAND_IMM_16_SI :
2406 {
2407 {
2408 long value;
2409 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2410 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2411 fields->f_dsp_16_u16 = value;
2412 }
2413 if (length <= 0) break;
2414 {
2415 long value;
2416 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2417 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2418 fields->f_dsp_32_u16 = value;
2419 }
2420 if (length <= 0) break;
2421 {
2422 FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000))));
2423 }
2424 }
2425 break;
2426 case M32C_OPERAND_IMM_20_S4 :
2427 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2428 break;
2429 case M32C_OPERAND_IMM_24_HI :
2430 {
2431 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2432 if (length <= 0) break;
2433 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2434 if (length <= 0) break;
2435 {
2436 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2437 }
2438 }
2439 break;
2440 case M32C_OPERAND_IMM_24_QI :
2441 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2442 break;
2443 case M32C_OPERAND_IMM_24_SI :
2444 {
2445 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2446 if (length <= 0) break;
2447 {
2448 long value;
2449 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2450 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2451 fields->f_dsp_32_u24 = value;
2452 }
2453 if (length <= 0) break;
2454 {
2455 FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00))));
2456 }
2457 }
2458 break;
2459 case M32C_OPERAND_IMM_32_HI :
2460 {
2461 long value;
2462 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2463 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2464 fields->f_dsp_32_s16 = value;
2465 }
2466 break;
2467 case M32C_OPERAND_IMM_32_QI :
2468 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2469 break;
2470 case M32C_OPERAND_IMM_32_SI :
2471 {
2472 long value;
2473 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value);
2474 value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
2475 fields->f_dsp_32_s32 = value;
2476 }
2477 break;
2478 case M32C_OPERAND_IMM_40_HI :
2479 {
2480 long value;
2481 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2482 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2483 fields->f_dsp_40_s16 = value;
2484 }
2485 break;
2486 case M32C_OPERAND_IMM_40_QI :
2487 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2488 break;
2489 case M32C_OPERAND_IMM_40_SI :
2490 {
2491 {
2492 long value;
2493 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2494 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2495 fields->f_dsp_40_u24 = value;
2496 }
2497 if (length <= 0) break;
2498 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2499 if (length <= 0) break;
2500 {
2501 FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000))));
2502 }
2503 }
2504 break;
2505 case M32C_OPERAND_IMM_48_HI :
2506 {
2507 long value;
2508 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2509 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2510 fields->f_dsp_48_s16 = value;
2511 }
2512 break;
2513 case M32C_OPERAND_IMM_48_QI :
2514 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2515 break;
2516 case M32C_OPERAND_IMM_48_SI :
2517 {
2518 {
2519 long value;
2520 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2521 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2522 fields->f_dsp_48_u16 = value;
2523 }
2524 if (length <= 0) break;
2525 {
2526 long value;
2527 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
2528 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2529 fields->f_dsp_64_u16 = value;
2530 }
2531 if (length <= 0) break;
2532 {
2533 FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000))));
2534 }
2535 }
2536 break;
2537 case M32C_OPERAND_IMM_56_HI :
2538 {
2539 length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8);
2540 if (length <= 0) break;
2541 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2542 if (length <= 0) break;
2543 {
2544 FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8))))));
2545 }
2546 }
2547 break;
2548 case M32C_OPERAND_IMM_56_QI :
2549 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8);
2550 break;
2551 case M32C_OPERAND_IMM_64_HI :
2552 {
2553 long value;
2554 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
2555 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2556 fields->f_dsp_64_s16 = value;
2557 }
2558 break;
2559 case M32C_OPERAND_IMM_8_HI :
2560 {
2561 long value;
2562 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
2563 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2564 fields->f_dsp_8_s16 = value;
2565 }
2566 break;
2567 case M32C_OPERAND_IMM_8_QI :
2568 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2569 break;
2570 case M32C_OPERAND_IMM_8_S4 :
2571 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2572 break;
2573 case M32C_OPERAND_IMM_8_S4N :
2574 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2575 break;
2576 case M32C_OPERAND_IMM_SH_12_S4 :
2577 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2578 break;
2579 case M32C_OPERAND_IMM_SH_20_S4 :
2580 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2581 break;
2582 case M32C_OPERAND_IMM_SH_8_S4 :
2583 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2584 break;
2585 case M32C_OPERAND_IMM1_S :
2586 {
2587 long value;
2588 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
2589 value = ((value) + (1));
2590 fields->f_imm1_S = value;
2591 }
2592 break;
2593 case M32C_OPERAND_IMM3_S :
2594 {
2595 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2596 if (length <= 0) break;
2597 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2598 if (length <= 0) break;
2599 {
2600 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
2601 }
2602 }
2603 break;
2604 case M32C_OPERAND_LAB_16_8 :
2605 {
2606 long value;
2607 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
2608 value = ((value) + (((pc) + (2))));
2609 fields->f_lab_16_8 = value;
2610 }
2611 break;
2612 case M32C_OPERAND_LAB_24_8 :
2613 {
2614 long value;
2615 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
2616 value = ((value) + (((pc) + (2))));
2617 fields->f_lab_24_8 = value;
2618 }
2619 break;
2620 case M32C_OPERAND_LAB_32_8 :
2621 {
2622 long value;
2623 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
2624 value = ((value) + (((pc) + (2))));
2625 fields->f_lab_32_8 = value;
2626 }
2627 break;
2628 case M32C_OPERAND_LAB_40_8 :
2629 {
2630 long value;
2631 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
2632 value = ((value) + (((pc) + (2))));
2633 fields->f_lab_40_8 = value;
2634 }
2635 break;
2636 case M32C_OPERAND_LAB_5_3 :
2637 {
2638 long value;
2639 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
2640 value = ((value) + (((pc) + (2))));
2641 fields->f_lab_5_3 = value;
2642 }
2643 break;
2644 case M32C_OPERAND_LAB_8_16 :
2645 {
2646 long value;
2647 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
2648 value = ((((((unsigned int) (((value) & (65535))) >> (8))) | (((int) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1))));
2649 fields->f_lab_8_16 = value;
2650 }
2651 break;
2652 case M32C_OPERAND_LAB_8_24 :
2653 {
2654 long value;
2655 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
2656 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2657 fields->f_lab_8_24 = value;
2658 }
2659 break;
2660 case M32C_OPERAND_LAB_8_8 :
2661 {
2662 long value;
2663 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
2664 value = ((value) + (((pc) + (1))));
2665 fields->f_lab_8_8 = value;
2666 }
2667 break;
2668 case M32C_OPERAND_LAB32_JMP_S :
2669 {
2670 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2671 if (length <= 0) break;
2672 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2673 if (length <= 0) break;
2674 {
2675 FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2))));
2676 }
2677 }
2678 break;
2679 case M32C_OPERAND_Q :
2680 break;
2681 case M32C_OPERAND_R0 :
2682 break;
2683 case M32C_OPERAND_R0H :
2684 break;
2685 case M32C_OPERAND_R0L :
2686 break;
2687 case M32C_OPERAND_R1 :
2688 break;
2689 case M32C_OPERAND_R1R2R0 :
2690 break;
2691 case M32C_OPERAND_R2 :
2692 break;
2693 case M32C_OPERAND_R2R0 :
2694 break;
2695 case M32C_OPERAND_R3 :
2696 break;
2697 case M32C_OPERAND_R3R1 :
2698 break;
2699 case M32C_OPERAND_REGSETPOP :
2700 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2701 break;
2702 case M32C_OPERAND_REGSETPUSH :
2703 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2704 break;
2705 case M32C_OPERAND_RN16_PUSH_S :
2706 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
2707 break;
2708 case M32C_OPERAND_S :
2709 break;
2710 case M32C_OPERAND_SRC16AN :
2711 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2712 break;
2713 case M32C_OPERAND_SRC16ANHI :
2714 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2715 break;
2716 case M32C_OPERAND_SRC16ANQI :
2717 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2718 break;
2719 case M32C_OPERAND_SRC16RNHI :
2720 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2721 break;
2722 case M32C_OPERAND_SRC16RNQI :
2723 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2724 break;
2725 case M32C_OPERAND_SRC32ANPREFIXED :
2726 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2727 break;
2728 case M32C_OPERAND_SRC32ANPREFIXEDHI :
2729 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2730 break;
2731 case M32C_OPERAND_SRC32ANPREFIXEDQI :
2732 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2733 break;
2734 case M32C_OPERAND_SRC32ANPREFIXEDSI :
2735 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2736 break;
2737 case M32C_OPERAND_SRC32ANUNPREFIXED :
2738 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2739 break;
2740 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
2741 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2742 break;
2743 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
2744 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2745 break;
2746 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
2747 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2748 break;
2749 case M32C_OPERAND_SRC32RNPREFIXEDHI :
2750 {
2751 long value;
2752 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2753 value = ((((value) + (2))) % (4));
2754 fields->f_src32_rn_prefixed_HI = value;
2755 }
2756 break;
2757 case M32C_OPERAND_SRC32RNPREFIXEDQI :
2758 {
2759 long value;
2760 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2761 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2762 fields->f_src32_rn_prefixed_QI = value;
2763 }
2764 break;
2765 case M32C_OPERAND_SRC32RNPREFIXEDSI :
2766 {
2767 long value;
2768 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2769 value = ((value) - (2));
2770 fields->f_src32_rn_prefixed_SI = value;
2771 }
2772 break;
2773 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
2774 {
2775 long value;
2776 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2777 value = ((((value) + (2))) % (4));
2778 fields->f_src32_rn_unprefixed_HI = value;
2779 }
2780 break;
2781 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
2782 {
2783 long value;
2784 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2785 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2786 fields->f_src32_rn_unprefixed_QI = value;
2787 }
2788 break;
2789 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
2790 {
2791 long value;
2792 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2793 value = ((value) - (2));
2794 fields->f_src32_rn_unprefixed_SI = value;
2795 }
2796 break;
2797 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
2798 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1);
2799 break;
2800 case M32C_OPERAND_X :
2801 break;
2802 case M32C_OPERAND_Z :
2803 break;
2804 case M32C_OPERAND_COND16_16 :
2805 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2806 break;
2807 case M32C_OPERAND_COND16_24 :
2808 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2809 break;
2810 case M32C_OPERAND_COND16_32 :
2811 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2812 break;
2813 case M32C_OPERAND_COND16C :
2814 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2815 break;
2816 case M32C_OPERAND_COND16J :
2817 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2818 break;
2819 case M32C_OPERAND_COND16J5 :
2820 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5);
2821 break;
2822 case M32C_OPERAND_COND32 :
2823 {
2824 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1);
2825 if (length <= 0) break;
2826 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2827 if (length <= 0) break;
2828 {
2829 FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3)));
2830 }
2831 }
2832 break;
2833 case M32C_OPERAND_COND32_16 :
2834 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2835 break;
2836 case M32C_OPERAND_COND32_24 :
2837 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2838 break;
2839 case M32C_OPERAND_COND32_32 :
2840 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2841 break;
2842 case M32C_OPERAND_COND32_40 :
2843 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2844 break;
2845 case M32C_OPERAND_COND32J :
2846 {
2847 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3);
2848 if (length <= 0) break;
2849 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2850 if (length <= 0) break;
2851 {
2852 FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1)));
2853 }
2854 }
2855 break;
2856 case M32C_OPERAND_CR1_PREFIXED_32 :
2857 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2858 break;
2859 case M32C_OPERAND_CR1_UNPREFIXED_32 :
2860 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2861 break;
2862 case M32C_OPERAND_CR16 :
2863 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2864 break;
2865 case M32C_OPERAND_CR2_32 :
2866 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2867 break;
2868 case M32C_OPERAND_CR3_PREFIXED_32 :
2869 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2870 break;
2871 case M32C_OPERAND_CR3_UNPREFIXED_32 :
2872 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2873 break;
2874 case M32C_OPERAND_FLAGS16 :
2875 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2876 break;
2877 case M32C_OPERAND_FLAGS32 :
2878 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2879 break;
2880 case M32C_OPERAND_SCCOND32 :
2881 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2882 break;
2883 case M32C_OPERAND_SIZE :
2884 break;
2885
2886 default :
2887 /* xgettext:c-format */
2888 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
2889 opindex);
2890 abort ();
2891 }
2892
2893 return length;
2894 }
2895
2896 cgen_insert_fn * const m32c_cgen_insert_handlers[] =
2897 {
2898 insert_insn_normal,
2899 };
2900
2901 cgen_extract_fn * const m32c_cgen_extract_handlers[] =
2902 {
2903 extract_insn_normal,
2904 };
2905
2906 int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2907 bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2908
2909 /* Getting values from cgen_fields is handled by a collection of functions.
2910 They are distinguished by the type of the VALUE argument they return.
2911 TODO: floating point, inlining support, remove cases where result type
2912 not appropriate. */
2913
2914 int
2915 m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
2916 int opindex,
2917 const CGEN_FIELDS * fields)
2918 {
2919 int value;
2920
2921 switch (opindex)
2922 {
2923 case M32C_OPERAND_A0 :
2924 value = 0;
2925 break;
2926 case M32C_OPERAND_A1 :
2927 value = 0;
2928 break;
2929 case M32C_OPERAND_AN16_PUSH_S :
2930 value = fields->f_4_1;
2931 break;
2932 case M32C_OPERAND_BIT16AN :
2933 value = fields->f_dst16_an;
2934 break;
2935 case M32C_OPERAND_BIT16RN :
2936 value = fields->f_dst16_rn;
2937 break;
2938 case M32C_OPERAND_BIT3_S :
2939 value = fields->f_imm3_S;
2940 break;
2941 case M32C_OPERAND_BIT32ANPREFIXED :
2942 value = fields->f_dst32_an_prefixed;
2943 break;
2944 case M32C_OPERAND_BIT32ANUNPREFIXED :
2945 value = fields->f_dst32_an_unprefixed;
2946 break;
2947 case M32C_OPERAND_BIT32RNPREFIXED :
2948 value = fields->f_dst32_rn_prefixed_QI;
2949 break;
2950 case M32C_OPERAND_BIT32RNUNPREFIXED :
2951 value = fields->f_dst32_rn_unprefixed_QI;
2952 break;
2953 case M32C_OPERAND_BITBASE16_16_S8 :
2954 value = fields->f_dsp_16_s8;
2955 break;
2956 case M32C_OPERAND_BITBASE16_16_U16 :
2957 value = fields->f_dsp_16_u16;
2958 break;
2959 case M32C_OPERAND_BITBASE16_16_U8 :
2960 value = fields->f_dsp_16_u8;
2961 break;
2962 case M32C_OPERAND_BITBASE16_8_U11_S :
2963 value = fields->f_bitbase16_u11_S;
2964 break;
2965 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
2966 value = fields->f_bitbase32_16_s11_unprefixed;
2967 break;
2968 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
2969 value = fields->f_bitbase32_16_s19_unprefixed;
2970 break;
2971 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
2972 value = fields->f_bitbase32_16_u11_unprefixed;
2973 break;
2974 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
2975 value = fields->f_bitbase32_16_u19_unprefixed;
2976 break;
2977 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
2978 value = fields->f_bitbase32_16_u27_unprefixed;
2979 break;
2980 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
2981 value = fields->f_bitbase32_24_s11_prefixed;
2982 break;
2983 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
2984 value = fields->f_bitbase32_24_s19_prefixed;
2985 break;
2986 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
2987 value = fields->f_bitbase32_24_u11_prefixed;
2988 break;
2989 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
2990 value = fields->f_bitbase32_24_u19_prefixed;
2991 break;
2992 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
2993 value = fields->f_bitbase32_24_u27_prefixed;
2994 break;
2995 case M32C_OPERAND_BITNO16R :
2996 value = fields->f_dsp_16_u8;
2997 break;
2998 case M32C_OPERAND_BITNO32PREFIXED :
2999 value = fields->f_bitno32_prefixed;
3000 break;
3001 case M32C_OPERAND_BITNO32UNPREFIXED :
3002 value = fields->f_bitno32_unprefixed;
3003 break;
3004 case M32C_OPERAND_DSP_10_U6 :
3005 value = fields->f_dsp_10_u6;
3006 break;
3007 case M32C_OPERAND_DSP_16_S16 :
3008 value = fields->f_dsp_16_s16;
3009 break;
3010 case M32C_OPERAND_DSP_16_S8 :
3011 value = fields->f_dsp_16_s8;
3012 break;
3013 case M32C_OPERAND_DSP_16_U16 :
3014 value = fields->f_dsp_16_u16;
3015 break;
3016 case M32C_OPERAND_DSP_16_U20 :
3017 value = fields->f_dsp_16_u24;
3018 break;
3019 case M32C_OPERAND_DSP_16_U24 :
3020 value = fields->f_dsp_16_u24;
3021 break;
3022 case M32C_OPERAND_DSP_16_U8 :
3023 value = fields->f_dsp_16_u8;
3024 break;
3025 case M32C_OPERAND_DSP_24_S16 :
3026 value = fields->f_dsp_24_s16;
3027 break;
3028 case M32C_OPERAND_DSP_24_S8 :
3029 value = fields->f_dsp_24_s8;
3030 break;
3031 case M32C_OPERAND_DSP_24_U16 :
3032 value = fields->f_dsp_24_u16;
3033 break;
3034 case M32C_OPERAND_DSP_24_U20 :
3035 value = fields->f_dsp_24_u24;
3036 break;
3037 case M32C_OPERAND_DSP_24_U24 :
3038 value = fields->f_dsp_24_u24;
3039 break;
3040 case M32C_OPERAND_DSP_24_U8 :
3041 value = fields->f_dsp_24_u8;
3042 break;
3043 case M32C_OPERAND_DSP_32_S16 :
3044 value = fields->f_dsp_32_s16;
3045 break;
3046 case M32C_OPERAND_DSP_32_S8 :
3047 value = fields->f_dsp_32_s8;
3048 break;
3049 case M32C_OPERAND_DSP_32_U16 :
3050 value = fields->f_dsp_32_u16;
3051 break;
3052 case M32C_OPERAND_DSP_32_U20 :
3053 value = fields->f_dsp_32_u24;
3054 break;
3055 case M32C_OPERAND_DSP_32_U24 :
3056 value = fields->f_dsp_32_u24;
3057 break;
3058 case M32C_OPERAND_DSP_32_U8 :
3059 value = fields->f_dsp_32_u8;
3060 break;
3061 case M32C_OPERAND_DSP_40_S16 :
3062 value = fields->f_dsp_40_s16;
3063 break;
3064 case M32C_OPERAND_DSP_40_S8 :
3065 value = fields->f_dsp_40_s8;
3066 break;
3067 case M32C_OPERAND_DSP_40_U16 :
3068 value = fields->f_dsp_40_u16;
3069 break;
3070 case M32C_OPERAND_DSP_40_U20 :
3071 value = fields->f_dsp_40_u20;
3072 break;
3073 case M32C_OPERAND_DSP_40_U24 :
3074 value = fields->f_dsp_40_u24;
3075 break;
3076 case M32C_OPERAND_DSP_40_U8 :
3077 value = fields->f_dsp_40_u8;
3078 break;
3079 case M32C_OPERAND_DSP_48_S16 :
3080 value = fields->f_dsp_48_s16;
3081 break;
3082 case M32C_OPERAND_DSP_48_S8 :
3083 value = fields->f_dsp_48_s8;
3084 break;
3085 case M32C_OPERAND_DSP_48_U16 :
3086 value = fields->f_dsp_48_u16;
3087 break;
3088 case M32C_OPERAND_DSP_48_U20 :
3089 value = fields->f_dsp_48_u20;
3090 break;
3091 case M32C_OPERAND_DSP_48_U24 :
3092 value = fields->f_dsp_48_u24;
3093 break;
3094 case M32C_OPERAND_DSP_48_U8 :
3095 value = fields->f_dsp_48_u8;
3096 break;
3097 case M32C_OPERAND_DSP_8_S24 :
3098 value = fields->f_dsp_8_s24;
3099 break;
3100 case M32C_OPERAND_DSP_8_S8 :
3101 value = fields->f_dsp_8_s8;
3102 break;
3103 case M32C_OPERAND_DSP_8_U16 :
3104 value = fields->f_dsp_8_u16;
3105 break;
3106 case M32C_OPERAND_DSP_8_U24 :
3107 value = fields->f_dsp_8_u24;
3108 break;
3109 case M32C_OPERAND_DSP_8_U6 :
3110 value = fields->f_dsp_8_u6;
3111 break;
3112 case M32C_OPERAND_DSP_8_U8 :
3113 value = fields->f_dsp_8_u8;
3114 break;
3115 case M32C_OPERAND_DST16AN :
3116 value = fields->f_dst16_an;
3117 break;
3118 case M32C_OPERAND_DST16AN_S :
3119 value = fields->f_dst16_an_s;
3120 break;
3121 case M32C_OPERAND_DST16ANHI :
3122 value = fields->f_dst16_an;
3123 break;
3124 case M32C_OPERAND_DST16ANQI :
3125 value = fields->f_dst16_an;
3126 break;
3127 case M32C_OPERAND_DST16ANQI_S :
3128 value = fields->f_dst16_rn_QI_s;
3129 break;
3130 case M32C_OPERAND_DST16ANSI :
3131 value = fields->f_dst16_an;
3132 break;
3133 case M32C_OPERAND_DST16RNEXTQI :
3134 value = fields->f_dst16_rn_ext;
3135 break;
3136 case M32C_OPERAND_DST16RNHI :
3137 value = fields->f_dst16_rn;
3138 break;
3139 case M32C_OPERAND_DST16RNQI :
3140 value = fields->f_dst16_rn;
3141 break;
3142 case M32C_OPERAND_DST16RNQI_S :
3143 value = fields->f_dst16_rn_QI_s;
3144 break;
3145 case M32C_OPERAND_DST16RNSI :
3146 value = fields->f_dst16_rn;
3147 break;
3148 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3149 value = fields->f_dst32_an_unprefixed;
3150 break;
3151 case M32C_OPERAND_DST32ANPREFIXED :
3152 value = fields->f_dst32_an_prefixed;
3153 break;
3154 case M32C_OPERAND_DST32ANPREFIXEDHI :
3155 value = fields->f_dst32_an_prefixed;
3156 break;
3157 case M32C_OPERAND_DST32ANPREFIXEDQI :
3158 value = fields->f_dst32_an_prefixed;
3159 break;
3160 case M32C_OPERAND_DST32ANPREFIXEDSI :
3161 value = fields->f_dst32_an_prefixed;
3162 break;
3163 case M32C_OPERAND_DST32ANUNPREFIXED :
3164 value = fields->f_dst32_an_unprefixed;
3165 break;
3166 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3167 value = fields->f_dst32_an_unprefixed;
3168 break;
3169 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3170 value = fields->f_dst32_an_unprefixed;
3171 break;
3172 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3173 value = fields->f_dst32_an_unprefixed;
3174 break;
3175 case M32C_OPERAND_DST32R0HI_S :
3176 value = 0;
3177 break;
3178 case M32C_OPERAND_DST32R0QI_S :
3179 value = 0;
3180 break;
3181 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3182 value = fields->f_dst32_rn_ext_unprefixed;
3183 break;
3184 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3185 value = fields->f_dst32_rn_ext_unprefixed;
3186 break;
3187 case M32C_OPERAND_DST32RNPREFIXEDHI :
3188 value = fields->f_dst32_rn_prefixed_HI;
3189 break;
3190 case M32C_OPERAND_DST32RNPREFIXEDQI :
3191 value = fields->f_dst32_rn_prefixed_QI;
3192 break;
3193 case M32C_OPERAND_DST32RNPREFIXEDSI :
3194 value = fields->f_dst32_rn_prefixed_SI;
3195 break;
3196 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3197 value = fields->f_dst32_rn_unprefixed_HI;
3198 break;
3199 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3200 value = fields->f_dst32_rn_unprefixed_QI;
3201 break;
3202 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3203 value = fields->f_dst32_rn_unprefixed_SI;
3204 break;
3205 case M32C_OPERAND_G :
3206 value = 0;
3207 break;
3208 case M32C_OPERAND_IMM_12_S4 :
3209 value = fields->f_imm_12_s4;
3210 break;
3211 case M32C_OPERAND_IMM_12_S4N :
3212 value = fields->f_imm_12_s4;
3213 break;
3214 case M32C_OPERAND_IMM_13_U3 :
3215 value = fields->f_imm_13_u3;
3216 break;
3217 case M32C_OPERAND_IMM_16_HI :
3218 value = fields->f_dsp_16_s16;
3219 break;
3220 case M32C_OPERAND_IMM_16_QI :
3221 value = fields->f_dsp_16_s8;
3222 break;
3223 case M32C_OPERAND_IMM_16_SI :
3224 value = fields->f_dsp_16_s32;
3225 break;
3226 case M32C_OPERAND_IMM_20_S4 :
3227 value = fields->f_imm_20_s4;
3228 break;
3229 case M32C_OPERAND_IMM_24_HI :
3230 value = fields->f_dsp_24_s16;
3231 break;
3232 case M32C_OPERAND_IMM_24_QI :
3233 value = fields->f_dsp_24_s8;
3234 break;
3235 case M32C_OPERAND_IMM_24_SI :
3236 value = fields->f_dsp_24_s32;
3237 break;
3238 case M32C_OPERAND_IMM_32_HI :
3239 value = fields->f_dsp_32_s16;
3240 break;
3241 case M32C_OPERAND_IMM_32_QI :
3242 value = fields->f_dsp_32_s8;
3243 break;
3244 case M32C_OPERAND_IMM_32_SI :
3245 value = fields->f_dsp_32_s32;
3246 break;
3247 case M32C_OPERAND_IMM_40_HI :
3248 value = fields->f_dsp_40_s16;
3249 break;
3250 case M32C_OPERAND_IMM_40_QI :
3251 value = fields->f_dsp_40_s8;
3252 break;
3253 case M32C_OPERAND_IMM_40_SI :
3254 value = fields->f_dsp_40_s32;
3255 break;
3256 case M32C_OPERAND_IMM_48_HI :
3257 value = fields->f_dsp_48_s16;
3258 break;
3259 case M32C_OPERAND_IMM_48_QI :
3260 value = fields->f_dsp_48_s8;
3261 break;
3262 case M32C_OPERAND_IMM_48_SI :
3263 value = fields->f_dsp_48_s32;
3264 break;
3265 case M32C_OPERAND_IMM_56_HI :
3266 value = fields->f_dsp_56_s16;
3267 break;
3268 case M32C_OPERAND_IMM_56_QI :
3269 value = fields->f_dsp_56_s8;
3270 break;
3271 case M32C_OPERAND_IMM_64_HI :
3272 value = fields->f_dsp_64_s16;
3273 break;
3274 case M32C_OPERAND_IMM_8_HI :
3275 value = fields->f_dsp_8_s16;
3276 break;
3277 case M32C_OPERAND_IMM_8_QI :
3278 value = fields->f_dsp_8_s8;
3279 break;
3280 case M32C_OPERAND_IMM_8_S4 :
3281 value = fields->f_imm_8_s4;
3282 break;
3283 case M32C_OPERAND_IMM_8_S4N :
3284 value = fields->f_imm_8_s4;
3285 break;
3286 case M32C_OPERAND_IMM_SH_12_S4 :
3287 value = fields->f_imm_12_s4;
3288 break;
3289 case M32C_OPERAND_IMM_SH_20_S4 :
3290 value = fields->f_imm_20_s4;
3291 break;
3292 case M32C_OPERAND_IMM_SH_8_S4 :
3293 value = fields->f_imm_8_s4;
3294 break;
3295 case M32C_OPERAND_IMM1_S :
3296 value = fields->f_imm1_S;
3297 break;
3298 case M32C_OPERAND_IMM3_S :
3299 value = fields->f_imm3_S;
3300 break;
3301 case M32C_OPERAND_LAB_16_8 :
3302 value = fields->f_lab_16_8;
3303 break;
3304 case M32C_OPERAND_LAB_24_8 :
3305 value = fields->f_lab_24_8;
3306 break;
3307 case M32C_OPERAND_LAB_32_8 :
3308 value = fields->f_lab_32_8;
3309 break;
3310 case M32C_OPERAND_LAB_40_8 :
3311 value = fields->f_lab_40_8;
3312 break;
3313 case M32C_OPERAND_LAB_5_3 :
3314 value = fields->f_lab_5_3;
3315 break;
3316 case M32C_OPERAND_LAB_8_16 :
3317 value = fields->f_lab_8_16;
3318 break;
3319 case M32C_OPERAND_LAB_8_24 :
3320 value = fields->f_lab_8_24;
3321 break;
3322 case M32C_OPERAND_LAB_8_8 :
3323 value = fields->f_lab_8_8;
3324 break;
3325 case M32C_OPERAND_LAB32_JMP_S :
3326 value = fields->f_lab32_jmp_s;
3327 break;
3328 case M32C_OPERAND_Q :
3329 value = 0;
3330 break;
3331 case M32C_OPERAND_R0 :
3332 value = 0;
3333 break;
3334 case M32C_OPERAND_R0H :
3335 value = 0;
3336 break;
3337 case M32C_OPERAND_R0L :
3338 value = 0;
3339 break;
3340 case M32C_OPERAND_R1 :
3341 value = 0;
3342 break;
3343 case M32C_OPERAND_R1R2R0 :
3344 value = 0;
3345 break;
3346 case M32C_OPERAND_R2 :
3347 value = 0;
3348 break;
3349 case M32C_OPERAND_R2R0 :
3350 value = 0;
3351 break;
3352 case M32C_OPERAND_R3 :
3353 value = 0;
3354 break;
3355 case M32C_OPERAND_R3R1 :
3356 value = 0;
3357 break;
3358 case M32C_OPERAND_REGSETPOP :
3359 value = fields->f_8_8;
3360 break;
3361 case M32C_OPERAND_REGSETPUSH :
3362 value = fields->f_8_8;
3363 break;
3364 case M32C_OPERAND_RN16_PUSH_S :
3365 value = fields->f_4_1;
3366 break;
3367 case M32C_OPERAND_S :
3368 value = 0;
3369 break;
3370 case M32C_OPERAND_SRC16AN :
3371 value = fields->f_src16_an;
3372 break;
3373 case M32C_OPERAND_SRC16ANHI :
3374 value = fields->f_src16_an;
3375 break;
3376 case M32C_OPERAND_SRC16ANQI :
3377 value = fields->f_src16_an;
3378 break;
3379 case M32C_OPERAND_SRC16RNHI :
3380 value = fields->f_src16_rn;
3381 break;
3382 case M32C_OPERAND_SRC16RNQI :
3383 value = fields->f_src16_rn;
3384 break;
3385 case M32C_OPERAND_SRC32ANPREFIXED :
3386 value = fields->f_src32_an_prefixed;
3387 break;
3388 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3389 value = fields->f_src32_an_prefixed;
3390 break;
3391 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3392 value = fields->f_src32_an_prefixed;
3393 break;
3394 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3395 value = fields->f_src32_an_prefixed;
3396 break;
3397 case M32C_OPERAND_SRC32ANUNPREFIXED :
3398 value = fields->f_src32_an_unprefixed;
3399 break;
3400 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3401 value = fields->f_src32_an_unprefixed;
3402 break;
3403 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3404 value = fields->f_src32_an_unprefixed;
3405 break;
3406 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3407 value = fields->f_src32_an_unprefixed;
3408 break;
3409 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3410 value = fields->f_src32_rn_prefixed_HI;
3411 break;
3412 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3413 value = fields->f_src32_rn_prefixed_QI;
3414 break;
3415 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3416 value = fields->f_src32_rn_prefixed_SI;
3417 break;
3418 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3419 value = fields->f_src32_rn_unprefixed_HI;
3420 break;
3421 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3422 value = fields->f_src32_rn_unprefixed_QI;
3423 break;
3424 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3425 value = fields->f_src32_rn_unprefixed_SI;
3426 break;
3427 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3428 value = fields->f_5_1;
3429 break;
3430 case M32C_OPERAND_X :
3431 value = 0;
3432 break;
3433 case M32C_OPERAND_Z :
3434 value = 0;
3435 break;
3436 case M32C_OPERAND_COND16_16 :
3437 value = fields->f_dsp_16_u8;
3438 break;
3439 case M32C_OPERAND_COND16_24 :
3440 value = fields->f_dsp_24_u8;
3441 break;
3442 case M32C_OPERAND_COND16_32 :
3443 value = fields->f_dsp_32_u8;
3444 break;
3445 case M32C_OPERAND_COND16C :
3446 value = fields->f_cond16;
3447 break;
3448 case M32C_OPERAND_COND16J :
3449 value = fields->f_cond16;
3450 break;
3451 case M32C_OPERAND_COND16J5 :
3452 value = fields->f_cond16j_5;
3453 break;
3454 case M32C_OPERAND_COND32 :
3455 value = fields->f_cond32;
3456 break;
3457 case M32C_OPERAND_COND32_16 :
3458 value = fields->f_dsp_16_u8;
3459 break;
3460 case M32C_OPERAND_COND32_24 :
3461 value = fields->f_dsp_24_u8;
3462 break;
3463 case M32C_OPERAND_COND32_32 :
3464 value = fields->f_dsp_32_u8;
3465 break;
3466 case M32C_OPERAND_COND32_40 :
3467 value = fields->f_dsp_40_u8;
3468 break;
3469 case M32C_OPERAND_COND32J :
3470 value = fields->f_cond32j;
3471 break;
3472 case M32C_OPERAND_CR1_PREFIXED_32 :
3473 value = fields->f_21_3;
3474 break;
3475 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3476 value = fields->f_13_3;
3477 break;
3478 case M32C_OPERAND_CR16 :
3479 value = fields->f_9_3;
3480 break;
3481 case M32C_OPERAND_CR2_32 :
3482 value = fields->f_13_3;
3483 break;
3484 case M32C_OPERAND_CR3_PREFIXED_32 :
3485 value = fields->f_21_3;
3486 break;
3487 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3488 value = fields->f_13_3;
3489 break;
3490 case M32C_OPERAND_FLAGS16 :
3491 value = fields->f_9_3;
3492 break;
3493 case M32C_OPERAND_FLAGS32 :
3494 value = fields->f_13_3;
3495 break;
3496 case M32C_OPERAND_SCCOND32 :
3497 value = fields->f_cond16;
3498 break;
3499 case M32C_OPERAND_SIZE :
3500 value = 0;
3501 break;
3502
3503 default :
3504 /* xgettext:c-format */
3505 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
3506 opindex);
3507 abort ();
3508 }
3509
3510 return value;
3511 }
3512
3513 bfd_vma
3514 m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3515 int opindex,
3516 const CGEN_FIELDS * fields)
3517 {
3518 bfd_vma value;
3519
3520 switch (opindex)
3521 {
3522 case M32C_OPERAND_A0 :
3523 value = 0;
3524 break;
3525 case M32C_OPERAND_A1 :
3526 value = 0;
3527 break;
3528 case M32C_OPERAND_AN16_PUSH_S :
3529 value = fields->f_4_1;
3530 break;
3531 case M32C_OPERAND_BIT16AN :
3532 value = fields->f_dst16_an;
3533 break;
3534 case M32C_OPERAND_BIT16RN :
3535 value = fields->f_dst16_rn;
3536 break;
3537 case M32C_OPERAND_BIT3_S :
3538 value = fields->f_imm3_S;
3539 break;
3540 case M32C_OPERAND_BIT32ANPREFIXED :
3541 value = fields->f_dst32_an_prefixed;
3542 break;
3543 case M32C_OPERAND_BIT32ANUNPREFIXED :
3544 value = fields->f_dst32_an_unprefixed;
3545 break;
3546 case M32C_OPERAND_BIT32RNPREFIXED :
3547 value = fields->f_dst32_rn_prefixed_QI;
3548 break;
3549 case M32C_OPERAND_BIT32RNUNPREFIXED :
3550 value = fields->f_dst32_rn_unprefixed_QI;
3551 break;
3552 case M32C_OPERAND_BITBASE16_16_S8 :
3553 value = fields->f_dsp_16_s8;
3554 break;
3555 case M32C_OPERAND_BITBASE16_16_U16 :
3556 value = fields->f_dsp_16_u16;
3557 break;
3558 case M32C_OPERAND_BITBASE16_16_U8 :
3559 value = fields->f_dsp_16_u8;
3560 break;
3561 case M32C_OPERAND_BITBASE16_8_U11_S :
3562 value = fields->f_bitbase16_u11_S;
3563 break;
3564 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
3565 value = fields->f_bitbase32_16_s11_unprefixed;
3566 break;
3567 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
3568 value = fields->f_bitbase32_16_s19_unprefixed;
3569 break;
3570 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
3571 value = fields->f_bitbase32_16_u11_unprefixed;
3572 break;
3573 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
3574 value = fields->f_bitbase32_16_u19_unprefixed;
3575 break;
3576 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
3577 value = fields->f_bitbase32_16_u27_unprefixed;
3578 break;
3579 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
3580 value = fields->f_bitbase32_24_s11_prefixed;
3581 break;
3582 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
3583 value = fields->f_bitbase32_24_s19_prefixed;
3584 break;
3585 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3586 value = fields->f_bitbase32_24_u11_prefixed;
3587 break;
3588 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3589 value = fields->f_bitbase32_24_u19_prefixed;
3590 break;
3591 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3592 value = fields->f_bitbase32_24_u27_prefixed;
3593 break;
3594 case M32C_OPERAND_BITNO16R :
3595 value = fields->f_dsp_16_u8;
3596 break;
3597 case M32C_OPERAND_BITNO32PREFIXED :
3598 value = fields->f_bitno32_prefixed;
3599 break;
3600 case M32C_OPERAND_BITNO32UNPREFIXED :
3601 value = fields->f_bitno32_unprefixed;
3602 break;
3603 case M32C_OPERAND_DSP_10_U6 :
3604 value = fields->f_dsp_10_u6;
3605 break;
3606 case M32C_OPERAND_DSP_16_S16 :
3607 value = fields->f_dsp_16_s16;
3608 break;
3609 case M32C_OPERAND_DSP_16_S8 :
3610 value = fields->f_dsp_16_s8;
3611 break;
3612 case M32C_OPERAND_DSP_16_U16 :
3613 value = fields->f_dsp_16_u16;
3614 break;
3615 case M32C_OPERAND_DSP_16_U20 :
3616 value = fields->f_dsp_16_u24;
3617 break;
3618 case M32C_OPERAND_DSP_16_U24 :
3619 value = fields->f_dsp_16_u24;
3620 break;
3621 case M32C_OPERAND_DSP_16_U8 :
3622 value = fields->f_dsp_16_u8;
3623 break;
3624 case M32C_OPERAND_DSP_24_S16 :
3625 value = fields->f_dsp_24_s16;
3626 break;
3627 case M32C_OPERAND_DSP_24_S8 :
3628 value = fields->f_dsp_24_s8;
3629 break;
3630 case M32C_OPERAND_DSP_24_U16 :
3631 value = fields->f_dsp_24_u16;
3632 break;
3633 case M32C_OPERAND_DSP_24_U20 :
3634 value = fields->f_dsp_24_u24;
3635 break;
3636 case M32C_OPERAND_DSP_24_U24 :
3637 value = fields->f_dsp_24_u24;
3638 break;
3639 case M32C_OPERAND_DSP_24_U8 :
3640 value = fields->f_dsp_24_u8;
3641 break;
3642 case M32C_OPERAND_DSP_32_S16 :
3643 value = fields->f_dsp_32_s16;
3644 break;
3645 case M32C_OPERAND_DSP_32_S8 :
3646 value = fields->f_dsp_32_s8;
3647 break;
3648 case M32C_OPERAND_DSP_32_U16 :
3649 value = fields->f_dsp_32_u16;
3650 break;
3651 case M32C_OPERAND_DSP_32_U20 :
3652 value = fields->f_dsp_32_u24;
3653 break;
3654 case M32C_OPERAND_DSP_32_U24 :
3655 value = fields->f_dsp_32_u24;
3656 break;
3657 case M32C_OPERAND_DSP_32_U8 :
3658 value = fields->f_dsp_32_u8;
3659 break;
3660 case M32C_OPERAND_DSP_40_S16 :
3661 value = fields->f_dsp_40_s16;
3662 break;
3663 case M32C_OPERAND_DSP_40_S8 :
3664 value = fields->f_dsp_40_s8;
3665 break;
3666 case M32C_OPERAND_DSP_40_U16 :
3667 value = fields->f_dsp_40_u16;
3668 break;
3669 case M32C_OPERAND_DSP_40_U20 :
3670 value = fields->f_dsp_40_u20;
3671 break;
3672 case M32C_OPERAND_DSP_40_U24 :
3673 value = fields->f_dsp_40_u24;
3674 break;
3675 case M32C_OPERAND_DSP_40_U8 :
3676 value = fields->f_dsp_40_u8;
3677 break;
3678 case M32C_OPERAND_DSP_48_S16 :
3679 value = fields->f_dsp_48_s16;
3680 break;
3681 case M32C_OPERAND_DSP_48_S8 :
3682 value = fields->f_dsp_48_s8;
3683 break;
3684 case M32C_OPERAND_DSP_48_U16 :
3685 value = fields->f_dsp_48_u16;
3686 break;
3687 case M32C_OPERAND_DSP_48_U20 :
3688 value = fields->f_dsp_48_u20;
3689 break;
3690 case M32C_OPERAND_DSP_48_U24 :
3691 value = fields->f_dsp_48_u24;
3692 break;
3693 case M32C_OPERAND_DSP_48_U8 :
3694 value = fields->f_dsp_48_u8;
3695 break;
3696 case M32C_OPERAND_DSP_8_S24 :
3697 value = fields->f_dsp_8_s24;
3698 break;
3699 case M32C_OPERAND_DSP_8_S8 :
3700 value = fields->f_dsp_8_s8;
3701 break;
3702 case M32C_OPERAND_DSP_8_U16 :
3703 value = fields->f_dsp_8_u16;
3704 break;
3705 case M32C_OPERAND_DSP_8_U24 :
3706 value = fields->f_dsp_8_u24;
3707 break;
3708 case M32C_OPERAND_DSP_8_U6 :
3709 value = fields->f_dsp_8_u6;
3710 break;
3711 case M32C_OPERAND_DSP_8_U8 :
3712 value = fields->f_dsp_8_u8;
3713 break;
3714 case M32C_OPERAND_DST16AN :
3715 value = fields->f_dst16_an;
3716 break;
3717 case M32C_OPERAND_DST16AN_S :
3718 value = fields->f_dst16_an_s;
3719 break;
3720 case M32C_OPERAND_DST16ANHI :
3721 value = fields->f_dst16_an;
3722 break;
3723 case M32C_OPERAND_DST16ANQI :
3724 value = fields->f_dst16_an;
3725 break;
3726 case M32C_OPERAND_DST16ANQI_S :
3727 value = fields->f_dst16_rn_QI_s;
3728 break;
3729 case M32C_OPERAND_DST16ANSI :
3730 value = fields->f_dst16_an;
3731 break;
3732 case M32C_OPERAND_DST16RNEXTQI :
3733 value = fields->f_dst16_rn_ext;
3734 break;
3735 case M32C_OPERAND_DST16RNHI :
3736 value = fields->f_dst16_rn;
3737 break;
3738 case M32C_OPERAND_DST16RNQI :
3739 value = fields->f_dst16_rn;
3740 break;
3741 case M32C_OPERAND_DST16RNQI_S :
3742 value = fields->f_dst16_rn_QI_s;
3743 break;
3744 case M32C_OPERAND_DST16RNSI :
3745 value = fields->f_dst16_rn;
3746 break;
3747 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3748 value = fields->f_dst32_an_unprefixed;
3749 break;
3750 case M32C_OPERAND_DST32ANPREFIXED :
3751 value = fields->f_dst32_an_prefixed;
3752 break;
3753 case M32C_OPERAND_DST32ANPREFIXEDHI :
3754 value = fields->f_dst32_an_prefixed;
3755 break;
3756 case M32C_OPERAND_DST32ANPREFIXEDQI :
3757 value = fields->f_dst32_an_prefixed;
3758 break;
3759 case M32C_OPERAND_DST32ANPREFIXEDSI :
3760 value = fields->f_dst32_an_prefixed;
3761 break;
3762 case M32C_OPERAND_DST32ANUNPREFIXED :
3763 value = fields->f_dst32_an_unprefixed;
3764 break;
3765 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3766 value = fields->f_dst32_an_unprefixed;
3767 break;
3768 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3769 value = fields->f_dst32_an_unprefixed;
3770 break;
3771 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3772 value = fields->f_dst32_an_unprefixed;
3773 break;
3774 case M32C_OPERAND_DST32R0HI_S :
3775 value = 0;
3776 break;
3777 case M32C_OPERAND_DST32R0QI_S :
3778 value = 0;
3779 break;
3780 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3781 value = fields->f_dst32_rn_ext_unprefixed;
3782 break;
3783 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3784 value = fields->f_dst32_rn_ext_unprefixed;
3785 break;
3786 case M32C_OPERAND_DST32RNPREFIXEDHI :
3787 value = fields->f_dst32_rn_prefixed_HI;
3788 break;
3789 case M32C_OPERAND_DST32RNPREFIXEDQI :
3790 value = fields->f_dst32_rn_prefixed_QI;
3791 break;
3792 case M32C_OPERAND_DST32RNPREFIXEDSI :
3793 value = fields->f_dst32_rn_prefixed_SI;
3794 break;
3795 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3796 value = fields->f_dst32_rn_unprefixed_HI;
3797 break;
3798 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3799 value = fields->f_dst32_rn_unprefixed_QI;
3800 break;
3801 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3802 value = fields->f_dst32_rn_unprefixed_SI;
3803 break;
3804 case M32C_OPERAND_G :
3805 value = 0;
3806 break;
3807 case M32C_OPERAND_IMM_12_S4 :
3808 value = fields->f_imm_12_s4;
3809 break;
3810 case M32C_OPERAND_IMM_12_S4N :
3811 value = fields->f_imm_12_s4;
3812 break;
3813 case M32C_OPERAND_IMM_13_U3 :
3814 value = fields->f_imm_13_u3;
3815 break;
3816 case M32C_OPERAND_IMM_16_HI :
3817 value = fields->f_dsp_16_s16;
3818 break;
3819 case M32C_OPERAND_IMM_16_QI :
3820 value = fields->f_dsp_16_s8;
3821 break;
3822 case M32C_OPERAND_IMM_16_SI :
3823 value = fields->f_dsp_16_s32;
3824 break;
3825 case M32C_OPERAND_IMM_20_S4 :
3826 value = fields->f_imm_20_s4;
3827 break;
3828 case M32C_OPERAND_IMM_24_HI :
3829 value = fields->f_dsp_24_s16;
3830 break;
3831 case M32C_OPERAND_IMM_24_QI :
3832 value = fields->f_dsp_24_s8;
3833 break;
3834 case M32C_OPERAND_IMM_24_SI :
3835 value = fields->f_dsp_24_s32;
3836 break;
3837 case M32C_OPERAND_IMM_32_HI :
3838 value = fields->f_dsp_32_s16;
3839 break;
3840 case M32C_OPERAND_IMM_32_QI :
3841 value = fields->f_dsp_32_s8;
3842 break;
3843 case M32C_OPERAND_IMM_32_SI :
3844 value = fields->f_dsp_32_s32;
3845 break;
3846 case M32C_OPERAND_IMM_40_HI :
3847 value = fields->f_dsp_40_s16;
3848 break;
3849 case M32C_OPERAND_IMM_40_QI :
3850 value = fields->f_dsp_40_s8;
3851 break;
3852 case M32C_OPERAND_IMM_40_SI :
3853 value = fields->f_dsp_40_s32;
3854 break;
3855 case M32C_OPERAND_IMM_48_HI :
3856 value = fields->f_dsp_48_s16;
3857 break;
3858 case M32C_OPERAND_IMM_48_QI :
3859 value = fields->f_dsp_48_s8;
3860 break;
3861 case M32C_OPERAND_IMM_48_SI :
3862 value = fields->f_dsp_48_s32;
3863 break;
3864 case M32C_OPERAND_IMM_56_HI :
3865 value = fields->f_dsp_56_s16;
3866 break;
3867 case M32C_OPERAND_IMM_56_QI :
3868 value = fields->f_dsp_56_s8;
3869 break;
3870 case M32C_OPERAND_IMM_64_HI :
3871 value = fields->f_dsp_64_s16;
3872 break;
3873 case M32C_OPERAND_IMM_8_HI :
3874 value = fields->f_dsp_8_s16;
3875 break;
3876 case M32C_OPERAND_IMM_8_QI :
3877 value = fields->f_dsp_8_s8;
3878 break;
3879 case M32C_OPERAND_IMM_8_S4 :
3880 value = fields->f_imm_8_s4;
3881 break;
3882 case M32C_OPERAND_IMM_8_S4N :
3883 value = fields->f_imm_8_s4;
3884 break;
3885 case M32C_OPERAND_IMM_SH_12_S4 :
3886 value = fields->f_imm_12_s4;
3887 break;
3888 case M32C_OPERAND_IMM_SH_20_S4 :
3889 value = fields->f_imm_20_s4;
3890 break;
3891 case M32C_OPERAND_IMM_SH_8_S4 :
3892 value = fields->f_imm_8_s4;
3893 break;
3894 case M32C_OPERAND_IMM1_S :
3895 value = fields->f_imm1_S;
3896 break;
3897 case M32C_OPERAND_IMM3_S :
3898 value = fields->f_imm3_S;
3899 break;
3900 case M32C_OPERAND_LAB_16_8 :
3901 value = fields->f_lab_16_8;
3902 break;
3903 case M32C_OPERAND_LAB_24_8 :
3904 value = fields->f_lab_24_8;
3905 break;
3906 case M32C_OPERAND_LAB_32_8 :
3907 value = fields->f_lab_32_8;
3908 break;
3909 case M32C_OPERAND_LAB_40_8 :
3910 value = fields->f_lab_40_8;
3911 break;
3912 case M32C_OPERAND_LAB_5_3 :
3913 value = fields->f_lab_5_3;
3914 break;
3915 case M32C_OPERAND_LAB_8_16 :
3916 value = fields->f_lab_8_16;
3917 break;
3918 case M32C_OPERAND_LAB_8_24 :
3919 value = fields->f_lab_8_24;
3920 break;
3921 case M32C_OPERAND_LAB_8_8 :
3922 value = fields->f_lab_8_8;
3923 break;
3924 case M32C_OPERAND_LAB32_JMP_S :
3925 value = fields->f_lab32_jmp_s;
3926 break;
3927 case M32C_OPERAND_Q :
3928 value = 0;
3929 break;
3930 case M32C_OPERAND_R0 :
3931 value = 0;
3932 break;
3933 case M32C_OPERAND_R0H :
3934 value = 0;
3935 break;
3936 case M32C_OPERAND_R0L :
3937 value = 0;
3938 break;
3939 case M32C_OPERAND_R1 :
3940 value = 0;
3941 break;
3942 case M32C_OPERAND_R1R2R0 :
3943 value = 0;
3944 break;
3945 case M32C_OPERAND_R2 :
3946 value = 0;
3947 break;
3948 case M32C_OPERAND_R2R0 :
3949 value = 0;
3950 break;
3951 case M32C_OPERAND_R3 :
3952 value = 0;
3953 break;
3954 case M32C_OPERAND_R3R1 :
3955 value = 0;
3956 break;
3957 case M32C_OPERAND_REGSETPOP :
3958 value = fields->f_8_8;
3959 break;
3960 case M32C_OPERAND_REGSETPUSH :
3961 value = fields->f_8_8;
3962 break;
3963 case M32C_OPERAND_RN16_PUSH_S :
3964 value = fields->f_4_1;
3965 break;
3966 case M32C_OPERAND_S :
3967 value = 0;
3968 break;
3969 case M32C_OPERAND_SRC16AN :
3970 value = fields->f_src16_an;
3971 break;
3972 case M32C_OPERAND_SRC16ANHI :
3973 value = fields->f_src16_an;
3974 break;
3975 case M32C_OPERAND_SRC16ANQI :
3976 value = fields->f_src16_an;
3977 break;
3978 case M32C_OPERAND_SRC16RNHI :
3979 value = fields->f_src16_rn;
3980 break;
3981 case M32C_OPERAND_SRC16RNQI :
3982 value = fields->f_src16_rn;
3983 break;
3984 case M32C_OPERAND_SRC32ANPREFIXED :
3985 value = fields->f_src32_an_prefixed;
3986 break;
3987 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3988 value = fields->f_src32_an_prefixed;
3989 break;
3990 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3991 value = fields->f_src32_an_prefixed;
3992 break;
3993 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3994 value = fields->f_src32_an_prefixed;
3995 break;
3996 case M32C_OPERAND_SRC32ANUNPREFIXED :
3997 value = fields->f_src32_an_unprefixed;
3998 break;
3999 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4000 value = fields->f_src32_an_unprefixed;
4001 break;
4002 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4003 value = fields->f_src32_an_unprefixed;
4004 break;
4005 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4006 value = fields->f_src32_an_unprefixed;
4007 break;
4008 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4009 value = fields->f_src32_rn_prefixed_HI;
4010 break;
4011 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4012 value = fields->f_src32_rn_prefixed_QI;
4013 break;
4014 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4015 value = fields->f_src32_rn_prefixed_SI;
4016 break;
4017 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4018 value = fields->f_src32_rn_unprefixed_HI;
4019 break;
4020 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4021 value = fields->f_src32_rn_unprefixed_QI;
4022 break;
4023 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4024 value = fields->f_src32_rn_unprefixed_SI;
4025 break;
4026 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4027 value = fields->f_5_1;
4028 break;
4029 case M32C_OPERAND_X :
4030 value = 0;
4031 break;
4032 case M32C_OPERAND_Z :
4033 value = 0;
4034 break;
4035 case M32C_OPERAND_COND16_16 :
4036 value = fields->f_dsp_16_u8;
4037 break;
4038 case M32C_OPERAND_COND16_24 :
4039 value = fields->f_dsp_24_u8;
4040 break;
4041 case M32C_OPERAND_COND16_32 :
4042 value = fields->f_dsp_32_u8;
4043 break;
4044 case M32C_OPERAND_COND16C :
4045 value = fields->f_cond16;
4046 break;
4047 case M32C_OPERAND_COND16J :
4048 value = fields->f_cond16;
4049 break;
4050 case M32C_OPERAND_COND16J5 :
4051 value = fields->f_cond16j_5;
4052 break;
4053 case M32C_OPERAND_COND32 :
4054 value = fields->f_cond32;
4055 break;
4056 case M32C_OPERAND_COND32_16 :
4057 value = fields->f_dsp_16_u8;
4058 break;
4059 case M32C_OPERAND_COND32_24 :
4060 value = fields->f_dsp_24_u8;
4061 break;
4062 case M32C_OPERAND_COND32_32 :
4063 value = fields->f_dsp_32_u8;
4064 break;
4065 case M32C_OPERAND_COND32_40 :
4066 value = fields->f_dsp_40_u8;
4067 break;
4068 case M32C_OPERAND_COND32J :
4069 value = fields->f_cond32j;
4070 break;
4071 case M32C_OPERAND_CR1_PREFIXED_32 :
4072 value = fields->f_21_3;
4073 break;
4074 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4075 value = fields->f_13_3;
4076 break;
4077 case M32C_OPERAND_CR16 :
4078 value = fields->f_9_3;
4079 break;
4080 case M32C_OPERAND_CR2_32 :
4081 value = fields->f_13_3;
4082 break;
4083 case M32C_OPERAND_CR3_PREFIXED_32 :
4084 value = fields->f_21_3;
4085 break;
4086 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4087 value = fields->f_13_3;
4088 break;
4089 case M32C_OPERAND_FLAGS16 :
4090 value = fields->f_9_3;
4091 break;
4092 case M32C_OPERAND_FLAGS32 :
4093 value = fields->f_13_3;
4094 break;
4095 case M32C_OPERAND_SCCOND32 :
4096 value = fields->f_cond16;
4097 break;
4098 case M32C_OPERAND_SIZE :
4099 value = 0;
4100 break;
4101
4102 default :
4103 /* xgettext:c-format */
4104 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
4105 opindex);
4106 abort ();
4107 }
4108
4109 return value;
4110 }
4111
4112 void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
4113 void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
4114
4115 /* Stuffing values in cgen_fields is handled by a collection of functions.
4116 They are distinguished by the type of the VALUE argument they accept.
4117 TODO: floating point, inlining support, remove cases where argument type
4118 not appropriate. */
4119
4120 void
4121 m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4122 int opindex,
4123 CGEN_FIELDS * fields,
4124 int value)
4125 {
4126 switch (opindex)
4127 {
4128 case M32C_OPERAND_A0 :
4129 break;
4130 case M32C_OPERAND_A1 :
4131 break;
4132 case M32C_OPERAND_AN16_PUSH_S :
4133 fields->f_4_1 = value;
4134 break;
4135 case M32C_OPERAND_BIT16AN :
4136 fields->f_dst16_an = value;
4137 break;
4138 case M32C_OPERAND_BIT16RN :
4139 fields->f_dst16_rn = value;
4140 break;
4141 case M32C_OPERAND_BIT3_S :
4142 fields->f_imm3_S = value;
4143 break;
4144 case M32C_OPERAND_BIT32ANPREFIXED :
4145 fields->f_dst32_an_prefixed = value;
4146 break;
4147 case M32C_OPERAND_BIT32ANUNPREFIXED :
4148 fields->f_dst32_an_unprefixed = value;
4149 break;
4150 case M32C_OPERAND_BIT32RNPREFIXED :
4151 fields->f_dst32_rn_prefixed_QI = value;
4152 break;
4153 case M32C_OPERAND_BIT32RNUNPREFIXED :
4154 fields->f_dst32_rn_unprefixed_QI = value;
4155 break;
4156 case M32C_OPERAND_BITBASE16_16_S8 :
4157 fields->f_dsp_16_s8 = value;
4158 break;
4159 case M32C_OPERAND_BITBASE16_16_U16 :
4160 fields->f_dsp_16_u16 = value;
4161 break;
4162 case M32C_OPERAND_BITBASE16_16_U8 :
4163 fields->f_dsp_16_u8 = value;
4164 break;
4165 case M32C_OPERAND_BITBASE16_8_U11_S :
4166 fields->f_bitbase16_u11_S = value;
4167 break;
4168 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4169 fields->f_bitbase32_16_s11_unprefixed = value;
4170 break;
4171 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4172 fields->f_bitbase32_16_s19_unprefixed = value;
4173 break;
4174 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4175 fields->f_bitbase32_16_u11_unprefixed = value;
4176 break;
4177 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4178 fields->f_bitbase32_16_u19_unprefixed = value;
4179 break;
4180 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4181 fields->f_bitbase32_16_u27_unprefixed = value;
4182 break;
4183 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4184 fields->f_bitbase32_24_s11_prefixed = value;
4185 break;
4186 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4187 fields->f_bitbase32_24_s19_prefixed = value;
4188 break;
4189 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4190 fields->f_bitbase32_24_u11_prefixed = value;
4191 break;
4192 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4193 fields->f_bitbase32_24_u19_prefixed = value;
4194 break;
4195 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4196 fields->f_bitbase32_24_u27_prefixed = value;
4197 break;
4198 case M32C_OPERAND_BITNO16R :
4199 fields->f_dsp_16_u8 = value;
4200 break;
4201 case M32C_OPERAND_BITNO32PREFIXED :
4202 fields->f_bitno32_prefixed = value;
4203 break;
4204 case M32C_OPERAND_BITNO32UNPREFIXED :
4205 fields->f_bitno32_unprefixed = value;
4206 break;
4207 case M32C_OPERAND_DSP_10_U6 :
4208 fields->f_dsp_10_u6 = value;
4209 break;
4210 case M32C_OPERAND_DSP_16_S16 :
4211 fields->f_dsp_16_s16 = value;
4212 break;
4213 case M32C_OPERAND_DSP_16_S8 :
4214 fields->f_dsp_16_s8 = value;
4215 break;
4216 case M32C_OPERAND_DSP_16_U16 :
4217 fields->f_dsp_16_u16 = value;
4218 break;
4219 case M32C_OPERAND_DSP_16_U20 :
4220 fields->f_dsp_16_u24 = value;
4221 break;
4222 case M32C_OPERAND_DSP_16_U24 :
4223 fields->f_dsp_16_u24 = value;
4224 break;
4225 case M32C_OPERAND_DSP_16_U8 :
4226 fields->f_dsp_16_u8 = value;
4227 break;
4228 case M32C_OPERAND_DSP_24_S16 :
4229 fields->f_dsp_24_s16 = value;
4230 break;
4231 case M32C_OPERAND_DSP_24_S8 :
4232 fields->f_dsp_24_s8 = value;
4233 break;
4234 case M32C_OPERAND_DSP_24_U16 :
4235 fields->f_dsp_24_u16 = value;
4236 break;
4237 case M32C_OPERAND_DSP_24_U20 :
4238 fields->f_dsp_24_u24 = value;
4239 break;
4240 case M32C_OPERAND_DSP_24_U24 :
4241 fields->f_dsp_24_u24 = value;
4242 break;
4243 case M32C_OPERAND_DSP_24_U8 :
4244 fields->f_dsp_24_u8 = value;
4245 break;
4246 case M32C_OPERAND_DSP_32_S16 :
4247 fields->f_dsp_32_s16 = value;
4248 break;
4249 case M32C_OPERAND_DSP_32_S8 :
4250 fields->f_dsp_32_s8 = value;
4251 break;
4252 case M32C_OPERAND_DSP_32_U16 :
4253 fields->f_dsp_32_u16 = value;
4254 break;
4255 case M32C_OPERAND_DSP_32_U20 :
4256 fields->f_dsp_32_u24 = value;
4257 break;
4258 case M32C_OPERAND_DSP_32_U24 :
4259 fields->f_dsp_32_u24 = value;
4260 break;
4261 case M32C_OPERAND_DSP_32_U8 :
4262 fields->f_dsp_32_u8 = value;
4263 break;
4264 case M32C_OPERAND_DSP_40_S16 :
4265 fields->f_dsp_40_s16 = value;
4266 break;
4267 case M32C_OPERAND_DSP_40_S8 :
4268 fields->f_dsp_40_s8 = value;
4269 break;
4270 case M32C_OPERAND_DSP_40_U16 :
4271 fields->f_dsp_40_u16 = value;
4272 break;
4273 case M32C_OPERAND_DSP_40_U20 :
4274 fields->f_dsp_40_u20 = value;
4275 break;
4276 case M32C_OPERAND_DSP_40_U24 :
4277 fields->f_dsp_40_u24 = value;
4278 break;
4279 case M32C_OPERAND_DSP_40_U8 :
4280 fields->f_dsp_40_u8 = value;
4281 break;
4282 case M32C_OPERAND_DSP_48_S16 :
4283 fields->f_dsp_48_s16 = value;
4284 break;
4285 case M32C_OPERAND_DSP_48_S8 :
4286 fields->f_dsp_48_s8 = value;
4287 break;
4288 case M32C_OPERAND_DSP_48_U16 :
4289 fields->f_dsp_48_u16 = value;
4290 break;
4291 case M32C_OPERAND_DSP_48_U20 :
4292 fields->f_dsp_48_u20 = value;
4293 break;
4294 case M32C_OPERAND_DSP_48_U24 :
4295 fields->f_dsp_48_u24 = value;
4296 break;
4297 case M32C_OPERAND_DSP_48_U8 :
4298 fields->f_dsp_48_u8 = value;
4299 break;
4300 case M32C_OPERAND_DSP_8_S24 :
4301 fields->f_dsp_8_s24 = value;
4302 break;
4303 case M32C_OPERAND_DSP_8_S8 :
4304 fields->f_dsp_8_s8 = value;
4305 break;
4306 case M32C_OPERAND_DSP_8_U16 :
4307 fields->f_dsp_8_u16 = value;
4308 break;
4309 case M32C_OPERAND_DSP_8_U24 :
4310 fields->f_dsp_8_u24 = value;
4311 break;
4312 case M32C_OPERAND_DSP_8_U6 :
4313 fields->f_dsp_8_u6 = value;
4314 break;
4315 case M32C_OPERAND_DSP_8_U8 :
4316 fields->f_dsp_8_u8 = value;
4317 break;
4318 case M32C_OPERAND_DST16AN :
4319 fields->f_dst16_an = value;
4320 break;
4321 case M32C_OPERAND_DST16AN_S :
4322 fields->f_dst16_an_s = value;
4323 break;
4324 case M32C_OPERAND_DST16ANHI :
4325 fields->f_dst16_an = value;
4326 break;
4327 case M32C_OPERAND_DST16ANQI :
4328 fields->f_dst16_an = value;
4329 break;
4330 case M32C_OPERAND_DST16ANQI_S :
4331 fields->f_dst16_rn_QI_s = value;
4332 break;
4333 case M32C_OPERAND_DST16ANSI :
4334 fields->f_dst16_an = value;
4335 break;
4336 case M32C_OPERAND_DST16RNEXTQI :
4337 fields->f_dst16_rn_ext = value;
4338 break;
4339 case M32C_OPERAND_DST16RNHI :
4340 fields->f_dst16_rn = value;
4341 break;
4342 case M32C_OPERAND_DST16RNQI :
4343 fields->f_dst16_rn = value;
4344 break;
4345 case M32C_OPERAND_DST16RNQI_S :
4346 fields->f_dst16_rn_QI_s = value;
4347 break;
4348 case M32C_OPERAND_DST16RNSI :
4349 fields->f_dst16_rn = value;
4350 break;
4351 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4352 fields->f_dst32_an_unprefixed = value;
4353 break;
4354 case M32C_OPERAND_DST32ANPREFIXED :
4355 fields->f_dst32_an_prefixed = value;
4356 break;
4357 case M32C_OPERAND_DST32ANPREFIXEDHI :
4358 fields->f_dst32_an_prefixed = value;
4359 break;
4360 case M32C_OPERAND_DST32ANPREFIXEDQI :
4361 fields->f_dst32_an_prefixed = value;
4362 break;
4363 case M32C_OPERAND_DST32ANPREFIXEDSI :
4364 fields->f_dst32_an_prefixed = value;
4365 break;
4366 case M32C_OPERAND_DST32ANUNPREFIXED :
4367 fields->f_dst32_an_unprefixed = value;
4368 break;
4369 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4370 fields->f_dst32_an_unprefixed = value;
4371 break;
4372 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4373 fields->f_dst32_an_unprefixed = value;
4374 break;
4375 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4376 fields->f_dst32_an_unprefixed = value;
4377 break;
4378 case M32C_OPERAND_DST32R0HI_S :
4379 break;
4380 case M32C_OPERAND_DST32R0QI_S :
4381 break;
4382 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4383 fields->f_dst32_rn_ext_unprefixed = value;
4384 break;
4385 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4386 fields->f_dst32_rn_ext_unprefixed = value;
4387 break;
4388 case M32C_OPERAND_DST32RNPREFIXEDHI :
4389 fields->f_dst32_rn_prefixed_HI = value;
4390 break;
4391 case M32C_OPERAND_DST32RNPREFIXEDQI :
4392 fields->f_dst32_rn_prefixed_QI = value;
4393 break;
4394 case M32C_OPERAND_DST32RNPREFIXEDSI :
4395 fields->f_dst32_rn_prefixed_SI = value;
4396 break;
4397 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4398 fields->f_dst32_rn_unprefixed_HI = value;
4399 break;
4400 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4401 fields->f_dst32_rn_unprefixed_QI = value;
4402 break;
4403 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4404 fields->f_dst32_rn_unprefixed_SI = value;
4405 break;
4406 case M32C_OPERAND_G :
4407 break;
4408 case M32C_OPERAND_IMM_12_S4 :
4409 fields->f_imm_12_s4 = value;
4410 break;
4411 case M32C_OPERAND_IMM_12_S4N :
4412 fields->f_imm_12_s4 = value;
4413 break;
4414 case M32C_OPERAND_IMM_13_U3 :
4415 fields->f_imm_13_u3 = value;
4416 break;
4417 case M32C_OPERAND_IMM_16_HI :
4418 fields->f_dsp_16_s16 = value;
4419 break;
4420 case M32C_OPERAND_IMM_16_QI :
4421 fields->f_dsp_16_s8 = value;
4422 break;
4423 case M32C_OPERAND_IMM_16_SI :
4424 fields->f_dsp_16_s32 = value;
4425 break;
4426 case M32C_OPERAND_IMM_20_S4 :
4427 fields->f_imm_20_s4 = value;
4428 break;
4429 case M32C_OPERAND_IMM_24_HI :
4430 fields->f_dsp_24_s16 = value;
4431 break;
4432 case M32C_OPERAND_IMM_24_QI :
4433 fields->f_dsp_24_s8 = value;
4434 break;
4435 case M32C_OPERAND_IMM_24_SI :
4436 fields->f_dsp_24_s32 = value;
4437 break;
4438 case M32C_OPERAND_IMM_32_HI :
4439 fields->f_dsp_32_s16 = value;
4440 break;
4441 case M32C_OPERAND_IMM_32_QI :
4442 fields->f_dsp_32_s8 = value;
4443 break;
4444 case M32C_OPERAND_IMM_32_SI :
4445 fields->f_dsp_32_s32 = value;
4446 break;
4447 case M32C_OPERAND_IMM_40_HI :
4448 fields->f_dsp_40_s16 = value;
4449 break;
4450 case M32C_OPERAND_IMM_40_QI :
4451 fields->f_dsp_40_s8 = value;
4452 break;
4453 case M32C_OPERAND_IMM_40_SI :
4454 fields->f_dsp_40_s32 = value;
4455 break;
4456 case M32C_OPERAND_IMM_48_HI :
4457 fields->f_dsp_48_s16 = value;
4458 break;
4459 case M32C_OPERAND_IMM_48_QI :
4460 fields->f_dsp_48_s8 = value;
4461 break;
4462 case M32C_OPERAND_IMM_48_SI :
4463 fields->f_dsp_48_s32 = value;
4464 break;
4465 case M32C_OPERAND_IMM_56_HI :
4466 fields->f_dsp_56_s16 = value;
4467 break;
4468 case M32C_OPERAND_IMM_56_QI :
4469 fields->f_dsp_56_s8 = value;
4470 break;
4471 case M32C_OPERAND_IMM_64_HI :
4472 fields->f_dsp_64_s16 = value;
4473 break;
4474 case M32C_OPERAND_IMM_8_HI :
4475 fields->f_dsp_8_s16 = value;
4476 break;
4477 case M32C_OPERAND_IMM_8_QI :
4478 fields->f_dsp_8_s8 = value;
4479 break;
4480 case M32C_OPERAND_IMM_8_S4 :
4481 fields->f_imm_8_s4 = value;
4482 break;
4483 case M32C_OPERAND_IMM_8_S4N :
4484 fields->f_imm_8_s4 = value;
4485 break;
4486 case M32C_OPERAND_IMM_SH_12_S4 :
4487 fields->f_imm_12_s4 = value;
4488 break;
4489 case M32C_OPERAND_IMM_SH_20_S4 :
4490 fields->f_imm_20_s4 = value;
4491 break;
4492 case M32C_OPERAND_IMM_SH_8_S4 :
4493 fields->f_imm_8_s4 = value;
4494 break;
4495 case M32C_OPERAND_IMM1_S :
4496 fields->f_imm1_S = value;
4497 break;
4498 case M32C_OPERAND_IMM3_S :
4499 fields->f_imm3_S = value;
4500 break;
4501 case M32C_OPERAND_LAB_16_8 :
4502 fields->f_lab_16_8 = value;
4503 break;
4504 case M32C_OPERAND_LAB_24_8 :
4505 fields->f_lab_24_8 = value;
4506 break;
4507 case M32C_OPERAND_LAB_32_8 :
4508 fields->f_lab_32_8 = value;
4509 break;
4510 case M32C_OPERAND_LAB_40_8 :
4511 fields->f_lab_40_8 = value;
4512 break;
4513 case M32C_OPERAND_LAB_5_3 :
4514 fields->f_lab_5_3 = value;
4515 break;
4516 case M32C_OPERAND_LAB_8_16 :
4517 fields->f_lab_8_16 = value;
4518 break;
4519 case M32C_OPERAND_LAB_8_24 :
4520 fields->f_lab_8_24 = value;
4521 break;
4522 case M32C_OPERAND_LAB_8_8 :
4523 fields->f_lab_8_8 = value;
4524 break;
4525 case M32C_OPERAND_LAB32_JMP_S :
4526 fields->f_lab32_jmp_s = value;
4527 break;
4528 case M32C_OPERAND_Q :
4529 break;
4530 case M32C_OPERAND_R0 :
4531 break;
4532 case M32C_OPERAND_R0H :
4533 break;
4534 case M32C_OPERAND_R0L :
4535 break;
4536 case M32C_OPERAND_R1 :
4537 break;
4538 case M32C_OPERAND_R1R2R0 :
4539 break;
4540 case M32C_OPERAND_R2 :
4541 break;
4542 case M32C_OPERAND_R2R0 :
4543 break;
4544 case M32C_OPERAND_R3 :
4545 break;
4546 case M32C_OPERAND_R3R1 :
4547 break;
4548 case M32C_OPERAND_REGSETPOP :
4549 fields->f_8_8 = value;
4550 break;
4551 case M32C_OPERAND_REGSETPUSH :
4552 fields->f_8_8 = value;
4553 break;
4554 case M32C_OPERAND_RN16_PUSH_S :
4555 fields->f_4_1 = value;
4556 break;
4557 case M32C_OPERAND_S :
4558 break;
4559 case M32C_OPERAND_SRC16AN :
4560 fields->f_src16_an = value;
4561 break;
4562 case M32C_OPERAND_SRC16ANHI :
4563 fields->f_src16_an = value;
4564 break;
4565 case M32C_OPERAND_SRC16ANQI :
4566 fields->f_src16_an = value;
4567 break;
4568 case M32C_OPERAND_SRC16RNHI :
4569 fields->f_src16_rn = value;
4570 break;
4571 case M32C_OPERAND_SRC16RNQI :
4572 fields->f_src16_rn = value;
4573 break;
4574 case M32C_OPERAND_SRC32ANPREFIXED :
4575 fields->f_src32_an_prefixed = value;
4576 break;
4577 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4578 fields->f_src32_an_prefixed = value;
4579 break;
4580 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4581 fields->f_src32_an_prefixed = value;
4582 break;
4583 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4584 fields->f_src32_an_prefixed = value;
4585 break;
4586 case M32C_OPERAND_SRC32ANUNPREFIXED :
4587 fields->f_src32_an_unprefixed = value;
4588 break;
4589 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4590 fields->f_src32_an_unprefixed = value;
4591 break;
4592 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4593 fields->f_src32_an_unprefixed = value;
4594 break;
4595 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4596 fields->f_src32_an_unprefixed = value;
4597 break;
4598 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4599 fields->f_src32_rn_prefixed_HI = value;
4600 break;
4601 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4602 fields->f_src32_rn_prefixed_QI = value;
4603 break;
4604 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4605 fields->f_src32_rn_prefixed_SI = value;
4606 break;
4607 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4608 fields->f_src32_rn_unprefixed_HI = value;
4609 break;
4610 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4611 fields->f_src32_rn_unprefixed_QI = value;
4612 break;
4613 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4614 fields->f_src32_rn_unprefixed_SI = value;
4615 break;
4616 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4617 fields->f_5_1 = value;
4618 break;
4619 case M32C_OPERAND_X :
4620 break;
4621 case M32C_OPERAND_Z :
4622 break;
4623 case M32C_OPERAND_COND16_16 :
4624 fields->f_dsp_16_u8 = value;
4625 break;
4626 case M32C_OPERAND_COND16_24 :
4627 fields->f_dsp_24_u8 = value;
4628 break;
4629 case M32C_OPERAND_COND16_32 :
4630 fields->f_dsp_32_u8 = value;
4631 break;
4632 case M32C_OPERAND_COND16C :
4633 fields->f_cond16 = value;
4634 break;
4635 case M32C_OPERAND_COND16J :
4636 fields->f_cond16 = value;
4637 break;
4638 case M32C_OPERAND_COND16J5 :
4639 fields->f_cond16j_5 = value;
4640 break;
4641 case M32C_OPERAND_COND32 :
4642 fields->f_cond32 = value;
4643 break;
4644 case M32C_OPERAND_COND32_16 :
4645 fields->f_dsp_16_u8 = value;
4646 break;
4647 case M32C_OPERAND_COND32_24 :
4648 fields->f_dsp_24_u8 = value;
4649 break;
4650 case M32C_OPERAND_COND32_32 :
4651 fields->f_dsp_32_u8 = value;
4652 break;
4653 case M32C_OPERAND_COND32_40 :
4654 fields->f_dsp_40_u8 = value;
4655 break;
4656 case M32C_OPERAND_COND32J :
4657 fields->f_cond32j = value;
4658 break;
4659 case M32C_OPERAND_CR1_PREFIXED_32 :
4660 fields->f_21_3 = value;
4661 break;
4662 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4663 fields->f_13_3 = value;
4664 break;
4665 case M32C_OPERAND_CR16 :
4666 fields->f_9_3 = value;
4667 break;
4668 case M32C_OPERAND_CR2_32 :
4669 fields->f_13_3 = value;
4670 break;
4671 case M32C_OPERAND_CR3_PREFIXED_32 :
4672 fields->f_21_3 = value;
4673 break;
4674 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4675 fields->f_13_3 = value;
4676 break;
4677 case M32C_OPERAND_FLAGS16 :
4678 fields->f_9_3 = value;
4679 break;
4680 case M32C_OPERAND_FLAGS32 :
4681 fields->f_13_3 = value;
4682 break;
4683 case M32C_OPERAND_SCCOND32 :
4684 fields->f_cond16 = value;
4685 break;
4686 case M32C_OPERAND_SIZE :
4687 break;
4688
4689 default :
4690 /* xgettext:c-format */
4691 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
4692 opindex);
4693 abort ();
4694 }
4695 }
4696
4697 void
4698 m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4699 int opindex,
4700 CGEN_FIELDS * fields,
4701 bfd_vma value)
4702 {
4703 switch (opindex)
4704 {
4705 case M32C_OPERAND_A0 :
4706 break;
4707 case M32C_OPERAND_A1 :
4708 break;
4709 case M32C_OPERAND_AN16_PUSH_S :
4710 fields->f_4_1 = value;
4711 break;
4712 case M32C_OPERAND_BIT16AN :
4713 fields->f_dst16_an = value;
4714 break;
4715 case M32C_OPERAND_BIT16RN :
4716 fields->f_dst16_rn = value;
4717 break;
4718 case M32C_OPERAND_BIT3_S :
4719 fields->f_imm3_S = value;
4720 break;
4721 case M32C_OPERAND_BIT32ANPREFIXED :
4722 fields->f_dst32_an_prefixed = value;
4723 break;
4724 case M32C_OPERAND_BIT32ANUNPREFIXED :
4725 fields->f_dst32_an_unprefixed = value;
4726 break;
4727 case M32C_OPERAND_BIT32RNPREFIXED :
4728 fields->f_dst32_rn_prefixed_QI = value;
4729 break;
4730 case M32C_OPERAND_BIT32RNUNPREFIXED :
4731 fields->f_dst32_rn_unprefixed_QI = value;
4732 break;
4733 case M32C_OPERAND_BITBASE16_16_S8 :
4734 fields->f_dsp_16_s8 = value;
4735 break;
4736 case M32C_OPERAND_BITBASE16_16_U16 :
4737 fields->f_dsp_16_u16 = value;
4738 break;
4739 case M32C_OPERAND_BITBASE16_16_U8 :
4740 fields->f_dsp_16_u8 = value;
4741 break;
4742 case M32C_OPERAND_BITBASE16_8_U11_S :
4743 fields->f_bitbase16_u11_S = value;
4744 break;
4745 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4746 fields->f_bitbase32_16_s11_unprefixed = value;
4747 break;
4748 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4749 fields->f_bitbase32_16_s19_unprefixed = value;
4750 break;
4751 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4752 fields->f_bitbase32_16_u11_unprefixed = value;
4753 break;
4754 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4755 fields->f_bitbase32_16_u19_unprefixed = value;
4756 break;
4757 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4758 fields->f_bitbase32_16_u27_unprefixed = value;
4759 break;
4760 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4761 fields->f_bitbase32_24_s11_prefixed = value;
4762 break;
4763 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4764 fields->f_bitbase32_24_s19_prefixed = value;
4765 break;
4766 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4767 fields->f_bitbase32_24_u11_prefixed = value;
4768 break;
4769 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4770 fields->f_bitbase32_24_u19_prefixed = value;
4771 break;
4772 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4773 fields->f_bitbase32_24_u27_prefixed = value;
4774 break;
4775 case M32C_OPERAND_BITNO16R :
4776 fields->f_dsp_16_u8 = value;
4777 break;
4778 case M32C_OPERAND_BITNO32PREFIXED :
4779 fields->f_bitno32_prefixed = value;
4780 break;
4781 case M32C_OPERAND_BITNO32UNPREFIXED :
4782 fields->f_bitno32_unprefixed = value;
4783 break;
4784 case M32C_OPERAND_DSP_10_U6 :
4785 fields->f_dsp_10_u6 = value;
4786 break;
4787 case M32C_OPERAND_DSP_16_S16 :
4788 fields->f_dsp_16_s16 = value;
4789 break;
4790 case M32C_OPERAND_DSP_16_S8 :
4791 fields->f_dsp_16_s8 = value;
4792 break;
4793 case M32C_OPERAND_DSP_16_U16 :
4794 fields->f_dsp_16_u16 = value;
4795 break;
4796 case M32C_OPERAND_DSP_16_U20 :
4797 fields->f_dsp_16_u24 = value;
4798 break;
4799 case M32C_OPERAND_DSP_16_U24 :
4800 fields->f_dsp_16_u24 = value;
4801 break;
4802 case M32C_OPERAND_DSP_16_U8 :
4803 fields->f_dsp_16_u8 = value;
4804 break;
4805 case M32C_OPERAND_DSP_24_S16 :
4806 fields->f_dsp_24_s16 = value;
4807 break;
4808 case M32C_OPERAND_DSP_24_S8 :
4809 fields->f_dsp_24_s8 = value;
4810 break;
4811 case M32C_OPERAND_DSP_24_U16 :
4812 fields->f_dsp_24_u16 = value;
4813 break;
4814 case M32C_OPERAND_DSP_24_U20 :
4815 fields->f_dsp_24_u24 = value;
4816 break;
4817 case M32C_OPERAND_DSP_24_U24 :
4818 fields->f_dsp_24_u24 = value;
4819 break;
4820 case M32C_OPERAND_DSP_24_U8 :
4821 fields->f_dsp_24_u8 = value;
4822 break;
4823 case M32C_OPERAND_DSP_32_S16 :
4824 fields->f_dsp_32_s16 = value;
4825 break;
4826 case M32C_OPERAND_DSP_32_S8 :
4827 fields->f_dsp_32_s8 = value;
4828 break;
4829 case M32C_OPERAND_DSP_32_U16 :
4830 fields->f_dsp_32_u16 = value;
4831 break;
4832 case M32C_OPERAND_DSP_32_U20 :
4833 fields->f_dsp_32_u24 = value;
4834 break;
4835 case M32C_OPERAND_DSP_32_U24 :
4836 fields->f_dsp_32_u24 = value;
4837 break;
4838 case M32C_OPERAND_DSP_32_U8 :
4839 fields->f_dsp_32_u8 = value;
4840 break;
4841 case M32C_OPERAND_DSP_40_S16 :
4842 fields->f_dsp_40_s16 = value;
4843 break;
4844 case M32C_OPERAND_DSP_40_S8 :
4845 fields->f_dsp_40_s8 = value;
4846 break;
4847 case M32C_OPERAND_DSP_40_U16 :
4848 fields->f_dsp_40_u16 = value;
4849 break;
4850 case M32C_OPERAND_DSP_40_U20 :
4851 fields->f_dsp_40_u20 = value;
4852 break;
4853 case M32C_OPERAND_DSP_40_U24 :
4854 fields->f_dsp_40_u24 = value;
4855 break;
4856 case M32C_OPERAND_DSP_40_U8 :
4857 fields->f_dsp_40_u8 = value;
4858 break;
4859 case M32C_OPERAND_DSP_48_S16 :
4860 fields->f_dsp_48_s16 = value;
4861 break;
4862 case M32C_OPERAND_DSP_48_S8 :
4863 fields->f_dsp_48_s8 = value;
4864 break;
4865 case M32C_OPERAND_DSP_48_U16 :
4866 fields->f_dsp_48_u16 = value;
4867 break;
4868 case M32C_OPERAND_DSP_48_U20 :
4869 fields->f_dsp_48_u20 = value;
4870 break;
4871 case M32C_OPERAND_DSP_48_U24 :
4872 fields->f_dsp_48_u24 = value;
4873 break;
4874 case M32C_OPERAND_DSP_48_U8 :
4875 fields->f_dsp_48_u8 = value;
4876 break;
4877 case M32C_OPERAND_DSP_8_S24 :
4878 fields->f_dsp_8_s24 = value;
4879 break;
4880 case M32C_OPERAND_DSP_8_S8 :
4881 fields->f_dsp_8_s8 = value;
4882 break;
4883 case M32C_OPERAND_DSP_8_U16 :
4884 fields->f_dsp_8_u16 = value;
4885 break;
4886 case M32C_OPERAND_DSP_8_U24 :
4887 fields->f_dsp_8_u24 = value;
4888 break;
4889 case M32C_OPERAND_DSP_8_U6 :
4890 fields->f_dsp_8_u6 = value;
4891 break;
4892 case M32C_OPERAND_DSP_8_U8 :
4893 fields->f_dsp_8_u8 = value;
4894 break;
4895 case M32C_OPERAND_DST16AN :
4896 fields->f_dst16_an = value;
4897 break;
4898 case M32C_OPERAND_DST16AN_S :
4899 fields->f_dst16_an_s = value;
4900 break;
4901 case M32C_OPERAND_DST16ANHI :
4902 fields->f_dst16_an = value;
4903 break;
4904 case M32C_OPERAND_DST16ANQI :
4905 fields->f_dst16_an = value;
4906 break;
4907 case M32C_OPERAND_DST16ANQI_S :
4908 fields->f_dst16_rn_QI_s = value;
4909 break;
4910 case M32C_OPERAND_DST16ANSI :
4911 fields->f_dst16_an = value;
4912 break;
4913 case M32C_OPERAND_DST16RNEXTQI :
4914 fields->f_dst16_rn_ext = value;
4915 break;
4916 case M32C_OPERAND_DST16RNHI :
4917 fields->f_dst16_rn = value;
4918 break;
4919 case M32C_OPERAND_DST16RNQI :
4920 fields->f_dst16_rn = value;
4921 break;
4922 case M32C_OPERAND_DST16RNQI_S :
4923 fields->f_dst16_rn_QI_s = value;
4924 break;
4925 case M32C_OPERAND_DST16RNSI :
4926 fields->f_dst16_rn = value;
4927 break;
4928 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4929 fields->f_dst32_an_unprefixed = value;
4930 break;
4931 case M32C_OPERAND_DST32ANPREFIXED :
4932 fields->f_dst32_an_prefixed = value;
4933 break;
4934 case M32C_OPERAND_DST32ANPREFIXEDHI :
4935 fields->f_dst32_an_prefixed = value;
4936 break;
4937 case M32C_OPERAND_DST32ANPREFIXEDQI :
4938 fields->f_dst32_an_prefixed = value;
4939 break;
4940 case M32C_OPERAND_DST32ANPREFIXEDSI :
4941 fields->f_dst32_an_prefixed = value;
4942 break;
4943 case M32C_OPERAND_DST32ANUNPREFIXED :
4944 fields->f_dst32_an_unprefixed = value;
4945 break;
4946 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4947 fields->f_dst32_an_unprefixed = value;
4948 break;
4949 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4950 fields->f_dst32_an_unprefixed = value;
4951 break;
4952 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4953 fields->f_dst32_an_unprefixed = value;
4954 break;
4955 case M32C_OPERAND_DST32R0HI_S :
4956 break;
4957 case M32C_OPERAND_DST32R0QI_S :
4958 break;
4959 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4960 fields->f_dst32_rn_ext_unprefixed = value;
4961 break;
4962 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4963 fields->f_dst32_rn_ext_unprefixed = value;
4964 break;
4965 case M32C_OPERAND_DST32RNPREFIXEDHI :
4966 fields->f_dst32_rn_prefixed_HI = value;
4967 break;
4968 case M32C_OPERAND_DST32RNPREFIXEDQI :
4969 fields->f_dst32_rn_prefixed_QI = value;
4970 break;
4971 case M32C_OPERAND_DST32RNPREFIXEDSI :
4972 fields->f_dst32_rn_prefixed_SI = value;
4973 break;
4974 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4975 fields->f_dst32_rn_unprefixed_HI = value;
4976 break;
4977 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4978 fields->f_dst32_rn_unprefixed_QI = value;
4979 break;
4980 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4981 fields->f_dst32_rn_unprefixed_SI = value;
4982 break;
4983 case M32C_OPERAND_G :
4984 break;
4985 case M32C_OPERAND_IMM_12_S4 :
4986 fields->f_imm_12_s4 = value;
4987 break;
4988 case M32C_OPERAND_IMM_12_S4N :
4989 fields->f_imm_12_s4 = value;
4990 break;
4991 case M32C_OPERAND_IMM_13_U3 :
4992 fields->f_imm_13_u3 = value;
4993 break;
4994 case M32C_OPERAND_IMM_16_HI :
4995 fields->f_dsp_16_s16 = value;
4996 break;
4997 case M32C_OPERAND_IMM_16_QI :
4998 fields->f_dsp_16_s8 = value;
4999 break;
5000 case M32C_OPERAND_IMM_16_SI :
5001 fields->f_dsp_16_s32 = value;
5002 break;
5003 case M32C_OPERAND_IMM_20_S4 :
5004 fields->f_imm_20_s4 = value;
5005 break;
5006 case M32C_OPERAND_IMM_24_HI :
5007 fields->f_dsp_24_s16 = value;
5008 break;
5009 case M32C_OPERAND_IMM_24_QI :
5010 fields->f_dsp_24_s8 = value;
5011 break;
5012 case M32C_OPERAND_IMM_24_SI :
5013 fields->f_dsp_24_s32 = value;
5014 break;
5015 case M32C_OPERAND_IMM_32_HI :
5016 fields->f_dsp_32_s16 = value;
5017 break;
5018 case M32C_OPERAND_IMM_32_QI :
5019 fields->f_dsp_32_s8 = value;
5020 break;
5021 case M32C_OPERAND_IMM_32_SI :
5022 fields->f_dsp_32_s32 = value;
5023 break;
5024 case M32C_OPERAND_IMM_40_HI :
5025 fields->f_dsp_40_s16 = value;
5026 break;
5027 case M32C_OPERAND_IMM_40_QI :
5028 fields->f_dsp_40_s8 = value;
5029 break;
5030 case M32C_OPERAND_IMM_40_SI :
5031 fields->f_dsp_40_s32 = value;
5032 break;
5033 case M32C_OPERAND_IMM_48_HI :
5034 fields->f_dsp_48_s16 = value;
5035 break;
5036 case M32C_OPERAND_IMM_48_QI :
5037 fields->f_dsp_48_s8 = value;
5038 break;
5039 case M32C_OPERAND_IMM_48_SI :
5040 fields->f_dsp_48_s32 = value;
5041 break;
5042 case M32C_OPERAND_IMM_56_HI :
5043 fields->f_dsp_56_s16 = value;
5044 break;
5045 case M32C_OPERAND_IMM_56_QI :
5046 fields->f_dsp_56_s8 = value;
5047 break;
5048 case M32C_OPERAND_IMM_64_HI :
5049 fields->f_dsp_64_s16 = value;
5050 break;
5051 case M32C_OPERAND_IMM_8_HI :
5052 fields->f_dsp_8_s16 = value;
5053 break;
5054 case M32C_OPERAND_IMM_8_QI :
5055 fields->f_dsp_8_s8 = value;
5056 break;
5057 case M32C_OPERAND_IMM_8_S4 :
5058 fields->f_imm_8_s4 = value;
5059 break;
5060 case M32C_OPERAND_IMM_8_S4N :
5061 fields->f_imm_8_s4 = value;
5062 break;
5063 case M32C_OPERAND_IMM_SH_12_S4 :
5064 fields->f_imm_12_s4 = value;
5065 break;
5066 case M32C_OPERAND_IMM_SH_20_S4 :
5067 fields->f_imm_20_s4 = value;
5068 break;
5069 case M32C_OPERAND_IMM_SH_8_S4 :
5070 fields->f_imm_8_s4 = value;
5071 break;
5072 case M32C_OPERAND_IMM1_S :
5073 fields->f_imm1_S = value;
5074 break;
5075 case M32C_OPERAND_IMM3_S :
5076 fields->f_imm3_S = value;
5077 break;
5078 case M32C_OPERAND_LAB_16_8 :
5079 fields->f_lab_16_8 = value;
5080 break;
5081 case M32C_OPERAND_LAB_24_8 :
5082 fields->f_lab_24_8 = value;
5083 break;
5084 case M32C_OPERAND_LAB_32_8 :
5085 fields->f_lab_32_8 = value;
5086 break;
5087 case M32C_OPERAND_LAB_40_8 :
5088 fields->f_lab_40_8 = value;
5089 break;
5090 case M32C_OPERAND_LAB_5_3 :
5091 fields->f_lab_5_3 = value;
5092 break;
5093 case M32C_OPERAND_LAB_8_16 :
5094 fields->f_lab_8_16 = value;
5095 break;
5096 case M32C_OPERAND_LAB_8_24 :
5097 fields->f_lab_8_24 = value;
5098 break;
5099 case M32C_OPERAND_LAB_8_8 :
5100 fields->f_lab_8_8 = value;
5101 break;
5102 case M32C_OPERAND_LAB32_JMP_S :
5103 fields->f_lab32_jmp_s = value;
5104 break;
5105 case M32C_OPERAND_Q :
5106 break;
5107 case M32C_OPERAND_R0 :
5108 break;
5109 case M32C_OPERAND_R0H :
5110 break;
5111 case M32C_OPERAND_R0L :
5112 break;
5113 case M32C_OPERAND_R1 :
5114 break;
5115 case M32C_OPERAND_R1R2R0 :
5116 break;
5117 case M32C_OPERAND_R2 :
5118 break;
5119 case M32C_OPERAND_R2R0 :
5120 break;
5121 case M32C_OPERAND_R3 :
5122 break;
5123 case M32C_OPERAND_R3R1 :
5124 break;
5125 case M32C_OPERAND_REGSETPOP :
5126 fields->f_8_8 = value;
5127 break;
5128 case M32C_OPERAND_REGSETPUSH :
5129 fields->f_8_8 = value;
5130 break;
5131 case M32C_OPERAND_RN16_PUSH_S :
5132 fields->f_4_1 = value;
5133 break;
5134 case M32C_OPERAND_S :
5135 break;
5136 case M32C_OPERAND_SRC16AN :
5137 fields->f_src16_an = value;
5138 break;
5139 case M32C_OPERAND_SRC16ANHI :
5140 fields->f_src16_an = value;
5141 break;
5142 case M32C_OPERAND_SRC16ANQI :
5143 fields->f_src16_an = value;
5144 break;
5145 case M32C_OPERAND_SRC16RNHI :
5146 fields->f_src16_rn = value;
5147 break;
5148 case M32C_OPERAND_SRC16RNQI :
5149 fields->f_src16_rn = value;
5150 break;
5151 case M32C_OPERAND_SRC32ANPREFIXED :
5152 fields->f_src32_an_prefixed = value;
5153 break;
5154 case M32C_OPERAND_SRC32ANPREFIXEDHI :
5155 fields->f_src32_an_prefixed = value;
5156 break;
5157 case M32C_OPERAND_SRC32ANPREFIXEDQI :
5158 fields->f_src32_an_prefixed = value;
5159 break;
5160 case M32C_OPERAND_SRC32ANPREFIXEDSI :
5161 fields->f_src32_an_prefixed = value;
5162 break;
5163 case M32C_OPERAND_SRC32ANUNPREFIXED :
5164 fields->f_src32_an_unprefixed = value;
5165 break;
5166 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
5167 fields->f_src32_an_unprefixed = value;
5168 break;
5169 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
5170 fields->f_src32_an_unprefixed = value;
5171 break;
5172 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
5173 fields->f_src32_an_unprefixed = value;
5174 break;
5175 case M32C_OPERAND_SRC32RNPREFIXEDHI :
5176 fields->f_src32_rn_prefixed_HI = value;
5177 break;
5178 case M32C_OPERAND_SRC32RNPREFIXEDQI :
5179 fields->f_src32_rn_prefixed_QI = value;
5180 break;
5181 case M32C_OPERAND_SRC32RNPREFIXEDSI :
5182 fields->f_src32_rn_prefixed_SI = value;
5183 break;
5184 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
5185 fields->f_src32_rn_unprefixed_HI = value;
5186 break;
5187 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
5188 fields->f_src32_rn_unprefixed_QI = value;
5189 break;
5190 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
5191 fields->f_src32_rn_unprefixed_SI = value;
5192 break;
5193 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
5194 fields->f_5_1 = value;
5195 break;
5196 case M32C_OPERAND_X :
5197 break;
5198 case M32C_OPERAND_Z :
5199 break;
5200 case M32C_OPERAND_COND16_16 :
5201 fields->f_dsp_16_u8 = value;
5202 break;
5203 case M32C_OPERAND_COND16_24 :
5204 fields->f_dsp_24_u8 = value;
5205 break;
5206 case M32C_OPERAND_COND16_32 :
5207 fields->f_dsp_32_u8 = value;
5208 break;
5209 case M32C_OPERAND_COND16C :
5210 fields->f_cond16 = value;
5211 break;
5212 case M32C_OPERAND_COND16J :
5213 fields->f_cond16 = value;
5214 break;
5215 case M32C_OPERAND_COND16J5 :
5216 fields->f_cond16j_5 = value;
5217 break;
5218 case M32C_OPERAND_COND32 :
5219 fields->f_cond32 = value;
5220 break;
5221 case M32C_OPERAND_COND32_16 :
5222 fields->f_dsp_16_u8 = value;
5223 break;
5224 case M32C_OPERAND_COND32_24 :
5225 fields->f_dsp_24_u8 = value;
5226 break;
5227 case M32C_OPERAND_COND32_32 :
5228 fields->f_dsp_32_u8 = value;
5229 break;
5230 case M32C_OPERAND_COND32_40 :
5231 fields->f_dsp_40_u8 = value;
5232 break;
5233 case M32C_OPERAND_COND32J :
5234 fields->f_cond32j = value;
5235 break;
5236 case M32C_OPERAND_CR1_PREFIXED_32 :
5237 fields->f_21_3 = value;
5238 break;
5239 case M32C_OPERAND_CR1_UNPREFIXED_32 :
5240 fields->f_13_3 = value;
5241 break;
5242 case M32C_OPERAND_CR16 :
5243 fields->f_9_3 = value;
5244 break;
5245 case M32C_OPERAND_CR2_32 :
5246 fields->f_13_3 = value;
5247 break;
5248 case M32C_OPERAND_CR3_PREFIXED_32 :
5249 fields->f_21_3 = value;
5250 break;
5251 case M32C_OPERAND_CR3_UNPREFIXED_32 :
5252 fields->f_13_3 = value;
5253 break;
5254 case M32C_OPERAND_FLAGS16 :
5255 fields->f_9_3 = value;
5256 break;
5257 case M32C_OPERAND_FLAGS32 :
5258 fields->f_13_3 = value;
5259 break;
5260 case M32C_OPERAND_SCCOND32 :
5261 fields->f_cond16 = value;
5262 break;
5263 case M32C_OPERAND_SIZE :
5264 break;
5265
5266 default :
5267 /* xgettext:c-format */
5268 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
5269 opindex);
5270 abort ();
5271 }
5272 }
5273
5274 /* Function to call before using the instruction builder tables. */
5275
5276 void
5277 m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
5278 {
5279 cd->insert_handlers = & m32c_cgen_insert_handlers[0];
5280 cd->extract_handlers = & m32c_cgen_extract_handlers[0];
5281
5282 cd->insert_operand = m32c_cgen_insert_operand;
5283 cd->extract_operand = m32c_cgen_extract_operand;
5284
5285 cd->get_int_operand = m32c_cgen_get_int_operand;
5286 cd->set_int_operand = m32c_cgen_set_int_operand;
5287 cd->get_vma_operand = m32c_cgen_get_vma_operand;
5288 cd->set_vma_operand = m32c_cgen_set_vma_operand;
5289 }
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