| blob | 403ecf659f10528f5b2ff4e7bd10b9e4fdfbcfa9 |
1 2006-05-20 Nathan Sidwell <nathan@codesourcery.com>
3 * binutils/testsuite/binutils-all/objcopy.exp: Skip for uclinux
4 targets.
6 2006-05-15 Paul Brook <paul@codesourcery.com>
8 Backport from mainline.
9 * bfd/cpu-arm.c (bfd_is_arm_mapping_symbol_name): Rename ...
10 (bfd_is_arm_special_symbol_name): ... to this. Add type argument.
11 Check symbol name is of specified type.
12 * bfd/elf32-arm.c (elf32_arm_is_target_special_symbol,
13 arm_elf_find_function, elf32_arm_output_symbol_hook): Use
14 bfd_is_arm_special_symbol_name.
15 * bfd/bfd-in.h (BFD_ARM_SPECIAL_SYM_TYPE_MAP,
16 BFD_ARM_SPECIAL_SYM_TYPE_TAG, BFD_ARM_SPECIAL_SYM_TYPE_OTHER,
17 BFD_ARM_SPECIAL_SYM_TYPE_ANY): Define.
18 (bfd_is_arm_mapping_symbol_name): Remove prototype.
19 (bfd_is_arm_special_symbol_name): Add prototype.
20 * bfd/bfd-in2.h: Regenerate.
21 * gas/config/tc-arm.c (arm_adjust_symtab): Use
22 bfd_is_arm_special_symbol_name.
23 * ld/testsuite/ld-arm/arm-be8.d: New test.
24 * ld/testsuite/ld-arm/arm-be8.s: New test.
25 * ld/testsuite/ld-arm/arm-elf.exp: Add arm-be8.
27 2006-05-12 Carlos O'Donell <carlos@codesourcery.com>
29 * binutils/doc/binutils.texi: Rename "Index" to "Binutils Index"
31 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
33 * bfd/doc/bfd.texinfo: Rename "Index" to "BFD Index"
34 * ld/ld.texinfo: Rename "Index" to "LD Index"
35 * gas/doc/as.texinfo: Rename "Index" to "AS Index"
36 Rename "ABORT" to "ABORT (COFF)"
38 2006-05-06 Joseph S. Myers <joseph@codesourcery.com>
40 Backport:
41 2006-03-30 Jakub Jelinek <jakub@redhat.com>
42 * ldmisc.c (vfinfo): Revert 2005-10-05 changes. If
43 bfd_find_nearest_line succeeded for %C or %D, but filename
44 is NULL, print section+offset at the end.
46 2006-05-05 Julian Brown <julian@codesourcery.com>
48 * gas/config/tc-arm.c (stdarg.h): include.
49 (arm_it): Add uncond_value field. Add isvec and issingle to operand
50 array.
51 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
52 REG_TYPE_NSDQ (single, double or quad vector reg).
53 (reg_expected_msgs): Update.
54 (BAD_FPU): Add macro for unsupported FPU instruction error.
55 (parse_neon_type): Support 'd' as an alias for .f64.
56 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
57 sets of registers.
58 (parse_vfp_reg_list): Don't update first arg on error.
59 (parse_neon_mov): Support extra syntax for VFP moves.
60 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
61 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
62 (parse_operands): Support isvec, issingle operands fields, new parse
63 codes above.
64 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
65 msr variants.
66 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
67 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
68 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
69 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
70 shapes.
71 (neon_shape): Redefine in terms of above.
72 (neon_shape_class): New enumeration, table of shape classes.
73 (neon_shape_el): New enumeration. One element of a shape.
74 (neon_shape_el_size): Register widths of above, where appropriate.
75 (neon_shape_info): New struct. Info for shape table.
76 (neon_shape_tab): New array.
77 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
78 (neon_check_shape): Rewrite as...
79 (neon_select_shape): New function to classify instruction shapes,
80 driven by new table neon_shape_tab array.
81 (neon_quad): New function. Return 1 if shape should set Q flag in
82 instructions (or equivalent), 0 otherwise.
83 (type_chk_of_el_type): Support F64.
84 (el_type_of_type_chk): Likewise.
85 (neon_check_type): Add support for VFP type checking (VFP data
86 elements fill their containing registers).
87 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
88 in thumb mode for VFP instructions.
89 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
90 and encode the current instruction as if it were that opcode.
91 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
92 arguments, call function in PFN.
93 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
94 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
95 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
96 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
97 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
98 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
99 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
100 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
101 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
102 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
103 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
104 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
105 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
106 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
107 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
108 neon_quad.
109 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
110 between VFP and Neon turns out to belong to Neon. Perform
111 architecture check and fill in condition field if appropriate.
112 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
113 (do_neon_cvt): Add support for VFP variants of instructions.
114 (neon_cvt_flavour): Extend to cover VFP conversions.
115 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
116 vmov variants.
117 (do_neon_ldr_str): Handle single-precision VFP load/store.
118 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
119 NS_NULL not NS_IGNORE.
120 (opcode_tag): Add OT_csuffixF for operands which either take a
121 conditional suffix, or have 0xF in the condition field.
122 (md_assemble): Add support for OT_csuffixF.
123 (NCE): Replace macro with...
124 (NCE_tag, NCE, NCEF): New macros.
125 (nCE): Replace macro with...
126 (nCE_tag, nCE, nCEF): New macros.
127 (insns): Add support for VFP insns or VFP versions of insns msr, mrs,
128 vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop, vcvtz,
129 vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia, vldbdb, vstm,
130 vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared VFP/Neon insns
131 together.
133 * gas/testsuite/gas/arm/itblock.s: New file. Helper macro for making
134 all-true IT blocks.
135 * gas/testsuite/gas/arm/neon-cond-bad-inc.s: New test. Make sure
136 unconditional Neon instructions are rejected...
137 * gas/testsuite/gas/arm/neon-cond-bad.s: In ARM mode, and...
138 * gas/testsuite/gas/arm/neon-cond-bad_t2.s: Accepted in Thumb mode
139 (with IT).
140 * gas/testsuite/gas/arm/neon-cond-bad.l: Expected error output in ARM
141 mode.
142 * gas/testsuite/gas/arm/neon-cond-bad.d: Control ARM mode test.
143 * gas/testsuite/gas/arm/neon-cond-bad_t2.d: Expected output in Thumb
144 mode.
145 * gas/testsuite/gas/arm/vfp-neon-syntax-inc.s: Test VFP Neon-style
146 syntax.
147 * gas/testsuite/gas/arm/vfp-neon-syntax.s: ...in ARM mode.
148 * gas/testsuite/gas/arm/vfp-neon-syntax_t2.s: ...and Thumb mode.
149 * gas/testsuite/gas/arm/vfp-neon-syntax.d: Expected output in ARM mode.
150 * gas/testsuite/gas/arm/vfp-neon-syntax_t2.d: Expected output in Thumb
151 mode.
153 2006-05-05 Mark Shinwell <shinwell@codesourcery.com>
155 * configure: Regenerate.
156 * configure.in: Enable gprof for cross builds.
158 2006-05-03 Julian Brown <julian@codesourcery.com>
160 * gas/doc/c-arm.texi: Add documentation for .dn/.qn directives.
162 2006-05-03 Paul Brook <paul@codesourcery.com>
164 * bfd/elf32-arm.c (elf32_arm_reloc_map): Add MOVW and MOVT relocs.
165 (elf32_arm_final_link_relocate): Handle MOVW and MOVT relocs.
166 (elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto.
167 * bfd/reloc.c: Ditto.
168 * bfd/bfd-in2.h: Regenerate.
169 * bfd/libbfd.h: Regenerate.
170 * bfd/libcoff.h: Regenerate.
171 * gas/config/tc-arm.c (parse_half): New function.
172 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
173 (parse_operands): Ditto.
174 (do_mov16): Reject invalid relocations.
175 (do_t_mov16): Ditto. Use Thumb reloc numbers.
176 (insns): Replace Iffff with HALF.
177 (md_apply_fix): Add MOVW and MOVT relocs.
178 (tc_gen_reloc): Ditto.
179 * gas/doc/c-arm.texi: Document relocation operators
180 * ld/testsuite/ld-arm/arm-elf.exp: Add arm-movwt.
181 * ld/testsuite/ld-arm/arm-movwt.d: New test.
182 * ld/testsuite/ld-arm/arm-movwt.s: New test.
183 * ld/testsuite/ld-arm/arm.ld: Add .far.
185 2006-05-02 Joseph Myers <joseph@codesourcery.com>
187 * gas/config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset
188 by 4 here.
189 (md_apply_fix3): Multiply offset by 4 here for
190 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
191 * gas/testsuite/gas/arm/iwmmxt.s: Increase offsets for wstrb and
192 wstrh.
193 * gas/testsuite/gas/arm/iwmmxt.d: Update expected results.
194 * gas/testsuite/gas/arm/iwmmxt-bad2.s: Test wstrb, wstrh, wldrb
195 and wldrh.
196 * gas/testsuite/gas/arm/iwmmxt-bad2.l: Update expected error
197 messages.
199 2006-05-01 Paul Brook <paul@codesourcery.com>
201 * bfd/elf32-arm.c (elf32_arm_final_link_relocate): Set thumb funciton
202 bit for R_ARM_REL32.
203 * gas/config/tc-arm.c (arm_optimize_expr): New function.
204 * gas/config/tc-arm.h (md_optimize_expr): Define
205 (arm_optimize_expr): Add prototype.
206 (TC_FORCE_RELOCATION_SUB_SAME): Define.
207 * ld/testsuite/ld-arm/arm-elf.exp: Add thumb-rel32.
208 * ld/testsuite/ld-arm/thumb-rel32.d: New test.
209 * ld/testsuite/ld-arm/thumb-rel32.s: New test.
211 2006-04-29 Paul Brook <paul@codesourcery.com>
213 * opcodes/arm-dis.c (coprocessor_opcodes): Add %c to unconditional
214 arm instructions.
215 (neon_opcodes): Add conditional execution specifiers.
216 (thumb_opcodes): Ditto.
217 (thumb32_opcodes): Ditto.
218 (arm_conditional): Change 0xe to "al" and add "" to end.
219 (ifthen_state, ifthen_next_state, ifthen_address): New.
220 (IFTHEN_COND): Define.
221 (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
222 (print_insn_arm): Change %c to use new values of arm_conditional.
223 (print_insn_thumb16): Print thumb conditions. Add %I.
224 (print_insn_thumb32): Print thumb conditions.
225 (find_ifthen_state): New function.
226 (print_insn): Track IT block state.
227 * gas/testsuite/gas/arm/thumb2_bcond.d: Update expected output.
228 * gas/testsuite/gas/arm/thumb32.d: Ditto.
229 * gas/testsuite/gas/arm/vfp1_t2.d: Ditto.
230 * gas/testsuite/gas/arm/vfp1xD_t2.d: Ditto.
231 * binutils/testsuite/binutils-all/arm/objdump.exp: New file.
232 * binutils/testsuite/binutils-all/arm/thumb2-cond.s: New test.
234 2006-04-28 Mark Mitchell <mark@codesourcery.com>
236 * doc/as.texinfo: Mention that some .type syntaxes are not
237 supported on all architectures.
239 2006-04-27 Richard Sandiford <richard@codesourcery.com>
241 include/opcodes/
242 * m68k.h (mcf_mask): Define.
244 opcodes/
245 * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
246 and fmovem entries. Put register list entries before immediate
247 mask entries. Use "l" rather than "L" in the fmovem entries.
248 * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
249 out from INFO.
250 (m68k_scan_mask): New function, split out from...
251 (print_insn_m68k): ...here. If no architecture has been set,
252 first try printing an m680x0 instruction, then try a Coldfire one.
254 2006-04-27 Richard Sandiford <richard@codesourcery.com>
256 bfd/
257 * elf32-m68k.c (elf_m68k_pcrel_insn): New structure.
258 (elf_m68k_plt_info): Likewise.
259 (elf_m68k_plt_info): New table.
260 (CFV4E_PLT_ENTRY_SIZE): Rename to...
261 (ISAB_PLT_ENTRY_SIZE): ...this.
262 (CFV4E_FLAG): Delete.
263 (elf_cfv4e_plt0_entry): Rename to...
264 (elf_isab_plt0_entry): ...this. Adjust comments. Use (-6,%pc,%d0)
265 for the second instruction too.
266 (elf_cfv4e_plt_entry): Rename to...
267 (elf_isab_plt_entry): ...this. Adjust comments and use (-6,%pc,%d0).
268 (elf_isab_plt_info): New table.
269 (CPU32_FLAG): Delete.
270 (PLT_CPU32_ENTRY_SIZE): Rename to...
271 (CPU32_PLT_ENTRY_SIZE): ...this.
272 (elf_cpu32_plt0_entry): Update bounds accordingly.
273 (elf_cpu32_plt_entry): Likewise.
274 (elf_cpu32_plt_info): New table.
275 (elf_m68k_link_hash_table): Add a plt_info field.
276 (elf_m68k_link_hash_table_create): Initialize it.
277 (elf_m68k_get_plt_info): New function.
278 (elf_m68k_always_size_sections): Likewise.
279 (elf_m68k_adjust_dynamic_symbol): Use the plt_info hash table field.
280 (elf_m68k_install_pcrel_field): New function.
281 (elf_m68k_finish_dynamic_symbol): Factor code using plt_info and
282 elf_m68k_install_pcrel_field.
283 (elf_m68k_finish_dynamic_sections): Likewise.
284 (elf_m68k_plt_sym_val): Use elf_m68k_get_plt_info.
285 (elf_backend_always_size_sections): Define.
287 2006-04-26 Julian Brown <julian@codesourcery.com>
289 * gas/config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
290 checking.
291 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
292 architecture version checks.
293 (insns): Allow overlapping instructions to be used in VFP mode.
295 * gas/testsuite/gas/arm/vfp-neon-overlap.s: New test. Overlapping
296 VFP/Neon instructions.
297 * gas/testsuite/gas/arm/vfp-neon-overlap.d: Expected output of above.
298 * gas/testsuite/gas/arm/vfp1xD.d: Test for fldmx/fstmx.
299 * gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
300 * gas/testsuite/gas/arm/vfpv3-32drs.d: Likewise.
302 * opcodes/arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx
303 as vldm/vstm.
305 2006-04-26 Julian Brown <julian@codesourcery.com>
307 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
308 (is_quarter_float): Rename from above. Simplify slightly.
309 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
310 number.
311 (parse_neon_mov): Parse floating-point constants.
312 (neon_qfloat_bits): Fix encoding.
313 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
314 preference to integer encoding when using the F32 type.
316 * gas/testsuite/gas/arm/neon-const.s: New testcase. Neon floating-point
317 constants.
318 * gas/testsuite/gas/arm/neon-const.d: Expected output of above.
319 * gas/testsuite/gas/arm/neon-cov.d: Expect floating-point disassembly
320 for VMOV.F32.
322 * opcodes/arm-dis.c (print_insn_neon): Disassemble floating-point
323 constant VMOV.
325 2006-04-24 Julian Brown <julian@codesourcery.com>
327 * libiberty/floatformat.c (floatformat_to_double): Fix (biased)
328 exponent=0 case.
330 2006-04-12 Carlos O'Donell <carlos@codesourcery.com>
332 * Makefile.tpl: Add install-html to install target deps.
333 * Makefile.in: Regenerate.
335 2006-04-07 Julian Brown <julian@codesourcery.com>
337 * gas/config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
338 zero-initialising structures containing it will lead to invalid
339 types).
340 (arm_it): Add vectype to each operand.
341 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
342 defined field.
343 (neon_typed_alias): New structure. Extra information for typed
344 register aliases.
345 (reg_entry): Add neon type info field.
346 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
347 Break out alternative syntax for coprocessor registers, etc. into...
348 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
349 out from arm_reg_parse.
350 (parse_neon_type): Move. Return SUCCESS/FAIL.
351 (first_error): New function. Call to ensure first error which occurs
352 is reported.
353 (parse_neon_operand_type): Parse exactly one type.
354 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
355 (parse_typed_reg_or_scalar): New function. Handle core of both
356 arm_typed_reg_parse and parse_scalar.
357 (arm_typed_reg_parse): Parse a register with an optional type.
358 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
359 result.
360 (parse_scalar): Parse a Neon scalar with optional type.
361 (parse_reg_list): Use first_error.
362 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
363 (neon_alias_types_same): New function. Return true if two (alias) types
364 are the same.
365 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
366 of elements.
367 (insert_reg_alias): Return new reg_entry not void.
368 (insert_neon_reg_alias): New function. Insert type/index information as
369 well as register for alias.
370 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
371 make typed register aliases accordingly.
372 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
373 of line.
374 (s_unreq): Delete type information if present.
375 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
376 (s_arm_unwind_save_mmxwcg): Likewise.
377 (s_arm_unwind_movsp): Likewise.
378 (s_arm_unwind_setfp): Likewise.
379 (parse_shift): Likewise.
380 (parse_shifter_operand): Likewise.
381 (parse_address): Likewise.
382 (parse_tb): Likewise.
383 (tc_arm_regname_to_dw2regnum): Likewise.
384 (md_pseudo_table): Add dn, qn.
385 (parse_neon_mov): Handle typed operands.
386 (parse_operands): Likewise.
387 (neon_type_mask): Add N_SIZ.
388 (N_ALLMODS): New macro.
389 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
390 (el_type_of_type_chk): Add some safeguards.
391 (modify_types_allowed): Fix logic bug.
392 (neon_check_type): Handle operands with types.
393 (neon_three_same): Remove redundant optional arg handling.
394 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
395 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
396 (do_neon_step): Adjust accordingly.
397 (neon_cmode_for_logic_imm): Use first_error.
398 (do_neon_bitfield): Call neon_check_type.
399 (neon_dyadic): Rename to...
400 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield to
401 allow modification of type of the destination.
402 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
403 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
404 (do_neon_compare): Make destination be an untyped bitfield.
405 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
406 (neon_mul_mac): Return early in case of errors.
407 (neon_move_immediate): Use first_error.
408 (neon_mac_reg_scalar_long): Fix type to include scalar.
409 (do_neon_dup): Likewise.
410 (do_neon_mov): Likewise (in several places).
411 (do_neon_tbl_tbx): Fix type.
412 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
413 (do_neon_ld_dup): Exit early in case of errors and/or use first_error.
414 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
415 Handle .dn/.qn directives.
416 (REGDEF): Add zero for reg_entry neon field.
418 * gas/testsuite/gas/arm/neon-psyn.s: Basic test of programmers syntax.
419 * gas/testsuite/gas/arm/neon-psyn.d: Expected output of above.
421 2006-04-03 Carlos O'Donell <carlos@codesourcery.com>
423 * Makefile.tpl: Add install-html target.
424 * Makefile.def: Add install-html target.
425 * Makefile.in: Regenerate.
426 * configure.in: Add --with-datarootdir, --with-docdir,
427 and --with-htmldir options.
428 * configure: Regenerate.
429 * opcodes/Makefile.am: Add install-html target.
430 * opcodes/Makefile.in: Regenerate.
431 * libiberty/Makefile.in: Add install-html, install-html-am, and
432 install-html-recursive targets. Define mkdir_p and
433 NORMAL_INSTALL.
434 * libiberty/configure.ac: AC_SUBST datarootdir, docdir, htmldir.
435 * libiberty/configure: Regenerate.
436 * libiberty/testsuite/Makefile.in: Add install-html and html targets.
437 * ld/Makefile.am: Add install-html, install-html-am, and
438 install-html-recursive targets.
439 * ld/Makefile.in: Regenerate.
440 * ld/configure.in: AC_SUBST datarootdir, docdir, htmldir.
441 * ld/configure: Regenerate.
442 * ld/po/Make-in: Add install-html target.
443 * intl/Makefile.in: Add html info and dvi and install-html to .PHONY
444 Add install-html target.
445 * gprof/po/Make-in: Add install-html target.
446 * gprof/Makefile.am: Add install-html, install-html-am and
447 install-html-recursive targets.
448 * gprof/Makefile.in: Regenerate.
449 * gprof/configure.in: AC_SUBST datarootdir, docdir, htmldir.
450 * gprof/configure: Regenerate.
451 * gas/po/Make-in: Add install-html target.
452 * gas/Makefile.am: Add install-html and install-html-recursive targets.
453 * gas/Makefile.in: Regenerate.
454 * gas/configure.in: AC_SUBST datarootdir, docdir, htmldir.
455 * gas/configure: Regenerate.
456 * gas/doc/Makefile.am: Add install-html and install-html-am targets.
457 * gas/doc/Makefile.in: Regenerate.
458 * binutils/po/Make-in: Add install-html target.
459 * binutils/Makefile.am: Add install-html and install-html-recursive targets.
460 * binutils/Makefile.in: Regenerate.
461 * binutils/configure.in: AC_SUBST datarootdir, docdir and htmldir.
462 * binutils/configure: Regenerate.
463 * binutils/doc/Makefile.am: Add install-html and install-html-am targets.
464 * binutils/doc/Makefile.in: Regenerate.
465 * bfd/po/Make-in: Add install-html target.
466 * bfd/Makefile.am: Rename docdir to bfddocdir. Add datarootdir, docdir
467 htmldir. Add install-html and install-html-recursive targets.
468 * bfd/Makefile.in: Regenerate.
469 * bfd/configure.in: AC_SUBST for datarootdir, docdir and htmldir.
470 * bfd/configure: Regenerate.
471 * bfd/doc/Makefile.am: Add install-html and install-html-am targets.
472 Define datarootdir, docdir and htmldir.
473 * bfd/doc/Makefile.in: Regenerate.
474 * etc/Makefile.in: Add install-html target. Add htmldir,
475 docdir and datarootdir.
476 * etc/configure.texi: Document install-html target.
477 * etc/configure.in: AC_SUBST datarootdir, docdir, htmldir.
478 * etc/configure: Regenerate.
480 2005-04-03 Julian Brown <julian@codesourcery.com>
481 Nathan Sidwell <nathan@codesourcery.com>
483 * binutils/readelf.c (arm_attr_tag_VFP_arch): Add VFPv3.
485 * gas/config/tc-arm.c (limits.h): Include.
486 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
487 (fpu_vfp_v3_or_neon_ext): Declare constants.
488 (neon_el_type): New enumeration of types for Neon vector elements.
489 (neon_type_el): New struct. Define type and size of a vector element.
490 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
491 instruction.
492 (neon_type): Define struct. The type of an instruction.
493 (arm_it): Add 'vectype' for the current instruction.
494 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
495 (vfp_sp_reg_pos): Rename to...
496 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
497 tags.
498 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
499 (Neon D or Q register).
500 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon
501 D register.
502 (GE_OPT_PREFIX_BIG): Define constant, for use in...
503 (my_get_expression): Allow above constant as argument to accept
504 64-bit constants with optional prefix.
505 (arm_reg_parse): Add extra argument to return the specific type of
506 register in when either a D or Q register (REG_TYPE_NDQ) is requested.
507 Can be NULL.
508 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
509 (parse_reg_list): Update for new arm_reg_parse args.
510 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
511 (parse_neon_el_struct_list): New function. Parse element/structure
512 register lists for VLD<n>/VST<n> instructions.
513 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
514 (s_arm_unwind_save_mmxwr): Likewise.
515 (s_arm_unwind_save_mmxwcg): Likewise.
516 (s_arm_unwind_movsp): Likewise.
517 (s_arm_unwind_setfp): Likewise.
518 (parse_big_immediate): New function. Parse an immediate, which may
519 be 64 bits wide. Put results in inst.operands[i].
520 (parse_shift): Update for new arm_reg_parse args.
521 (parse_address): Likewise. Add parsing of alignment specifiers.
522 (parse_neon_mov): Parse the operands of a VMOV instruction.
523 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC,
524 OP_NRDLST, OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC,
525 OP_RNDQ_RNSC, OP_RND_RNSC, OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b,
526 OP_I0, OP_I16z, OP_I32z, OP_I64, OP_I64z, OP_oI32b, OP_oRND,
527 OP_oRNQ, OP_oRNDQ.
528 (parse_operands): Handle new codes above.
529 (encode_arm_vfp_sp_reg): Rename to...
530 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
531 selected VFP version only supports D0-D15.
532 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
533 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
534 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
535 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
536 encode_arm_vfp_reg name, and allow 32 D regs.
537 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn)
538 (do_vfp_dp_rd_rn_rm, do_vfp_rm_rd_rn): New functions to encode VFP
539 insns allowing 32 D regs.
540 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
541 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
542 constant-load and conversion insns introduced with VFPv3.
543 (neon_tab_entry): New struct.
544 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
545 those which are the targets of pseudo-instructions.
546 (neon_opc): Enumerate opcodes, use as indices into...
547 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
548 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
549 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
550 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
551 neon_enc_tab.
552 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
553 Neon instructions.
554 (neon_type_mask): New. Compact type representation for type
555 checking.
556 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
557 permitted type combinations.
558 (N_IGNORE_TYPE): New macro.
559 (neon_check_shape): New function. Check an instruction shape for
560 multiple alternatives. Return the specific shape for the current
561 instruction.
562 (neon_modify_type_size): New function. Modify a vector type and
563 size, depending on the bit mask in argument 1.
564 (neon_type_promote): New function. Convert a given "key" type (of an
565 operand) into the correct type for a different operand, based on a bit
566 mask.
567 (type_chk_of_el_type): New function. Convert a type and size into the
568 compact representation used for type checking.
569 (el_type_of_type_ckh): New function. Reverse of above (only when a
570 single bit is set in the bit mask).
571 (modify_types_allowed): New function. Alter a mask of allowed types
572 based on a bit mask of modifications.
573 (neon_check_type): New function. Check the type of the current
574 instruction against the variable argument list. The "key" type of the
575 instruction is returned.
576 (neon_dp_fixup): New function. Fill in and modify instruction bits for
577 a Neon data-processing instruction depending on whether we're in ARM
578 mode or Thumb-2 mode.
579 (neon_logbits): New function.
580 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
581 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
582 (do_neon_qshl_imm, neon_cmode_for_logic_imm)
583 (neon_bits_same_in_bytes, neon_squash_bits, neon_is_quarter_float)
584 (neon_qfloat_bits, neon_cmode_for_move_imm, neon_write_immbits)
585 (neon_invert_size, do_neon_logic, do_neon_bitfield, neon_dyadic)
586 (do_neon_dyadic_if_su, do_neon_dyadic_if_su_d, do_neon_dyadic_if_i)
587 (do_neon_dyadic_if_i_d, do_neon_addsub_if_i, neon_exchange_operands)
588 (neon_compare, do_neon_cmp, do_neon_cmp_inv, do_neon_ceq)
589 (neon_scalar_for_mul, neon_mul_mac, do_neon_mac_maybe_scalar)
590 (do_neon_tst, do_neon_mul, do_neon_qdmulh, do_neon_fcmp_absolute)
591 (do_neon_fcmp_absolute_inv, do_neon_step, do_neon_abs_neg)
592 (do_neon_sli, do_neon_sri, do_neon_qshlu_imm, do_neon_qmovn)
593 (do_neon_qmovun, do_neon_rshift_sat_narrow)
594 (do_neon_rshift_sat_narrow_u, do_neon_movn, do_neon_rshift_narrow)
595 (do_neon_shll, neon_cvt_flavour, do_neon_cvt, neon_move_immediate)
596 (do_neon_mvn, neon_mixed_length, do_neon_dyadic_long, do_neon_abal)
597 (neon_mac_reg_scalar_long, do_neon_mac_maybe_scalar_long)
598 (do_neon_dyadic_wide, do_neon_vmull, do_neon_ext, do_neon_rev)
599 (do_neon_dup, do_neon_mov, do_neon_rshift_round_imm, do_neon_movl)
600 (do_neon_trn, do_neon_zip_uzp, do_neon_sat_abs_neg)
601 (do_neon_pair_long, do_neon_recip_est, do_neon_cls, do_neon_clz)
602 (do_neon_cnt, do_neon_swp, do_neon_tbl_tbx, do_neon_ldm_stm)
603 (do_neon_ldr_str, do_neon_ld_st_interleave, neon_alignment_bit)
604 (do_neon_ld_st_lane, do_neon_ld_dup, do_neon_ldx_stx): New
605 functions. Neon bit encoding and encoding helpers.
606 (parse_neon_type): New function. Parse Neon type specifier.
607 (opcode_lookup): Allow parsing of Neon type specifiers.
608 (REGNUM2, REGSETH, REGSET2): New macros.
609 (reg_names): Add new VFPv3 and Neon registers.
610 (NUF, nUF, NCE, nCE): New macros for opcode table.
611 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
612 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd,
613 fmscd, fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd,
614 fmdrr, fmrrd. Add Neon instructions vaba, vhadd, vrhadd, vhsub,
615 vqadd, vqsub, vrshl, vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn,
616 veor, vbsl, vbit, vbif, vabd, vmax, vmin, vcge, vcgt, vclt, vcle,
617 vceq, vpmax, vpmin, vmla, vmls, vpadd, vadd, vsub, vtst, vmul,
618 vqdmulh, vqrdmulh, vacge, vacgt, vaclt, vacle, vrecps, vrsqrts,
619 vabs, vneg, v{r}shr, v{r}sra, vsli, vsri, vqshrn, vq{r}shr{u}n,
620 v{r}shrn, vshll, vcvt, vmov, vmvn, vabal, vabdl, vaddl, vsubl,
621 vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn, vqdmlal, vqdmlsl,
622 vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup, vmovl, v{q}movn,
623 vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe, vrsqrte, vcls,
624 vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr, vstr,
625 vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd], fto[us][lh][sd].
626 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
627 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
628 (arm_option_cpu_value): Add vfp3 and neon.
629 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes.
630 Fix VFPv1 attribute.
632 * gas/testsuite/gas/arm/copro.s: Avoid ldcl which encodes as a bad Neon
633 instruction.
634 * gas/testsuite/gas/arm/copro.d: Update accordingly.
635 * gas/testsuite/gas/arm/neon-cond.s: New test. Conditional Neon opcodes
636 in ARM mode.
637 * gas/testsuite/gas/arm/neon-cond.d: Expected results of above.
638 * gas/testsuite/gas/arm/neon-cov.s: New test. Coverage of Neon
639 instructions.
640 * gas/testsuite/gas/arm/neon-cov.d: Expected results of above.
641 * gas/testsuite/gas/arm/neon-ldst-es.s: New test. Element and structure
642 loads and stores.
643 * gas/testsuite/gas/arm/neon-ldst-es.d: Expected results of above.
644 * gas/testsuite/gas/arm/neon-ldst-rm.s: New test. Single and multiple
645 register loads and stores.
646 * gas/testsuite/gas/arm/neon-ldst-rm.d: Expected results of above.
647 * gas/testsuite/gas/arm/neon-omit.s: New test. Omission of optional
648 operands.
649 * gas/testsuite/gas/arm/neon-omit.d: Expected results of above.
650 * gas/testsuite/gas/arm/vfp1.d: Expect Neon syntax for some VFP
651 instructions.
652 * gas/testsuite/gas/arm/vfp1_t2.d: Likewise.
653 * gas/testsuite/gas/arm/vfp1xD.d: Likewise.
654 * gas/testsuite/gas/arm/vfp1xD_t2.d: Likewise.
655 * gas/testsuite/gas/arm/vfp2.d: Likewise.
656 * gas/testsuite/gas/arm/vfp2_t2.d: Likewise.
657 * gas/testsuite/gas/arm/vfp3-32drs.s: New test. Extended D register
658 range for VFP instructions.
659 * gas/testsuite/gas/arm/vfp3-32drs.d: Expected results of above.
660 * gas/testsuite/gas/arm/vfp3-const-conv.s: New test. VFPv3
661 constant-load and conversion instructions.
662 * gas/testsuite/gas/arm/vfp3-const-conv.d: Expected results of above.
664 * include/opcode/arm.h (FPU_VFP_EXT_V3): Define constant.
665 (FPU_NEON_EXT_V1): Likewise.
666 (FPU_VFP_HARD): Update.
667 (FPU_VFP_V3): Define macro.
668 (FPU_ARCH_VFP_V3, FPU_ARCH_VFP_V3_PLUS_NEON_V1): Define macros.
670 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k,
671 convert %<code>[zy] into %[zy]<code>. Expand meaning of
672 %<bitfield>['`?].
673 Add unified load/store instruction names.
674 (neon_opcode_table): New.
675 (arm_opcodes): Expand meaning of %<bitfield>['`?].
676 (arm_decode_bitfield): New.
677 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
678 Use arm_decode_bitfield and adjust numeric specifiers.
679 Adjust %z & %y.
680 (print_insn_neon): New.
681 (print_insn_arm): Adjust print_insn_coprocessor call. Call
682 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
683 (print_insn_thumb32): Likewise.
685 2005-04-01 Paul Brook <paul@codesourcery.com>
687 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
689 2006-03-30 Mark Mitchell <mark@codesourcery.com>
691 * libiberty/configure.ac: Add cygpath for mingw hosts.
692 * libiberty.configure: Rebuilt.
693 * libiberty/Makefile.in: Add cygpath.
694 * libiberty/cygpath.c: New.
696 2006-03-30 Jim Blandy <jimb@codesourcery.com>
698 * include/libiberty.h (pex_write_input): New declaration.
700 * libiberty/pex-common.c (pex_write_input): New function.
701 * libiberty/pexecute.txh (pex_write_input): Document it.
702 * libiberty/pex-common.h (struct pex_funcs): New function ptr fdopenw.
703 * libiberty/pex-unix.c (pex_unix_fdopenw): New function.
704 (funcs): List it as our fdopenw function.
705 * libiberty/pex-win32.c (pex_win32_fdopenw): New function.
706 (funcs): List it as our fdopenw function.
707 * libiberty/pex-djgpp.c (funcs): Leave fdopenw null.
708 * libiberty/pex-msdos (funcs): Same.
709 * libiberty/functions.texi: Regenerated.
711 * libiberty/pex-common.h (struct pex_obj): Doc fixes.
713 * libiberty/functions.texi: Regenerate.
715 2006-03-27 Mark Mitchell <mark@codesourcery.com>
717 * libiberty/pex-win32.c (pex_win32_exec_child): Close stdout/stderr
718 in parent.
720 2006-03-26 Nathan Sidwell <nathan@codesourcery.com>
722 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
723 cfloat/m68881 to correct architecture before using it.
725 2006-03-21 Paul Brook <paul@codesourcery.com>
727 * gas/config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
729 2006-03-21 Nathan Sidwell <nathan@codesourcery.com>
731 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
732 (m68k_ip): ... here. Use for all chips. Protect against buffer
733 overrun and avoid excessive copying.
735 * gcc/config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
736 m68020_control_regs, m68040_control_regs, m68060_control_regs,
737 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
738 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
739 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
740 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
741 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
742 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
743 mcf5282_ctrl, mcfv4e_ctrl): ... these.
744 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
745 (struct m68k_cpu): Change chip field to control_regs.
746 (current_chip): Remove.
747 (control_regs): New.
748 (m68k_archs, m68k_extensions): Adjust.
749 (m68k_cpus): Reorder to be in cpu number order. Adjust.
750 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
751 (find_cf_chip): Reimplement for new organization of cpu table.
752 (select_control_regs): Remove.
753 (mri_chip): Adjust.
754 (struct save_opts): Save control regs, not chip.
755 (s_save, s_restore): Adjust.
756 (m68k_lookup_cpu): Give deprecated warning when necessary.
757 (m68k_init_arch): Adjust.
758 (md_show_usage): Adjust for new cpu table organization.
759 * include/opcode/m68k.h (cpu_m68k, cpu_cf, cpu_m68000, cpu_m68008,
760 cpu_m68010, cpu_m68020, cpu_m68ec030, cpu_m68040, cpu_m68060,
761 cpu_m68851, cpu_m68881, cpu_m68882, cpu_cpu32, cpu_cf5200, cpu_cf5206e,
762 cpu_cf5208, cpu_cf521x, cpu_cf5213, cpu_cf5249, cpu_cf528x,
763 cpu_cf5307, cpu_cf5329, cpu_cf5407, cpu_cf547x, cpu_cf548x): Remove.
765 2006-03-20 Mark Mitchell <mark@codesourcery.com>
767 * libiberty/pex-win32.c (<errno.h>): Include.
768 (fix_argv): Remove.
769 (argv_to_cmdline): New function.
770 (std_suffixes): New variable.
771 (no_suffixes): Likewise.
772 (find_executable): New function.
773 (win32_spawn): Likewise.
774 (spawn_script): Use win32_spawn instead of _spawnv[p].
775 (pex_win32_exec_child): Replace MSVCRT calls with Win32 API calls.
776 (pex_win32_wait): Likewise.
778 2006-03-21 Richard Sandiford <richard@codesourcery.com>
780 * bfd/cpu-m68k.c (bfd_m68k_compatible): Treat ISA A+ and ISA B code as
781 incompatible. Likewise MAC and EMAC code.
782 * bfd/elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Use
783 bfd_get_compatible to set the new bfd architecture. Rely on it
784 to detect incompatibilities.
785 * gas/config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
786 mcfemac instead of mcfmac.
787 * ld/testsuite/ld-m68k/merge-error-1a.s,
788 * ld/testsuite/ld-m68k/merge-error-1b.s,
789 * ld/testsuite/ld-m68k/merge-error-1a.d,
790 * ld/testsuite/ld-m68k/merge-error-1b.d,
791 * ld/testsuite/ld-m68k/merge-error-1c.d,
792 * ld/testsuite/ld-m68k/merge-error-1d.d,
793 * ld/testsuite/ld-m68k/merge-error-1e.d,
794 * ld/testsuite/ld-m68k/merge-ok-1a.d,
795 * ld/testsuite/ld-m68k/merge-ok-1b.d: New tests.
796 * ld/testsuite/ld-m68k/m68k.exp: Run them.
798 2006-03-20 Paul Brook <paul@codesourcery.com>
800 * gas/config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
801 * gas/testsuite/gas/arm/thumb32.d: Correct expected output.
803 2006-03-20 Paul Brook <paul@codesourcery.com>
805 * gas/config/tc-arm.c (parse_operands): Set default error message.
807 2006-03-20 Paul Brook <paul@codesourcery.com>
809 * gas/config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
811 2006-03-20 Paul Brook <paul@codesourcery.com>
813 * gas/config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
815 * gas/testsuite/gas/arm/blx-local.d: New test.
816 * gas/testsuite/gas/arm/blx-local.d: New test.
818 2006-03-20 Paul Brook <paul@codesourcery.com>
820 * gas/config/tc-arm.c (THUMB2_LOAD_BIT): Define.
821 (move_or_literal_pool): Handle Thumb-2 instructions.
822 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
824 * gas/testsuite/gas/arm/thumb2_pool.d: New test.
825 * gas/testsuite/gas/arm/thumb2_pool.s: New test.