| blob | ca8e0a5ecfa98f50ee7e198d75454a7b195a4a0b |
1 2006-08-21 Joseph Myers <joseph@codesourcery.com>
3 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
4 merging with previous long opcode.
6 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
8 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
9 * Makefile.in: Regenerate.
10 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
11 renamed. Adjust.
13 2006-08-16 Julian Brown <julian@codesourcery.com>
15 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
16 to use ARM instructions on non-ARM-supporting cores.
17 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
18 mode automatically based on cpu variant.
19 (md_begin): Call above function.
21 2006-08-16 Julian Brown <julian@codesourcery.com>
23 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
24 recognized in non-unified syntax mode.
26 2006-08-15 Thiemo Seufer <ths@mips.com>
27 Nigel Stephens <nigel@mips.com>
28 David Ung <davidu@mips.com>
30 * configure.tgt: Handle mips*-sde-elf*.
32 2006-08-12 Thiemo Seufer <ths@networkno.de>
34 * config/tc-mips.c (mips16_ip): Fix argument register handling
35 for restore instruction.
37 2006-08-08 Bob Wilson <bob.wilson@acm.org>
39 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
40 (out_sleb128): New.
41 (out_fixed_inc_line_addr): New.
42 (process_entries): Use out_fixed_inc_line_addr when
43 DWARF2_USE_FIXED_ADVANCE_PC is set.
44 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
46 2006-08-08 DJ Delorie <dj@redhat.com>
48 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
49 vs full symbols so that we never have more than one pointer value
50 for any given symbol in our symbol table.
52 2006-08-08 Sterling Augustine <sterling@tensilica.com>
54 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
55 and emit DW_AT_ranges when code in compilation unit is not
56 contiguous.
57 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
58 is not contiguous.
59 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
60 (out_debug_ranges): New function to emit .debug_ranges section
61 when code is not contiguous.
63 2006-08-08 Nick Clifton <nickc@redhat.com>
65 * config/tc-arm.c (WARN_DEPRECATED): Enable.
67 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
69 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
70 only block.
71 (pe_directive_secrel) [TE_PE]: New function.
72 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
73 loc, loc_mark_labels.
74 [TE_PE]: Handle secrel32.
75 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
76 call.
77 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
78 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
79 (md_section_align): Only round section sizes here for AOUT
80 targets.
81 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
82 (tc_pe_dwarf2_emit_offset): New function.
83 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
84 (cons_fix_new_arm): Handle O_secrel.
85 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
86 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
87 of OBJ_ELF only block.
88 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
89 tc_pe_dwarf2_emit_offset.
91 2006-08-04 Richard Sandiford <richard@codesourcery.com>
93 * config/tc-sh.c (apply_full_field_fix): New function.
94 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
95 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
96 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
97 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
99 2006-08-03 Nick Clifton <nickc@redhat.com>
101 PR gas/2991
102 * config.in: Regenerate.
104 2006-08-03 Joseph Myers <joseph@codesourcery.com>
106 * config/tc-arm.c (parse_operands): Handle invalid register name
107 for OP_RIWR_RIWC.
109 2006-08-03 Joseph Myers <joseph@codesourcery.com>
111 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
112 (parse_operands): Handle it.
113 (insns): Use it for tmcr and tmrc.
115 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
117 PR binutils/2983
118 * config/tc-i386.c (md_parse_option): Treat any target starting
119 with elf64_x86_64 as a viable target for the -64 switch.
120 (i386_target_format): For 64-bit ELF flavoured output use
121 ELF_TARGET_FORMAT64.
122 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
124 2006-08-02 Nick Clifton <nickc@redhat.com>
126 PR gas/2991
127 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
128 bfd/aclocal.m4.
129 * configure.in: Run BFD_BINARY_FOPEN.
130 * configure: Regenerate.
131 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
132 file to include.
134 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
136 * config/tc-i386.c (md_assemble): Don't update
137 cpu_arch_isa_flags.
139 2006-08-01 Thiemo Seufer <ths@mips.com>
141 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
143 2006-08-01 Thiemo Seufer <ths@mips.com>
145 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
146 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
147 BFD_RELOC_32 and BFD_RELOC_16.
148 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
149 md_convert_frag, md_obj_end): Fix comment formatting.
151 2006-07-31 Thiemo Seufer <ths@mips.com>
153 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
154 handling for BFD_RELOC_MIPS16_JMP.
156 2006-07-24 Andreas Schwab <schwab@suse.de>
158 PR/2756
159 * read.c (read_a_source_file): Ignore unknown text after line
160 comment character. Fix misleading comment.
162 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
164 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
165 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
166 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
167 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
168 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
169 doc/c-z80.texi, doc/internals.texi: Fix some typos.
171 2006-07-21 Nick Clifton <nickc@redhat.com>
173 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
174 linker testsuite.
176 2006-07-20 Thiemo Seufer <ths@mips.com>
177 Nigel Stephens <nigel@mips.com>
179 * config/tc-mips.c (md_parse_option): Don't infer optimisation
180 options from debug options.
182 2006-07-20 Thiemo Seufer <ths@mips.com>
184 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
185 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
187 2006-07-19 Paul Brook <paul@codesourcery.com>
189 * config/tc-arm.c (insns): Fix rbit Arm opcode.
191 2006-07-18 Paul Brook <paul@codesourcery.com>
193 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
194 (md_convert_frag): Use correct reloc for add_pc. Use
195 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
196 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
197 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
199 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
201 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
202 when file and line unknown.
204 2006-07-17 Thiemo Seufer <ths@mips.com>
206 * read.c (s_struct): Use IS_ELF.
207 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
208 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
209 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
210 s_mips_mask): Likewise.
212 2006-07-16 Thiemo Seufer <ths@mips.com>
213 David Ung <davidu@mips.com>
215 * read.c (s_struct): Handle ELF section changing.
216 * config/tc-mips.c (s_align): Leave enabling auto-align to the
217 generic code.
218 (s_change_sec): Try section changing only if we output ELF.
220 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
222 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
223 CpuAmdFam10.
224 (smallest_imm_type): Remove Cpu086.
225 (i386_target_format): Likewise.
227 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
228 Update CpuXXX.
230 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
231 Michael Meissner <michael.meissner@amd.com>
233 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
234 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
235 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
236 architecture.
237 (i386_align_code): Ditto.
238 (md_assemble_code): Add support for insertq/extrq instructions,
239 swapping as needed for intel syntax.
240 (swap_imm_operands): New function to swap immediate operands.
241 (swap_operands): Deal with 4 operand instructions.
242 (build_modrm_byte): Add support for insertq instruction.
244 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
246 * config/tc-i386.h (Size64): Fix a typo in comment.
248 2006-07-12 Nick Clifton <nickc@redhat.com>
250 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
251 fixup_segment() to repeat a range check on a value that has
252 already been checked here.
254 2006-07-07 James E Wilson <wilson@specifix.com>
256 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
258 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
259 Nick Clifton <nickc@redhat.com>
261 PR binutils/2877
262 * doc/as.texi: Fix spelling typo: branchs => branches.
263 * doc/c-m68hc11.texi: Likewise.
264 * config/tc-m68hc11.c: Likewise.
265 Support old spelling of command line switch for backwards
266 compatibility.
268 2006-07-04 Thiemo Seufer <ths@mips.com>
269 David Ung <davidu@mips.com>
271 * config/tc-mips.c (s_is_linkonce): New function.
272 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
273 weak, external, and linkonce symbols.
274 (pic_need_relax): Use s_is_linkonce.
276 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
278 * doc/as.texinfo (Org): Remove space.
279 (P2align): Add "@var{abs-expr},".
281 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
283 * config/tc-i386.c (cpu_arch_tune_set): New.
284 (cpu_arch_isa): Likewise.
285 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
286 nops with short or long nop sequences based on -march=/.arch
287 and -mtune=.
288 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
289 set cpu_arch_tune and cpu_arch_tune_flags.
290 (md_parse_option): For -march=, set cpu_arch_isa and set
291 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
292 0. Set cpu_arch_tune_set to 1 for -mtune=.
293 (i386_target_format): Don't set cpu_arch_tune.
295 2006-06-23 Nigel Stephens <nigel@mips.com>
297 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
298 generated .sbss.* and .gnu.linkonce.sb.*.
300 2006-06-23 Thiemo Seufer <ths@mips.com>
301 David Ung <davidu@mips.com>
303 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
304 label_list.
305 * config/tc-mips.c (label_list): Define per-segment label_list.
306 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
307 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
308 mips_from_file_after_relocs, mips_define_label): Use per-segment
309 label_list.
311 2006-06-22 Thiemo Seufer <ths@mips.com>
313 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
314 (append_insn): Use it.
315 (md_apply_fix): Whitespace formatting.
316 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
317 mips16_extended_frag): Remove register specifier.
318 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
319 constants.
321 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
323 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
324 a directive saving VFP registers for ARMv6 or later.
325 (s_arm_unwind_save): Add parameter arch_v6 and call
326 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
327 appropriate.
328 (md_pseudo_table): Add entry for new "vsave" directive.
329 * doc/c-arm.texi: Correct error in example for "save"
330 directive (fstmdf -> fstmdx). Also document "vsave" directive.
332 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
333 Anatoly Sokolov <aesok@post.ru>
335 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
336 and atmega644p devices. Rename atmega164/atmega324 devices to
337 atmega164p/atmega324p.
338 * doc/c-avr.texi: Document new mcu and arch options.
340 2006-06-17 Nick Clifton <nickc@redhat.com>
342 * config/tc-arm.c (enum parse_operand_result): Move outside of
343 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
345 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
347 * config/tc-i386.h (processor_type): New.
348 (arch_entry): Add type.
350 * config/tc-i386.c (cpu_arch_tune): New.
351 (cpu_arch_tune_flags): Likewise.
352 (cpu_arch_isa_flags): Likewise.
353 (cpu_arch): Updated.
354 (set_cpu_arch): Also update cpu_arch_isa_flags.
355 (md_assemble): Update cpu_arch_isa_flags.
356 (OPTION_MARCH): New.
357 (OPTION_MTUNE): Likewise.
358 (md_longopts): Add -march= and -mtune=.
359 (md_parse_option): Support -march= and -mtune=.
360 (md_show_usage): Add -march=CPU/-mtune=CPU.
361 (i386_target_format): Also update cpu_arch_isa_flags,
362 cpu_arch_tune and cpu_arch_tune_flags.
364 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
366 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
368 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
370 * config/tc-arm.c (enum parse_operand_result): New.
371 (struct group_reloc_table_entry): New.
372 (enum group_reloc_type): New.
373 (group_reloc_table): New array.
374 (find_group_reloc_table_entry): New function.
375 (parse_shifter_operand_group_reloc): New function.
376 (parse_address_main): New function, incorporating code
377 from the old parse_address function. To be used via...
378 (parse_address): wrapper for parse_address_main; and
379 (parse_address_group_reloc): new function, likewise.
380 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
381 OP_ADDRGLDRS, OP_ADDRGLDC.
382 (parse_operands): Support for these new operand codes.
383 New macro po_misc_or_fail_no_backtrack.
384 (encode_arm_cp_address): Preserve group relocations.
385 (insns): Modify to use the above operand codes where group
386 relocations are permitted.
387 (md_apply_fix): Handle the group relocations
388 ALU_PC_G0_NC through LDC_SB_G2.
389 (tc_gen_reloc): Likewise.
390 (arm_force_relocation): Leave group relocations for the linker.
391 (arm_fix_adjustable): Likewise.
393 2006-06-15 Julian Brown <julian@codesourcery.com>
395 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
396 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
397 relocs properly.
399 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
401 * config/tc-i386.c (process_suffix): Don't add rex64 for
402 "xchg %rax,%rax".
404 2006-06-09 Thiemo Seufer <ths@mips.com>
406 * config/tc-mips.c (mips_ip): Maintain argument count.
408 2006-06-09 Alan Modra <amodra@bigpond.net.au>
410 * config/tc-iq2000.c: Include sb.h.
412 2006-06-08 Nigel Stephens <nigel@mips.com>
414 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
415 aliases for better compatibility with SGI tools.
417 2006-06-08 Alan Modra <amodra@bigpond.net.au>
419 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
420 * Makefile.am (GASLIBS): Expand @BFDLIB@.
421 (BFDVER_H): Delete.
422 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
423 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
424 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
425 Run "make dep-am".
426 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
427 * Makefile.in: Regenerate.
428 * doc/Makefile.in: Regenerate.
429 * configure: Regenerate.
431 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
433 * po/Make-in (pdf, ps): New dummy targets.
435 2006-06-07 Julian Brown <julian@codesourcery.com>
437 * config/tc-arm.c (stdarg.h): include.
438 (arm_it): Add uncond_value field. Add isvec and issingle to operand
439 array.
440 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
441 REG_TYPE_NSDQ (single, double or quad vector reg).
442 (reg_expected_msgs): Update.
443 (BAD_FPU): Add macro for unsupported FPU instruction error.
444 (parse_neon_type): Support 'd' as an alias for .f64.
445 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
446 sets of registers.
447 (parse_vfp_reg_list): Don't update first arg on error.
448 (parse_neon_mov): Support extra syntax for VFP moves.
449 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
450 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
451 (parse_operands): Support isvec, issingle operands fields, new parse
452 codes above.
453 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
454 msr variants.
455 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
456 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
457 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
458 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
459 shapes.
460 (neon_shape): Redefine in terms of above.
461 (neon_shape_class): New enumeration, table of shape classes.
462 (neon_shape_el): New enumeration. One element of a shape.
463 (neon_shape_el_size): Register widths of above, where appropriate.
464 (neon_shape_info): New struct. Info for shape table.
465 (neon_shape_tab): New array.
466 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
467 (neon_check_shape): Rewrite as...
468 (neon_select_shape): New function to classify instruction shapes,
469 driven by new table neon_shape_tab array.
470 (neon_quad): New function. Return 1 if shape should set Q flag in
471 instructions (or equivalent), 0 otherwise.
472 (type_chk_of_el_type): Support F64.
473 (el_type_of_type_chk): Likewise.
474 (neon_check_type): Add support for VFP type checking (VFP data
475 elements fill their containing registers).
476 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
477 in thumb mode for VFP instructions.
478 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
479 and encode the current instruction as if it were that opcode.
480 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
481 arguments, call function in PFN.
482 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
483 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
484 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
485 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
486 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
487 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
488 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
489 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
490 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
491 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
492 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
493 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
494 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
495 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
496 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
497 neon_quad.
498 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
499 between VFP and Neon turns out to belong to Neon. Perform
500 architecture check and fill in condition field if appropriate.
501 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
502 (do_neon_cvt): Add support for VFP variants of instructions.
503 (neon_cvt_flavour): Extend to cover VFP conversions.
504 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
505 vmov variants.
506 (do_neon_ldr_str): Handle single-precision VFP load/store.
507 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
508 NS_NULL not NS_IGNORE.
509 (opcode_tag): Add OT_csuffixF for operands which either take a
510 conditional suffix, or have 0xF in the condition field.
511 (md_assemble): Add support for OT_csuffixF.
512 (NCE): Replace macro with...
513 (NCE_tag, NCE, NCEF): New macros.
514 (nCE): Replace macro with...
515 (nCE_tag, nCE, nCEF): New macros.
516 (insns): Add support for VFP insns or VFP versions of insns msr,
517 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
518 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
519 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
520 VFP/Neon insns together.
522 2006-06-07 Alan Modra <amodra@bigpond.net.au>
523 Ladislav Michl <ladis@linux-mips.org>
525 * app.c: Don't include headers already included by as.h.
526 * as.c: Likewise.
527 * atof-generic.c: Likewise.
528 * cgen.c: Likewise.
529 * dwarf2dbg.c: Likewise.
530 * expr.c: Likewise.
531 * input-file.c: Likewise.
532 * input-scrub.c: Likewise.
533 * macro.c: Likewise.
534 * output-file.c: Likewise.
535 * read.c: Likewise.
536 * sb.c: Likewise.
537 * config/bfin-lex.l: Likewise.
538 * config/obj-coff.h: Likewise.
539 * config/obj-elf.h: Likewise.
540 * config/obj-som.h: Likewise.
541 * config/tc-arc.c: Likewise.
542 * config/tc-arm.c: Likewise.
543 * config/tc-avr.c: Likewise.
544 * config/tc-bfin.c: Likewise.
545 * config/tc-cris.c: Likewise.
546 * config/tc-d10v.c: Likewise.
547 * config/tc-d30v.c: Likewise.
548 * config/tc-dlx.h: Likewise.
549 * config/tc-fr30.c: Likewise.
550 * config/tc-frv.c: Likewise.
551 * config/tc-h8300.c: Likewise.
552 * config/tc-hppa.c: Likewise.
553 * config/tc-i370.c: Likewise.
554 * config/tc-i860.c: Likewise.
555 * config/tc-i960.c: Likewise.
556 * config/tc-ip2k.c: Likewise.
557 * config/tc-iq2000.c: Likewise.
558 * config/tc-m32c.c: Likewise.
559 * config/tc-m32r.c: Likewise.
560 * config/tc-maxq.c: Likewise.
561 * config/tc-mcore.c: Likewise.
562 * config/tc-mips.c: Likewise.
563 * config/tc-mmix.c: Likewise.
564 * config/tc-mn10200.c: Likewise.
565 * config/tc-mn10300.c: Likewise.
566 * config/tc-msp430.c: Likewise.
567 * config/tc-mt.c: Likewise.
568 * config/tc-ns32k.c: Likewise.
569 * config/tc-openrisc.c: Likewise.
570 * config/tc-ppc.c: Likewise.
571 * config/tc-s390.c: Likewise.
572 * config/tc-sh.c: Likewise.
573 * config/tc-sh64.c: Likewise.
574 * config/tc-sparc.c: Likewise.
575 * config/tc-tic30.c: Likewise.
576 * config/tc-tic4x.c: Likewise.
577 * config/tc-tic54x.c: Likewise.
578 * config/tc-v850.c: Likewise.
579 * config/tc-vax.c: Likewise.
580 * config/tc-xc16x.c: Likewise.
581 * config/tc-xstormy16.c: Likewise.
582 * config/tc-xtensa.c: Likewise.
583 * config/tc-z80.c: Likewise.
584 * config/tc-z8k.c: Likewise.
585 * macro.h: Don't include sb.h or ansidecl.h.
586 * sb.h: Don't include stdio.h or ansidecl.h.
587 * cond.c: Include sb.h.
588 * itbl-lex.l: Include as.h instead of other system headers.
589 * itbl-parse.y: Likewise.
590 * itbl-ops.c: Similarly.
591 * itbl-ops.h: Don't include as.h or ansidecl.h.
592 * config/bfin-defs.h: Don't include bfd.h or as.h.
593 * config/bfin-parse.y: Include as.h instead of other system headers.
595 2006-06-06 Ben Elliston <bje@au.ibm.com>
596 Anton Blanchard <anton@samba.org>
598 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
599 (md_show_usage): Document it.
600 (ppc_setup_opcodes): Test power6 opcode flag bits.
601 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
603 2006-06-06 Thiemo Seufer <ths@mips.com>
604 Chao-ying Fu <fu@mips.com>
606 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
607 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
608 (macro_build): Update comment.
609 (mips_ip): Allow DSP64 instructions for MIPS64R2.
610 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
611 CPU_HAS_MDMX.
612 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
613 MIPS_CPU_ASE_MDMX flags for sb1.
615 2006-06-05 Thiemo Seufer <ths@mips.com>
617 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
618 appropriate.
619 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
620 (mips_ip): Make overflowed/underflowed constant arguments in DSP
621 and MT instructions a fatal error. Use INSERT_OPERAND where
622 appropriate. Improve warnings for break and wait code overflows.
623 Use symbolic constant of OP_MASK_COPZ.
624 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
626 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
628 * po/Make-in (top_builddir): Define.
630 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
632 * doc/Makefile.am (TEXI2DVI): Define.
633 * doc/Makefile.in: Regenerate.
634 * doc/c-arc.texi: Fix typo.
636 2006-06-01 Alan Modra <amodra@bigpond.net.au>
638 * config/obj-ieee.c: Delete.
639 * config/obj-ieee.h: Delete.
640 * Makefile.am (OBJ_FORMATS): Remove ieee.
641 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
642 (obj-ieee.o): Remove rule.
643 * Makefile.in: Regenerate.
644 * configure.in (atof): Remove tahoe.
645 (OBJ_MAYBE_IEEE): Don't define.
646 * configure: Regenerate.
647 * config.in: Regenerate.
648 * doc/Makefile.in: Regenerate.
649 * po/POTFILES.in: Regenerate.
651 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
653 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
654 and LIBINTL_DEP everywhere.
655 (INTLLIBS): Remove.
656 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
657 * acinclude.m4: Include new gettext macros.
658 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
659 Remove local code for po/Makefile.
660 * Makefile.in, configure, doc/Makefile.in: Regenerated.
662 2006-05-30 Nick Clifton <nickc@redhat.com>
664 * po/es.po: Updated Spanish translation.
666 2006-05-06 Denis Chertykov <denisc@overta.ru>
668 * doc/c-avr.texi: New file.
669 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
670 * doc/all.texi: Set AVR
671 * doc/as.texinfo: Include c-avr.texi
673 2006-05-28 Jie Zhang <jie.zhang@analog.com>
675 * config/bfin-parse.y (check_macfunc): Loose the condition of
676 calling check_multiply_halfregs ().
678 2006-05-25 Jie Zhang <jie.zhang@analog.com>
680 * config/bfin-parse.y (asm_1): Better check and deal with
681 vector and scalar Multiply 16-Bit Operands instructions.
683 2006-05-24 Nick Clifton <nickc@redhat.com>
685 * config/tc-hppa.c: Convert to ISO C90 format.
686 * config/tc-hppa.h: Likewise.
688 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
689 Randolph Chung <randolph@tausq.org>
691 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
692 is_tls_ieoff, is_tls_leoff): Define.
693 (fix_new_hppa): Handle TLS.
694 (cons_fix_new_hppa): Likewise.
695 (pa_ip): Likewise.
696 (md_apply_fix): Handle TLS relocs.
697 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
699 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
701 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
703 2006-05-23 Thiemo Seufer <ths@mips.com>
704 David Ung <davidu@mips.com>
705 Nigel Stephens <nigel@mips.com>
707 [ gas/ChangeLog ]
708 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
709 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
710 ISA_HAS_MXHC1): New macros.
711 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
712 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
713 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
714 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
715 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
716 (mips_after_parse_args): Change default handling of float register
717 size to account for 32bit code with 64bit FP. Better sanity checking
718 of ISA/ASE/ABI option combinations.
719 (s_mipsset): Support switching of GPR and FPR sizes via
720 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
721 options.
722 (mips_elf_final_processing): We should record the use of 64bit FP
723 registers in 32bit code but we don't, because ELF header flags are
724 a scarce ressource.
725 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
726 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
727 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
728 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
729 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
730 missing -march options. Document .set arch=CPU. Move .set smartmips
731 to ASE page. Use @code for .set FOO examples.
733 2006-05-23 Jie Zhang <jie.zhang@analog.com>
735 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
736 if needed.
738 2006-05-23 Jie Zhang <jie.zhang@analog.com>
740 * config/bfin-defs.h (bfin_equals): Remove declaration.
741 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
742 * config/tc-bfin.c (bfin_name_is_register): Remove.
743 (bfin_equals): Remove.
744 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
745 (bfin_name_is_register): Remove declaration.
747 2006-05-19 Thiemo Seufer <ths@mips.com>
748 Nigel Stephens <nigel@mips.com>
750 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
751 (mips_oddfpreg_ok): New function.
752 (mips_ip): Use it.
754 2006-05-19 Thiemo Seufer <ths@mips.com>
755 David Ung <davidu@mips.com>
757 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
758 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
759 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
760 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
761 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
762 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
763 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
764 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
765 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
766 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
767 reg_names_o32, reg_names_n32n64): Define register classes.
768 (reg_lookup): New function, use register classes.
769 (md_begin): Reserve register names in the symbol table. Simplify
770 OBJ_ELF defines.
771 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
772 Use reg_lookup.
773 (mips16_ip): Use reg_lookup.
774 (tc_get_register): Likewise.
775 (tc_mips_regname_to_dw2regnum): New function.
777 2006-05-19 Thiemo Seufer <ths@mips.com>
779 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
780 Un-constify string argument.
781 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
782 Likewise.
783 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
784 Likewise.
785 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
786 Likewise.
787 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
788 Likewise.
789 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
790 Likewise.
791 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
792 Likewise.
794 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
796 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
797 cfloat/m68881 to correct architecture before using it.
799 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
801 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
802 constant values.
804 2006-05-15 Paul Brook <paul@codesourcery.com>
806 * config/tc-arm.c (arm_adjust_symtab): Use
807 bfd_is_arm_special_symbol_name.
809 2006-05-15 Bob Wilson <bob.wilson@acm.org>
811 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
812 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
813 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
814 Handle errors from calls to xtensa_opcode_is_* functions.
816 2006-05-14 Thiemo Seufer <ths@mips.com>
818 * config/tc-mips.c (macro_build): Test for currently active
819 mips16 option.
820 (mips16_ip): Reject invalid opcodes.
822 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
824 * doc/as.texinfo: Rename "Index" to "AS Index",
825 and "ABORT" to "ABORT (COFF)".
827 2006-05-11 Paul Brook <paul@codesourcery.com>
829 * config/tc-arm.c (parse_half): New function.
830 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
831 (parse_operands): Ditto.
832 (do_mov16): Reject invalid relocations.
833 (do_t_mov16): Ditto. Use Thumb reloc numbers.
834 (insns): Replace Iffff with HALF.
835 (md_apply_fix): Add MOVW and MOVT relocs.
836 (tc_gen_reloc): Ditto.
837 * doc/c-arm.texi: Document relocation operators
839 2006-05-11 Paul Brook <paul@codesourcery.com>
841 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
843 2006-05-11 Thiemo Seufer <ths@mips.com>
845 * config/tc-mips.c (append_insn): Don't check the range of j or
846 jal addresses.
848 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
850 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
851 relocs against external symbols for WinCE targets.
852 (md_apply_fix): Likewise.
854 2006-05-09 David Ung <davidu@mips.com>
856 * config/tc-mips.c (append_insn): Only warn about an out-of-range
857 j or jal address.
859 2006-05-09 Nick Clifton <nickc@redhat.com>
861 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
862 against symbols which are not going to be placed into the symbol
863 table.
865 2006-05-09 Ben Elliston <bje@au.ibm.com>
867 * expr.c (operand): Remove `if (0 && ..)' statement and
868 subsequently unused target_op label. Collapse `if (1 || ..)'
869 statement.
870 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
871 separately above the switch.
873 2006-05-08 Nick Clifton <nickc@redhat.com>
875 PR gas/2623
876 * config/tc-msp430.c (line_separator_character): Define as |.
878 2006-05-08 Thiemo Seufer <ths@mips.com>
879 Nigel Stephens <nigel@mips.com>
880 David Ung <davidu@mips.com>
882 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
883 (mips_opts): Likewise.
884 (file_ase_smartmips): New variable.
885 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
886 (macro_build): Handle SmartMIPS instructions.
887 (mips_ip): Likewise.
888 (md_longopts): Add argument handling for smartmips.
889 (md_parse_options, mips_after_parse_args): Likewise.
890 (s_mipsset): Add .set smartmips support.
891 (md_show_usage): Document -msmartmips/-mno-smartmips.
892 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
893 .set smartmips.
894 * doc/c-mips.texi: Likewise.
896 2006-05-08 Alan Modra <amodra@bigpond.net.au>
898 * write.c (relax_segment): Add pass count arg. Don't error on
899 negative org/space on first two passes.
900 (relax_seg_info): New struct.
901 (relax_seg, write_object_file): Adjust.
902 * write.h (relax_segment): Update prototype.
904 2006-05-05 Julian Brown <julian@codesourcery.com>
906 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
907 checking.
908 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
909 architecture version checks.
910 (insns): Allow overlapping instructions to be used in VFP mode.
912 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
914 PR gas/2598
915 * config/obj-elf.c (obj_elf_change_section): Allow user
916 specified SHF_ALPHA_GPREL.
918 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
920 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
921 for PMEM related expressions.
923 2006-05-05 Nick Clifton <nickc@redhat.com>
925 PR gas/2582
926 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
927 insertion of a directory separator character into a string at a
928 given offset. Uses heuristics to decide when to use a backslash
929 character rather than a forward-slash character.
930 (dwarf2_directive_loc): Use the macro.
931 (out_debug_info): Likewise.
933 2006-05-05 Thiemo Seufer <ths@mips.com>
934 David Ung <davidu@mips.com>
936 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
937 instruction.
938 (macro): Add new case M_CACHE_AB.
940 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
942 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
943 (opcode_lookup): Issue a warning for opcode with
944 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
945 identical to OT_cinfix3.
946 (TxC3w, TC3w, tC3w): New.
947 (insns): Use tC3w and TC3w for comparison instructions with
948 's' suffix.
950 2006-05-04 Alan Modra <amodra@bigpond.net.au>
952 * subsegs.h (struct frchain): Delete frch_seg.
953 (frchain_root): Delete.
954 (seg_info): Define as macro.
955 * subsegs.c (frchain_root): Delete.
956 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
957 (subsegs_begin, subseg_change): Adjust for above.
958 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
959 rather than to one big list.
960 (subseg_get): Don't special case abs, und sections.
961 (subseg_new, subseg_force_new): Don't set frchainP here.
962 (seg_info): Delete.
963 (subsegs_print_statistics): Adjust frag chain control list traversal.
964 * debug.c (dmp_frags): Likewise.
965 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
966 at frchain_root. Make use of known frchain ordering.
967 (last_frag_for_seg): Likewise.
968 (get_frag_fix): Likewise. Add seg param.
969 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
970 * write.c (chain_frchains_together_1): Adjust for struct frchain.
971 (SUB_SEGMENT_ALIGN): Likewise.
972 (subsegs_finish): Adjust frchain list traversal.
973 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
974 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
975 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
976 (xtensa_fix_b_j_loop_end_frags): Likewise.
977 (xtensa_fix_close_loop_end_frags): Likewise.
978 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
979 (retrieve_segment_info): Delete frch_seg initialisation.
981 2006-05-03 Alan Modra <amodra@bigpond.net.au>
983 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
984 * config/obj-elf.h (obj_sec_set_private_data): Delete.
985 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
986 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
988 2006-05-02 Joseph Myers <joseph@codesourcery.com>
990 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
991 here.
992 (md_apply_fix3): Multiply offset by 4 here for
993 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
995 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
996 Jan Beulich <jbeulich@novell.com>
998 * config/tc-i386.c (output_invalid_buf): Change size for
999 unsigned char.
1000 * config/tc-tic30.c (output_invalid_buf): Likewise.
1002 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1003 unsigned char.
1004 * config/tc-tic30.c (output_invalid): Likewise.
1006 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1008 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1009 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1010 (asconfig.texi): Don't set top_srcdir.
1011 * doc/as.texinfo: Don't use top_srcdir.
1012 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1014 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1016 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1017 * config/tc-tic30.c (output_invalid_buf): Likewise.
1019 * config/tc-i386.c (output_invalid): Use snprintf instead of
1020 sprintf.
1021 * config/tc-ia64.c (declare_register_set): Likewise.
1022 (emit_one_bundle): Likewise.
1023 (check_dependencies): Likewise.
1024 * config/tc-tic30.c (output_invalid): Likewise.
1026 2006-05-02 Paul Brook <paul@codesourcery.com>
1028 * config/tc-arm.c (arm_optimize_expr): New function.
1029 * config/tc-arm.h (md_optimize_expr): Define
1030 (arm_optimize_expr): Add prototype.
1031 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1033 2006-05-02 Ben Elliston <bje@au.ibm.com>
1035 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1036 field unsigned.
1038 * sb.h (sb_list_vector): Move to sb.c.
1039 * sb.c (free_list): Use type of sb_list_vector directly.
1040 (sb_build): Fix off-by-one error in assertion about `size'.
1042 2006-05-01 Ben Elliston <bje@au.ibm.com>
1044 * listing.c (listing_listing): Remove useless loop.
1045 * macro.c (macro_expand): Remove is_positional local variable.
1046 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1047 and simplify surrounding expressions, where possible.
1048 (assign_symbol): Likewise.
1049 (s_weakref): Likewise.
1050 * symbols.c (colon): Likewise.
1052 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1054 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1056 2006-04-30 Thiemo Seufer <ths@mips.com>
1057 David Ung <davidu@mips.com>
1059 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1060 (mips_immed): New table that records various handling of udi
1061 instruction patterns.
1062 (mips_ip): Adds udi handling.
1064 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1066 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1067 of list rather than beginning.
1069 2006-04-26 Julian Brown <julian@codesourcery.com>
1071 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1072 (is_quarter_float): Rename from above. Simplify slightly.
1073 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1074 number.
1075 (parse_neon_mov): Parse floating-point constants.
1076 (neon_qfloat_bits): Fix encoding.
1077 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1078 preference to integer encoding when using the F32 type.
1080 2006-04-26 Julian Brown <julian@codesourcery.com>
1082 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1083 zero-initialising structures containing it will lead to invalid types).
1084 (arm_it): Add vectype to each operand.
1085 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1086 defined field.
1087 (neon_typed_alias): New structure. Extra information for typed
1088 register aliases.
1089 (reg_entry): Add neon type info field.
1090 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1091 Break out alternative syntax for coprocessor registers, etc. into...
1092 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1093 out from arm_reg_parse.
1094 (parse_neon_type): Move. Return SUCCESS/FAIL.
1095 (first_error): New function. Call to ensure first error which occurs is
1096 reported.
1097 (parse_neon_operand_type): Parse exactly one type.
1098 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1099 (parse_typed_reg_or_scalar): New function. Handle core of both
1100 arm_typed_reg_parse and parse_scalar.
1101 (arm_typed_reg_parse): Parse a register with an optional type.
1102 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1103 result.
1104 (parse_scalar): Parse a Neon scalar with optional type.
1105 (parse_reg_list): Use first_error.
1106 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1107 (neon_alias_types_same): New function. Return true if two (alias) types
1108 are the same.
1109 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1110 of elements.
1111 (insert_reg_alias): Return new reg_entry not void.
1112 (insert_neon_reg_alias): New function. Insert type/index information as
1113 well as register for alias.
1114 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1115 make typed register aliases accordingly.
1116 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1117 of line.
1118 (s_unreq): Delete type information if present.
1119 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1120 (s_arm_unwind_save_mmxwcg): Likewise.
1121 (s_arm_unwind_movsp): Likewise.
1122 (s_arm_unwind_setfp): Likewise.
1123 (parse_shift): Likewise.
1124 (parse_shifter_operand): Likewise.
1125 (parse_address): Likewise.
1126 (parse_tb): Likewise.
1127 (tc_arm_regname_to_dw2regnum): Likewise.
1128 (md_pseudo_table): Add dn, qn.
1129 (parse_neon_mov): Handle typed operands.
1130 (parse_operands): Likewise.
1131 (neon_type_mask): Add N_SIZ.
1132 (N_ALLMODS): New macro.
1133 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1134 (el_type_of_type_chk): Add some safeguards.
1135 (modify_types_allowed): Fix logic bug.
1136 (neon_check_type): Handle operands with types.
1137 (neon_three_same): Remove redundant optional arg handling.
1138 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1139 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1140 (do_neon_step): Adjust accordingly.
1141 (neon_cmode_for_logic_imm): Use first_error.
1142 (do_neon_bitfield): Call neon_check_type.
1143 (neon_dyadic): Rename to...
1144 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1145 to allow modification of type of the destination.
1146 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1147 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1148 (do_neon_compare): Make destination be an untyped bitfield.
1149 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1150 (neon_mul_mac): Return early in case of errors.
1151 (neon_move_immediate): Use first_error.
1152 (neon_mac_reg_scalar_long): Fix type to include scalar.
1153 (do_neon_dup): Likewise.
1154 (do_neon_mov): Likewise (in several places).
1155 (do_neon_tbl_tbx): Fix type.
1156 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1157 (do_neon_ld_dup): Exit early in case of errors and/or use
1158 first_error.
1159 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1160 Handle .dn/.qn directives.
1161 (REGDEF): Add zero for reg_entry neon field.
1163 2006-04-26 Julian Brown <julian@codesourcery.com>
1165 * config/tc-arm.c (limits.h): Include.
1166 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1167 (fpu_vfp_v3_or_neon_ext): Declare constants.
1168 (neon_el_type): New enumeration of types for Neon vector elements.
1169 (neon_type_el): New struct. Define type and size of a vector element.
1170 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1171 instruction.
1172 (neon_type): Define struct. The type of an instruction.
1173 (arm_it): Add 'vectype' for the current instruction.
1174 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1175 (vfp_sp_reg_pos): Rename to...
1176 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1177 tags.
1178 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1179 (Neon D or Q register).
1180 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1181 register.
1182 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1183 (my_get_expression): Allow above constant as argument to accept
1184 64-bit constants with optional prefix.
1185 (arm_reg_parse): Add extra argument to return the specific type of
1186 register in when either a D or Q register (REG_TYPE_NDQ) is
1187 requested. Can be NULL.
1188 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1189 (parse_reg_list): Update for new arm_reg_parse args.
1190 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1191 (parse_neon_el_struct_list): New function. Parse element/structure
1192 register lists for VLD<n>/VST<n> instructions.
1193 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1194 (s_arm_unwind_save_mmxwr): Likewise.
1195 (s_arm_unwind_save_mmxwcg): Likewise.
1196 (s_arm_unwind_movsp): Likewise.
1197 (s_arm_unwind_setfp): Likewise.
1198 (parse_big_immediate): New function. Parse an immediate, which may be
1199 64 bits wide. Put results in inst.operands[i].
1200 (parse_shift): Update for new arm_reg_parse args.
1201 (parse_address): Likewise. Add parsing of alignment specifiers.
1202 (parse_neon_mov): Parse the operands of a VMOV instruction.
1203 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1204 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1205 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1206 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1207 (parse_operands): Handle new codes above.
1208 (encode_arm_vfp_sp_reg): Rename to...
1209 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1210 selected VFP version only supports D0-D15.
1211 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1212 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1213 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1214 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1215 encode_arm_vfp_reg name, and allow 32 D regs.
1216 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1217 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1218 regs.
1219 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1220 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1221 constant-load and conversion insns introduced with VFPv3.
1222 (neon_tab_entry): New struct.
1223 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1224 those which are the targets of pseudo-instructions.
1225 (neon_opc): Enumerate opcodes, use as indices into...
1226 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1227 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1228 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1229 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1230 neon_enc_tab.
1231 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1232 Neon instructions.
1233 (neon_type_mask): New. Compact type representation for type checking.
1234 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1235 permitted type combinations.
1236 (N_IGNORE_TYPE): New macro.
1237 (neon_check_shape): New function. Check an instruction shape for
1238 multiple alternatives. Return the specific shape for the current
1239 instruction.
1240 (neon_modify_type_size): New function. Modify a vector type and size,
1241 depending on the bit mask in argument 1.
1242 (neon_type_promote): New function. Convert a given "key" type (of an
1243 operand) into the correct type for a different operand, based on a bit
1244 mask.
1245 (type_chk_of_el_type): New function. Convert a type and size into the
1246 compact representation used for type checking.
1247 (el_type_of_type_ckh): New function. Reverse of above (only when a
1248 single bit is set in the bit mask).
1249 (modify_types_allowed): New function. Alter a mask of allowed types
1250 based on a bit mask of modifications.
1251 (neon_check_type): New function. Check the type of the current
1252 instruction against the variable argument list. The "key" type of the
1253 instruction is returned.
1254 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1255 a Neon data-processing instruction depending on whether we're in ARM
1256 mode or Thumb-2 mode.
1257 (neon_logbits): New function.
1258 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1259 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1260 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1261 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1262 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1263 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1264 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1265 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1266 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1267 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1268 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1269 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1270 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1271 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1272 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1273 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1274 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1275 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1276 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1277 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1278 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1279 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1280 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1281 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1282 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1283 helpers.
1284 (parse_neon_type): New function. Parse Neon type specifier.
1285 (opcode_lookup): Allow parsing of Neon type specifiers.
1286 (REGNUM2, REGSETH, REGSET2): New macros.
1287 (reg_names): Add new VFPv3 and Neon registers.
1288 (NUF, nUF, NCE, nCE): New macros for opcode table.
1289 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1290 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1291 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1292 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1293 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1294 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1295 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1296 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1297 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1298 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1299 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1300 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1301 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1302 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1303 fto[us][lh][sd].
1304 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1305 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1306 (arm_option_cpu_value): Add vfp3 and neon.
1307 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1308 VFPv1 attribute.
1310 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1312 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1313 syntax instead of hardcoded opcodes with ".w18" suffixes.
1314 (wide_branch_opcode): New.
1315 (build_transition): Use it to check for wide branch opcodes with
1316 either ".w18" or ".w15" suffixes.
1318 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1320 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1321 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1322 frag's is_literal flag.
1324 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1326 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1328 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1330 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1331 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1332 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1333 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1334 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1336 2005-04-20 Paul Brook <paul@codesourcery.com>
1338 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1339 all targets.
1340 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1342 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1344 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1345 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1346 Make some cpus unsupported on ELF. Run "make dep-am".
1347 * Makefile.in: Regenerate.
1349 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1351 * configure.in (--enable-targets): Indent help message.
1352 * configure: Regenerate.
1354 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1356 PR gas/2533
1357 * config/tc-i386.c (i386_immediate): Check illegal immediate
1358 register operand.
1360 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1362 * config/tc-i386.c: Formatting.
1363 (output_disp, output_imm): ISO C90 params.
1365 * frags.c (frag_offset_fixed_p): Constify args.
1366 * frags.h (frag_offset_fixed_p): Ditto.
1368 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1369 (COFF_MAGIC): Delete.
1371 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1373 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1375 * po/POTFILES.in: Regenerated.
1377 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1379 * doc/as.texinfo: Mention that some .type syntaxes are not
1380 supported on all architectures.
1382 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1384 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1385 instructions when such transformations have been disabled.
1387 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1389 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1390 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1391 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1392 decoding the loop instructions. Remove current_offset variable.
1393 (xtensa_fix_short_loop_frags): Likewise.
1394 (min_bytes_to_other_loop_end): Remove current_offset argument.
1396 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1398 * config/tc-z80.c (z80_optimize_expr): Removed.
1399 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1401 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1403 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1404 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1405 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1406 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1407 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1408 at90can64, at90usb646, at90usb647, at90usb1286 and
1409 at90usb1287.
1410 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1412 2006-04-07 Paul Brook <paul@codesourcery.com>
1414 * config/tc-arm.c (parse_operands): Set default error message.
1416 2006-04-07 Paul Brook <paul@codesourcery.com>
1418 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1420 2006-04-07 Paul Brook <paul@codesourcery.com>
1422 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1424 2006-04-07 Paul Brook <paul@codesourcery.com>
1426 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1427 (move_or_literal_pool): Handle Thumb-2 instructions.
1428 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1430 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1432 PR 2512.
1433 * config/tc-i386.c (match_template): Move 64-bit operand tests
1434 inside loop.
1436 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1438 * po/Make-in: Add install-html target.
1439 * Makefile.am: Add install-html and install-html-recursive targets.
1440 * Makefile.in: Regenerate.
1441 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1442 * configure: Regenerate.
1443 * doc/Makefile.am: Add install-html and install-html-am targets.
1444 * doc/Makefile.in: Regenerate.
1446 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1448 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1449 second scan.
1451 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1452 Daniel Jacobowitz <dan@codesourcery.com>
1454 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1455 (GOTT_BASE, GOTT_INDEX): New.
1456 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1457 GOTT_INDEX when generating VxWorks PIC.
1458 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1459 use the generic *-*-vxworks* stanza instead.
1461 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1463 PR 997
1464 * frags.c (frag_offset_fixed_p): New function.
1465 * frags.h (frag_offset_fixed_p): Declare.
1466 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1467 (resolve_expression): Likewise.
1469 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1471 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1472 of the same length but different numbers of slots.
1474 2006-03-30 Andreas Schwab <schwab@suse.de>
1476 * configure.in: Fix help string for --enable-targets option.
1477 * configure: Regenerate.
1479 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1481 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1482 (m68k_ip): ... here. Use for all chips. Protect against buffer
1483 overrun and avoid excessive copying.
1485 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1486 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1487 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1488 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1489 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1490 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1491 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1492 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1493 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1494 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1495 (struct m68k_cpu): Change chip field to control_regs.
1496 (current_chip): Remove.
1497 (control_regs): New.
1498 (m68k_archs, m68k_extensions): Adjust.
1499 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1500 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1501 (find_cf_chip): Reimplement for new organization of cpu table.
1502 (select_control_regs): Remove.
1503 (mri_chip): Adjust.
1504 (struct save_opts): Save control regs, not chip.
1505 (s_save, s_restore): Adjust.
1506 (m68k_lookup_cpu): Give deprecated warning when necessary.
1507 (m68k_init_arch): Adjust.
1508 (md_show_usage): Adjust for new cpu table organization.
1510 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1512 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1513 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1514 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1515 "elf/bfin.h".
1516 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1517 (any_gotrel): New rule.
1518 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1519 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1520 "elf/bfin.h".
1521 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1522 (bfin_pic_ptr): New function.
1523 (md_pseudo_table): Add it for ".picptr".
1524 (OPTION_FDPIC): New macro.
1525 (md_longopts): Add -mfdpic.
1526 (md_parse_option): Handle it.
1527 (md_begin): Set BFD flags.
1528 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1529 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1530 us for GOT relocs.
1531 * Makefile.am (bfin-parse.o): Update dependencies.
1532 (DEPTC_bfin_elf): Likewise.
1533 * Makefile.in: Regenerate.
1535 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1537 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1538 mcfemac instead of mcfmac.
1540 2006-03-23 Michael Matz <matz@suse.de>
1542 * config/tc-i386.c (type_names): Correct placement of 'static'.
1543 (reloc): Map some more relocs to their 64 bit counterpart when
1544 size is 8.
1545 (output_insn): Work around breakage if DEBUG386 is defined.
1546 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1547 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1548 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1549 different from i386.
1550 (output_imm): Ditto.
1551 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1552 Imm64.
1553 (md_convert_frag): Jumps can now be larger than 2GB away, error
1554 out in that case.
1555 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1556 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1558 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1559 Daniel Jacobowitz <dan@codesourcery.com>
1560 Phil Edwards <phil@codesourcery.com>
1561 Zack Weinberg <zack@codesourcery.com>
1562 Mark Mitchell <mark@codesourcery.com>
1563 Nathan Sidwell <nathan@codesourcery.com>
1565 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1566 (md_begin): Complain about -G being used for PIC. Don't change
1567 the text, data and bss alignments on VxWorks.
1568 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1569 generating VxWorks PIC.
1570 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1571 (macro): Likewise, but do not treat la $25 specially for
1572 VxWorks PIC, and do not handle jal.
1573 (OPTION_MVXWORKS_PIC): New macro.
1574 (md_longopts): Add -mvxworks-pic.
1575 (md_parse_option): Don't complain about using PIC and -G together here.
1576 Handle OPTION_MVXWORKS_PIC.
1577 (md_estimate_size_before_relax): Always use the first relaxation
1578 sequence on VxWorks.
1579 * config/tc-mips.h (VXWORKS_PIC): New.
1581 2006-03-21 Paul Brook <paul@codesourcery.com>
1583 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1585 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1587 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1588 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1589 (get_loop_align_size): New.
1590 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1591 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1592 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1593 (get_noop_aligned_address): Use get_loop_align_size.
1594 (get_aligned_diff): Likewise.
1596 2006-03-21 Paul Brook <paul@codesourcery.com>
1598 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1600 2006-03-20 Paul Brook <paul@codesourcery.com>
1602 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1603 (do_t_branch): Encode branches inside IT blocks as unconditional.
1604 (do_t_cps): New function.
1605 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1606 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1607 (opcode_lookup): Allow conditional suffixes on all instructions in
1608 Thumb mode.
1609 (md_assemble): Advance condexec state before checking for errors.
1610 (insns): Use do_t_cps.
1612 2006-03-20 Paul Brook <paul@codesourcery.com>
1614 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1615 outputting the insn.
1617 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1619 * config/tc-vax.c: Update copyright year.
1620 * config/tc-vax.h: Likewise.
1622 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1624 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1625 make it static.
1626 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1628 2006-03-17 Paul Brook <paul@codesourcery.com>
1630 * config/tc-arm.c (insns): Add ldm and stm.
1632 2006-03-17 Ben Elliston <bje@au.ibm.com>
1634 PR gas/2446
1635 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1637 2006-03-16 Paul Brook <paul@codesourcery.com>
1639 * config/tc-arm.c (insns): Add "svc".
1641 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1643 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1644 flag and avoid double underscore prefixes.
1646 2006-03-10 Paul Brook <paul@codesourcery.com>
1648 * config/tc-arm.c (md_begin): Handle EABIv5.
1649 (arm_eabis): Add EF_ARM_EABI_VER5.
1650 * doc/c-arm.texi: Document -meabi=5.
1652 2006-03-10 Ben Elliston <bje@au.ibm.com>
1654 * app.c (do_scrub_chars): Simplify string handling.
1656 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1657 Daniel Jacobowitz <dan@codesourcery.com>
1658 Zack Weinberg <zack@codesourcery.com>
1659 Nathan Sidwell <nathan@codesourcery.com>
1660 Paul Brook <paul@codesourcery.com>
1661 Ricardo Anguiano <anguiano@codesourcery.com>
1662 Phil Edwards <phil@codesourcery.com>
1664 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1665 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1666 R_ARM_ABS12 reloc.
1667 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1668 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1669 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1671 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1673 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1674 even when using the text-section-literals option.
1676 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1678 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1679 and cf.
1680 (m68k_ip): <case 'J'> Check we have some control regs.
1681 (md_parse_option): Allow raw arch switch.
1682 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1683 whether 68881 or cfloat was meant by -mfloat.
1684 (md_show_usage): Adjust extension display.
1685 (m68k_elf_final_processing): Adjust.
1687 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1689 * config/tc-avr.c (avr_mod_hash_value): New function.
1690 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1691 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1692 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1693 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1694 of (int).
1695 (tc_gen_reloc): Handle substractions of symbols, if possible do
1696 fixups, abort otherwise.
1697 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1698 tc_fix_adjustable): Define.
1700 2006-03-02 James E Wilson <wilson@specifix.com>
1702 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1703 change the template, then clear md.slot[curr].end_of_insn_group.
1705 2006-02-28 Jan Beulich <jbeulich@novell.com>
1707 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1709 2006-02-28 Jan Beulich <jbeulich@novell.com>
1711 PR/1070
1712 * macro.c (getstring): Don't treat parentheses special anymore.
1713 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1714 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1715 characters.
1717 2006-02-28 Mat <mat@csail.mit.edu>
1719 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1721 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1723 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1724 field.
1725 (CFI_signal_frame): Define.
1726 (cfi_pseudo_table): Add .cfi_signal_frame.
1727 (dot_cfi): Handle CFI_signal_frame.
1728 (output_cie): Handle cie->signal_frame.
1729 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1730 different. Copy signal_frame from FDE to newly created CIE.
1731 * doc/as.texinfo: Document .cfi_signal_frame.
1733 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1735 * doc/Makefile.am: Add html target.
1736 * doc/Makefile.in: Regenerate.
1737 * po/Make-in: Add html target.
1739 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1741 * config/tc-i386.c (output_insn): Support Intel Merom New
1742 Instructions.
1744 * config/tc-i386.h (CpuMNI): New.
1745 (CpuUnknownFlags): Add CpuMNI.
1747 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1749 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1750 (hpriv_reg_table): New table for hyperprivileged registers.
1751 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1752 register encoding.
1754 2006-02-24 DJ Delorie <dj@redhat.com>
1756 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1757 (tc_gen_reloc): Don't define.
1758 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1759 (OPTION_LINKRELAX): New.
1760 (md_longopts): Add it.
1761 (m32c_relax): New.
1762 (md_parse_options): Set it.
1763 (md_assemble): Emit relaxation relocs as needed.
1764 (md_convert_frag): Emit relaxation relocs as needed.
1765 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1766 (m32c_apply_fix): New.
1767 (tc_gen_reloc): New.
1768 (m32c_force_relocation): Force out jump relocs when relaxing.
1769 (m32c_fix_adjustable): Return false if relaxing.
1771 2006-02-24 Paul Brook <paul@codesourcery.com>
1773 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1774 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1775 (struct asm_barrier_opt): Define.
1776 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1777 (parse_psr): Accept V7M psr names.
1778 (parse_barrier): New function.
1779 (enum operand_parse_code): Add OP_oBARRIER.
1780 (parse_operands): Implement OP_oBARRIER.
1781 (do_barrier): New function.
1782 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1783 (do_t_cpsi): Add V7M restrictions.
1784 (do_t_mrs, do_t_msr): Validate V7M variants.
1785 (md_assemble): Check for NULL variants.
1786 (v7m_psrs, barrier_opt_names): New tables.
1787 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1788 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1789 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1790 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1791 (struct cpu_arch_ver_table): Define.
1792 (cpu_arch_ver): New.
1793 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1794 Tag_CPU_arch_profile.
1795 * doc/c-arm.texi: Document new cpu and arch options.
1797 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1799 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1801 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1803 * config/tc-ia64.c: Update copyright years.
1805 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1807 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1808 SDM 2.2.
1810 2005-02-22 Paul Brook <paul@codesourcery.com>
1812 * config/tc-arm.c (do_pld): Remove incorrect write to
1813 inst.instruction.
1814 (encode_thumb32_addr_mode): Use correct operand.
1816 2006-02-21 Paul Brook <paul@codesourcery.com>
1818 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1820 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1821 Anil Paranjape <anilp1@kpitcummins.com>
1822 Shilin Shakti <shilins@kpitcummins.com>
1824 * Makefile.am: Add xc16x related entry.
1825 * Makefile.in: Regenerate.
1826 * configure.in: Added xc16x related entry.
1827 * configure: Regenerate.
1828 * config/tc-xc16x.h: New file
1829 * config/tc-xc16x.c: New file
1830 * doc/c-xc16x.texi: New file for xc16x
1831 * doc/all.texi: Entry for xc16x
1832 * doc/Makefile.texi: Added c-xc16x.texi
1833 * NEWS: Announce the support for the new target.
1835 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1837 * configure.tgt: set emulation for mips-*-netbsd*
1839 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1841 * config.in: Rebuilt.
1843 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1845 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1846 from 1, not 0, in error messages.
1847 (md_assemble): Simplify special-case check for ENTRY instructions.
1848 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1849 operand in error message.
1851 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1853 * configure.tgt (arm-*-linux-gnueabi*): Change to
1854 arm-*-linux-*eabi*.
1856 2006-02-10 Nick Clifton <nickc@redhat.com>
1858 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1859 32-bit value is propagated into the upper bits of a 64-bit long.
1861 * config/tc-arc.c (init_opcode_tables): Fix cast.
1862 (arc_extoper, md_operand): Likewise.
1864 2006-02-09 David Heine <dlheine@tensilica.com>
1866 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1867 each relaxation step.
1869 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1871 * configure.in (CHECK_DECLS): Add vsnprintf.
1872 * configure: Regenerate.
1873 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1874 include/declare here, but...
1875 * as.h: Move code detecting VARARGS idiom to the top.
1876 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1877 (vsnprintf): Declare if not already declared.
1879 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1881 * as.c (close_output_file): New.
1882 (main): Register close_output_file with xatexit before
1883 dump_statistics. Don't call output_file_close.
1885 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1887 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1888 mcf5329_control_regs): New.
1889 (not_current_architecture, selected_arch, selected_cpu): New.
1890 (m68k_archs, m68k_extensions): New.
1891 (archs): Renamed to ...
1892 (m68k_cpus): ... here. Adjust.
1893 (n_arches): Remove.
1894 (md_pseudo_table): Add arch and cpu directives.
1895 (find_cf_chip, m68k_ip): Adjust table scanning.
1896 (no_68851, no_68881): Remove.
1897 (md_assemble): Lazily initialize.
1898 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1899 (md_init_after_args): Move functionality to m68k_init_arch.
1900 (mri_chip): Adjust table scanning.
1901 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1902 options with saner parsing.
1903 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1904 m68k_init_arch): New.
1905 (s_m68k_cpu, s_m68k_arch): New.
1906 (md_show_usage): Adjust.
1907 (m68k_elf_final_processing): Set CF EF flags.
1908 * config/tc-m68k.h (m68k_init_after_args): Remove.
1909 (tc_init_after_args): Remove.
1910 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1911 (M68k-Directives): Document .arch and .cpu directives.
1913 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1915 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1916 synonyms for equ and defl.
1917 (z80_cons_fix_new): New function.
1918 (emit_byte): Disallow relative jumps to absolute locations.
1919 (emit_data): Only handle defb, prototype changed, because defb is
1920 now handled as pseudo-op rather than an instruction.
1921 (instab): Entries for defb,defw,db,dw moved from here...
1922 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1923 Add entries for def24,def32,d24,d32.
1924 (md_assemble): Improved error handling.
1925 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1926 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1927 (z80_cons_fix_new): Declare.
1928 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1929 (def24,d24,def32,d32): New pseudo-ops.
1931 2006-02-02 Paul Brook <paul@codesourcery.com>
1933 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1935 2005-02-02 Paul Brook <paul@codesourcery.com>
1937 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1938 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1939 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1940 T2_OPCODE_RSB): Define.
1941 (thumb32_negate_data_op): New function.
1942 (md_apply_fix): Use it.
1944 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1946 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1947 fields.
1948 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1949 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1950 subtracted symbols.
1951 (relaxation_requirements): Add pfinish_frag argument and use it to
1952 replace setting tinsn->record_fix fields.
1953 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1954 and vinsn_to_insnbuf. Remove references to record_fix and
1955 slot_sub_symbols fields.
1956 (xtensa_mark_narrow_branches): Delete unused code.
1957 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1958 a symbol.
1959 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1960 record_fix fields.
1961 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1962 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1963 of the record_fix field. Simplify error messages for unexpected
1964 symbolic operands.
1965 (set_expr_symbol_offset_diff): Delete.
1967 2006-01-31 Paul Brook <paul@codesourcery.com>
1969 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1971 2006-01-31 Paul Brook <paul@codesourcery.com>
1972 Richard Earnshaw <rearnsha@arm.com>
1974 * config/tc-arm.c: Use arm_feature_set.
1975 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1976 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1977 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1978 New variables.
1979 (insns): Use them.
1980 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1981 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1982 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1983 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1984 feature flags.
1985 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1986 (arm_opts): Move old cpu/arch options from here...
1987 (arm_legacy_opts): ... to here.
1988 (md_parse_option): Search arm_legacy_opts.
1989 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1990 (arm_float_abis, arm_eabis): Make const.
1992 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1994 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1996 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1998 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1999 in load immediate intruction.
2001 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2003 * config/bfin-parse.y (value_match): Use correct conversion
2004 specifications in template string for __FILE__ and __LINE__.
2005 (binary): Ditto.
2006 (unary): Ditto.
2008 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2010 Introduce TLS descriptors for i386 and x86_64.
2011 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2012 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2013 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2014 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2015 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2016 displacement bits.
2017 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2018 (lex_got): Handle @tlsdesc and @tlscall.
2019 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2021 2006-01-11 Nick Clifton <nickc@redhat.com>
2023 Fixes for building on 64-bit hosts:
2024 * config/tc-avr.c (mod_index): New union to allow conversion
2025 between pointers and integers.
2026 (md_begin, avr_ldi_expression): Use it.
2027 * config/tc-i370.c (md_assemble): Add cast for argument to print
2028 statement.
2029 * config/tc-tic54x.c (subsym_substitute): Likewise.
2030 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2031 opindex field of fr_cgen structure into a pointer so that it can
2032 be stored in a frag.
2033 * config/tc-mn10300.c (md_assemble): Likewise.
2034 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2035 types.
2036 * config/tc-v850.c: Replace uses of (int) casts with correct
2037 types.
2039 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2041 PR gas/2117
2042 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2044 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2046 PR gas/2101
2047 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2048 a local-label reference.
2050 For older changes see ChangeLog-2005
2051 \f
2052 Local Variables:
2053 mode: change-log
2054 left-margin: 8
2055 fill-column: 74
2056 version-control: never
2057 End: