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[binutils.git] / opcodes / fr30-opc.c
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1 /* Instruction opcode table for fr30.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2007 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
25 #include "sysdep.h"
26 #include "ansidecl.h"
27 #include "bfd.h"
28 #include "symcat.h"
29 #include "fr30-desc.h"
30 #include "fr30-opc.h"
31 #include "libiberty.h"
33 /* The hash functions are recorded here to help keep assembler code out of
34 the disassembler and vice versa. */
36 static int asm_hash_insn_p (const CGEN_INSN *);
37 static unsigned int asm_hash_insn (const char *);
38 static int dis_hash_insn_p (const CGEN_INSN *);
39 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
41 /* Instruction formats. */
43 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
44 #define F(f) & fr30_cgen_ifld_table[FR30_##f]
45 #else
46 #define F(f) & fr30_cgen_ifld_table[FR30_/**/f]
47 #endif
48 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
49 0, 0, 0x0, { { 0 } }
52 static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED = {
53 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RJ) }, { F (F_RI) }, { 0 } }
56 static const CGEN_IFMT ifmt_addi ATTRIBUTE_UNUSED = {
57 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_U4) }, { F (F_RI) }, { 0 } }
60 static const CGEN_IFMT ifmt_add2 ATTRIBUTE_UNUSED = {
61 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_M4) }, { F (F_RI) }, { 0 } }
64 static const CGEN_IFMT ifmt_div0s ATTRIBUTE_UNUSED = {
65 16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RI) }, { 0 } }
68 static const CGEN_IFMT ifmt_div3 ATTRIBUTE_UNUSED = {
69 16, 16, 0xffff, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_OP4) }, { 0 } }
72 static const CGEN_IFMT ifmt_ldi8 ATTRIBUTE_UNUSED = {
73 16, 16, 0xf000, { { F (F_OP1) }, { F (F_I8) }, { F (F_RI) }, { 0 } }
76 static const CGEN_IFMT ifmt_ldi20 ATTRIBUTE_UNUSED = {
77 16, 32, 0xff00, { { F (F_OP1) }, { F (F_I20) }, { F (F_OP2) }, { F (F_RI) }, { 0 } }
80 static const CGEN_IFMT ifmt_ldi32 ATTRIBUTE_UNUSED = {
81 16, 48, 0xfff0, { { F (F_OP1) }, { F (F_I32) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RI) }, { 0 } }
84 static const CGEN_IFMT ifmt_ldr14 ATTRIBUTE_UNUSED = {
85 16, 16, 0xf000, { { F (F_OP1) }, { F (F_DISP10) }, { F (F_RI) }, { 0 } }
88 static const CGEN_IFMT ifmt_ldr14uh ATTRIBUTE_UNUSED = {
89 16, 16, 0xf000, { { F (F_OP1) }, { F (F_DISP9) }, { F (F_RI) }, { 0 } }
92 static const CGEN_IFMT ifmt_ldr14ub ATTRIBUTE_UNUSED = {
93 16, 16, 0xf000, { { F (F_OP1) }, { F (F_DISP8) }, { F (F_RI) }, { 0 } }
96 static const CGEN_IFMT ifmt_ldr15 ATTRIBUTE_UNUSED = {
97 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_UDISP6) }, { F (F_RI) }, { 0 } }
100 static const CGEN_IFMT ifmt_ldr15dr ATTRIBUTE_UNUSED = {
101 16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RS2) }, { 0 } }
104 static const CGEN_IFMT ifmt_movdr ATTRIBUTE_UNUSED = {
105 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS1) }, { F (F_RI) }, { 0 } }
108 static const CGEN_IFMT ifmt_call ATTRIBUTE_UNUSED = {
109 16, 16, 0xf800, { { F (F_OP1) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
112 static const CGEN_IFMT ifmt_int ATTRIBUTE_UNUSED = {
113 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_U8) }, { 0 } }
116 static const CGEN_IFMT ifmt_brad ATTRIBUTE_UNUSED = {
117 16, 16, 0xff00, { { F (F_OP1) }, { F (F_CC) }, { F (F_REL9) }, { 0 } }
120 static const CGEN_IFMT ifmt_dmovr13 ATTRIBUTE_UNUSED = {
121 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_DIR10) }, { 0 } }
124 static const CGEN_IFMT ifmt_dmovr13h ATTRIBUTE_UNUSED = {
125 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_DIR9) }, { 0 } }
128 static const CGEN_IFMT ifmt_dmovr13b ATTRIBUTE_UNUSED = {
129 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_DIR8) }, { 0 } }
132 static const CGEN_IFMT ifmt_copop ATTRIBUTE_UNUSED = {
133 16, 32, 0xfff0, { { F (F_OP1) }, { F (F_CCC) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_CRJ) }, { F (F_U4C) }, { F (F_CRI) }, { 0 } }
136 static const CGEN_IFMT ifmt_copld ATTRIBUTE_UNUSED = {
137 16, 32, 0xfff0, { { F (F_OP1) }, { F (F_CCC) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RJC) }, { F (F_U4C) }, { F (F_CRI) }, { 0 } }
140 static const CGEN_IFMT ifmt_copst ATTRIBUTE_UNUSED = {
141 16, 32, 0xfff0, { { F (F_OP1) }, { F (F_CCC) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_CRJ) }, { F (F_U4C) }, { F (F_RIC) }, { 0 } }
144 static const CGEN_IFMT ifmt_addsp ATTRIBUTE_UNUSED = {
145 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_S10) }, { 0 } }
148 static const CGEN_IFMT ifmt_ldm0 ATTRIBUTE_UNUSED = {
149 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_LOW_LD) }, { 0 } }
152 static const CGEN_IFMT ifmt_ldm1 ATTRIBUTE_UNUSED = {
153 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_HI_LD) }, { 0 } }
156 static const CGEN_IFMT ifmt_stm0 ATTRIBUTE_UNUSED = {
157 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_LOW_ST) }, { 0 } }
160 static const CGEN_IFMT ifmt_stm1 ATTRIBUTE_UNUSED = {
161 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REGLIST_HI_ST) }, { 0 } }
164 static const CGEN_IFMT ifmt_enter ATTRIBUTE_UNUSED = {
165 16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_U10) }, { 0 } }
168 #undef F
170 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
171 #define A(a) (1 << CGEN_INSN_##a)
172 #else
173 #define A(a) (1 << CGEN_INSN_/**/a)
174 #endif
175 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
176 #define OPERAND(op) FR30_OPERAND_##op
177 #else
178 #define OPERAND(op) FR30_OPERAND_/**/op
179 #endif
180 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
181 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
183 /* The instruction table. */
185 static const CGEN_OPCODE fr30_cgen_insn_opcode_table[MAX_INSNS] =
187 /* Special null first entry.
188 A `num' value of zero is thus invalid.
189 Also, the special `invalid' insn resides here. */
190 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
191 /* add $Rj,$Ri */
193 { 0, 0, 0, 0 },
194 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
195 & ifmt_add, { 0xa600 }
197 /* add $u4,$Ri */
199 { 0, 0, 0, 0 },
200 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
201 & ifmt_addi, { 0xa400 }
203 /* add2 $m4,$Ri */
205 { 0, 0, 0, 0 },
206 { { MNEM, ' ', OP (M4), ',', OP (RI), 0 } },
207 & ifmt_add2, { 0xa500 }
209 /* addc $Rj,$Ri */
211 { 0, 0, 0, 0 },
212 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
213 & ifmt_add, { 0xa700 }
215 /* addn $Rj,$Ri */
217 { 0, 0, 0, 0 },
218 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
219 & ifmt_add, { 0xa200 }
221 /* addn $u4,$Ri */
223 { 0, 0, 0, 0 },
224 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
225 & ifmt_addi, { 0xa000 }
227 /* addn2 $m4,$Ri */
229 { 0, 0, 0, 0 },
230 { { MNEM, ' ', OP (M4), ',', OP (RI), 0 } },
231 & ifmt_add2, { 0xa100 }
233 /* sub $Rj,$Ri */
235 { 0, 0, 0, 0 },
236 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
237 & ifmt_add, { 0xac00 }
239 /* subc $Rj,$Ri */
241 { 0, 0, 0, 0 },
242 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
243 & ifmt_add, { 0xad00 }
245 /* subn $Rj,$Ri */
247 { 0, 0, 0, 0 },
248 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
249 & ifmt_add, { 0xae00 }
251 /* cmp $Rj,$Ri */
253 { 0, 0, 0, 0 },
254 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
255 & ifmt_add, { 0xaa00 }
257 /* cmp $u4,$Ri */
259 { 0, 0, 0, 0 },
260 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
261 & ifmt_addi, { 0xa800 }
263 /* cmp2 $m4,$Ri */
265 { 0, 0, 0, 0 },
266 { { MNEM, ' ', OP (M4), ',', OP (RI), 0 } },
267 & ifmt_add2, { 0xa900 }
269 /* and $Rj,$Ri */
271 { 0, 0, 0, 0 },
272 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
273 & ifmt_add, { 0x8200 }
275 /* or $Rj,$Ri */
277 { 0, 0, 0, 0 },
278 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
279 & ifmt_add, { 0x9200 }
281 /* eor $Rj,$Ri */
283 { 0, 0, 0, 0 },
284 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
285 & ifmt_add, { 0x9a00 }
287 /* and $Rj,@$Ri */
289 { 0, 0, 0, 0 },
290 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
291 & ifmt_add, { 0x8400 }
293 /* andh $Rj,@$Ri */
295 { 0, 0, 0, 0 },
296 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
297 & ifmt_add, { 0x8500 }
299 /* andb $Rj,@$Ri */
301 { 0, 0, 0, 0 },
302 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
303 & ifmt_add, { 0x8600 }
305 /* or $Rj,@$Ri */
307 { 0, 0, 0, 0 },
308 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
309 & ifmt_add, { 0x9400 }
311 /* orh $Rj,@$Ri */
313 { 0, 0, 0, 0 },
314 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
315 & ifmt_add, { 0x9500 }
317 /* orb $Rj,@$Ri */
319 { 0, 0, 0, 0 },
320 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
321 & ifmt_add, { 0x9600 }
323 /* eor $Rj,@$Ri */
325 { 0, 0, 0, 0 },
326 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
327 & ifmt_add, { 0x9c00 }
329 /* eorh $Rj,@$Ri */
331 { 0, 0, 0, 0 },
332 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
333 & ifmt_add, { 0x9d00 }
335 /* eorb $Rj,@$Ri */
337 { 0, 0, 0, 0 },
338 { { MNEM, ' ', OP (RJ), ',', '@', OP (RI), 0 } },
339 & ifmt_add, { 0x9e00 }
341 /* bandl $u4,@$Ri */
343 { 0, 0, 0, 0 },
344 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
345 & ifmt_addi, { 0x8000 }
347 /* borl $u4,@$Ri */
349 { 0, 0, 0, 0 },
350 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
351 & ifmt_addi, { 0x9000 }
353 /* beorl $u4,@$Ri */
355 { 0, 0, 0, 0 },
356 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
357 & ifmt_addi, { 0x9800 }
359 /* bandh $u4,@$Ri */
361 { 0, 0, 0, 0 },
362 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
363 & ifmt_addi, { 0x8100 }
365 /* borh $u4,@$Ri */
367 { 0, 0, 0, 0 },
368 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
369 & ifmt_addi, { 0x9100 }
371 /* beorh $u4,@$Ri */
373 { 0, 0, 0, 0 },
374 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
375 & ifmt_addi, { 0x9900 }
377 /* btstl $u4,@$Ri */
379 { 0, 0, 0, 0 },
380 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
381 & ifmt_addi, { 0x8800 }
383 /* btsth $u4,@$Ri */
385 { 0, 0, 0, 0 },
386 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), 0 } },
387 & ifmt_addi, { 0x8900 }
389 /* mul $Rj,$Ri */
391 { 0, 0, 0, 0 },
392 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
393 & ifmt_add, { 0xaf00 }
395 /* mulu $Rj,$Ri */
397 { 0, 0, 0, 0 },
398 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
399 & ifmt_add, { 0xab00 }
401 /* mulh $Rj,$Ri */
403 { 0, 0, 0, 0 },
404 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
405 & ifmt_add, { 0xbf00 }
407 /* muluh $Rj,$Ri */
409 { 0, 0, 0, 0 },
410 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
411 & ifmt_add, { 0xbb00 }
413 /* div0s $Ri */
415 { 0, 0, 0, 0 },
416 { { MNEM, ' ', OP (RI), 0 } },
417 & ifmt_div0s, { 0x9740 }
419 /* div0u $Ri */
421 { 0, 0, 0, 0 },
422 { { MNEM, ' ', OP (RI), 0 } },
423 & ifmt_div0s, { 0x9750 }
425 /* div1 $Ri */
427 { 0, 0, 0, 0 },
428 { { MNEM, ' ', OP (RI), 0 } },
429 & ifmt_div0s, { 0x9760 }
431 /* div2 $Ri */
433 { 0, 0, 0, 0 },
434 { { MNEM, ' ', OP (RI), 0 } },
435 & ifmt_div0s, { 0x9770 }
437 /* div3 */
439 { 0, 0, 0, 0 },
440 { { MNEM, 0 } },
441 & ifmt_div3, { 0x9f60 }
443 /* div4s */
445 { 0, 0, 0, 0 },
446 { { MNEM, 0 } },
447 & ifmt_div3, { 0x9f70 }
449 /* lsl $Rj,$Ri */
451 { 0, 0, 0, 0 },
452 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
453 & ifmt_add, { 0xb600 }
455 /* lsl $u4,$Ri */
457 { 0, 0, 0, 0 },
458 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
459 & ifmt_addi, { 0xb400 }
461 /* lsl2 $u4,$Ri */
463 { 0, 0, 0, 0 },
464 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
465 & ifmt_addi, { 0xb500 }
467 /* lsr $Rj,$Ri */
469 { 0, 0, 0, 0 },
470 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
471 & ifmt_add, { 0xb200 }
473 /* lsr $u4,$Ri */
475 { 0, 0, 0, 0 },
476 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
477 & ifmt_addi, { 0xb000 }
479 /* lsr2 $u4,$Ri */
481 { 0, 0, 0, 0 },
482 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
483 & ifmt_addi, { 0xb100 }
485 /* asr $Rj,$Ri */
487 { 0, 0, 0, 0 },
488 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
489 & ifmt_add, { 0xba00 }
491 /* asr $u4,$Ri */
493 { 0, 0, 0, 0 },
494 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
495 & ifmt_addi, { 0xb800 }
497 /* asr2 $u4,$Ri */
499 { 0, 0, 0, 0 },
500 { { MNEM, ' ', OP (U4), ',', OP (RI), 0 } },
501 & ifmt_addi, { 0xb900 }
503 /* ldi:8 $i8,$Ri */
505 { 0, 0, 0, 0 },
506 { { MNEM, ' ', OP (I8), ',', OP (RI), 0 } },
507 & ifmt_ldi8, { 0xc000 }
509 /* ldi:20 $i20,$Ri */
511 { 0, 0, 0, 0 },
512 { { MNEM, ' ', OP (I20), ',', OP (RI), 0 } },
513 & ifmt_ldi20, { 0x9b00 }
515 /* ldi:32 $i32,$Ri */
517 { 0, 0, 0, 0 },
518 { { MNEM, ' ', OP (I32), ',', OP (RI), 0 } },
519 & ifmt_ldi32, { 0x9f80 }
521 /* ld @$Rj,$Ri */
523 { 0, 0, 0, 0 },
524 { { MNEM, ' ', '@', OP (RJ), ',', OP (RI), 0 } },
525 & ifmt_add, { 0x400 }
527 /* lduh @$Rj,$Ri */
529 { 0, 0, 0, 0 },
530 { { MNEM, ' ', '@', OP (RJ), ',', OP (RI), 0 } },
531 & ifmt_add, { 0x500 }
533 /* ldub @$Rj,$Ri */
535 { 0, 0, 0, 0 },
536 { { MNEM, ' ', '@', OP (RJ), ',', OP (RI), 0 } },
537 & ifmt_add, { 0x600 }
539 /* ld @($R13,$Rj),$Ri */
541 { 0, 0, 0, 0 },
542 { { MNEM, ' ', '@', '(', OP (R13), ',', OP (RJ), ')', ',', OP (RI), 0 } },
543 & ifmt_add, { 0x0 }
545 /* lduh @($R13,$Rj),$Ri */
547 { 0, 0, 0, 0 },
548 { { MNEM, ' ', '@', '(', OP (R13), ',', OP (RJ), ')', ',', OP (RI), 0 } },
549 & ifmt_add, { 0x100 }
551 /* ldub @($R13,$Rj),$Ri */
553 { 0, 0, 0, 0 },
554 { { MNEM, ' ', '@', '(', OP (R13), ',', OP (RJ), ')', ',', OP (RI), 0 } },
555 & ifmt_add, { 0x200 }
557 /* ld @($R14,$disp10),$Ri */
559 { 0, 0, 0, 0 },
560 { { MNEM, ' ', '@', '(', OP (R14), ',', OP (DISP10), ')', ',', OP (RI), 0 } },
561 & ifmt_ldr14, { 0x2000 }
563 /* lduh @($R14,$disp9),$Ri */
565 { 0, 0, 0, 0 },
566 { { MNEM, ' ', '@', '(', OP (R14), ',', OP (DISP9), ')', ',', OP (RI), 0 } },
567 & ifmt_ldr14uh, { 0x4000 }
569 /* ldub @($R14,$disp8),$Ri */
571 { 0, 0, 0, 0 },
572 { { MNEM, ' ', '@', '(', OP (R14), ',', OP (DISP8), ')', ',', OP (RI), 0 } },
573 & ifmt_ldr14ub, { 0x6000 }
575 /* ld @($R15,$udisp6),$Ri */
577 { 0, 0, 0, 0 },
578 { { MNEM, ' ', '@', '(', OP (R15), ',', OP (UDISP6), ')', ',', OP (RI), 0 } },
579 & ifmt_ldr15, { 0x300 }
581 /* ld @$R15+,$Ri */
583 { 0, 0, 0, 0 },
584 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (RI), 0 } },
585 & ifmt_div0s, { 0x700 }
587 /* ld @$R15+,$Rs2 */
589 { 0, 0, 0, 0 },
590 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (RS2), 0 } },
591 & ifmt_ldr15dr, { 0x780 }
593 /* ld @$R15+,$ps */
595 { 0, 0, 0, 0 },
596 { { MNEM, ' ', '@', OP (R15), '+', ',', OP (PS), 0 } },
597 & ifmt_div3, { 0x790 }
599 /* st $Ri,@$Rj */
601 { 0, 0, 0, 0 },
602 { { MNEM, ' ', OP (RI), ',', '@', OP (RJ), 0 } },
603 & ifmt_add, { 0x1400 }
605 /* sth $Ri,@$Rj */
607 { 0, 0, 0, 0 },
608 { { MNEM, ' ', OP (RI), ',', '@', OP (RJ), 0 } },
609 & ifmt_add, { 0x1500 }
611 /* stb $Ri,@$Rj */
613 { 0, 0, 0, 0 },
614 { { MNEM, ' ', OP (RI), ',', '@', OP (RJ), 0 } },
615 & ifmt_add, { 0x1600 }
617 /* st $Ri,@($R13,$Rj) */
619 { 0, 0, 0, 0 },
620 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R13), ',', OP (RJ), ')', 0 } },
621 & ifmt_add, { 0x1000 }
623 /* sth $Ri,@($R13,$Rj) */
625 { 0, 0, 0, 0 },
626 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R13), ',', OP (RJ), ')', 0 } },
627 & ifmt_add, { 0x1100 }
629 /* stb $Ri,@($R13,$Rj) */
631 { 0, 0, 0, 0 },
632 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R13), ',', OP (RJ), ')', 0 } },
633 & ifmt_add, { 0x1200 }
635 /* st $Ri,@($R14,$disp10) */
637 { 0, 0, 0, 0 },
638 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R14), ',', OP (DISP10), ')', 0 } },
639 & ifmt_ldr14, { 0x3000 }
641 /* sth $Ri,@($R14,$disp9) */
643 { 0, 0, 0, 0 },
644 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R14), ',', OP (DISP9), ')', 0 } },
645 & ifmt_ldr14uh, { 0x5000 }
647 /* stb $Ri,@($R14,$disp8) */
649 { 0, 0, 0, 0 },
650 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R14), ',', OP (DISP8), ')', 0 } },
651 & ifmt_ldr14ub, { 0x7000 }
653 /* st $Ri,@($R15,$udisp6) */
655 { 0, 0, 0, 0 },
656 { { MNEM, ' ', OP (RI), ',', '@', '(', OP (R15), ',', OP (UDISP6), ')', 0 } },
657 & ifmt_ldr15, { 0x1300 }
659 /* st $Ri,@-$R15 */
661 { 0, 0, 0, 0 },
662 { { MNEM, ' ', OP (RI), ',', '@', '-', OP (R15), 0 } },
663 & ifmt_div0s, { 0x1700 }
665 /* st $Rs2,@-$R15 */
667 { 0, 0, 0, 0 },
668 { { MNEM, ' ', OP (RS2), ',', '@', '-', OP (R15), 0 } },
669 & ifmt_ldr15dr, { 0x1780 }
671 /* st $ps,@-$R15 */
673 { 0, 0, 0, 0 },
674 { { MNEM, ' ', OP (PS), ',', '@', '-', OP (R15), 0 } },
675 & ifmt_div3, { 0x1790 }
677 /* mov $Rj,$Ri */
679 { 0, 0, 0, 0 },
680 { { MNEM, ' ', OP (RJ), ',', OP (RI), 0 } },
681 & ifmt_add, { 0x8b00 }
683 /* mov $Rs1,$Ri */
685 { 0, 0, 0, 0 },
686 { { MNEM, ' ', OP (RS1), ',', OP (RI), 0 } },
687 & ifmt_movdr, { 0xb700 }
689 /* mov $ps,$Ri */
691 { 0, 0, 0, 0 },
692 { { MNEM, ' ', OP (PS), ',', OP (RI), 0 } },
693 & ifmt_div0s, { 0x1710 }
695 /* mov $Ri,$Rs1 */
697 { 0, 0, 0, 0 },
698 { { MNEM, ' ', OP (RI), ',', OP (RS1), 0 } },
699 & ifmt_movdr, { 0xb300 }
701 /* mov $Ri,$ps */
703 { 0, 0, 0, 0 },
704 { { MNEM, ' ', OP (RI), ',', OP (PS), 0 } },
705 & ifmt_div0s, { 0x710 }
707 /* jmp @$Ri */
709 { 0, 0, 0, 0 },
710 { { MNEM, ' ', '@', OP (RI), 0 } },
711 & ifmt_div0s, { 0x9700 }
713 /* jmp:d @$Ri */
715 { 0, 0, 0, 0 },
716 { { MNEM, ' ', '@', OP (RI), 0 } },
717 & ifmt_div0s, { 0x9f00 }
719 /* call @$Ri */
721 { 0, 0, 0, 0 },
722 { { MNEM, ' ', '@', OP (RI), 0 } },
723 & ifmt_div0s, { 0x9710 }
725 /* call:d @$Ri */
727 { 0, 0, 0, 0 },
728 { { MNEM, ' ', '@', OP (RI), 0 } },
729 & ifmt_div0s, { 0x9f10 }
731 /* call $label12 */
733 { 0, 0, 0, 0 },
734 { { MNEM, ' ', OP (LABEL12), 0 } },
735 & ifmt_call, { 0xd000 }
737 /* call:d $label12 */
739 { 0, 0, 0, 0 },
740 { { MNEM, ' ', OP (LABEL12), 0 } },
741 & ifmt_call, { 0xd800 }
743 /* ret */
745 { 0, 0, 0, 0 },
746 { { MNEM, 0 } },
747 & ifmt_div3, { 0x9720 }
749 /* ret:d */
751 { 0, 0, 0, 0 },
752 { { MNEM, 0 } },
753 & ifmt_div3, { 0x9f20 }
755 /* int $u8 */
757 { 0, 0, 0, 0 },
758 { { MNEM, ' ', OP (U8), 0 } },
759 & ifmt_int, { 0x1f00 }
761 /* inte */
763 { 0, 0, 0, 0 },
764 { { MNEM, 0 } },
765 & ifmt_div3, { 0x9f30 }
767 /* reti */
769 { 0, 0, 0, 0 },
770 { { MNEM, 0 } },
771 & ifmt_div3, { 0x9730 }
773 /* bra:d $label9 */
775 { 0, 0, 0, 0 },
776 { { MNEM, ' ', OP (LABEL9), 0 } },
777 & ifmt_brad, { 0xf000 }
779 /* bra $label9 */
781 { 0, 0, 0, 0 },
782 { { MNEM, ' ', OP (LABEL9), 0 } },
783 & ifmt_brad, { 0xe000 }
785 /* bno:d $label9 */
787 { 0, 0, 0, 0 },
788 { { MNEM, ' ', OP (LABEL9), 0 } },
789 & ifmt_brad, { 0xf100 }
791 /* bno $label9 */
793 { 0, 0, 0, 0 },
794 { { MNEM, ' ', OP (LABEL9), 0 } },
795 & ifmt_brad, { 0xe100 }
797 /* beq:d $label9 */
799 { 0, 0, 0, 0 },
800 { { MNEM, ' ', OP (LABEL9), 0 } },
801 & ifmt_brad, { 0xf200 }
803 /* beq $label9 */
805 { 0, 0, 0, 0 },
806 { { MNEM, ' ', OP (LABEL9), 0 } },
807 & ifmt_brad, { 0xe200 }
809 /* bne:d $label9 */
811 { 0, 0, 0, 0 },
812 { { MNEM, ' ', OP (LABEL9), 0 } },
813 & ifmt_brad, { 0xf300 }
815 /* bne $label9 */
817 { 0, 0, 0, 0 },
818 { { MNEM, ' ', OP (LABEL9), 0 } },
819 & ifmt_brad, { 0xe300 }
821 /* bc:d $label9 */
823 { 0, 0, 0, 0 },
824 { { MNEM, ' ', OP (LABEL9), 0 } },
825 & ifmt_brad, { 0xf400 }
827 /* bc $label9 */
829 { 0, 0, 0, 0 },
830 { { MNEM, ' ', OP (LABEL9), 0 } },
831 & ifmt_brad, { 0xe400 }
833 /* bnc:d $label9 */
835 { 0, 0, 0, 0 },
836 { { MNEM, ' ', OP (LABEL9), 0 } },
837 & ifmt_brad, { 0xf500 }
839 /* bnc $label9 */
841 { 0, 0, 0, 0 },
842 { { MNEM, ' ', OP (LABEL9), 0 } },
843 & ifmt_brad, { 0xe500 }
845 /* bn:d $label9 */
847 { 0, 0, 0, 0 },
848 { { MNEM, ' ', OP (LABEL9), 0 } },
849 & ifmt_brad, { 0xf600 }
851 /* bn $label9 */
853 { 0, 0, 0, 0 },
854 { { MNEM, ' ', OP (LABEL9), 0 } },
855 & ifmt_brad, { 0xe600 }
857 /* bp:d $label9 */
859 { 0, 0, 0, 0 },
860 { { MNEM, ' ', OP (LABEL9), 0 } },
861 & ifmt_brad, { 0xf700 }
863 /* bp $label9 */
865 { 0, 0, 0, 0 },
866 { { MNEM, ' ', OP (LABEL9), 0 } },
867 & ifmt_brad, { 0xe700 }
869 /* bv:d $label9 */
871 { 0, 0, 0, 0 },
872 { { MNEM, ' ', OP (LABEL9), 0 } },
873 & ifmt_brad, { 0xf800 }
875 /* bv $label9 */
877 { 0, 0, 0, 0 },
878 { { MNEM, ' ', OP (LABEL9), 0 } },
879 & ifmt_brad, { 0xe800 }
881 /* bnv:d $label9 */
883 { 0, 0, 0, 0 },
884 { { MNEM, ' ', OP (LABEL9), 0 } },
885 & ifmt_brad, { 0xf900 }
887 /* bnv $label9 */
889 { 0, 0, 0, 0 },
890 { { MNEM, ' ', OP (LABEL9), 0 } },
891 & ifmt_brad, { 0xe900 }
893 /* blt:d $label9 */
895 { 0, 0, 0, 0 },
896 { { MNEM, ' ', OP (LABEL9), 0 } },
897 & ifmt_brad, { 0xfa00 }
899 /* blt $label9 */
901 { 0, 0, 0, 0 },
902 { { MNEM, ' ', OP (LABEL9), 0 } },
903 & ifmt_brad, { 0xea00 }
905 /* bge:d $label9 */
907 { 0, 0, 0, 0 },
908 { { MNEM, ' ', OP (LABEL9), 0 } },
909 & ifmt_brad, { 0xfb00 }
911 /* bge $label9 */
913 { 0, 0, 0, 0 },
914 { { MNEM, ' ', OP (LABEL9), 0 } },
915 & ifmt_brad, { 0xeb00 }
917 /* ble:d $label9 */
919 { 0, 0, 0, 0 },
920 { { MNEM, ' ', OP (LABEL9), 0 } },
921 & ifmt_brad, { 0xfc00 }
923 /* ble $label9 */
925 { 0, 0, 0, 0 },
926 { { MNEM, ' ', OP (LABEL9), 0 } },
927 & ifmt_brad, { 0xec00 }
929 /* bgt:d $label9 */
931 { 0, 0, 0, 0 },
932 { { MNEM, ' ', OP (LABEL9), 0 } },
933 & ifmt_brad, { 0xfd00 }
935 /* bgt $label9 */
937 { 0, 0, 0, 0 },
938 { { MNEM, ' ', OP (LABEL9), 0 } },
939 & ifmt_brad, { 0xed00 }
941 /* bls:d $label9 */
943 { 0, 0, 0, 0 },
944 { { MNEM, ' ', OP (LABEL9), 0 } },
945 & ifmt_brad, { 0xfe00 }
947 /* bls $label9 */
949 { 0, 0, 0, 0 },
950 { { MNEM, ' ', OP (LABEL9), 0 } },
951 & ifmt_brad, { 0xee00 }
953 /* bhi:d $label9 */
955 { 0, 0, 0, 0 },
956 { { MNEM, ' ', OP (LABEL9), 0 } },
957 & ifmt_brad, { 0xff00 }
959 /* bhi $label9 */
961 { 0, 0, 0, 0 },
962 { { MNEM, ' ', OP (LABEL9), 0 } },
963 & ifmt_brad, { 0xef00 }
965 /* dmov $R13,@$dir10 */
967 { 0, 0, 0, 0 },
968 { { MNEM, ' ', OP (R13), ',', '@', OP (DIR10), 0 } },
969 & ifmt_dmovr13, { 0x1800 }
971 /* dmovh $R13,@$dir9 */
973 { 0, 0, 0, 0 },
974 { { MNEM, ' ', OP (R13), ',', '@', OP (DIR9), 0 } },
975 & ifmt_dmovr13h, { 0x1900 }
977 /* dmovb $R13,@$dir8 */
979 { 0, 0, 0, 0 },
980 { { MNEM, ' ', OP (R13), ',', '@', OP (DIR8), 0 } },
981 & ifmt_dmovr13b, { 0x1a00 }
983 /* dmov @$R13+,@$dir10 */
985 { 0, 0, 0, 0 },
986 { { MNEM, ' ', '@', OP (R13), '+', ',', '@', OP (DIR10), 0 } },
987 & ifmt_dmovr13, { 0x1c00 }
989 /* dmovh @$R13+,@$dir9 */
991 { 0, 0, 0, 0 },
992 { { MNEM, ' ', '@', OP (R13), '+', ',', '@', OP (DIR9), 0 } },
993 & ifmt_dmovr13h, { 0x1d00 }
995 /* dmovb @$R13+,@$dir8 */
997 { 0, 0, 0, 0 },
998 { { MNEM, ' ', '@', OP (R13), '+', ',', '@', OP (DIR8), 0 } },
999 & ifmt_dmovr13b, { 0x1e00 }
1001 /* dmov @$R15+,@$dir10 */
1003 { 0, 0, 0, 0 },
1004 { { MNEM, ' ', '@', OP (R15), '+', ',', '@', OP (DIR10), 0 } },
1005 & ifmt_dmovr13, { 0x1b00 }
1007 /* dmov @$dir10,$R13 */
1009 { 0, 0, 0, 0 },
1010 { { MNEM, ' ', '@', OP (DIR10), ',', OP (R13), 0 } },
1011 & ifmt_dmovr13, { 0x800 }
1013 /* dmovh @$dir9,$R13 */
1015 { 0, 0, 0, 0 },
1016 { { MNEM, ' ', '@', OP (DIR9), ',', OP (R13), 0 } },
1017 & ifmt_dmovr13h, { 0x900 }
1019 /* dmovb @$dir8,$R13 */
1021 { 0, 0, 0, 0 },
1022 { { MNEM, ' ', '@', OP (DIR8), ',', OP (R13), 0 } },
1023 & ifmt_dmovr13b, { 0xa00 }
1025 /* dmov @$dir10,@$R13+ */
1027 { 0, 0, 0, 0 },
1028 { { MNEM, ' ', '@', OP (DIR10), ',', '@', OP (R13), '+', 0 } },
1029 & ifmt_dmovr13, { 0xc00 }
1031 /* dmovh @$dir9,@$R13+ */
1033 { 0, 0, 0, 0 },
1034 { { MNEM, ' ', '@', OP (DIR9), ',', '@', OP (R13), '+', 0 } },
1035 & ifmt_dmovr13h, { 0xd00 }
1037 /* dmovb @$dir8,@$R13+ */
1039 { 0, 0, 0, 0 },
1040 { { MNEM, ' ', '@', OP (DIR8), ',', '@', OP (R13), '+', 0 } },
1041 & ifmt_dmovr13b, { 0xe00 }
1043 /* dmov @$dir10,@-$R15 */
1045 { 0, 0, 0, 0 },
1046 { { MNEM, ' ', '@', OP (DIR10), ',', '@', '-', OP (R15), 0 } },
1047 & ifmt_dmovr13, { 0xb00 }
1049 /* ldres @$Ri+,$u4 */
1051 { 0, 0, 0, 0 },
1052 { { MNEM, ' ', '@', OP (RI), '+', ',', OP (U4), 0 } },
1053 & ifmt_addi, { 0xbc00 }
1055 /* stres $u4,@$Ri+ */
1057 { 0, 0, 0, 0 },
1058 { { MNEM, ' ', OP (U4), ',', '@', OP (RI), '+', 0 } },
1059 & ifmt_addi, { 0xbd00 }
1061 /* copop $u4c,$ccc,$CRj,$CRi */
1063 { 0, 0, 0, 0 },
1064 { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (CRJ), ',', OP (CRI), 0 } },
1065 & ifmt_copop, { 0x9fc0 }
1067 /* copld $u4c,$ccc,$Rjc,$CRi */
1069 { 0, 0, 0, 0 },
1070 { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (RJC), ',', OP (CRI), 0 } },
1071 & ifmt_copld, { 0x9fd0 }
1073 /* copst $u4c,$ccc,$CRj,$Ric */
1075 { 0, 0, 0, 0 },
1076 { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (CRJ), ',', OP (RIC), 0 } },
1077 & ifmt_copst, { 0x9fe0 }
1079 /* copsv $u4c,$ccc,$CRj,$Ric */
1081 { 0, 0, 0, 0 },
1082 { { MNEM, ' ', OP (U4C), ',', OP (CCC), ',', OP (CRJ), ',', OP (RIC), 0 } },
1083 & ifmt_copst, { 0x9ff0 }
1085 /* nop */
1087 { 0, 0, 0, 0 },
1088 { { MNEM, 0 } },
1089 & ifmt_div3, { 0x9fa0 }
1091 /* andccr $u8 */
1093 { 0, 0, 0, 0 },
1094 { { MNEM, ' ', OP (U8), 0 } },
1095 & ifmt_int, { 0x8300 }
1097 /* orccr $u8 */
1099 { 0, 0, 0, 0 },
1100 { { MNEM, ' ', OP (U8), 0 } },
1101 & ifmt_int, { 0x9300 }
1103 /* stilm $u8 */
1105 { 0, 0, 0, 0 },
1106 { { MNEM, ' ', OP (U8), 0 } },
1107 & ifmt_int, { 0x8700 }
1109 /* addsp $s10 */
1111 { 0, 0, 0, 0 },
1112 { { MNEM, ' ', OP (S10), 0 } },
1113 & ifmt_addsp, { 0xa300 }
1115 /* extsb $Ri */
1117 { 0, 0, 0, 0 },
1118 { { MNEM, ' ', OP (RI), 0 } },
1119 & ifmt_div0s, { 0x9780 }
1121 /* extub $Ri */
1123 { 0, 0, 0, 0 },
1124 { { MNEM, ' ', OP (RI), 0 } },
1125 & ifmt_div0s, { 0x9790 }
1127 /* extsh $Ri */
1129 { 0, 0, 0, 0 },
1130 { { MNEM, ' ', OP (RI), 0 } },
1131 & ifmt_div0s, { 0x97a0 }
1133 /* extuh $Ri */
1135 { 0, 0, 0, 0 },
1136 { { MNEM, ' ', OP (RI), 0 } },
1137 & ifmt_div0s, { 0x97b0 }
1139 /* ldm0 ($reglist_low_ld) */
1141 { 0, 0, 0, 0 },
1142 { { MNEM, ' ', '(', OP (REGLIST_LOW_LD), ')', 0 } },
1143 & ifmt_ldm0, { 0x8c00 }
1145 /* ldm1 ($reglist_hi_ld) */
1147 { 0, 0, 0, 0 },
1148 { { MNEM, ' ', '(', OP (REGLIST_HI_LD), ')', 0 } },
1149 & ifmt_ldm1, { 0x8d00 }
1151 /* stm0 ($reglist_low_st) */
1153 { 0, 0, 0, 0 },
1154 { { MNEM, ' ', '(', OP (REGLIST_LOW_ST), ')', 0 } },
1155 & ifmt_stm0, { 0x8e00 }
1157 /* stm1 ($reglist_hi_st) */
1159 { 0, 0, 0, 0 },
1160 { { MNEM, ' ', '(', OP (REGLIST_HI_ST), ')', 0 } },
1161 & ifmt_stm1, { 0x8f00 }
1163 /* enter $u10 */
1165 { 0, 0, 0, 0 },
1166 { { MNEM, ' ', OP (U10), 0 } },
1167 & ifmt_enter, { 0xf00 }
1169 /* leave */
1171 { 0, 0, 0, 0 },
1172 { { MNEM, 0 } },
1173 & ifmt_div3, { 0x9f90 }
1175 /* xchb @$Rj,$Ri */
1177 { 0, 0, 0, 0 },
1178 { { MNEM, ' ', '@', OP (RJ), ',', OP (RI), 0 } },
1179 & ifmt_add, { 0x8a00 }
1183 #undef A
1184 #undef OPERAND
1185 #undef MNEM
1186 #undef OP
1188 /* Formats for ALIAS macro-insns. */
1190 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1191 #define F(f) & fr30_cgen_ifld_table[FR30_##f]
1192 #else
1193 #define F(f) & fr30_cgen_ifld_table[FR30_/**/f]
1194 #endif
1195 static const CGEN_IFMT ifmt_ldi8m ATTRIBUTE_UNUSED = {
1196 16, 16, 0xf000, { { F (F_OP1) }, { F (F_I8) }, { F (F_RI) }, { 0 } }
1199 static const CGEN_IFMT ifmt_ldi20m ATTRIBUTE_UNUSED = {
1200 16, 32, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RI) }, { F (F_I20) }, { 0 } }
1203 static const CGEN_IFMT ifmt_ldi32m ATTRIBUTE_UNUSED = {
1204 16, 48, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RI) }, { F (F_I32) }, { 0 } }
1207 #undef F
1209 /* Each non-simple macro entry points to an array of expansion possibilities. */
1211 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1212 #define A(a) (1 << CGEN_INSN_##a)
1213 #else
1214 #define A(a) (1 << CGEN_INSN_/**/a)
1215 #endif
1216 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1217 #define OPERAND(op) FR30_OPERAND_##op
1218 #else
1219 #define OPERAND(op) FR30_OPERAND_/**/op
1220 #endif
1221 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
1222 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
1224 /* The macro instruction table. */
1226 static const CGEN_IBASE fr30_cgen_macro_insn_table[] =
1228 /* ldi8 $i8,$Ri */
1230 -1, "ldi8m", "ldi8", 16,
1231 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
1233 /* ldi20 $i20,$Ri */
1235 -1, "ldi20m", "ldi20", 32,
1236 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
1238 /* ldi32 $i32,$Ri */
1240 -1, "ldi32m", "ldi32", 48,
1241 { 0|A(NO_DIS)|A(ALIAS), { { { (1<<MACH_BASE), 0 } } } }
1245 /* The macro instruction opcode table. */
1247 static const CGEN_OPCODE fr30_cgen_macro_insn_opcode_table[] =
1249 /* ldi8 $i8,$Ri */
1251 { 0, 0, 0, 0 },
1252 { { MNEM, ' ', OP (I8), ',', OP (RI), 0 } },
1253 & ifmt_ldi8m, { 0xc000 }
1255 /* ldi20 $i20,$Ri */
1257 { 0, 0, 0, 0 },
1258 { { MNEM, ' ', OP (I20), ',', OP (RI), 0 } },
1259 & ifmt_ldi20m, { 0x9b00 }
1261 /* ldi32 $i32,$Ri */
1263 { 0, 0, 0, 0 },
1264 { { MNEM, ' ', OP (I32), ',', OP (RI), 0 } },
1265 & ifmt_ldi32m, { 0x9f80 }
1269 #undef A
1270 #undef OPERAND
1271 #undef MNEM
1272 #undef OP
1274 #ifndef CGEN_ASM_HASH_P
1275 #define CGEN_ASM_HASH_P(insn) 1
1276 #endif
1278 #ifndef CGEN_DIS_HASH_P
1279 #define CGEN_DIS_HASH_P(insn) 1
1280 #endif
1282 /* Return non-zero if INSN is to be added to the hash table.
1283 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
1285 static int
1286 asm_hash_insn_p (insn)
1287 const CGEN_INSN *insn ATTRIBUTE_UNUSED;
1289 return CGEN_ASM_HASH_P (insn);
1292 static int
1293 dis_hash_insn_p (insn)
1294 const CGEN_INSN *insn;
1296 /* If building the hash table and the NO-DIS attribute is present,
1297 ignore. */
1298 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
1299 return 0;
1300 return CGEN_DIS_HASH_P (insn);
1303 #ifndef CGEN_ASM_HASH
1304 #define CGEN_ASM_HASH_SIZE 127
1305 #ifdef CGEN_MNEMONIC_OPERANDS
1306 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
1307 #else
1308 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
1309 #endif
1310 #endif
1312 /* It doesn't make much sense to provide a default here,
1313 but while this is under development we do.
1314 BUFFER is a pointer to the bytes of the insn, target order.
1315 VALUE is the first base_insn_bitsize bits as an int in host order. */
1317 #ifndef CGEN_DIS_HASH
1318 #define CGEN_DIS_HASH_SIZE 256
1319 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
1320 #endif
1322 /* The result is the hash value of the insn.
1323 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
1325 static unsigned int
1326 asm_hash_insn (mnem)
1327 const char * mnem;
1329 return CGEN_ASM_HASH (mnem);
1332 /* BUF is a pointer to the bytes of the insn, target order.
1333 VALUE is the first base_insn_bitsize bits as an int in host order. */
1335 static unsigned int
1336 dis_hash_insn (buf, value)
1337 const char * buf ATTRIBUTE_UNUSED;
1338 CGEN_INSN_INT value ATTRIBUTE_UNUSED;
1340 return CGEN_DIS_HASH (buf, value);
1343 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
1345 static void
1346 set_fields_bitsize (CGEN_FIELDS *fields, int size)
1348 CGEN_FIELDS_BITSIZE (fields) = size;
1351 /* Function to call before using the operand instance table.
1352 This plugs the opcode entries and macro instructions into the cpu table. */
1354 void
1355 fr30_cgen_init_opcode_table (CGEN_CPU_DESC cd)
1357 int i;
1358 int num_macros = (sizeof (fr30_cgen_macro_insn_table) /
1359 sizeof (fr30_cgen_macro_insn_table[0]));
1360 const CGEN_IBASE *ib = & fr30_cgen_macro_insn_table[0];
1361 const CGEN_OPCODE *oc = & fr30_cgen_macro_insn_opcode_table[0];
1362 CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
1364 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
1365 for (i = 0; i < num_macros; ++i)
1367 insns[i].base = &ib[i];
1368 insns[i].opcode = &oc[i];
1369 fr30_cgen_build_insn_regex (& insns[i]);
1371 cd->macro_insn_table.init_entries = insns;
1372 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
1373 cd->macro_insn_table.num_init_entries = num_macros;
1375 oc = & fr30_cgen_insn_opcode_table[0];
1376 insns = (CGEN_INSN *) cd->insn_table.init_entries;
1377 for (i = 0; i < MAX_INSNS; ++i)
1379 insns[i].opcode = &oc[i];
1380 fr30_cgen_build_insn_regex (& insns[i]);
1383 cd->sizeof_fields = sizeof (CGEN_FIELDS);
1384 cd->set_fields_bitsize = set_fields_bitsize;
1386 cd->asm_hash_p = asm_hash_insn_p;
1387 cd->asm_hash = asm_hash_insn;
1388 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
1390 cd->dis_hash_p = dis_hash_insn_p;
1391 cd->dis_hash = dis_hash_insn;
1392 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;