opcodes/openrisc-opc.c

   1 /* Instruction opcode table for openrisc.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright 1996-2005 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License along
  20 with this program; if not, write to the Free Software Foundation, Inc.,
  21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22
  23 */
  24
  25 #include "sysdep.h"
  26 #include "ansidecl.h"
  27 #include "bfd.h"
  28 #include "symcat.h"
  29 #include "openrisc-desc.h"
  30 #include "openrisc-opc.h"
  31 #include "libiberty.h"
  32
  33 /* -- opc.c */
  34 /* -- */
  35 /* The hash functions are recorded here to help keep assembler code out of
  36    the disassembler and vice versa.  */
  37
  38 static int asm_hash_insn_p PARAMS ((const CGEN_INSN *));
  39 static unsigned int asm_hash_insn PARAMS ((const char *));
  40 static int dis_hash_insn_p PARAMS ((const CGEN_INSN *));
  41 static unsigned int dis_hash_insn PARAMS ((const char *, CGEN_INSN_INT));
  42
  43 /* Instruction formats.  */
  44
  45 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
  46 #define F(f) & openrisc_cgen_ifld_table[OPENRISC_##f]
  47 #else
  48 #define F(f) & openrisc_cgen_ifld_table[OPENRISC_/**/f]
  49 #endif
  50 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
  51   0, 0, 0x0, { { 0 } }
  52 };
  53
  54 static const CGEN_IFMT ifmt_l_j ATTRIBUTE_UNUSED = {
  55   32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_ABS26) }, { 0 } }
  56 };
  57
  58 static const CGEN_IFMT ifmt_l_jr ATTRIBUTE_UNUSED = {
  59   32, 32, 0xffe00000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP3) }, { F (F_OP4) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
  60 };
  61
  62 static const CGEN_IFMT ifmt_l_bal ATTRIBUTE_UNUSED = {
  63   32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_DISP26) }, { 0 } }
  64 };
  65
  66 static const CGEN_IFMT ifmt_l_movhi ATTRIBUTE_UNUSED = {
  67   32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
  68 };
  69
  70 static const CGEN_IFMT ifmt_l_mfsr ATTRIBUTE_UNUSED = {
  71   32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
  72 };
  73
  74 static const CGEN_IFMT ifmt_l_mtsr ATTRIBUTE_UNUSED = {
  75   32, 32, 0xfc0007ff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_I16_1) }, { 0 } }
  76 };
  77
  78 static const CGEN_IFMT ifmt_l_lw ATTRIBUTE_UNUSED = {
  79   32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
  80 };
  81
  82 static const CGEN_IFMT ifmt_l_sw ATTRIBUTE_UNUSED = {
  83   32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R3) }, { F (F_I16NC) }, { 0 } }
  84 };
  85
  86 static const CGEN_IFMT ifmt_l_sll ATTRIBUTE_UNUSED = {
  87   32, 32, 0xfc0007ff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_F_10_3) }, { F (F_OP6) }, { F (F_F_4_1) }, { F (F_OP7) }, { 0 } }
  88 };
  89
  90 static const CGEN_IFMT ifmt_l_slli ATTRIBUTE_UNUSED = {
  91   32, 32, 0xfc00ffe0, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_F_15_8) }, { F (F_OP6) }, { F (F_UIMM5) }, { 0 } }
  92 };
  93
  94 static const CGEN_IFMT ifmt_l_add ATTRIBUTE_UNUSED = {
  95   32, 32, 0xfc0007ff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_R3) }, { F (F_F_10_7) }, { F (F_OP7) }, { 0 } }
  96 };
  97
  98 static const CGEN_IFMT ifmt_l_addi ATTRIBUTE_UNUSED = {
  99   32, 32, 0xfc000000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_R1) }, { F (F_R2) }, { F (F_LO16) }, { 0 } }
 100 };
 101
 102 static const CGEN_IFMT ifmt_l_sfgts ATTRIBUTE_UNUSED = {
 103   32, 32, 0xffe007ff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP5) }, { F (F_R2) }, { F (F_R3) }, { F (F_F_10_11) }, { 0 } }
 104 };
 105
 106 static const CGEN_IFMT ifmt_l_sfgtsi ATTRIBUTE_UNUSED = {
 107   32, 32, 0xffe00000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP5) }, { F (F_R2) }, { F (F_SIMM16) }, { 0 } }
 108 };
 109
 110 static const CGEN_IFMT ifmt_l_sfgtui ATTRIBUTE_UNUSED = {
 111   32, 32, 0xffe00000, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP5) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
 112 };
 113
 114 #undef F
 115
 116 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 117 #define A(a) (1 << CGEN_INSN_##a)
 118 #else
 119 #define A(a) (1 << CGEN_INSN_/**/a)
 120 #endif
 121 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 122 #define OPERAND(op) OPENRISC_OPERAND_##op
 123 #else
 124 #define OPERAND(op) OPENRISC_OPERAND_/**/op
 125 #endif
 126 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 127 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 128
 129 /* The instruction table.  */
 130
 131 static const CGEN_OPCODE openrisc_cgen_insn_opcode_table[MAX_INSNS] =
 132 {
 133   /* Special null first entry.
 134      A `num' value of zero is thus invalid.
 135      Also, the special `invalid' insn resides here.  */
 136   { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
 137 /* l.j ${abs-26} */
 138   {
 139     { 0, 0, 0, 0 },
 140     { { MNEM, ' ', OP (ABS_26), 0 } },
 141     & ifmt_l_j, { 0x0 }
 142   },
 143 /* l.jal ${abs-26} */
 144   {
 145     { 0, 0, 0, 0 },
 146     { { MNEM, ' ', OP (ABS_26), 0 } },
 147     & ifmt_l_j, { 0x4000000 }
 148   },
 149 /* l.jr $rA */
 150   {
 151     { 0, 0, 0, 0 },
 152     { { MNEM, ' ', OP (RA), 0 } },
 153     & ifmt_l_jr, { 0x14000000 }
 154   },
 155 /* l.jalr $rA */
 156   {
 157     { 0, 0, 0, 0 },
 158     { { MNEM, ' ', OP (RA), 0 } },
 159     & ifmt_l_jr, { 0x14200000 }
 160   },
 161 /* l.bal ${disp-26} */
 162   {
 163     { 0, 0, 0, 0 },
 164     { { MNEM, ' ', OP (DISP_26), 0 } },
 165     & ifmt_l_bal, { 0x8000000 }
 166   },
 167 /* l.bnf ${disp-26} */
 168   {
 169     { 0, 0, 0, 0 },
 170     { { MNEM, ' ', OP (DISP_26), 0 } },
 171     & ifmt_l_bal, { 0xc000000 }
 172   },
 173 /* l.bf ${disp-26} */
 174   {
 175     { 0, 0, 0, 0 },
 176     { { MNEM, ' ', OP (DISP_26), 0 } },
 177     & ifmt_l_bal, { 0x10000000 }
 178   },
 179 /* l.brk ${uimm-16} */
 180   {
 181     { 0, 0, 0, 0 },
 182     { { MNEM, ' ', OP (UIMM_16), 0 } },
 183     & ifmt_l_jr, { 0x17000000 }
 184   },
 185 /* l.rfe $rA */
 186   {
 187     { 0, 0, 0, 0 },
 188     { { MNEM, ' ', OP (RA), 0 } },
 189     & ifmt_l_jr, { 0x14400000 }
 190   },
 191 /* l.sys ${uimm-16} */
 192   {
 193     { 0, 0, 0, 0 },
 194     { { MNEM, ' ', OP (UIMM_16), 0 } },
 195     & ifmt_l_jr, { 0x16000000 }
 196   },
 197 /* l.nop */
 198   {
 199     { 0, 0, 0, 0 },
 200     { { MNEM, 0 } },
 201     & ifmt_l_jr, { 0x15000000 }
 202   },
 203 /* l.movhi $rD,$hi16 */
 204   {
 205     { 0, 0, 0, 0 },
 206     { { MNEM, ' ', OP (RD), ',', OP (HI16), 0 } },
 207     & ifmt_l_movhi, { 0x18000000 }
 208   },
 209 /* l.mfsr $rD,$rA */
 210   {
 211     { 0, 0, 0, 0 },
 212     { { MNEM, ' ', OP (RD), ',', OP (RA), 0 } },
 213     & ifmt_l_mfsr, { 0x1c000000 }
 214   },
 215 /* l.mtsr $rA,$rB */
 216   {
 217     { 0, 0, 0, 0 },
 218     { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
 219     & ifmt_l_mtsr, { 0x40000000 }
 220   },
 221 /* l.lw $rD,${simm-16}($rA) */
 222   {
 223     { 0, 0, 0, 0 },
 224     { { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
 225     & ifmt_l_lw, { 0x80000000 }
 226   },
 227 /* l.lbz $rD,${simm-16}($rA) */
 228   {
 229     { 0, 0, 0, 0 },
 230     { { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
 231     & ifmt_l_lw, { 0x84000000 }
 232   },
 233 /* l.lbs $rD,${simm-16}($rA) */
 234   {
 235     { 0, 0, 0, 0 },
 236     { { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
 237     & ifmt_l_lw, { 0x88000000 }
 238   },
 239 /* l.lhz $rD,${simm-16}($rA) */
 240   {
 241     { 0, 0, 0, 0 },
 242     { { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
 243     & ifmt_l_lw, { 0x8c000000 }
 244   },
 245 /* l.lhs $rD,${simm-16}($rA) */
 246   {
 247     { 0, 0, 0, 0 },
 248     { { MNEM, ' ', OP (RD), ',', OP (SIMM_16), '(', OP (RA), ')', 0 } },
 249     & ifmt_l_lw, { 0x90000000 }
 250   },
 251 /* l.sw ${ui16nc}($rA),$rB */
 252   {
 253     { 0, 0, 0, 0 },
 254     { { MNEM, ' ', OP (UI16NC), '(', OP (RA), ')', ',', OP (RB), 0 } },
 255     & ifmt_l_sw, { 0xd4000000 }
 256   },
 257 /* l.sb ${ui16nc}($rA),$rB */
 258   {
 259     { 0, 0, 0, 0 },
 260     { { MNEM, ' ', OP (UI16NC), '(', OP (RA), ')', ',', OP (RB), 0 } },
 261     & ifmt_l_sw, { 0xd8000000 }
 262   },
 263 /* l.sh ${ui16nc}($rA),$rB */
 264   {
 265     { 0, 0, 0, 0 },
 266     { { MNEM, ' ', OP (UI16NC), '(', OP (RA), ')', ',', OP (RB), 0 } },
 267     & ifmt_l_sw, { 0xdc000000 }
 268   },
 269 /* l.sll $rD,$rA,$rB */
 270   {
 271     { 0, 0, 0, 0 },
 272     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
 273     & ifmt_l_sll, { 0xe0000008 }
 274   },
 275 /* l.slli $rD,$rA,${uimm-5} */
 276   {
 277     { 0, 0, 0, 0 },
 278     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM_5), 0 } },
 279     & ifmt_l_slli, { 0xb4000000 }
 280   },
 281 /* l.srl $rD,$rA,$rB */
 282   {
 283     { 0, 0, 0, 0 },
 284     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
 285     & ifmt_l_sll, { 0xe0000028 }
 286   },
 287 /* l.srli $rD,$rA,${uimm-5} */
 288   {
 289     { 0, 0, 0, 0 },
 290     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM_5), 0 } },
 291     & ifmt_l_slli, { 0xb4000020 }
 292   },
 293 /* l.sra $rD,$rA,$rB */
 294   {
 295     { 0, 0, 0, 0 },
 296     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
 297     & ifmt_l_sll, { 0xe0000048 }
 298   },
 299 /* l.srai $rD,$rA,${uimm-5} */
 300   {
 301     { 0, 0, 0, 0 },
 302     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM_5), 0 } },
 303     & ifmt_l_slli, { 0xb4000040 }
 304   },
 305 /* l.ror $rD,$rA,$rB */
 306   {
 307     { 0, 0, 0, 0 },
 308     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
 309     & ifmt_l_sll, { 0xe0000088 }
 310   },
 311 /* l.rori $rD,$rA,${uimm-5} */
 312   {
 313     { 0, 0, 0, 0 },
 314     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (UIMM_5), 0 } },
 315     & ifmt_l_slli, { 0xb4000080 }
 316   },
 317 /* l.add $rD,$rA,$rB */
 318   {
 319     { 0, 0, 0, 0 },
 320     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
 321     & ifmt_l_add, { 0xe0000000 }
 322   },
 323 /* l.addi $rD,$rA,$lo16 */
 324   {
 325     { 0, 0, 0, 0 },
 326     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
 327     & ifmt_l_addi, { 0x94000000 }
 328   },
 329 /* l.sub $rD,$rA,$rB */
 330   {
 331     { 0, 0, 0, 0 },
 332     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
 333     & ifmt_l_add, { 0xe0000002 }
 334   },
 335 /* l.subi $rD,$rA,$lo16 */
 336   {
 337     { 0, 0, 0, 0 },
 338     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
 339     & ifmt_l_addi, { 0x9c000000 }
 340   },
 341 /* l.and $rD,$rA,$rB */
 342   {
 343     { 0, 0, 0, 0 },
 344     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
 345     & ifmt_l_add, { 0xe0000003 }
 346   },
 347 /* l.andi $rD,$rA,$lo16 */
 348   {
 349     { 0, 0, 0, 0 },
 350     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
 351     & ifmt_l_addi, { 0xa0000000 }
 352   },
 353 /* l.or $rD,$rA,$rB */
 354   {
 355     { 0, 0, 0, 0 },
 356     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
 357     & ifmt_l_add, { 0xe0000004 }
 358   },
 359 /* l.ori $rD,$rA,$lo16 */
 360   {
 361     { 0, 0, 0, 0 },
 362     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
 363     & ifmt_l_addi, { 0xa4000000 }
 364   },
 365 /* l.xor $rD,$rA,$rB */
 366   {
 367     { 0, 0, 0, 0 },
 368     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
 369     & ifmt_l_add, { 0xe0000005 }
 370   },
 371 /* l.xori $rD,$rA,$lo16 */
 372   {
 373     { 0, 0, 0, 0 },
 374     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
 375     & ifmt_l_addi, { 0xa8000000 }
 376   },
 377 /* l.mul $rD,$rA,$rB */
 378   {
 379     { 0, 0, 0, 0 },
 380     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
 381     & ifmt_l_add, { 0xe0000006 }
 382   },
 383 /* l.muli $rD,$rA,$lo16 */
 384   {
 385     { 0, 0, 0, 0 },
 386     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (LO16), 0 } },
 387     & ifmt_l_addi, { 0xac000000 }
 388   },
 389 /* l.div $rD,$rA,$rB */
 390   {
 391     { 0, 0, 0, 0 },
 392     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
 393     & ifmt_l_add, { 0xe0000009 }
 394   },
 395 /* l.divu $rD,$rA,$rB */
 396   {
 397     { 0, 0, 0, 0 },
 398     { { MNEM, ' ', OP (RD), ',', OP (RA), ',', OP (RB), 0 } },
 399     & ifmt_l_add, { 0xe000000a }
 400   },
 401 /* l.sfgts $rA,$rB */
 402   {
 403     { 0, 0, 0, 0 },
 404     { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
 405     & ifmt_l_sfgts, { 0xe4c00000 }
 406   },
 407 /* l.sfgtu $rA,$rB */
 408   {
 409     { 0, 0, 0, 0 },
 410     { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
 411     & ifmt_l_sfgts, { 0xe4400000 }
 412   },
 413 /* l.sfges $rA,$rB */
 414   {
 415     { 0, 0, 0, 0 },
 416     { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
 417     & ifmt_l_sfgts, { 0xe4e00000 }
 418   },
 419 /* l.sfgeu $rA,$rB */
 420   {
 421     { 0, 0, 0, 0 },
 422     { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
 423     & ifmt_l_sfgts, { 0xe4600000 }
 424   },
 425 /* l.sflts $rA,$rB */
 426   {
 427     { 0, 0, 0, 0 },
 428     { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
 429     & ifmt_l_sfgts, { 0xe5000000 }
 430   },
 431 /* l.sfltu $rA,$rB */
 432   {
 433     { 0, 0, 0, 0 },
 434     { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
 435     & ifmt_l_sfgts, { 0xe4800000 }
 436   },
 437 /* l.sfles $rA,$rB */
 438   {
 439     { 0, 0, 0, 0 },
 440     { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
 441     & ifmt_l_sfgts, { 0xe5200000 }
 442   },
 443 /* l.sfleu $rA,$rB */
 444   {
 445     { 0, 0, 0, 0 },
 446     { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
 447     & ifmt_l_sfgts, { 0xe4a00000 }
 448   },
 449 /* l.sfgtsi $rA,${simm-16} */
 450   {
 451     { 0, 0, 0, 0 },
 452     { { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
 453     & ifmt_l_sfgtsi, { 0xb8c00000 }
 454   },
 455 /* l.sfgtui $rA,${uimm-16} */
 456   {
 457     { 0, 0, 0, 0 },
 458     { { MNEM, ' ', OP (RA), ',', OP (UIMM_16), 0 } },
 459     & ifmt_l_sfgtui, { 0xb8400000 }
 460   },
 461 /* l.sfgesi $rA,${simm-16} */
 462   {
 463     { 0, 0, 0, 0 },
 464     { { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
 465     & ifmt_l_sfgtsi, { 0xb8e00000 }
 466   },
 467 /* l.sfgeui $rA,${uimm-16} */
 468   {
 469     { 0, 0, 0, 0 },
 470     { { MNEM, ' ', OP (RA), ',', OP (UIMM_16), 0 } },
 471     & ifmt_l_sfgtui, { 0xb8600000 }
 472   },
 473 /* l.sfltsi $rA,${simm-16} */
 474   {
 475     { 0, 0, 0, 0 },
 476     { { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
 477     & ifmt_l_sfgtsi, { 0xb9000000 }
 478   },
 479 /* l.sfltui $rA,${uimm-16} */
 480   {
 481     { 0, 0, 0, 0 },
 482     { { MNEM, ' ', OP (RA), ',', OP (UIMM_16), 0 } },
 483     & ifmt_l_sfgtui, { 0xb8800000 }
 484   },
 485 /* l.sflesi $rA,${simm-16} */
 486   {
 487     { 0, 0, 0, 0 },
 488     { { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
 489     & ifmt_l_sfgtsi, { 0xb9200000 }
 490   },
 491 /* l.sfleui $rA,${uimm-16} */
 492   {
 493     { 0, 0, 0, 0 },
 494     { { MNEM, ' ', OP (RA), ',', OP (UIMM_16), 0 } },
 495     & ifmt_l_sfgtui, { 0xb8a00000 }
 496   },
 497 /* l.sfeq $rA,$rB */
 498   {
 499     { 0, 0, 0, 0 },
 500     { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
 501     & ifmt_l_sfgts, { 0xe4000000 }
 502   },
 503 /* l.sfeqi $rA,${simm-16} */
 504   {
 505     { 0, 0, 0, 0 },
 506     { { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
 507     & ifmt_l_sfgtsi, { 0xb8000000 }
 508   },
 509 /* l.sfne $rA,$rB */
 510   {
 511     { 0, 0, 0, 0 },
 512     { { MNEM, ' ', OP (RA), ',', OP (RB), 0 } },
 513     & ifmt_l_sfgts, { 0xe4200000 }
 514   },
 515 /* l.sfnei $rA,${simm-16} */
 516   {
 517     { 0, 0, 0, 0 },
 518     { { MNEM, ' ', OP (RA), ',', OP (SIMM_16), 0 } },
 519     & ifmt_l_sfgtsi, { 0xb8200000 }
 520   },
 521 };
 522
 523 #undef A
 524 #undef OPERAND
 525 #undef MNEM
 526 #undef OP
 527
 528 /* Formats for ALIAS macro-insns.  */
 529
 530 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 531 #define F(f) & openrisc_cgen_ifld_table[OPENRISC_##f]
 532 #else
 533 #define F(f) & openrisc_cgen_ifld_table[OPENRISC_/**/f]
 534 #endif
 535 static const CGEN_IFMT ifmt_l_ret ATTRIBUTE_UNUSED = {
 536   32, 32, 0xffffffff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP3) }, { F (F_OP4) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
 537 };
 538
 539 #undef F
 540
 541 /* Each non-simple macro entry points to an array of expansion possibilities.  */
 542
 543 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 544 #define A(a) (1 << CGEN_INSN_##a)
 545 #else
 546 #define A(a) (1 << CGEN_INSN_/**/a)
 547 #endif
 548 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 549 #define OPERAND(op) OPENRISC_OPERAND_##op
 550 #else
 551 #define OPERAND(op) OPENRISC_OPERAND_/**/op
 552 #endif
 553 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 554 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 555
 556 /* The macro instruction table.  */
 557
 558 static const CGEN_IBASE openrisc_cgen_macro_insn_table[] =
 559 {
 560 /* l.ret */
 561   {
 562     -1, "l-ret", "l.ret", 32,
 563     { 0|A(ALIAS), { (1<<MACH_BASE) } }
 564   },
 565 };
 566
 567 /* The macro instruction opcode table.  */
 568
 569 static const CGEN_OPCODE openrisc_cgen_macro_insn_opcode_table[] =
 570 {
 571 /* l.ret */
 572   {
 573     { 0, 0, 0, 0 },
 574     { { MNEM, 0 } },
 575     & ifmt_l_ret, { 0x140b0000 }
 576   },
 577 };
 578
 579 #undef A
 580 #undef OPERAND
 581 #undef MNEM
 582 #undef OP
 583
 584 #ifndef CGEN_ASM_HASH_P
 585 #define CGEN_ASM_HASH_P(insn) 1
 586 #endif
 587
 588 #ifndef CGEN_DIS_HASH_P
 589 #define CGEN_DIS_HASH_P(insn) 1
 590 #endif
 591
 592 /* Return non-zero if INSN is to be added to the hash table.
 593    Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file.  */
 594
 595 static int
 596 asm_hash_insn_p (insn)
 597      const CGEN_INSN *insn ATTRIBUTE_UNUSED;
 598 {
 599   return CGEN_ASM_HASH_P (insn);
 600 }
 601
 602 static int
 603 dis_hash_insn_p (insn)
 604      const CGEN_INSN *insn;
 605 {
 606   /* If building the hash table and the NO-DIS attribute is present,
 607      ignore.  */
 608   if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
 609     return 0;
 610   return CGEN_DIS_HASH_P (insn);
 611 }
 612
 613 #ifndef CGEN_ASM_HASH
 614 #define CGEN_ASM_HASH_SIZE 127
 615 #ifdef CGEN_MNEMONIC_OPERANDS
 616 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
 617 #else
 618 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
 619 #endif
 620 #endif
 621
 622 /* It doesn't make much sense to provide a default here,
 623    but while this is under development we do.
 624    BUFFER is a pointer to the bytes of the insn, target order.
 625    VALUE is the first base_insn_bitsize bits as an int in host order.  */
 626
 627 #ifndef CGEN_DIS_HASH
 628 #define CGEN_DIS_HASH_SIZE 256
 629 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
 630 #endif
 631
 632 /* The result is the hash value of the insn.
 633    Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file.  */
 634
 635 static unsigned int
 636 asm_hash_insn (mnem)
 637      const char * mnem;
 638 {
 639   return CGEN_ASM_HASH (mnem);
 640 }
 641
 642 /* BUF is a pointer to the bytes of the insn, target order.
 643    VALUE is the first base_insn_bitsize bits as an int in host order.  */
 644
 645 static unsigned int
 646 dis_hash_insn (buf, value)
 647      const char * buf ATTRIBUTE_UNUSED;
 648      CGEN_INSN_INT value ATTRIBUTE_UNUSED;
 649 {
 650   return CGEN_DIS_HASH (buf, value);
 651 }
 652
 653 static void set_fields_bitsize PARAMS ((CGEN_FIELDS *, int));
 654
 655 /* Set the recorded length of the insn in the CGEN_FIELDS struct.  */
 656
 657 static void
 658 set_fields_bitsize (fields, size)
 659      CGEN_FIELDS *fields;
 660      int size;
 661 {
 662   CGEN_FIELDS_BITSIZE (fields) = size;
 663 }
 664
 665 /* Function to call before using the operand instance table.
 666    This plugs the opcode entries and macro instructions into the cpu table.  */
 667
 668 void
 669 openrisc_cgen_init_opcode_table (cd)
 670      CGEN_CPU_DESC cd;
 671 {
 672   int i;
 673   int num_macros = (sizeof (openrisc_cgen_macro_insn_table) /
 674                     sizeof (openrisc_cgen_macro_insn_table[0]));
 675   const CGEN_IBASE *ib = & openrisc_cgen_macro_insn_table[0];
 676   const CGEN_OPCODE *oc = & openrisc_cgen_macro_insn_opcode_table[0];
 677   CGEN_INSN *insns = (CGEN_INSN *) xmalloc (num_macros * sizeof (CGEN_INSN));
 678   memset (insns, 0, num_macros * sizeof (CGEN_INSN));
 679   for (i = 0; i < num_macros; ++i)
 680     {
 681       insns[i].base = &ib[i];
 682       insns[i].opcode = &oc[i];
 683       openrisc_cgen_build_insn_regex (& insns[i]);
 684     }
 685   cd->macro_insn_table.init_entries = insns;
 686   cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
 687   cd->macro_insn_table.num_init_entries = num_macros;
 688
 689   oc = & openrisc_cgen_insn_opcode_table[0];
 690   insns = (CGEN_INSN *) cd->insn_table.init_entries;
 691   for (i = 0; i < MAX_INSNS; ++i)
 692     {
 693       insns[i].opcode = &oc[i];
 694       openrisc_cgen_build_insn_regex (& insns[i]);
 695     }
 696
 697   cd->sizeof_fields = sizeof (CGEN_FIELDS);
 698   cd->set_fields_bitsize = set_fields_bitsize;
 699
 700   cd->asm_hash_p = asm_hash_insn_p;
 701   cd->asm_hash = asm_hash_insn;
 702   cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
 703
 704   cd->dis_hash_p = dis_hash_insn_p;
 705   cd->dis_hash = dis_hash_insn;
 706   cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
 707 }